* hppa-tdep.c (hppa_gdbarch_init): Perform the ABI-specific gdbarch
[deliverable/binutils-gdb.git] / gdb / frv-tdep.c
CommitLineData
456f8b9d 1/* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
1e698235 2 Copyright 2002, 2003 Free Software Foundation, Inc.
456f8b9d
DB
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include "defs.h"
22#include "inferior.h"
23#include "symfile.h" /* for entry_point_address */
24#include "gdbcore.h"
25#include "arch-utils.h"
26#include "regcache.h"
27
28extern void _initialize_frv_tdep (void);
29
30static gdbarch_init_ftype frv_gdbarch_init;
31
32static gdbarch_register_name_ftype frv_register_name;
456f8b9d 33static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
456f8b9d 34static gdbarch_skip_prologue_ftype frv_skip_prologue;
456f8b9d
DB
35static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
36static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
456f8b9d
DB
37static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
38static gdbarch_init_extra_frame_info_ftype stupid_useless_init_extra_frame_info;
456f8b9d 39static gdbarch_push_arguments_ftype frv_push_arguments;
456f8b9d
DB
40static gdbarch_saved_pc_after_call_ftype frv_saved_pc_after_call;
41
42static void frv_pop_frame_regular (struct frame_info *frame);
43
44/* Register numbers. You can change these as needed, but don't forget
45 to update the simulator accordingly. */
46enum {
47 /* The total number of registers we know exist. */
48 frv_num_regs = 147,
49
50 /* Register numbers 0 -- 63 are always reserved for general-purpose
51 registers. The chip at hand may have less. */
52 first_gpr_regnum = 0,
53 sp_regnum = 1,
54 fp_regnum = 2,
55 struct_return_regnum = 3,
56 last_gpr_regnum = 63,
57
58 /* Register numbers 64 -- 127 are always reserved for floating-point
59 registers. The chip at hand may have less. */
60 first_fpr_regnum = 64,
61 last_fpr_regnum = 127,
62
63 /* Register numbers 128 on up are always reserved for special-purpose
64 registers. */
65 first_spr_regnum = 128,
66 pc_regnum = 128,
67 psr_regnum = 129,
68 ccr_regnum = 130,
69 cccr_regnum = 131,
70 tbr_regnum = 135,
71 brr_regnum = 136,
72 dbar0_regnum = 137,
73 dbar1_regnum = 138,
74 dbar2_regnum = 139,
75 dbar3_regnum = 140,
76 lr_regnum = 145,
77 lcr_regnum = 146,
78 last_spr_regnum = 146
79};
80
81static LONGEST frv_call_dummy_words[] =
82{0};
83
84
85/* The contents of this structure can only be trusted after we've
86 frv_frame_init_saved_regs on the frame. */
87struct frame_extra_info
88 {
89 /* The offset from our frame pointer to our caller's stack
90 pointer. */
91 int fp_to_callers_sp_offset;
92
93 /* Non-zero if we've saved our return address on the stack yet.
94 Zero if it's still sitting in the link register. */
95 int lr_saved_on_stack;
96 };
97
98
99/* A structure describing a particular variant of the FRV.
100 We allocate and initialize one of these structures when we create
101 the gdbarch object for a variant.
102
103 At the moment, all the FR variants we support differ only in which
104 registers are present; the portable code of GDB knows that
105 registers whose names are the empty string don't exist, so the
106 `register_names' array captures all the per-variant information we
107 need.
108
109 in the future, if we need to have per-variant maps for raw size,
110 virtual type, etc., we should replace register_names with an array
111 of structures, each of which gives all the necessary info for one
112 register. Don't stick parallel arrays in here --- that's so
113 Fortran. */
114struct gdbarch_tdep
115{
116 /* How many general-purpose registers does this variant have? */
117 int num_gprs;
118
119 /* How many floating-point registers does this variant have? */
120 int num_fprs;
121
122 /* How many hardware watchpoints can it support? */
123 int num_hw_watchpoints;
124
125 /* How many hardware breakpoints can it support? */
126 int num_hw_breakpoints;
127
128 /* Register names. */
129 char **register_names;
130};
131
132#define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
133
134
135/* Allocate a new variant structure, and set up default values for all
136 the fields. */
137static struct gdbarch_tdep *
5ae5f592 138new_variant (void)
456f8b9d
DB
139{
140 struct gdbarch_tdep *var;
141 int r;
142 char buf[20];
143
144 var = xmalloc (sizeof (*var));
145 memset (var, 0, sizeof (*var));
146
147 var->num_gprs = 64;
148 var->num_fprs = 64;
149 var->num_hw_watchpoints = 0;
150 var->num_hw_breakpoints = 0;
151
152 /* By default, don't supply any general-purpose or floating-point
153 register names. */
154 var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
155 for (r = 0; r < frv_num_regs; r++)
156 var->register_names[r] = "";
157
158 /* Do, however, supply default names for the special-purpose
159 registers. */
160 for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
161 {
162 sprintf (buf, "x%d", r);
163 var->register_names[r] = xstrdup (buf);
164 }
165
166 var->register_names[pc_regnum] = "pc";
167 var->register_names[lr_regnum] = "lr";
168 var->register_names[lcr_regnum] = "lcr";
169
170 var->register_names[psr_regnum] = "psr";
171 var->register_names[ccr_regnum] = "ccr";
172 var->register_names[cccr_regnum] = "cccr";
173 var->register_names[tbr_regnum] = "tbr";
174
175 /* Debug registers. */
176 var->register_names[brr_regnum] = "brr";
177 var->register_names[dbar0_regnum] = "dbar0";
178 var->register_names[dbar1_regnum] = "dbar1";
179 var->register_names[dbar2_regnum] = "dbar2";
180 var->register_names[dbar3_regnum] = "dbar3";
181
182 return var;
183}
184
185
186/* Indicate that the variant VAR has NUM_GPRS general-purpose
187 registers, and fill in the names array appropriately. */
188static void
189set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
190{
191 int r;
192
193 var->num_gprs = num_gprs;
194
195 for (r = 0; r < num_gprs; ++r)
196 {
197 char buf[20];
198
199 sprintf (buf, "gr%d", r);
200 var->register_names[first_gpr_regnum + r] = xstrdup (buf);
201 }
202}
203
204
205/* Indicate that the variant VAR has NUM_FPRS floating-point
206 registers, and fill in the names array appropriately. */
207static void
208set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
209{
210 int r;
211
212 var->num_fprs = num_fprs;
213
214 for (r = 0; r < num_fprs; ++r)
215 {
216 char buf[20];
217
218 sprintf (buf, "fr%d", r);
219 var->register_names[first_fpr_regnum + r] = xstrdup (buf);
220 }
221}
222
223
224static const char *
225frv_register_name (int reg)
226{
227 if (reg < 0)
228 return "?toosmall?";
229 if (reg >= frv_num_regs)
230 return "?toolarge?";
231
232 return CURRENT_VARIANT->register_names[reg];
233}
234
235
236static int
237frv_register_raw_size (int reg)
238{
239 return 4;
240}
241
242static int
243frv_register_virtual_size (int reg)
244{
245 return 4;
246}
247
248static struct type *
249frv_register_virtual_type (int reg)
250{
251 if (reg >= 64 && reg <= 127)
252 return builtin_type_float;
253 else
254 return builtin_type_int;
255}
256
257static int
258frv_register_byte (int reg)
259{
260 return (reg * 4);
261}
262
263static const unsigned char *
264frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
265{
266 static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
267 *lenp = sizeof (breakpoint);
268 return breakpoint;
269}
270
271static CORE_ADDR
272frv_frame_chain (struct frame_info *frame)
273{
274 CORE_ADDR saved_fp_addr;
275
276 if (frame->saved_regs && frame->saved_regs[fp_regnum] != 0)
277 saved_fp_addr = frame->saved_regs[fp_regnum];
278 else
279 /* Just assume it was saved in the usual place. */
280 saved_fp_addr = frame->frame;
281
282 return read_memory_integer (saved_fp_addr, 4);
283}
284
285static CORE_ADDR
286frv_frame_saved_pc (struct frame_info *frame)
287{
288 frv_frame_init_saved_regs (frame);
289
290 /* Perhaps the prologue analyzer recorded where it was stored.
291 (As of 14 Oct 2001, it never does.) */
292 if (frame->saved_regs && frame->saved_regs[pc_regnum] != 0)
293 return read_memory_integer (frame->saved_regs[pc_regnum], 4);
294
295 /* If the prologue analyzer tells us the link register was saved on
296 the stack, get it from there. */
297 if (frame->extra_info->lr_saved_on_stack)
298 return read_memory_integer (frame->frame + 8, 4);
299
300 /* Otherwise, it's still in LR.
301 However, if FRAME isn't the youngest frame, this is kind of
302 suspicious --- if this frame called somebody else, then its LR
303 has certainly been overwritten. */
304 if (! frame->next)
305 return read_register (lr_regnum);
306
307 /* By default, assume it's saved in the standard place, relative to
308 the frame pointer. */
309 return read_memory_integer (frame->frame + 8, 4);
310}
311
312
313/* Return true if REG is a caller-saves ("scratch") register,
314 false otherwise. */
315static int
316is_caller_saves_reg (int reg)
317{
318 return ((4 <= reg && reg <= 7)
319 || (14 <= reg && reg <= 15)
320 || (32 <= reg && reg <= 47));
321}
322
323
324/* Return true if REG is a callee-saves register, false otherwise. */
325static int
326is_callee_saves_reg (int reg)
327{
328 return ((16 <= reg && reg <= 31)
329 || (48 <= reg && reg <= 63));
330}
331
332
333/* Return true if REG is an argument register, false otherwise. */
334static int
335is_argument_reg (int reg)
336{
337 return (8 <= reg && reg <= 13);
338}
339
340
341/* Scan an FR-V prologue, starting at PC, until frame->PC.
342 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
343 We assume FRAME's saved_regs array has already been allocated and cleared.
344 Return the first PC value after the prologue.
345
346 Note that, for unoptimized code, we almost don't need this function
347 at all; all arguments and locals live on the stack, so we just need
348 the FP to find everything. The catch: structures passed by value
349 have their addresses living in registers; they're never spilled to
350 the stack. So if you ever want to be able to get to these
351 arguments in any frame but the top, you'll need to do this serious
352 prologue analysis. */
353static CORE_ADDR
354frv_analyze_prologue (CORE_ADDR pc, struct frame_info *frame)
355{
356 /* When writing out instruction bitpatterns, we use the following
357 letters to label instruction fields:
358 P - The parallel bit. We don't use this.
359 J - The register number of GRj in the instruction description.
360 K - The register number of GRk in the instruction description.
361 I - The register number of GRi.
362 S - a signed imediate offset.
363 U - an unsigned immediate offset.
364
365 The dots below the numbers indicate where hex digit boundaries
366 fall, to make it easier to check the numbers. */
367
368 /* Non-zero iff we've seen the instruction that initializes the
369 frame pointer for this function's frame. */
370 int fp_set = 0;
371
372 /* If fp_set is non_zero, then this is the distance from
373 the stack pointer to frame pointer: fp = sp + fp_offset. */
374 int fp_offset = 0;
375
376 /* Total size of frame prior to any alloca operations. */
377 int framesize = 0;
378
379 /* The number of the general-purpose register we saved the return
380 address ("link register") in, or -1 if we haven't moved it yet. */
381 int lr_save_reg = -1;
382
383 /* Non-zero iff we've saved the LR onto the stack. */
384 int lr_saved_on_stack = 0;
385
386 /* If gr_saved[i] is non-zero, then we've noticed that general
387 register i has been saved at gr_sp_offset[i] from the stack
388 pointer. */
389 char gr_saved[64];
390 int gr_sp_offset[64];
391
392 memset (gr_saved, 0, sizeof (gr_saved));
393
394 while (! frame || pc < frame->pc)
395 {
396 LONGEST op = read_memory_integer (pc, 4);
397
398 /* The tests in this chain of ifs should be in order of
399 decreasing selectivity, so that more particular patterns get
400 to fire before less particular patterns. */
401
402 /* Setting the FP from the SP:
403 ori sp, 0, fp
404 P 000010 0100010 000001 000000000000 = 0x04881000
405 0 111111 1111111 111111 111111111111 = 0x7fffffff
406 . . . . . . . .
407 We treat this as part of the prologue. */
408 if ((op & 0x7fffffff) == 0x04881000)
409 {
410 fp_set = 1;
411 fp_offset = 0;
412 }
413
414 /* Move the link register to the scratch register grJ, before saving:
415 movsg lr, grJ
416 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
417 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
418 . . . . . . . .
419 We treat this as part of the prologue. */
420 else if ((op & 0x7fffffc0) == 0x080d01c0)
421 {
422 int gr_j = op & 0x3f;
423
424 /* If we're moving it to a scratch register, that's fine. */
425 if (is_caller_saves_reg (gr_j))
426 lr_save_reg = gr_j;
427 /* Otherwise it's not a prologue instruction that we
428 recognize. */
429 else
430 break;
431 }
432
433 /* To save multiple callee-saves registers on the stack, at
434 offset zero:
435
436 std grK,@(sp,gr0)
437 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
438 0 000000 1111111 111111 111111 111111 = 0x01ffffff
439
440 stq grK,@(sp,gr0)
441 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
442 0 000000 1111111 111111 111111 111111 = 0x01ffffff
443 . . . . . . . .
444 We treat this as part of the prologue, and record the register's
445 saved address in the frame structure. */
446 else if ((op & 0x01ffffff) == 0x000c10c0
447 || (op & 0x01ffffff) == 0x000c1100)
448 {
449 int gr_k = ((op >> 25) & 0x3f);
450 int ope = ((op >> 6) & 0x3f);
451 int count;
452 int i;
453
454 /* Is it an std or an stq? */
455 if (ope == 0x03)
456 count = 2;
457 else
458 count = 4;
459
460 /* Is it really a callee-saves register? */
461 if (is_callee_saves_reg (gr_k))
462 {
463 for (i = 0; i < count; i++)
464 {
465 gr_saved[gr_k + i] = 1;
466 gr_sp_offset[gr_k + i] = 4 * i;
467 }
468 }
469 else
470 /* It's not a prologue instruction. */
471 break;
472 }
473
474 /* Adjusting the stack pointer. (The stack pointer is GR1.)
475 addi sp, S, sp
476 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
477 0 111111 1111111 111111 000000000000 = 0x7ffff000
478 . . . . . . . .
479 We treat this as part of the prologue. */
480 else if ((op & 0x7ffff000) == 0x02401000)
481 {
482 /* Sign-extend the twelve-bit field.
483 (Isn't there a better way to do this?) */
484 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
485
486 framesize -= s;
487 }
488
489 /* Setting the FP to a constant distance from the SP:
490 addi sp, S, fp
491 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
492 0 111111 1111111 111111 000000000000 = 0x7ffff000
493 . . . . . . . .
494 We treat this as part of the prologue. */
495 else if ((op & 0x7ffff000) == 0x04401000)
496 {
497 /* Sign-extend the twelve-bit field.
498 (Isn't there a better way to do this?) */
499 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
500 fp_set = 1;
501 fp_offset = s;
502 }
503
504 /* To spill an argument register to a scratch register:
505 ori GRi, 0, GRk
506 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
507 0 000000 1111111 000000 111111111111 = 0x01fc0fff
508 . . . . . . . .
509 For the time being, we treat this as a prologue instruction,
510 assuming that GRi is an argument register. This one's kind
511 of suspicious, because it seems like it could be part of a
512 legitimate body instruction. But we only come here when the
513 source info wasn't helpful, so we have to do the best we can.
514 Hopefully once GCC and GDB agree on how to emit line number
515 info for prologues, then this code will never come into play. */
516 else if ((op & 0x01fc0fff) == 0x00880000)
517 {
518 int gr_i = ((op >> 12) & 0x3f);
519
520 /* If the source isn't an arg register, then this isn't a
521 prologue instruction. */
522 if (! is_argument_reg (gr_i))
523 break;
524 }
525
526 /* To spill 16-bit values to the stack:
527 sthi GRk, @(fp, s)
528 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
529 0 000000 1111111 111111 000000000000 = 0x01fff000
530 . . . . . . . .
531 And for 8-bit values, we use STB instructions.
532 stbi GRk, @(fp, s)
533 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
534 0 000000 1111111 111111 000000000000 = 0x01fff000
535 . . . . . . . .
536 We check that GRk is really an argument register, and treat
537 all such as part of the prologue. */
538 else if ( (op & 0x01fff000) == 0x01442000
539 || (op & 0x01fff000) == 0x01402000)
540 {
541 int gr_k = ((op >> 25) & 0x3f);
542
543 if (! is_argument_reg (gr_k))
544 break; /* Source isn't an arg register. */
545 }
546
547 /* To save multiple callee-saves register on the stack, at a
548 non-zero offset:
549
550 stdi GRk, @(sp, s)
551 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
552 0 000000 1111111 111111 000000000000 = 0x01fff000
553 . . . . . . . .
554 stqi GRk, @(sp, s)
555 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
556 0 000000 1111111 111111 000000000000 = 0x01fff000
557 . . . . . . . .
558 We treat this as part of the prologue, and record the register's
559 saved address in the frame structure. */
560 else if ((op & 0x01fff000) == 0x014c1000
561 || (op & 0x01fff000) == 0x01501000)
562 {
563 int gr_k = ((op >> 25) & 0x3f);
564 int count;
565 int i;
566
567 /* Is it a stdi or a stqi? */
568 if ((op & 0x01fff000) == 0x014c1000)
569 count = 2;
570 else
571 count = 4;
572
573 /* Is it really a callee-saves register? */
574 if (is_callee_saves_reg (gr_k))
575 {
576 /* Sign-extend the twelve-bit field.
577 (Isn't there a better way to do this?) */
578 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
579
580 for (i = 0; i < count; i++)
581 {
582 gr_saved[gr_k + i] = 1;
583 gr_sp_offset[gr_k + i] = s + (4 * i);
584 }
585 }
586 else
587 /* It's not a prologue instruction. */
588 break;
589 }
590
591 /* Storing any kind of integer register at any constant offset
592 from any other register.
593
594 st GRk, @(GRi, gr0)
595 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
596 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
597 . . . . . . . .
598 sti GRk, @(GRi, d12)
599 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
600 0 000000 1111111 000000 000000000000 = 0x01fc0000
601 . . . . . . . .
602 These could be almost anything, but a lot of prologue
603 instructions fall into this pattern, so let's decode the
604 instruction once, and then work at a higher level. */
605 else if (((op & 0x01fc0fff) == 0x000c0080)
606 || ((op & 0x01fc0000) == 0x01480000))
607 {
608 int gr_k = ((op >> 25) & 0x3f);
609 int gr_i = ((op >> 12) & 0x3f);
610 int offset;
611
612 /* Are we storing with gr0 as an offset, or using an
613 immediate value? */
614 if ((op & 0x01fc0fff) == 0x000c0080)
615 offset = 0;
616 else
617 offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
618
619 /* If the address isn't relative to the SP or FP, it's not a
620 prologue instruction. */
621 if (gr_i != sp_regnum && gr_i != fp_regnum)
622 break;
623
624 /* Saving the old FP in the new frame (relative to the SP). */
625 if (gr_k == fp_regnum && gr_i == sp_regnum)
626 ;
627
628 /* Saving callee-saves register(s) on the stack, relative to
629 the SP. */
630 else if (gr_i == sp_regnum
631 && is_callee_saves_reg (gr_k))
632 {
633 gr_saved[gr_k] = 1;
634 gr_sp_offset[gr_k] = offset;
635 }
636
637 /* Saving the scratch register holding the return address. */
638 else if (lr_save_reg != -1
639 && gr_k == lr_save_reg)
640 lr_saved_on_stack = 1;
641
642 /* Spilling int-sized arguments to the stack. */
643 else if (is_argument_reg (gr_k))
644 ;
645
646 /* It's not a store instruction we recognize, so this must
647 be the end of the prologue. */
648 else
649 break;
650 }
651
652 /* It's not any instruction we recognize, so this must be the end
653 of the prologue. */
654 else
655 break;
656
657 pc += 4;
658 }
659
660 if (frame)
661 {
662 frame->extra_info->lr_saved_on_stack = lr_saved_on_stack;
663
664 /* If we know the relationship between the stack and frame
665 pointers, record the addresses of the registers we noticed.
666 Note that we have to do this as a separate step at the end,
667 because instructions may save relative to the SP, but we need
668 their addresses relative to the FP. */
669 if (fp_set)
670 {
671 int i;
672
673 for (i = 0; i < 64; i++)
674 if (gr_saved[i])
675 frame->saved_regs[i] = (frame->frame
676 - fp_offset + gr_sp_offset[i]);
677
678 frame->extra_info->fp_to_callers_sp_offset = framesize - fp_offset;
679 }
680 }
681
682 return pc;
683}
684
685
686static CORE_ADDR
687frv_skip_prologue (CORE_ADDR pc)
688{
689 CORE_ADDR func_addr, func_end, new_pc;
690
691 new_pc = pc;
692
693 /* If the line table has entry for a line *within* the function
694 (i.e., not in the prologue, and not past the end), then that's
695 our location. */
696 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
697 {
698 struct symtab_and_line sal;
699
700 sal = find_pc_line (func_addr, 0);
701
702 if (sal.line != 0 && sal.end < func_end)
703 {
704 new_pc = sal.end;
705 }
706 }
707
708 /* The FR-V prologue is at least five instructions long (twenty bytes).
709 If we didn't find a real source location past that, then
710 do a full analysis of the prologue. */
711 if (new_pc < pc + 20)
712 new_pc = frv_analyze_prologue (pc, 0);
713
714 return new_pc;
715}
716
717static void
718frv_frame_init_saved_regs (struct frame_info *frame)
719{
720 if (frame->saved_regs)
721 return;
722
723 frame_saved_regs_zalloc (frame);
724 frame->saved_regs[fp_regnum] = frame->frame;
725
726 /* Find the beginning of this function, so we can analyze its
727 prologue. */
728 {
729 CORE_ADDR func_addr, func_end;
730
731 if (find_pc_partial_function (frame->pc, NULL, &func_addr, &func_end))
732 frv_analyze_prologue (func_addr, frame);
733 }
734}
735
456f8b9d
DB
736static void
737frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
738{
739 memcpy (valbuf, (regbuf
740 + frv_register_byte (8)
741 + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
742 TYPE_LENGTH (type));
743}
744
745static CORE_ADDR
746frv_extract_struct_value_address (char *regbuf)
747{
7c0b4a20
AC
748 return extract_unsigned_integer (regbuf + frv_register_byte (struct_return_regnum),
749 4);
456f8b9d
DB
750}
751
752static void
753frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
754{
755 write_register (struct_return_regnum, addr);
756}
757
758static int
759frv_frameless_function_invocation (struct frame_info *frame)
760{
761 return frameless_look_for_prologue (frame);
762}
763
764static CORE_ADDR
765frv_saved_pc_after_call (struct frame_info *frame)
766{
767 return read_register (lr_regnum);
768}
769
770static void
771frv_init_extra_frame_info (int fromleaf, struct frame_info *frame)
772{
a00a19e9 773 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
456f8b9d
DB
774 frame->extra_info->fp_to_callers_sp_offset = 0;
775 frame->extra_info->lr_saved_on_stack = 0;
776}
777
778#define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
779#define ROUND_DOWN(n,a) ((n) & ~((a)-1))
780
781static CORE_ADDR
782frv_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
783 int struct_return, CORE_ADDR struct_addr)
784{
785 int argreg;
786 int argnum;
787 char *val;
788 char valbuf[4];
789 struct value *arg;
790 struct type *arg_type;
791 int len;
792 enum type_code typecode;
793 CORE_ADDR regval;
794 int stack_space;
795 int stack_offset;
796
797#if 0
798 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
799 nargs, (int) sp, struct_return, struct_addr);
800#endif
801
802 stack_space = 0;
803 for (argnum = 0; argnum < nargs; ++argnum)
804 stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
805
806 stack_space -= (6 * 4);
807 if (stack_space > 0)
808 sp -= stack_space;
809
810 /* Make sure stack is dword aligned. */
811 sp = ROUND_DOWN (sp, 8);
812
813 stack_offset = 0;
814
815 argreg = 8;
816
817 if (struct_return)
818 write_register (struct_return_regnum, struct_addr);
819
820 for (argnum = 0; argnum < nargs; ++argnum)
821 {
822 arg = args[argnum];
823 arg_type = check_typedef (VALUE_TYPE (arg));
824 len = TYPE_LENGTH (arg_type);
825 typecode = TYPE_CODE (arg_type);
826
827 if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
828 {
fbd9dcd3 829 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (arg));
456f8b9d
DB
830 typecode = TYPE_CODE_PTR;
831 len = 4;
832 val = valbuf;
833 }
834 else
835 {
836 val = (char *) VALUE_CONTENTS (arg);
837 }
838
839 while (len > 0)
840 {
841 int partial_len = (len < 4 ? len : 4);
842
843 if (argreg < 14)
844 {
7c0b4a20 845 regval = extract_unsigned_integer (val, partial_len);
456f8b9d
DB
846#if 0
847 printf(" Argnum %d data %x -> reg %d\n",
848 argnum, (int) regval, argreg);
849#endif
850 write_register (argreg, regval);
851 ++argreg;
852 }
853 else
854 {
855#if 0
856 printf(" Argnum %d data %x -> offset %d (%x)\n",
857 argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
858#endif
859 write_memory (sp + stack_offset, val, partial_len);
860 stack_offset += ROUND_UP(partial_len, 4);
861 }
862 len -= partial_len;
863 val += partial_len;
864 }
865 }
866 return sp;
867}
868
869static CORE_ADDR
870frv_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
871{
872 write_register (lr_regnum, CALL_DUMMY_ADDRESS ());
873 return sp;
874}
875
876static void
877frv_store_return_value (struct type *type, char *valbuf)
878{
879 int length = TYPE_LENGTH (type);
880 int reg8_offset = frv_register_byte (8);
881
882 if (length <= 4)
73937e03
AC
883 deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf,
884 length);
456f8b9d 885 else if (length == 8)
73937e03 886 deprecated_write_register_bytes (reg8_offset, valbuf, length);
456f8b9d
DB
887 else
888 internal_error (__FILE__, __LINE__,
889 "Don't know how to return a %d-byte value.", length);
890}
891
892static void
893frv_pop_frame (void)
894{
895 generic_pop_current_frame (frv_pop_frame_regular);
896}
897
898static void
899frv_pop_frame_regular (struct frame_info *frame)
900{
901 CORE_ADDR fp;
902 int regno;
903
904 fp = frame->frame;
905
906 frv_frame_init_saved_regs (frame);
907
908 write_register (pc_regnum, frv_frame_saved_pc (frame));
909 for (regno = 0; regno < frv_num_regs; ++regno)
910 {
911 if (frame->saved_regs[regno]
912 && regno != pc_regnum
913 && regno != sp_regnum)
914 {
915 write_register (regno,
916 read_memory_integer (frame->saved_regs[regno], 4));
917 }
918 }
919 write_register (sp_regnum, fp + frame->extra_info->fp_to_callers_sp_offset);
920 flush_cached_frames ();
921}
922
923
924static void
925frv_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
926 CORE_ADDR *targ_addr, int *targ_len)
927{
928 *targ_addr = memaddr;
929 *targ_len = nr_bytes;
930}
931
932
933/* Hardware watchpoint / breakpoint support for the FR500
934 and FR400. */
935
936int
937frv_check_watch_resources (int type, int cnt, int ot)
938{
939 struct gdbarch_tdep *var = CURRENT_VARIANT;
940
941 /* Watchpoints not supported on simulator. */
942 if (strcmp (target_shortname, "sim") == 0)
943 return 0;
944
945 if (type == bp_hardware_breakpoint)
946 {
947 if (var->num_hw_breakpoints == 0)
948 return 0;
949 else if (cnt <= var->num_hw_breakpoints)
950 return 1;
951 }
952 else
953 {
954 if (var->num_hw_watchpoints == 0)
955 return 0;
956 else if (ot)
957 return -1;
958 else if (cnt <= var->num_hw_watchpoints)
959 return 1;
960 }
961 return -1;
962}
963
964
965CORE_ADDR
5ae5f592 966frv_stopped_data_address (void)
456f8b9d
DB
967{
968 CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
969
970 brr = read_register (brr_regnum);
971 dbar0 = read_register (dbar0_regnum);
972 dbar1 = read_register (dbar1_regnum);
973 dbar2 = read_register (dbar2_regnum);
974 dbar3 = read_register (dbar3_regnum);
975
976 if (brr & (1<<11))
977 return dbar0;
978 else if (brr & (1<<10))
979 return dbar1;
980 else if (brr & (1<<9))
981 return dbar2;
982 else if (brr & (1<<8))
983 return dbar3;
984 else
985 return 0;
986}
987
988static struct gdbarch *
989frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
990{
991 struct gdbarch *gdbarch;
992 struct gdbarch_tdep *var;
993
994 /* Check to see if we've already built an appropriate architecture
995 object for this executable. */
996 arches = gdbarch_list_lookup_by_info (arches, &info);
997 if (arches)
998 return arches->gdbarch;
999
1000 /* Select the right tdep structure for this variant. */
1001 var = new_variant ();
1002 switch (info.bfd_arch_info->mach)
1003 {
1004 case bfd_mach_frv:
1005 case bfd_mach_frvsimple:
1006 case bfd_mach_fr500:
1007 case bfd_mach_frvtomcat:
1008 set_variant_num_gprs (var, 64);
1009 set_variant_num_fprs (var, 64);
1010 break;
1011
1012 case bfd_mach_fr400:
1013 set_variant_num_gprs (var, 32);
1014 set_variant_num_fprs (var, 32);
1015 break;
1016
1017 default:
1018 /* Never heard of this variant. */
1019 return 0;
1020 }
1021
1022 gdbarch = gdbarch_alloc (&info, var);
1023
a5afb99f
AC
1024 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1025 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1026 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1027
456f8b9d
DB
1028 set_gdbarch_short_bit (gdbarch, 16);
1029 set_gdbarch_int_bit (gdbarch, 32);
1030 set_gdbarch_long_bit (gdbarch, 32);
1031 set_gdbarch_long_long_bit (gdbarch, 64);
1032 set_gdbarch_float_bit (gdbarch, 32);
1033 set_gdbarch_double_bit (gdbarch, 64);
1034 set_gdbarch_long_double_bit (gdbarch, 64);
1035 set_gdbarch_ptr_bit (gdbarch, 32);
1036
1037 set_gdbarch_num_regs (gdbarch, frv_num_regs);
1038 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
0ba6dca9 1039 set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
456f8b9d
DB
1040 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1041
1042 set_gdbarch_register_name (gdbarch, frv_register_name);
b1e29e33 1043 set_gdbarch_deprecated_register_size (gdbarch, 4);
b8b527c5 1044 set_gdbarch_deprecated_register_bytes (gdbarch, frv_num_regs * 4);
9c04cab7
AC
1045 set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte);
1046 set_gdbarch_deprecated_register_raw_size (gdbarch, frv_register_raw_size);
a0ed5532 1047 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4);
9c04cab7 1048 set_gdbarch_deprecated_register_virtual_size (gdbarch, frv_register_virtual_size);
a0ed5532 1049 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4);
9c04cab7 1050 set_gdbarch_deprecated_register_virtual_type (gdbarch, frv_register_virtual_type);
456f8b9d
DB
1051
1052 set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
1053 set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
1054
456f8b9d
DB
1055 set_gdbarch_frame_args_skip (gdbarch, 0);
1056 set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
1057
6913c89a 1058 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, frv_saved_pc_after_call);
456f8b9d 1059
618ce49f 1060 set_gdbarch_deprecated_frame_chain (gdbarch, frv_frame_chain);
8bedc050 1061 set_gdbarch_deprecated_frame_saved_pc (gdbarch, frv_frame_saved_pc);
456f8b9d 1062
f30ee0bc 1063 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, frv_frame_init_saved_regs);
456f8b9d 1064
1fd35568 1065 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
456f8b9d
DB
1066 set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
1067
4183d812 1068 set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
ebba8386 1069 set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
456f8b9d
DB
1070 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
1071
1072 /* Settings for calling functions in the inferior. */
b81774d8 1073 set_gdbarch_deprecated_push_arguments (gdbarch, frv_push_arguments);
28f617b3 1074 set_gdbarch_deprecated_push_return_address (gdbarch, frv_push_return_address);
749b82f6 1075 set_gdbarch_deprecated_pop_frame (gdbarch, frv_pop_frame);
456f8b9d 1076
b1e29e33
AC
1077 set_gdbarch_deprecated_call_dummy_words (gdbarch, frv_call_dummy_words);
1078 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (frv_call_dummy_words));
e9582e71 1079 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, frv_init_extra_frame_info);
456f8b9d
DB
1080
1081 /* Settings that should be unnecessary. */
1082 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1083
456f8b9d 1084 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
b46e02f6 1085 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
456f8b9d 1086
ae45cd16 1087 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
456f8b9d 1088
456f8b9d
DB
1089 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1090 set_gdbarch_function_start_offset (gdbarch, 0);
456f8b9d
DB
1091
1092 set_gdbarch_remote_translate_xfer_address
1093 (gdbarch, frv_remote_translate_xfer_address);
1094
1095 /* Hardware watchpoint / breakpoint support. */
1096 switch (info.bfd_arch_info->mach)
1097 {
1098 case bfd_mach_frv:
1099 case bfd_mach_frvsimple:
1100 case bfd_mach_fr500:
1101 case bfd_mach_frvtomcat:
1102 /* fr500-style hardware debugging support. */
1103 var->num_hw_watchpoints = 4;
1104 var->num_hw_breakpoints = 4;
1105 break;
1106
1107 case bfd_mach_fr400:
1108 /* fr400-style hardware debugging support. */
1109 var->num_hw_watchpoints = 2;
1110 var->num_hw_breakpoints = 4;
1111 break;
1112
1113 default:
1114 /* Otherwise, assume we don't have hardware debugging support. */
1115 var->num_hw_watchpoints = 0;
1116 var->num_hw_breakpoints = 0;
1117 break;
1118 }
1119
1120 return gdbarch;
1121}
1122
1123void
1124_initialize_frv_tdep (void)
1125{
1126 register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);
1127
d7a27068 1128 deprecated_tm_print_insn = print_insn_frv;
456f8b9d
DB
1129}
1130
1131\f
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