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0a30fbc4 | 1 | /* GNU/Linux/ARM specific low level interface, for the remote server for GDB. |
9308fc88 | 2 | Copyright (C) 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
4c38e0a4 | 3 | 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
0a30fbc4 DJ |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
0a30fbc4 DJ |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
0a30fbc4 DJ |
19 | |
20 | #include "server.h" | |
58caa3dc | 21 | #include "linux-low.h" |
0a30fbc4 | 22 | |
58d6951d | 23 | #include <elf.h> |
9308fc88 DJ |
24 | #include <sys/ptrace.h> |
25 | ||
26 | #include "gdb_proc_service.h" | |
27 | ||
58d6951d | 28 | /* Defined in auto-generated files. */ |
d05b4ac3 | 29 | void init_registers_arm (void); |
d05b4ac3 | 30 | void init_registers_arm_with_iwmmxt (void); |
58d6951d DJ |
31 | void init_registers_arm_with_vfpv2 (void); |
32 | void init_registers_arm_with_vfpv3 (void); | |
33 | void init_registers_arm_with_neon (void); | |
d05b4ac3 | 34 | |
9308fc88 DJ |
35 | #ifndef PTRACE_GET_THREAD_AREA |
36 | #define PTRACE_GET_THREAD_AREA 22 | |
37 | #endif | |
38 | ||
fb1e4ffc DJ |
39 | #ifndef PTRACE_GETWMMXREGS |
40 | # define PTRACE_GETWMMXREGS 18 | |
41 | # define PTRACE_SETWMMXREGS 19 | |
42 | #endif | |
43 | ||
58d6951d DJ |
44 | #ifndef PTRACE_GETVFPREGS |
45 | # define PTRACE_GETVFPREGS 27 | |
46 | # define PTRACE_SETVFPREGS 28 | |
47 | #endif | |
48 | ||
49 | static unsigned long arm_hwcap; | |
50 | ||
51 | /* These are in <asm/elf.h> in current kernels. */ | |
52 | #define HWCAP_VFP 64 | |
53 | #define HWCAP_IWMMXT 512 | |
54 | #define HWCAP_NEON 4096 | |
55 | #define HWCAP_VFPv3 8192 | |
56 | #define HWCAP_VFPv3D16 16384 | |
57 | ||
0a30fbc4 DJ |
58 | #ifdef HAVE_SYS_REG_H |
59 | #include <sys/reg.h> | |
60 | #endif | |
61 | ||
23ce3b1c | 62 | #define arm_num_regs 26 |
0a30fbc4 | 63 | |
2ec06d2e | 64 | static int arm_regmap[] = { |
0a30fbc4 DJ |
65 | 0, 4, 8, 12, 16, 20, 24, 28, |
66 | 32, 36, 40, 44, 48, 52, 56, 60, | |
23ce3b1c DJ |
67 | -1, -1, -1, -1, -1, -1, -1, -1, -1, |
68 | 64 | |
0a30fbc4 DJ |
69 | }; |
70 | ||
2ec06d2e DJ |
71 | static int |
72 | arm_cannot_store_register (int regno) | |
0a30fbc4 | 73 | { |
2ec06d2e | 74 | return (regno >= arm_num_regs); |
0a30fbc4 DJ |
75 | } |
76 | ||
2ec06d2e DJ |
77 | static int |
78 | arm_cannot_fetch_register (int regno) | |
0a30fbc4 | 79 | { |
2ec06d2e | 80 | return (regno >= arm_num_regs); |
0a30fbc4 DJ |
81 | } |
82 | ||
fb1e4ffc | 83 | static void |
442ea881 | 84 | arm_fill_gregset (struct regcache *regcache, void *buf) |
fb1e4ffc DJ |
85 | { |
86 | int i; | |
87 | ||
88 | for (i = 0; i < arm_num_regs; i++) | |
89 | if (arm_regmap[i] != -1) | |
442ea881 | 90 | collect_register (regcache, i, ((char *) buf) + arm_regmap[i]); |
fb1e4ffc DJ |
91 | } |
92 | ||
93 | static void | |
442ea881 | 94 | arm_store_gregset (struct regcache *regcache, const void *buf) |
fb1e4ffc DJ |
95 | { |
96 | int i; | |
97 | char zerobuf[8]; | |
98 | ||
99 | memset (zerobuf, 0, 8); | |
100 | for (i = 0; i < arm_num_regs; i++) | |
101 | if (arm_regmap[i] != -1) | |
442ea881 | 102 | supply_register (regcache, i, ((char *) buf) + arm_regmap[i]); |
fb1e4ffc | 103 | else |
442ea881 | 104 | supply_register (regcache, i, zerobuf); |
fb1e4ffc DJ |
105 | } |
106 | ||
fb1e4ffc | 107 | static void |
442ea881 | 108 | arm_fill_wmmxregset (struct regcache *regcache, void *buf) |
fb1e4ffc DJ |
109 | { |
110 | int i; | |
111 | ||
58d6951d DJ |
112 | if (!(arm_hwcap & HWCAP_IWMMXT)) |
113 | return; | |
114 | ||
fb1e4ffc | 115 | for (i = 0; i < 16; i++) |
442ea881 | 116 | collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8); |
fb1e4ffc DJ |
117 | |
118 | /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */ | |
119 | for (i = 0; i < 6; i++) | |
442ea881 PA |
120 | collect_register (regcache, arm_num_regs + i + 16, |
121 | (char *) buf + 16 * 8 + i * 4); | |
fb1e4ffc DJ |
122 | } |
123 | ||
124 | static void | |
442ea881 | 125 | arm_store_wmmxregset (struct regcache *regcache, const void *buf) |
fb1e4ffc DJ |
126 | { |
127 | int i; | |
128 | ||
58d6951d DJ |
129 | if (!(arm_hwcap & HWCAP_IWMMXT)) |
130 | return; | |
131 | ||
fb1e4ffc | 132 | for (i = 0; i < 16; i++) |
442ea881 | 133 | supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8); |
fb1e4ffc DJ |
134 | |
135 | /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */ | |
136 | for (i = 0; i < 6; i++) | |
442ea881 PA |
137 | supply_register (regcache, arm_num_regs + i + 16, |
138 | (char *) buf + 16 * 8 + i * 4); | |
fb1e4ffc DJ |
139 | } |
140 | ||
58d6951d | 141 | static void |
442ea881 | 142 | arm_fill_vfpregset (struct regcache *regcache, void *buf) |
58d6951d DJ |
143 | { |
144 | int i, num, base; | |
145 | ||
146 | if (!(arm_hwcap & HWCAP_VFP)) | |
147 | return; | |
148 | ||
149 | if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) | |
150 | num = 32; | |
151 | else | |
152 | num = 16; | |
153 | ||
154 | base = find_regno ("d0"); | |
155 | for (i = 0; i < num; i++) | |
442ea881 | 156 | collect_register (regcache, base + i, (char *) buf + i * 8); |
58d6951d | 157 | |
442ea881 | 158 | collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8); |
58d6951d DJ |
159 | } |
160 | ||
161 | static void | |
442ea881 | 162 | arm_store_vfpregset (struct regcache *regcache, const void *buf) |
58d6951d DJ |
163 | { |
164 | int i, num, base; | |
165 | ||
166 | if (!(arm_hwcap & HWCAP_VFP)) | |
167 | return; | |
168 | ||
169 | if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) | |
170 | num = 32; | |
171 | else | |
172 | num = 16; | |
173 | ||
174 | base = find_regno ("d0"); | |
175 | for (i = 0; i < num; i++) | |
442ea881 | 176 | supply_register (regcache, base + i, (char *) buf + i * 8); |
58d6951d | 177 | |
442ea881 | 178 | supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8); |
58d6951d | 179 | } |
fb1e4ffc | 180 | |
d677d77d DJ |
181 | extern int debug_threads; |
182 | ||
0d62e5e8 | 183 | static CORE_ADDR |
442ea881 | 184 | arm_get_pc (struct regcache *regcache) |
0d62e5e8 DJ |
185 | { |
186 | unsigned long pc; | |
442ea881 | 187 | collect_register_by_name (regcache, "pc", &pc); |
d677d77d DJ |
188 | if (debug_threads) |
189 | fprintf (stderr, "stop pc is %08lx\n", pc); | |
0d62e5e8 DJ |
190 | return pc; |
191 | } | |
192 | ||
193 | static void | |
442ea881 | 194 | arm_set_pc (struct regcache *regcache, CORE_ADDR pc) |
0d62e5e8 DJ |
195 | { |
196 | unsigned long newpc = pc; | |
442ea881 | 197 | supply_register_by_name (regcache, "pc", &newpc); |
0d62e5e8 DJ |
198 | } |
199 | ||
aeb75bf5 | 200 | /* Correct in either endianness. */ |
0d62e5e8 DJ |
201 | static const unsigned long arm_breakpoint = 0xef9f0001; |
202 | #define arm_breakpoint_len 4 | |
aeb75bf5 DJ |
203 | static const unsigned short thumb_breakpoint = 0xde01; |
204 | #define thumb_breakpoint_len 2 | |
0d62e5e8 | 205 | |
9d1fb177 DJ |
206 | /* For new EABI binaries. We recognize it regardless of which ABI |
207 | is used for gdbserver, so single threaded debugging should work | |
208 | OK, but for multi-threaded debugging we only insert the current | |
209 | ABI's breakpoint instruction. For now at least. */ | |
210 | static const unsigned long arm_eabi_breakpoint = 0xe7f001f0; | |
211 | ||
0d62e5e8 DJ |
212 | static int |
213 | arm_breakpoint_at (CORE_ADDR where) | |
214 | { | |
442ea881 | 215 | struct regcache *regcache = get_thread_regcache (current_inferior, 1); |
aeb75bf5 | 216 | unsigned long cpsr; |
0d62e5e8 | 217 | |
442ea881 | 218 | collect_register_by_name (regcache, "cpsr", &cpsr); |
0d62e5e8 | 219 | |
aeb75bf5 DJ |
220 | if (cpsr & 0x20) |
221 | { | |
222 | /* Thumb mode. */ | |
223 | unsigned short insn; | |
9d1fb177 | 224 | |
aeb75bf5 DJ |
225 | (*the_target->read_memory) (where, (unsigned char *) &insn, 2); |
226 | if (insn == thumb_breakpoint) | |
227 | return 1; | |
228 | } | |
229 | else | |
230 | { | |
231 | /* ARM mode. */ | |
232 | unsigned long insn; | |
233 | ||
234 | (*the_target->read_memory) (where, (unsigned char *) &insn, 4); | |
235 | if (insn == arm_breakpoint) | |
236 | return 1; | |
237 | ||
238 | if (insn == arm_eabi_breakpoint) | |
239 | return 1; | |
240 | } | |
9d1fb177 | 241 | |
0d62e5e8 DJ |
242 | return 0; |
243 | } | |
244 | ||
3b2fc2ea DJ |
245 | /* We only place breakpoints in empty marker functions, and thread locking |
246 | is outside of the function. So rather than importing software single-step, | |
247 | we can just run until exit. */ | |
248 | static CORE_ADDR | |
442ea881 | 249 | arm_reinsert_addr (void) |
3b2fc2ea | 250 | { |
442ea881 | 251 | struct regcache *regcache = get_thread_regcache (current_inferior, 1); |
3b2fc2ea | 252 | unsigned long pc; |
442ea881 | 253 | collect_register_by_name (regcache, "lr", &pc); |
3b2fc2ea DJ |
254 | return pc; |
255 | } | |
256 | ||
9308fc88 DJ |
257 | /* Fetch the thread-local storage pointer for libthread_db. */ |
258 | ||
259 | ps_err_e | |
260 | ps_get_thread_area (const struct ps_prochandle *ph, | |
1b3f6016 | 261 | lwpid_t lwpid, int idx, void **base) |
9308fc88 DJ |
262 | { |
263 | if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) | |
264 | return PS_ERR; | |
265 | ||
266 | /* IDX is the bias from the thread pointer to the beginning of the | |
267 | thread descriptor. It has to be subtracted due to implementation | |
268 | quirks in libthread_db. */ | |
269 | *base = (void *) ((char *)*base - idx); | |
270 | ||
271 | return PS_OK; | |
272 | } | |
273 | ||
58d6951d DJ |
274 | static int |
275 | arm_get_hwcap (unsigned long *valp) | |
276 | { | |
277 | unsigned char *data = alloca (8); | |
278 | int offset = 0; | |
279 | ||
280 | while ((*the_target->read_auxv) (offset, data, 8) == 8) | |
281 | { | |
282 | unsigned int *data_p = (unsigned int *)data; | |
283 | if (data_p[0] == AT_HWCAP) | |
284 | { | |
285 | *valp = data_p[1]; | |
286 | return 1; | |
287 | } | |
288 | ||
289 | offset += 8; | |
290 | } | |
291 | ||
292 | *valp = 0; | |
293 | return 0; | |
294 | } | |
295 | ||
296 | static void | |
297 | arm_arch_setup (void) | |
298 | { | |
299 | arm_hwcap = 0; | |
300 | if (arm_get_hwcap (&arm_hwcap) == 0) | |
301 | { | |
302 | init_registers_arm (); | |
303 | return; | |
304 | } | |
305 | ||
306 | if (arm_hwcap & HWCAP_IWMMXT) | |
307 | { | |
308 | init_registers_arm_with_iwmmxt (); | |
309 | return; | |
310 | } | |
311 | ||
312 | if (arm_hwcap & HWCAP_VFP) | |
313 | { | |
314 | int pid; | |
315 | char *buf; | |
316 | ||
317 | /* NEON implies either no VFP, or VFPv3-D32. We only support | |
318 | it with VFP. */ | |
319 | if (arm_hwcap & HWCAP_NEON) | |
320 | init_registers_arm_with_neon (); | |
321 | else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) | |
322 | init_registers_arm_with_vfpv3 (); | |
323 | else | |
324 | init_registers_arm_with_vfpv2 (); | |
325 | ||
326 | /* Now make sure that the kernel supports reading these | |
327 | registers. Support was added in 2.6.30. */ | |
328 | pid = lwpid_of (get_thread_lwp (current_inferior)); | |
329 | errno = 0; | |
330 | buf = malloc (32 * 8 + 4); | |
331 | if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 | |
332 | && errno == EIO) | |
333 | { | |
334 | arm_hwcap = 0; | |
335 | init_registers_arm (); | |
336 | } | |
337 | free (buf); | |
338 | ||
339 | return; | |
340 | } | |
341 | ||
342 | /* The default configuration uses legacy FPA registers, probably | |
343 | simulated. */ | |
344 | init_registers_arm (); | |
345 | } | |
346 | ||
fb1e4ffc DJ |
347 | struct regset_info target_regsets[] = { |
348 | { PTRACE_GETREGS, PTRACE_SETREGS, 18 * 4, | |
349 | GENERAL_REGS, | |
350 | arm_fill_gregset, arm_store_gregset }, | |
fb1e4ffc DJ |
351 | { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 16 * 8 + 6 * 4, |
352 | EXTENDED_REGS, | |
353 | arm_fill_wmmxregset, arm_store_wmmxregset }, | |
58d6951d DJ |
354 | { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 32 * 8 + 4, |
355 | EXTENDED_REGS, | |
356 | arm_fill_vfpregset, arm_store_vfpregset }, | |
fb1e4ffc DJ |
357 | { 0, 0, -1, -1, NULL, NULL } |
358 | }; | |
359 | ||
2ec06d2e | 360 | struct linux_target_ops the_low_target = { |
58d6951d | 361 | arm_arch_setup, |
2ec06d2e DJ |
362 | arm_num_regs, |
363 | arm_regmap, | |
364 | arm_cannot_fetch_register, | |
365 | arm_cannot_store_register, | |
0d62e5e8 DJ |
366 | arm_get_pc, |
367 | arm_set_pc, | |
aeb75bf5 DJ |
368 | |
369 | /* Define an ARM-mode breakpoint; we only set breakpoints in the C | |
370 | library, which is most likely to be ARM. If the kernel supports | |
371 | clone events, we will never insert a breakpoint, so even a Thumb | |
372 | C library will work; so will mixing EABI/non-EABI gdbserver and | |
373 | application. */ | |
9d1fb177 | 374 | #ifndef __ARM_EABI__ |
f450004a | 375 | (const unsigned char *) &arm_breakpoint, |
9d1fb177 DJ |
376 | #else |
377 | (const unsigned char *) &arm_eabi_breakpoint, | |
378 | #endif | |
0d62e5e8 | 379 | arm_breakpoint_len, |
3b2fc2ea | 380 | arm_reinsert_addr, |
0d62e5e8 DJ |
381 | 0, |
382 | arm_breakpoint_at, | |
2ec06d2e | 383 | }; |