Refactor queries for hardware and software single stepping support in GDBServer.
[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-m32r-low.c
CommitLineData
7cfbc4a0 1/* GNU/Linux/m32r specific low level interface, for the remote server for GDB.
32d0add0 2 Copyright (C) 2005-2015 Free Software Foundation, Inc.
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3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
a9762ec7 8 the Free Software Foundation; either version 3 of the License, or
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9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
a9762ec7 17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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18
19#include "server.h"
20#include "linux-low.h"
21
22#ifdef HAVE_SYS_REG_H
23#include <sys/reg.h>
24#endif
25
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26/* Defined in auto-generated file reg-m32r.c. */
27void init_registers_m32r (void);
3aee8918 28extern const struct target_desc *tdesc_m32r;
d05b4ac3 29
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30#define m32r_num_regs 25
31
32static int m32r_regmap[] = {
33#ifdef PT_R0
34 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
35 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_FP, PT_LR, PT_SPU,
36 PT_PSW, PT_CBR, PT_SPI, PT_SPU, PT_BPC, PT_PC, PT_ACCL, PT_ACCH, PT_EVB
37#else
38 4 * 4, 4 * 5, 4 * 6, 4 * 7, 4 * 0, 4 * 1, 4 * 2, 4 * 8,
39 4 * 9, 4 * 10, 4 * 11, 4 * 12, 4 * 13, 4 * 24, 4 * 25, 4 * 23,
40 4 * 19, 4 * 31, 4 * 26, 4 * 23, 4 * 20, 4 * 30, 4 * 16, 4 * 15, 4 * 32
41#endif
42};
43
44static int
45m32r_cannot_store_register (int regno)
46{
47 return (regno >= m32r_num_regs);
48}
49
50static int
51m32r_cannot_fetch_register (int regno)
52{
53 return (regno >= m32r_num_regs);
54}
55
56static CORE_ADDR
442ea881 57m32r_get_pc (struct regcache *regcache)
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58{
59 unsigned long pc;
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60 collect_register_by_name (regcache, "pc", &pc);
61 if (debug_threads)
87ce2a04 62 debug_printf ("stop pc is %08lx\n", pc);
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63 return pc;
64}
65
66static void
442ea881 67m32r_set_pc (struct regcache *regcache, CORE_ADDR pc)
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68{
69 unsigned long newpc = pc;
442ea881 70 supply_register_by_name (regcache, "pc", &newpc);
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71}
72
73static const unsigned short m32r_breakpoint = 0x10f1;
74#define m32r_breakpoint_len 2
75
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76/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
77
78static const gdb_byte *
79m32r_sw_breakpoint_from_kind (int kind, int *size)
80{
81 *size = m32r_breakpoint_len;
82 return (const gdb_byte *) &m32r_breakpoint;
83}
84
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85static int
86m32r_breakpoint_at (CORE_ADDR where)
87{
88 unsigned short insn;
89
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90 (*the_target->read_memory) (where, (unsigned char *) &insn,
91 m32r_breakpoint_len);
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92 if (insn == m32r_breakpoint)
93 return 1;
94
95 /* If necessary, recognize more trap instructions here. GDB only uses the
96 one. */
97 return 0;
98}
99
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100static void
101m32r_arch_setup (void)
102{
103 current_process ()->tdesc = tdesc_m32r;
104}
105
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106/* Support for hardware single step. */
107
108static int
109m32r_supports_hardware_single_step (void)
110{
111 return 1;
112}
113
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114static struct usrregs_info m32r_usrregs_info =
115 {
116 m32r_num_regs,
117 m32r_regmap,
118 };
119
120static struct regs_info regs_info =
121 {
122 NULL, /* regset_bitmap */
123 &m32r_usrregs_info,
124 };
125
126static const struct regs_info *
127m32r_regs_info (void)
128{
129 return &regs_info;
130}
131
7cfbc4a0 132struct linux_target_ops the_low_target = {
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133 m32r_arch_setup,
134 m32r_regs_info,
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135 m32r_cannot_fetch_register,
136 m32r_cannot_store_register,
c14dfd32 137 NULL, /* fetch_register */
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138 m32r_get_pc,
139 m32r_set_pc,
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140 NULL, /* breakpoint_from_pc */
141 m32r_sw_breakpoint_from_kind,
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142 NULL,
143 0,
144 m32r_breakpoint_at,
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145 NULL, /* supports_z_point_type */
146 NULL, /* insert_point */
147 NULL, /* remove_point */
148 NULL, /* stopped_by_watchpoint */
149 NULL, /* stopped_data_address */
150 NULL, /* collect_ptrace_register */
151 NULL, /* supply_ptrace_register */
152 NULL, /* siginfo_fixup */
153 NULL, /* new_process */
154 NULL, /* new_thread */
155 NULL, /* new_fork */
156 NULL, /* prepare_to_resume */
157 NULL, /* process_qsupported */
158 NULL, /* supports_tracepoints */
159 NULL, /* get_thread_area */
160 NULL, /* install_fast_tracepoint_jump_pad */
161 NULL, /* emit_ops */
162 NULL, /* get_min_fast_tracepoint_insn_len */
163 NULL, /* supports_range_stepping */
164 NULL, /* breakpoint_kind_from_current_state */
165 m32r_supports_hardware_single_step,
7cfbc4a0 166};
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167
168void
169initialize_low_arch (void)
170{
171 init_registers_m32r ();
172}
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