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d0722149 DE |
1 | /* GNU/Linux/x86-64 specific low level interface, for the remote server |
2 | for GDB. | |
28e7fd62 | 3 | Copyright (C) 2002-2013 Free Software Foundation, Inc. |
d0722149 DE |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
aa5ca48f | 20 | #include <stddef.h> |
d0722149 | 21 | #include <signal.h> |
6a271cae | 22 | #include <limits.h> |
f4647387 | 23 | #include <inttypes.h> |
d0722149 DE |
24 | #include "server.h" |
25 | #include "linux-low.h" | |
26 | #include "i387-fp.h" | |
aa5ca48f | 27 | #include "i386-low.h" |
1570b33e L |
28 | #include "i386-xstate.h" |
29 | #include "elf/common.h" | |
d0722149 DE |
30 | |
31 | #include "gdb_proc_service.h" | |
58b4daa5 | 32 | #include "agent.h" |
3aee8918 | 33 | #include "tdesc.h" |
d0722149 | 34 | |
3aee8918 | 35 | #ifdef __x86_64__ |
90884b2b L |
36 | /* Defined in auto-generated file amd64-linux.c. */ |
37 | void init_registers_amd64_linux (void); | |
3aee8918 PA |
38 | extern const struct target_desc *tdesc_amd64_linux; |
39 | ||
1570b33e L |
40 | /* Defined in auto-generated file amd64-avx-linux.c. */ |
41 | void init_registers_amd64_avx_linux (void); | |
3aee8918 PA |
42 | extern const struct target_desc *tdesc_amd64_avx_linux; |
43 | ||
4d47af5c L |
44 | /* Defined in auto-generated file x32-linux.c. */ |
45 | void init_registers_x32_linux (void); | |
3aee8918 PA |
46 | extern const struct target_desc *tdesc_x32_linux; |
47 | ||
4d47af5c L |
48 | /* Defined in auto-generated file x32-avx-linux.c. */ |
49 | void init_registers_x32_avx_linux (void); | |
3aee8918 PA |
50 | extern const struct target_desc *tdesc_x32_avx_linux; |
51 | #endif | |
52 | ||
53 | /* Defined in auto-generated file i386-linux.c. */ | |
54 | void init_registers_i386_linux (void); | |
55 | extern const struct target_desc *tdesc_i386_linux; | |
56 | ||
57 | /* Defined in auto-generated file i386-mmx-linux.c. */ | |
58 | void init_registers_i386_mmx_linux (void); | |
59 | extern const struct target_desc *tdesc_i386_mmx_linux; | |
60 | ||
61 | /* Defined in auto-generated file i386-avx-linux.c. */ | |
62 | void init_registers_i386_avx_linux (void); | |
63 | extern const struct target_desc *tdesc_i386_avx_linux; | |
64 | ||
65 | #ifdef __x86_64__ | |
66 | static struct target_desc *tdesc_amd64_linux_no_xml; | |
67 | #endif | |
68 | static struct target_desc *tdesc_i386_linux_no_xml; | |
69 | ||
1570b33e | 70 | |
fa593d66 | 71 | static unsigned char jump_insn[] = { 0xe9, 0, 0, 0, 0 }; |
405f8e94 | 72 | static unsigned char small_jump_insn[] = { 0x66, 0xe9, 0, 0 }; |
fa593d66 | 73 | |
1570b33e L |
74 | /* Backward compatibility for gdb without XML support. */ |
75 | ||
76 | static const char *xmltarget_i386_linux_no_xml = "@<target>\ | |
77 | <architecture>i386</architecture>\ | |
78 | <osabi>GNU/Linux</osabi>\ | |
79 | </target>"; | |
f6d1620c L |
80 | |
81 | #ifdef __x86_64__ | |
1570b33e L |
82 | static const char *xmltarget_amd64_linux_no_xml = "@<target>\ |
83 | <architecture>i386:x86-64</architecture>\ | |
84 | <osabi>GNU/Linux</osabi>\ | |
85 | </target>"; | |
f6d1620c | 86 | #endif |
d0722149 DE |
87 | |
88 | #include <sys/reg.h> | |
89 | #include <sys/procfs.h> | |
90 | #include <sys/ptrace.h> | |
1570b33e L |
91 | #include <sys/uio.h> |
92 | ||
93 | #ifndef PTRACE_GETREGSET | |
94 | #define PTRACE_GETREGSET 0x4204 | |
95 | #endif | |
96 | ||
97 | #ifndef PTRACE_SETREGSET | |
98 | #define PTRACE_SETREGSET 0x4205 | |
99 | #endif | |
100 | ||
d0722149 DE |
101 | |
102 | #ifndef PTRACE_GET_THREAD_AREA | |
103 | #define PTRACE_GET_THREAD_AREA 25 | |
104 | #endif | |
105 | ||
106 | /* This definition comes from prctl.h, but some kernels may not have it. */ | |
107 | #ifndef PTRACE_ARCH_PRCTL | |
108 | #define PTRACE_ARCH_PRCTL 30 | |
109 | #endif | |
110 | ||
111 | /* The following definitions come from prctl.h, but may be absent | |
112 | for certain configurations. */ | |
113 | #ifndef ARCH_GET_FS | |
114 | #define ARCH_SET_GS 0x1001 | |
115 | #define ARCH_SET_FS 0x1002 | |
116 | #define ARCH_GET_FS 0x1003 | |
117 | #define ARCH_GET_GS 0x1004 | |
118 | #endif | |
119 | ||
aa5ca48f DE |
120 | /* Per-process arch-specific data we want to keep. */ |
121 | ||
122 | struct arch_process_info | |
123 | { | |
124 | struct i386_debug_reg_state debug_reg_state; | |
125 | }; | |
126 | ||
127 | /* Per-thread arch-specific data we want to keep. */ | |
128 | ||
129 | struct arch_lwp_info | |
130 | { | |
131 | /* Non-zero if our copy differs from what's recorded in the thread. */ | |
132 | int debug_registers_changed; | |
133 | }; | |
134 | ||
d0722149 DE |
135 | #ifdef __x86_64__ |
136 | ||
137 | /* Mapping between the general-purpose registers in `struct user' | |
138 | format and GDB's register array layout. | |
139 | Note that the transfer layout uses 64-bit regs. */ | |
140 | static /*const*/ int i386_regmap[] = | |
141 | { | |
142 | RAX * 8, RCX * 8, RDX * 8, RBX * 8, | |
143 | RSP * 8, RBP * 8, RSI * 8, RDI * 8, | |
144 | RIP * 8, EFLAGS * 8, CS * 8, SS * 8, | |
145 | DS * 8, ES * 8, FS * 8, GS * 8 | |
146 | }; | |
147 | ||
148 | #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0])) | |
149 | ||
150 | /* So code below doesn't have to care, i386 or amd64. */ | |
151 | #define ORIG_EAX ORIG_RAX | |
152 | ||
153 | static const int x86_64_regmap[] = | |
154 | { | |
155 | RAX * 8, RBX * 8, RCX * 8, RDX * 8, | |
156 | RSI * 8, RDI * 8, RBP * 8, RSP * 8, | |
157 | R8 * 8, R9 * 8, R10 * 8, R11 * 8, | |
158 | R12 * 8, R13 * 8, R14 * 8, R15 * 8, | |
159 | RIP * 8, EFLAGS * 8, CS * 8, SS * 8, | |
160 | DS * 8, ES * 8, FS * 8, GS * 8, | |
161 | -1, -1, -1, -1, -1, -1, -1, -1, | |
162 | -1, -1, -1, -1, -1, -1, -1, -1, | |
163 | -1, -1, -1, -1, -1, -1, -1, -1, | |
164 | -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
165 | ORIG_RAX * 8 | |
166 | }; | |
167 | ||
168 | #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0])) | |
169 | ||
170 | #else /* ! __x86_64__ */ | |
171 | ||
172 | /* Mapping between the general-purpose registers in `struct user' | |
173 | format and GDB's register array layout. */ | |
174 | static /*const*/ int i386_regmap[] = | |
175 | { | |
176 | EAX * 4, ECX * 4, EDX * 4, EBX * 4, | |
177 | UESP * 4, EBP * 4, ESI * 4, EDI * 4, | |
178 | EIP * 4, EFL * 4, CS * 4, SS * 4, | |
179 | DS * 4, ES * 4, FS * 4, GS * 4 | |
180 | }; | |
181 | ||
182 | #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0])) | |
183 | ||
184 | #endif | |
3aee8918 PA |
185 | |
186 | #ifdef __x86_64__ | |
187 | ||
188 | /* Returns true if the current inferior belongs to a x86-64 process, | |
189 | per the tdesc. */ | |
190 | ||
191 | static int | |
192 | is_64bit_tdesc (void) | |
193 | { | |
194 | struct regcache *regcache = get_thread_regcache (current_inferior, 0); | |
195 | ||
196 | return register_size (regcache->tdesc, 0) == 8; | |
197 | } | |
198 | ||
199 | #endif | |
200 | ||
d0722149 DE |
201 | \f |
202 | /* Called by libthread_db. */ | |
203 | ||
204 | ps_err_e | |
205 | ps_get_thread_area (const struct ps_prochandle *ph, | |
206 | lwpid_t lwpid, int idx, void **base) | |
207 | { | |
208 | #ifdef __x86_64__ | |
3aee8918 | 209 | int use_64bit = is_64bit_tdesc (); |
d0722149 DE |
210 | |
211 | if (use_64bit) | |
212 | { | |
213 | switch (idx) | |
214 | { | |
215 | case FS: | |
216 | if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0) | |
217 | return PS_OK; | |
218 | break; | |
219 | case GS: | |
220 | if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0) | |
221 | return PS_OK; | |
222 | break; | |
223 | default: | |
224 | return PS_BADADDR; | |
225 | } | |
226 | return PS_ERR; | |
227 | } | |
228 | #endif | |
229 | ||
230 | { | |
231 | unsigned int desc[4]; | |
232 | ||
233 | if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, | |
234 | (void *) (intptr_t) idx, (unsigned long) &desc) < 0) | |
235 | return PS_ERR; | |
236 | ||
d1ec4ce7 DE |
237 | /* Ensure we properly extend the value to 64-bits for x86_64. */ |
238 | *base = (void *) (uintptr_t) desc[1]; | |
d0722149 DE |
239 | return PS_OK; |
240 | } | |
241 | } | |
fa593d66 PA |
242 | |
243 | /* Get the thread area address. This is used to recognize which | |
244 | thread is which when tracing with the in-process agent library. We | |
245 | don't read anything from the address, and treat it as opaque; it's | |
246 | the address itself that we assume is unique per-thread. */ | |
247 | ||
248 | static int | |
249 | x86_get_thread_area (int lwpid, CORE_ADDR *addr) | |
250 | { | |
251 | #ifdef __x86_64__ | |
3aee8918 | 252 | int use_64bit = is_64bit_tdesc (); |
fa593d66 PA |
253 | |
254 | if (use_64bit) | |
255 | { | |
256 | void *base; | |
257 | if (ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_GET_FS) == 0) | |
258 | { | |
259 | *addr = (CORE_ADDR) (uintptr_t) base; | |
260 | return 0; | |
261 | } | |
262 | ||
263 | return -1; | |
264 | } | |
265 | #endif | |
266 | ||
267 | { | |
268 | struct lwp_info *lwp = find_lwp_pid (pid_to_ptid (lwpid)); | |
269 | struct regcache *regcache = get_thread_regcache (get_lwp_thread (lwp), 1); | |
270 | unsigned int desc[4]; | |
271 | ULONGEST gs = 0; | |
272 | const int reg_thread_area = 3; /* bits to scale down register value. */ | |
273 | int idx; | |
274 | ||
275 | collect_register_by_name (regcache, "gs", &gs); | |
276 | ||
277 | idx = gs >> reg_thread_area; | |
278 | ||
279 | if (ptrace (PTRACE_GET_THREAD_AREA, | |
493e2a69 MS |
280 | lwpid_of (lwp), |
281 | (void *) (long) idx, (unsigned long) &desc) < 0) | |
fa593d66 PA |
282 | return -1; |
283 | ||
284 | *addr = desc[1]; | |
285 | return 0; | |
286 | } | |
287 | } | |
288 | ||
289 | ||
d0722149 DE |
290 | \f |
291 | static int | |
3aee8918 | 292 | x86_cannot_store_register (int regno) |
d0722149 | 293 | { |
3aee8918 PA |
294 | #ifdef __x86_64__ |
295 | if (is_64bit_tdesc ()) | |
296 | return 0; | |
297 | #endif | |
298 | ||
d0722149 DE |
299 | return regno >= I386_NUM_REGS; |
300 | } | |
301 | ||
302 | static int | |
3aee8918 | 303 | x86_cannot_fetch_register (int regno) |
d0722149 | 304 | { |
3aee8918 PA |
305 | #ifdef __x86_64__ |
306 | if (is_64bit_tdesc ()) | |
307 | return 0; | |
308 | #endif | |
309 | ||
d0722149 DE |
310 | return regno >= I386_NUM_REGS; |
311 | } | |
312 | ||
313 | static void | |
442ea881 | 314 | x86_fill_gregset (struct regcache *regcache, void *buf) |
d0722149 DE |
315 | { |
316 | int i; | |
317 | ||
318 | #ifdef __x86_64__ | |
3aee8918 | 319 | if (register_size (regcache->tdesc, 0) == 8) |
d0722149 DE |
320 | { |
321 | for (i = 0; i < X86_64_NUM_REGS; i++) | |
322 | if (x86_64_regmap[i] != -1) | |
442ea881 | 323 | collect_register (regcache, i, ((char *) buf) + x86_64_regmap[i]); |
d0722149 DE |
324 | return; |
325 | } | |
326 | #endif | |
327 | ||
328 | for (i = 0; i < I386_NUM_REGS; i++) | |
442ea881 | 329 | collect_register (regcache, i, ((char *) buf) + i386_regmap[i]); |
d0722149 | 330 | |
442ea881 PA |
331 | collect_register_by_name (regcache, "orig_eax", |
332 | ((char *) buf) + ORIG_EAX * 4); | |
d0722149 DE |
333 | } |
334 | ||
335 | static void | |
442ea881 | 336 | x86_store_gregset (struct regcache *regcache, const void *buf) |
d0722149 DE |
337 | { |
338 | int i; | |
339 | ||
340 | #ifdef __x86_64__ | |
3aee8918 | 341 | if (register_size (regcache->tdesc, 0) == 8) |
d0722149 DE |
342 | { |
343 | for (i = 0; i < X86_64_NUM_REGS; i++) | |
344 | if (x86_64_regmap[i] != -1) | |
442ea881 | 345 | supply_register (regcache, i, ((char *) buf) + x86_64_regmap[i]); |
d0722149 DE |
346 | return; |
347 | } | |
348 | #endif | |
349 | ||
350 | for (i = 0; i < I386_NUM_REGS; i++) | |
442ea881 | 351 | supply_register (regcache, i, ((char *) buf) + i386_regmap[i]); |
d0722149 | 352 | |
442ea881 PA |
353 | supply_register_by_name (regcache, "orig_eax", |
354 | ((char *) buf) + ORIG_EAX * 4); | |
d0722149 DE |
355 | } |
356 | ||
357 | static void | |
442ea881 | 358 | x86_fill_fpregset (struct regcache *regcache, void *buf) |
d0722149 DE |
359 | { |
360 | #ifdef __x86_64__ | |
442ea881 | 361 | i387_cache_to_fxsave (regcache, buf); |
d0722149 | 362 | #else |
442ea881 | 363 | i387_cache_to_fsave (regcache, buf); |
d0722149 DE |
364 | #endif |
365 | } | |
366 | ||
367 | static void | |
442ea881 | 368 | x86_store_fpregset (struct regcache *regcache, const void *buf) |
d0722149 DE |
369 | { |
370 | #ifdef __x86_64__ | |
442ea881 | 371 | i387_fxsave_to_cache (regcache, buf); |
d0722149 | 372 | #else |
442ea881 | 373 | i387_fsave_to_cache (regcache, buf); |
d0722149 DE |
374 | #endif |
375 | } | |
376 | ||
377 | #ifndef __x86_64__ | |
378 | ||
379 | static void | |
442ea881 | 380 | x86_fill_fpxregset (struct regcache *regcache, void *buf) |
d0722149 | 381 | { |
442ea881 | 382 | i387_cache_to_fxsave (regcache, buf); |
d0722149 DE |
383 | } |
384 | ||
385 | static void | |
442ea881 | 386 | x86_store_fpxregset (struct regcache *regcache, const void *buf) |
d0722149 | 387 | { |
442ea881 | 388 | i387_fxsave_to_cache (regcache, buf); |
d0722149 DE |
389 | } |
390 | ||
391 | #endif | |
392 | ||
1570b33e L |
393 | static void |
394 | x86_fill_xstateregset (struct regcache *regcache, void *buf) | |
395 | { | |
396 | i387_cache_to_xsave (regcache, buf); | |
397 | } | |
398 | ||
399 | static void | |
400 | x86_store_xstateregset (struct regcache *regcache, const void *buf) | |
401 | { | |
402 | i387_xsave_to_cache (regcache, buf); | |
403 | } | |
404 | ||
d0722149 DE |
405 | /* ??? The non-biarch i386 case stores all the i387 regs twice. |
406 | Once in i387_.*fsave.* and once in i387_.*fxsave.*. | |
407 | This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS | |
408 | doesn't work. IWBN to avoid the duplication in the case where it | |
409 | does work. Maybe the arch_setup routine could check whether it works | |
3aee8918 | 410 | and update the supported regsets accordingly. */ |
d0722149 | 411 | |
3aee8918 | 412 | static struct regset_info x86_regsets[] = |
d0722149 DE |
413 | { |
414 | #ifdef HAVE_PTRACE_GETREGS | |
1570b33e | 415 | { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), |
d0722149 DE |
416 | GENERAL_REGS, |
417 | x86_fill_gregset, x86_store_gregset }, | |
1570b33e L |
418 | { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_X86_XSTATE, 0, |
419 | EXTENDED_REGS, x86_fill_xstateregset, x86_store_xstateregset }, | |
d0722149 DE |
420 | # ifndef __x86_64__ |
421 | # ifdef HAVE_PTRACE_GETFPXREGS | |
1570b33e | 422 | { PTRACE_GETFPXREGS, PTRACE_SETFPXREGS, 0, sizeof (elf_fpxregset_t), |
d0722149 DE |
423 | EXTENDED_REGS, |
424 | x86_fill_fpxregset, x86_store_fpxregset }, | |
425 | # endif | |
426 | # endif | |
1570b33e | 427 | { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, sizeof (elf_fpregset_t), |
d0722149 DE |
428 | FP_REGS, |
429 | x86_fill_fpregset, x86_store_fpregset }, | |
430 | #endif /* HAVE_PTRACE_GETREGS */ | |
1570b33e | 431 | { 0, 0, 0, -1, -1, NULL, NULL } |
d0722149 DE |
432 | }; |
433 | ||
434 | static CORE_ADDR | |
442ea881 | 435 | x86_get_pc (struct regcache *regcache) |
d0722149 | 436 | { |
3aee8918 | 437 | int use_64bit = register_size (regcache->tdesc, 0) == 8; |
d0722149 DE |
438 | |
439 | if (use_64bit) | |
440 | { | |
441 | unsigned long pc; | |
442ea881 | 442 | collect_register_by_name (regcache, "rip", &pc); |
d0722149 DE |
443 | return (CORE_ADDR) pc; |
444 | } | |
445 | else | |
446 | { | |
447 | unsigned int pc; | |
442ea881 | 448 | collect_register_by_name (regcache, "eip", &pc); |
d0722149 DE |
449 | return (CORE_ADDR) pc; |
450 | } | |
451 | } | |
452 | ||
453 | static void | |
442ea881 | 454 | x86_set_pc (struct regcache *regcache, CORE_ADDR pc) |
d0722149 | 455 | { |
3aee8918 | 456 | int use_64bit = register_size (regcache->tdesc, 0) == 8; |
d0722149 DE |
457 | |
458 | if (use_64bit) | |
459 | { | |
460 | unsigned long newpc = pc; | |
442ea881 | 461 | supply_register_by_name (regcache, "rip", &newpc); |
d0722149 DE |
462 | } |
463 | else | |
464 | { | |
465 | unsigned int newpc = pc; | |
442ea881 | 466 | supply_register_by_name (regcache, "eip", &newpc); |
d0722149 DE |
467 | } |
468 | } | |
469 | \f | |
470 | static const unsigned char x86_breakpoint[] = { 0xCC }; | |
471 | #define x86_breakpoint_len 1 | |
472 | ||
473 | static int | |
474 | x86_breakpoint_at (CORE_ADDR pc) | |
475 | { | |
476 | unsigned char c; | |
477 | ||
fc7238bb | 478 | (*the_target->read_memory) (pc, &c, 1); |
d0722149 DE |
479 | if (c == 0xCC) |
480 | return 1; | |
481 | ||
482 | return 0; | |
483 | } | |
484 | \f | |
aa5ca48f DE |
485 | /* Support for debug registers. */ |
486 | ||
487 | static unsigned long | |
488 | x86_linux_dr_get (ptid_t ptid, int regnum) | |
489 | { | |
490 | int tid; | |
491 | unsigned long value; | |
492 | ||
493 | tid = ptid_get_lwp (ptid); | |
494 | ||
495 | errno = 0; | |
496 | value = ptrace (PTRACE_PEEKUSER, tid, | |
497 | offsetof (struct user, u_debugreg[regnum]), 0); | |
498 | if (errno != 0) | |
499 | error ("Couldn't read debug register"); | |
500 | ||
501 | return value; | |
502 | } | |
503 | ||
504 | static void | |
505 | x86_linux_dr_set (ptid_t ptid, int regnum, unsigned long value) | |
506 | { | |
507 | int tid; | |
508 | ||
509 | tid = ptid_get_lwp (ptid); | |
510 | ||
511 | errno = 0; | |
512 | ptrace (PTRACE_POKEUSER, tid, | |
513 | offsetof (struct user, u_debugreg[regnum]), value); | |
514 | if (errno != 0) | |
515 | error ("Couldn't write debug register"); | |
516 | } | |
517 | ||
964e4306 PA |
518 | static int |
519 | update_debug_registers_callback (struct inferior_list_entry *entry, | |
520 | void *pid_p) | |
521 | { | |
522 | struct lwp_info *lwp = (struct lwp_info *) entry; | |
523 | int pid = *(int *) pid_p; | |
524 | ||
525 | /* Only update the threads of this process. */ | |
526 | if (pid_of (lwp) == pid) | |
527 | { | |
528 | /* The actual update is done later just before resuming the lwp, | |
529 | we just mark that the registers need updating. */ | |
530 | lwp->arch_private->debug_registers_changed = 1; | |
531 | ||
532 | /* If the lwp isn't stopped, force it to momentarily pause, so | |
533 | we can update its debug registers. */ | |
534 | if (!lwp->stopped) | |
535 | linux_stop_lwp (lwp); | |
536 | } | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
aa5ca48f DE |
541 | /* Update the inferior's debug register REGNUM from STATE. */ |
542 | ||
543 | void | |
544 | i386_dr_low_set_addr (const struct i386_debug_reg_state *state, int regnum) | |
545 | { | |
964e4306 | 546 | /* Only update the threads of this process. */ |
aa5ca48f DE |
547 | int pid = pid_of (get_thread_lwp (current_inferior)); |
548 | ||
549 | if (! (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR)) | |
550 | fatal ("Invalid debug register %d", regnum); | |
551 | ||
964e4306 PA |
552 | find_inferior (&all_lwps, update_debug_registers_callback, &pid); |
553 | } | |
aa5ca48f | 554 | |
964e4306 | 555 | /* Return the inferior's debug register REGNUM. */ |
aa5ca48f | 556 | |
964e4306 PA |
557 | CORE_ADDR |
558 | i386_dr_low_get_addr (int regnum) | |
559 | { | |
560 | struct lwp_info *lwp = get_thread_lwp (current_inferior); | |
561 | ptid_t ptid = ptid_of (lwp); | |
562 | ||
563 | /* DR6 and DR7 are retrieved with some other way. */ | |
0a5b1e09 | 564 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); |
964e4306 PA |
565 | |
566 | return x86_linux_dr_get (ptid, regnum); | |
aa5ca48f DE |
567 | } |
568 | ||
569 | /* Update the inferior's DR7 debug control register from STATE. */ | |
570 | ||
571 | void | |
572 | i386_dr_low_set_control (const struct i386_debug_reg_state *state) | |
573 | { | |
964e4306 | 574 | /* Only update the threads of this process. */ |
aa5ca48f DE |
575 | int pid = pid_of (get_thread_lwp (current_inferior)); |
576 | ||
964e4306 PA |
577 | find_inferior (&all_lwps, update_debug_registers_callback, &pid); |
578 | } | |
aa5ca48f | 579 | |
964e4306 PA |
580 | /* Return the inferior's DR7 debug control register. */ |
581 | ||
582 | unsigned | |
583 | i386_dr_low_get_control (void) | |
584 | { | |
585 | struct lwp_info *lwp = get_thread_lwp (current_inferior); | |
586 | ptid_t ptid = ptid_of (lwp); | |
587 | ||
588 | return x86_linux_dr_get (ptid, DR_CONTROL); | |
aa5ca48f DE |
589 | } |
590 | ||
591 | /* Get the value of the DR6 debug status register from the inferior | |
592 | and record it in STATE. */ | |
593 | ||
964e4306 PA |
594 | unsigned |
595 | i386_dr_low_get_status (void) | |
aa5ca48f DE |
596 | { |
597 | struct lwp_info *lwp = get_thread_lwp (current_inferior); | |
598 | ptid_t ptid = ptid_of (lwp); | |
599 | ||
964e4306 | 600 | return x86_linux_dr_get (ptid, DR_STATUS); |
aa5ca48f DE |
601 | } |
602 | \f | |
90d74c30 | 603 | /* Breakpoint/Watchpoint support. */ |
aa5ca48f DE |
604 | |
605 | static int | |
606 | x86_insert_point (char type, CORE_ADDR addr, int len) | |
607 | { | |
608 | struct process_info *proc = current_process (); | |
609 | switch (type) | |
610 | { | |
961bd387 | 611 | case '0': /* software-breakpoint */ |
90d74c30 PA |
612 | { |
613 | int ret; | |
614 | ||
615 | ret = prepare_to_access_memory (); | |
616 | if (ret) | |
617 | return -1; | |
618 | ret = set_gdb_breakpoint_at (addr); | |
0146f85b | 619 | done_accessing_memory (); |
90d74c30 PA |
620 | return ret; |
621 | } | |
961bd387 ME |
622 | case '1': /* hardware-breakpoint */ |
623 | case '2': /* write watchpoint */ | |
624 | case '3': /* read watchpoint */ | |
625 | case '4': /* access watchpoint */ | |
aa5ca48f DE |
626 | return i386_low_insert_watchpoint (&proc->private->arch_private->debug_reg_state, |
627 | type, addr, len); | |
961bd387 | 628 | |
aa5ca48f DE |
629 | default: |
630 | /* Unsupported. */ | |
631 | return 1; | |
632 | } | |
633 | } | |
634 | ||
635 | static int | |
636 | x86_remove_point (char type, CORE_ADDR addr, int len) | |
637 | { | |
638 | struct process_info *proc = current_process (); | |
639 | switch (type) | |
640 | { | |
961bd387 | 641 | case '0': /* software-breakpoint */ |
90d74c30 PA |
642 | { |
643 | int ret; | |
644 | ||
645 | ret = prepare_to_access_memory (); | |
646 | if (ret) | |
647 | return -1; | |
648 | ret = delete_gdb_breakpoint_at (addr); | |
0146f85b | 649 | done_accessing_memory (); |
90d74c30 PA |
650 | return ret; |
651 | } | |
961bd387 ME |
652 | case '1': /* hardware-breakpoint */ |
653 | case '2': /* write watchpoint */ | |
654 | case '3': /* read watchpoint */ | |
655 | case '4': /* access watchpoint */ | |
aa5ca48f DE |
656 | return i386_low_remove_watchpoint (&proc->private->arch_private->debug_reg_state, |
657 | type, addr, len); | |
658 | default: | |
659 | /* Unsupported. */ | |
660 | return 1; | |
661 | } | |
662 | } | |
663 | ||
664 | static int | |
665 | x86_stopped_by_watchpoint (void) | |
666 | { | |
667 | struct process_info *proc = current_process (); | |
668 | return i386_low_stopped_by_watchpoint (&proc->private->arch_private->debug_reg_state); | |
669 | } | |
670 | ||
671 | static CORE_ADDR | |
672 | x86_stopped_data_address (void) | |
673 | { | |
674 | struct process_info *proc = current_process (); | |
675 | CORE_ADDR addr; | |
676 | if (i386_low_stopped_data_address (&proc->private->arch_private->debug_reg_state, | |
677 | &addr)) | |
678 | return addr; | |
679 | return 0; | |
680 | } | |
681 | \f | |
682 | /* Called when a new process is created. */ | |
683 | ||
684 | static struct arch_process_info * | |
685 | x86_linux_new_process (void) | |
686 | { | |
687 | struct arch_process_info *info = xcalloc (1, sizeof (*info)); | |
688 | ||
689 | i386_low_init_dregs (&info->debug_reg_state); | |
690 | ||
691 | return info; | |
692 | } | |
693 | ||
694 | /* Called when a new thread is detected. */ | |
695 | ||
696 | static struct arch_lwp_info * | |
697 | x86_linux_new_thread (void) | |
698 | { | |
699 | struct arch_lwp_info *info = xcalloc (1, sizeof (*info)); | |
700 | ||
701 | info->debug_registers_changed = 1; | |
702 | ||
703 | return info; | |
704 | } | |
705 | ||
706 | /* Called when resuming a thread. | |
707 | If the debug regs have changed, update the thread's copies. */ | |
708 | ||
709 | static void | |
710 | x86_linux_prepare_to_resume (struct lwp_info *lwp) | |
711 | { | |
b9a881c2 | 712 | ptid_t ptid = ptid_of (lwp); |
6210a125 | 713 | int clear_status = 0; |
b9a881c2 | 714 | |
aa5ca48f DE |
715 | if (lwp->arch_private->debug_registers_changed) |
716 | { | |
717 | int i; | |
aa5ca48f DE |
718 | int pid = ptid_get_pid (ptid); |
719 | struct process_info *proc = find_process_pid (pid); | |
493e2a69 MS |
720 | struct i386_debug_reg_state *state |
721 | = &proc->private->arch_private->debug_reg_state; | |
aa5ca48f DE |
722 | |
723 | for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++) | |
6210a125 PA |
724 | if (state->dr_ref_count[i] > 0) |
725 | { | |
726 | x86_linux_dr_set (ptid, i, state->dr_mirror[i]); | |
727 | ||
728 | /* If we're setting a watchpoint, any change the inferior | |
729 | had done itself to the debug registers needs to be | |
730 | discarded, otherwise, i386_low_stopped_data_address can | |
731 | get confused. */ | |
732 | clear_status = 1; | |
733 | } | |
aa5ca48f DE |
734 | |
735 | x86_linux_dr_set (ptid, DR_CONTROL, state->dr_control_mirror); | |
736 | ||
737 | lwp->arch_private->debug_registers_changed = 0; | |
738 | } | |
b9a881c2 | 739 | |
6210a125 | 740 | if (clear_status || lwp->stopped_by_watchpoint) |
b9a881c2 | 741 | x86_linux_dr_set (ptid, DR_STATUS, 0); |
aa5ca48f DE |
742 | } |
743 | \f | |
d0722149 DE |
744 | /* When GDBSERVER is built as a 64-bit application on linux, the |
745 | PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since | |
746 | debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same | |
747 | as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit | |
748 | conversion in-place ourselves. */ | |
749 | ||
750 | /* These types below (compat_*) define a siginfo type that is layout | |
751 | compatible with the siginfo type exported by the 32-bit userspace | |
752 | support. */ | |
753 | ||
754 | #ifdef __x86_64__ | |
755 | ||
756 | typedef int compat_int_t; | |
757 | typedef unsigned int compat_uptr_t; | |
758 | ||
759 | typedef int compat_time_t; | |
760 | typedef int compat_timer_t; | |
761 | typedef int compat_clock_t; | |
762 | ||
763 | struct compat_timeval | |
764 | { | |
765 | compat_time_t tv_sec; | |
766 | int tv_usec; | |
767 | }; | |
768 | ||
769 | typedef union compat_sigval | |
770 | { | |
771 | compat_int_t sival_int; | |
772 | compat_uptr_t sival_ptr; | |
773 | } compat_sigval_t; | |
774 | ||
775 | typedef struct compat_siginfo | |
776 | { | |
777 | int si_signo; | |
778 | int si_errno; | |
779 | int si_code; | |
780 | ||
781 | union | |
782 | { | |
783 | int _pad[((128 / sizeof (int)) - 3)]; | |
784 | ||
785 | /* kill() */ | |
786 | struct | |
787 | { | |
788 | unsigned int _pid; | |
789 | unsigned int _uid; | |
790 | } _kill; | |
791 | ||
792 | /* POSIX.1b timers */ | |
793 | struct | |
794 | { | |
795 | compat_timer_t _tid; | |
796 | int _overrun; | |
797 | compat_sigval_t _sigval; | |
798 | } _timer; | |
799 | ||
800 | /* POSIX.1b signals */ | |
801 | struct | |
802 | { | |
803 | unsigned int _pid; | |
804 | unsigned int _uid; | |
805 | compat_sigval_t _sigval; | |
806 | } _rt; | |
807 | ||
808 | /* SIGCHLD */ | |
809 | struct | |
810 | { | |
811 | unsigned int _pid; | |
812 | unsigned int _uid; | |
813 | int _status; | |
814 | compat_clock_t _utime; | |
815 | compat_clock_t _stime; | |
816 | } _sigchld; | |
817 | ||
818 | /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ | |
819 | struct | |
820 | { | |
821 | unsigned int _addr; | |
822 | } _sigfault; | |
823 | ||
824 | /* SIGPOLL */ | |
825 | struct | |
826 | { | |
827 | int _band; | |
828 | int _fd; | |
829 | } _sigpoll; | |
830 | } _sifields; | |
831 | } compat_siginfo_t; | |
832 | ||
c92b5177 L |
833 | /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */ |
834 | typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t; | |
835 | ||
836 | typedef struct compat_x32_siginfo | |
837 | { | |
838 | int si_signo; | |
839 | int si_errno; | |
840 | int si_code; | |
841 | ||
842 | union | |
843 | { | |
844 | int _pad[((128 / sizeof (int)) - 3)]; | |
845 | ||
846 | /* kill() */ | |
847 | struct | |
848 | { | |
849 | unsigned int _pid; | |
850 | unsigned int _uid; | |
851 | } _kill; | |
852 | ||
853 | /* POSIX.1b timers */ | |
854 | struct | |
855 | { | |
856 | compat_timer_t _tid; | |
857 | int _overrun; | |
858 | compat_sigval_t _sigval; | |
859 | } _timer; | |
860 | ||
861 | /* POSIX.1b signals */ | |
862 | struct | |
863 | { | |
864 | unsigned int _pid; | |
865 | unsigned int _uid; | |
866 | compat_sigval_t _sigval; | |
867 | } _rt; | |
868 | ||
869 | /* SIGCHLD */ | |
870 | struct | |
871 | { | |
872 | unsigned int _pid; | |
873 | unsigned int _uid; | |
874 | int _status; | |
875 | compat_x32_clock_t _utime; | |
876 | compat_x32_clock_t _stime; | |
877 | } _sigchld; | |
878 | ||
879 | /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ | |
880 | struct | |
881 | { | |
882 | unsigned int _addr; | |
883 | } _sigfault; | |
884 | ||
885 | /* SIGPOLL */ | |
886 | struct | |
887 | { | |
888 | int _band; | |
889 | int _fd; | |
890 | } _sigpoll; | |
891 | } _sifields; | |
892 | } compat_x32_siginfo_t __attribute__ ((__aligned__ (8))); | |
893 | ||
d0722149 DE |
894 | #define cpt_si_pid _sifields._kill._pid |
895 | #define cpt_si_uid _sifields._kill._uid | |
896 | #define cpt_si_timerid _sifields._timer._tid | |
897 | #define cpt_si_overrun _sifields._timer._overrun | |
898 | #define cpt_si_status _sifields._sigchld._status | |
899 | #define cpt_si_utime _sifields._sigchld._utime | |
900 | #define cpt_si_stime _sifields._sigchld._stime | |
901 | #define cpt_si_ptr _sifields._rt._sigval.sival_ptr | |
902 | #define cpt_si_addr _sifields._sigfault._addr | |
903 | #define cpt_si_band _sifields._sigpoll._band | |
904 | #define cpt_si_fd _sifields._sigpoll._fd | |
905 | ||
906 | /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun. | |
907 | In their place is si_timer1,si_timer2. */ | |
908 | #ifndef si_timerid | |
909 | #define si_timerid si_timer1 | |
910 | #endif | |
911 | #ifndef si_overrun | |
912 | #define si_overrun si_timer2 | |
913 | #endif | |
914 | ||
915 | static void | |
916 | compat_siginfo_from_siginfo (compat_siginfo_t *to, siginfo_t *from) | |
917 | { | |
918 | memset (to, 0, sizeof (*to)); | |
919 | ||
920 | to->si_signo = from->si_signo; | |
921 | to->si_errno = from->si_errno; | |
922 | to->si_code = from->si_code; | |
923 | ||
b53a1623 | 924 | if (to->si_code == SI_TIMER) |
d0722149 | 925 | { |
b53a1623 PA |
926 | to->cpt_si_timerid = from->si_timerid; |
927 | to->cpt_si_overrun = from->si_overrun; | |
d0722149 DE |
928 | to->cpt_si_ptr = (intptr_t) from->si_ptr; |
929 | } | |
930 | else if (to->si_code == SI_USER) | |
931 | { | |
932 | to->cpt_si_pid = from->si_pid; | |
933 | to->cpt_si_uid = from->si_uid; | |
934 | } | |
b53a1623 | 935 | else if (to->si_code < 0) |
d0722149 | 936 | { |
b53a1623 PA |
937 | to->cpt_si_pid = from->si_pid; |
938 | to->cpt_si_uid = from->si_uid; | |
d0722149 DE |
939 | to->cpt_si_ptr = (intptr_t) from->si_ptr; |
940 | } | |
941 | else | |
942 | { | |
943 | switch (to->si_signo) | |
944 | { | |
945 | case SIGCHLD: | |
946 | to->cpt_si_pid = from->si_pid; | |
947 | to->cpt_si_uid = from->si_uid; | |
948 | to->cpt_si_status = from->si_status; | |
949 | to->cpt_si_utime = from->si_utime; | |
950 | to->cpt_si_stime = from->si_stime; | |
951 | break; | |
952 | case SIGILL: | |
953 | case SIGFPE: | |
954 | case SIGSEGV: | |
955 | case SIGBUS: | |
956 | to->cpt_si_addr = (intptr_t) from->si_addr; | |
957 | break; | |
958 | case SIGPOLL: | |
959 | to->cpt_si_band = from->si_band; | |
960 | to->cpt_si_fd = from->si_fd; | |
961 | break; | |
962 | default: | |
963 | to->cpt_si_pid = from->si_pid; | |
964 | to->cpt_si_uid = from->si_uid; | |
965 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
966 | break; | |
967 | } | |
968 | } | |
969 | } | |
970 | ||
971 | static void | |
972 | siginfo_from_compat_siginfo (siginfo_t *to, compat_siginfo_t *from) | |
973 | { | |
974 | memset (to, 0, sizeof (*to)); | |
975 | ||
976 | to->si_signo = from->si_signo; | |
977 | to->si_errno = from->si_errno; | |
978 | to->si_code = from->si_code; | |
979 | ||
b53a1623 | 980 | if (to->si_code == SI_TIMER) |
d0722149 | 981 | { |
b53a1623 PA |
982 | to->si_timerid = from->cpt_si_timerid; |
983 | to->si_overrun = from->cpt_si_overrun; | |
d0722149 DE |
984 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; |
985 | } | |
986 | else if (to->si_code == SI_USER) | |
987 | { | |
988 | to->si_pid = from->cpt_si_pid; | |
989 | to->si_uid = from->cpt_si_uid; | |
990 | } | |
b53a1623 | 991 | else if (to->si_code < 0) |
d0722149 | 992 | { |
b53a1623 PA |
993 | to->si_pid = from->cpt_si_pid; |
994 | to->si_uid = from->cpt_si_uid; | |
d0722149 DE |
995 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; |
996 | } | |
997 | else | |
998 | { | |
999 | switch (to->si_signo) | |
1000 | { | |
1001 | case SIGCHLD: | |
1002 | to->si_pid = from->cpt_si_pid; | |
1003 | to->si_uid = from->cpt_si_uid; | |
1004 | to->si_status = from->cpt_si_status; | |
1005 | to->si_utime = from->cpt_si_utime; | |
1006 | to->si_stime = from->cpt_si_stime; | |
1007 | break; | |
1008 | case SIGILL: | |
1009 | case SIGFPE: | |
1010 | case SIGSEGV: | |
1011 | case SIGBUS: | |
1012 | to->si_addr = (void *) (intptr_t) from->cpt_si_addr; | |
1013 | break; | |
1014 | case SIGPOLL: | |
1015 | to->si_band = from->cpt_si_band; | |
1016 | to->si_fd = from->cpt_si_fd; | |
1017 | break; | |
1018 | default: | |
1019 | to->si_pid = from->cpt_si_pid; | |
1020 | to->si_uid = from->cpt_si_uid; | |
1021 | to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr; | |
1022 | break; | |
1023 | } | |
1024 | } | |
1025 | } | |
1026 | ||
c92b5177 L |
1027 | static void |
1028 | compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t *to, | |
1029 | siginfo_t *from) | |
1030 | { | |
1031 | memset (to, 0, sizeof (*to)); | |
1032 | ||
1033 | to->si_signo = from->si_signo; | |
1034 | to->si_errno = from->si_errno; | |
1035 | to->si_code = from->si_code; | |
1036 | ||
1037 | if (to->si_code == SI_TIMER) | |
1038 | { | |
1039 | to->cpt_si_timerid = from->si_timerid; | |
1040 | to->cpt_si_overrun = from->si_overrun; | |
1041 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
1042 | } | |
1043 | else if (to->si_code == SI_USER) | |
1044 | { | |
1045 | to->cpt_si_pid = from->si_pid; | |
1046 | to->cpt_si_uid = from->si_uid; | |
1047 | } | |
1048 | else if (to->si_code < 0) | |
1049 | { | |
1050 | to->cpt_si_pid = from->si_pid; | |
1051 | to->cpt_si_uid = from->si_uid; | |
1052 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
1053 | } | |
1054 | else | |
1055 | { | |
1056 | switch (to->si_signo) | |
1057 | { | |
1058 | case SIGCHLD: | |
1059 | to->cpt_si_pid = from->si_pid; | |
1060 | to->cpt_si_uid = from->si_uid; | |
1061 | to->cpt_si_status = from->si_status; | |
1062 | to->cpt_si_utime = from->si_utime; | |
1063 | to->cpt_si_stime = from->si_stime; | |
1064 | break; | |
1065 | case SIGILL: | |
1066 | case SIGFPE: | |
1067 | case SIGSEGV: | |
1068 | case SIGBUS: | |
1069 | to->cpt_si_addr = (intptr_t) from->si_addr; | |
1070 | break; | |
1071 | case SIGPOLL: | |
1072 | to->cpt_si_band = from->si_band; | |
1073 | to->cpt_si_fd = from->si_fd; | |
1074 | break; | |
1075 | default: | |
1076 | to->cpt_si_pid = from->si_pid; | |
1077 | to->cpt_si_uid = from->si_uid; | |
1078 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
1079 | break; | |
1080 | } | |
1081 | } | |
1082 | } | |
1083 | ||
1084 | static void | |
1085 | siginfo_from_compat_x32_siginfo (siginfo_t *to, | |
1086 | compat_x32_siginfo_t *from) | |
1087 | { | |
1088 | memset (to, 0, sizeof (*to)); | |
1089 | ||
1090 | to->si_signo = from->si_signo; | |
1091 | to->si_errno = from->si_errno; | |
1092 | to->si_code = from->si_code; | |
1093 | ||
1094 | if (to->si_code == SI_TIMER) | |
1095 | { | |
1096 | to->si_timerid = from->cpt_si_timerid; | |
1097 | to->si_overrun = from->cpt_si_overrun; | |
1098 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; | |
1099 | } | |
1100 | else if (to->si_code == SI_USER) | |
1101 | { | |
1102 | to->si_pid = from->cpt_si_pid; | |
1103 | to->si_uid = from->cpt_si_uid; | |
1104 | } | |
1105 | else if (to->si_code < 0) | |
1106 | { | |
1107 | to->si_pid = from->cpt_si_pid; | |
1108 | to->si_uid = from->cpt_si_uid; | |
1109 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; | |
1110 | } | |
1111 | else | |
1112 | { | |
1113 | switch (to->si_signo) | |
1114 | { | |
1115 | case SIGCHLD: | |
1116 | to->si_pid = from->cpt_si_pid; | |
1117 | to->si_uid = from->cpt_si_uid; | |
1118 | to->si_status = from->cpt_si_status; | |
1119 | to->si_utime = from->cpt_si_utime; | |
1120 | to->si_stime = from->cpt_si_stime; | |
1121 | break; | |
1122 | case SIGILL: | |
1123 | case SIGFPE: | |
1124 | case SIGSEGV: | |
1125 | case SIGBUS: | |
1126 | to->si_addr = (void *) (intptr_t) from->cpt_si_addr; | |
1127 | break; | |
1128 | case SIGPOLL: | |
1129 | to->si_band = from->cpt_si_band; | |
1130 | to->si_fd = from->cpt_si_fd; | |
1131 | break; | |
1132 | default: | |
1133 | to->si_pid = from->cpt_si_pid; | |
1134 | to->si_uid = from->cpt_si_uid; | |
1135 | to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr; | |
1136 | break; | |
1137 | } | |
1138 | } | |
1139 | } | |
1140 | ||
d0722149 DE |
1141 | #endif /* __x86_64__ */ |
1142 | ||
1143 | /* Convert a native/host siginfo object, into/from the siginfo in the | |
1144 | layout of the inferiors' architecture. Returns true if any | |
1145 | conversion was done; false otherwise. If DIRECTION is 1, then copy | |
1146 | from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to | |
1147 | INF. */ | |
1148 | ||
1149 | static int | |
a5362b9a | 1150 | x86_siginfo_fixup (siginfo_t *native, void *inf, int direction) |
d0722149 DE |
1151 | { |
1152 | #ifdef __x86_64__ | |
760256f9 PA |
1153 | unsigned int machine; |
1154 | int tid = lwpid_of (get_thread_lwp (current_inferior)); | |
1155 | int is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine); | |
1156 | ||
d0722149 | 1157 | /* Is the inferior 32-bit? If so, then fixup the siginfo object. */ |
3aee8918 | 1158 | if (!is_64bit_tdesc ()) |
d0722149 | 1159 | { |
a5362b9a | 1160 | if (sizeof (siginfo_t) != sizeof (compat_siginfo_t)) |
9f1036c1 | 1161 | fatal ("unexpected difference in siginfo"); |
d0722149 DE |
1162 | |
1163 | if (direction == 0) | |
1164 | compat_siginfo_from_siginfo ((struct compat_siginfo *) inf, native); | |
1165 | else | |
1166 | siginfo_from_compat_siginfo (native, (struct compat_siginfo *) inf); | |
1167 | ||
c92b5177 L |
1168 | return 1; |
1169 | } | |
1170 | /* No fixup for native x32 GDB. */ | |
760256f9 | 1171 | else if (!is_elf64 && sizeof (void *) == 8) |
c92b5177 L |
1172 | { |
1173 | if (sizeof (siginfo_t) != sizeof (compat_x32_siginfo_t)) | |
1174 | fatal ("unexpected difference in siginfo"); | |
1175 | ||
1176 | if (direction == 0) | |
1177 | compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo *) inf, | |
1178 | native); | |
1179 | else | |
1180 | siginfo_from_compat_x32_siginfo (native, | |
1181 | (struct compat_x32_siginfo *) inf); | |
1182 | ||
d0722149 DE |
1183 | return 1; |
1184 | } | |
1185 | #endif | |
1186 | ||
1187 | return 0; | |
1188 | } | |
1189 | \f | |
1570b33e L |
1190 | static int use_xml; |
1191 | ||
3aee8918 PA |
1192 | /* Format of XSAVE extended state is: |
1193 | struct | |
1194 | { | |
1195 | fxsave_bytes[0..463] | |
1196 | sw_usable_bytes[464..511] | |
1197 | xstate_hdr_bytes[512..575] | |
1198 | avx_bytes[576..831] | |
1199 | future_state etc | |
1200 | }; | |
1201 | ||
1202 | Same memory layout will be used for the coredump NT_X86_XSTATE | |
1203 | representing the XSAVE extended state registers. | |
1204 | ||
1205 | The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled | |
1206 | extended state mask, which is the same as the extended control register | |
1207 | 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask | |
1208 | together with the mask saved in the xstate_hdr_bytes to determine what | |
1209 | states the processor/OS supports and what state, used or initialized, | |
1210 | the process/thread is in. */ | |
1211 | #define I386_LINUX_XSAVE_XCR0_OFFSET 464 | |
1212 | ||
1213 | /* Does the current host support the GETFPXREGS request? The header | |
1214 | file may or may not define it, and even if it is defined, the | |
1215 | kernel will return EIO if it's running on a pre-SSE processor. */ | |
1216 | int have_ptrace_getfpxregs = | |
1217 | #ifdef HAVE_PTRACE_GETFPXREGS | |
1218 | -1 | |
1219 | #else | |
1220 | 0 | |
1221 | #endif | |
1222 | ; | |
1570b33e | 1223 | |
3aee8918 PA |
1224 | /* Does the current host support PTRACE_GETREGSET? */ |
1225 | static int have_ptrace_getregset = -1; | |
1226 | ||
1227 | /* Get Linux/x86 target description from running target. */ | |
1228 | ||
1229 | static const struct target_desc * | |
1230 | x86_linux_read_description (void) | |
1570b33e | 1231 | { |
3aee8918 PA |
1232 | unsigned int machine; |
1233 | int is_elf64; | |
1234 | int avx; | |
1235 | int tid; | |
1236 | static uint64_t xcr0; | |
3a13a53b | 1237 | struct regset_info *regset; |
1570b33e | 1238 | |
3aee8918 | 1239 | tid = lwpid_of (get_thread_lwp (current_inferior)); |
1570b33e | 1240 | |
3aee8918 | 1241 | is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine); |
45ba0d02 | 1242 | |
3aee8918 | 1243 | if (sizeof (void *) == 4) |
3a13a53b | 1244 | { |
3aee8918 PA |
1245 | if (is_elf64 > 0) |
1246 | error (_("Can't debug 64-bit process with 32-bit GDBserver")); | |
1247 | #ifndef __x86_64__ | |
1248 | else if (machine == EM_X86_64) | |
1249 | error (_("Can't debug x86-64 process with 32-bit GDBserver")); | |
1250 | #endif | |
1251 | } | |
3a13a53b | 1252 | |
3aee8918 PA |
1253 | #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS |
1254 | if (machine == EM_386 && have_ptrace_getfpxregs == -1) | |
1255 | { | |
1256 | elf_fpxregset_t fpxregs; | |
3a13a53b | 1257 | |
3aee8918 | 1258 | if (ptrace (PTRACE_GETFPXREGS, tid, 0, (long) &fpxregs) < 0) |
3a13a53b | 1259 | { |
3aee8918 PA |
1260 | have_ptrace_getfpxregs = 0; |
1261 | have_ptrace_getregset = 0; | |
1262 | return tdesc_i386_mmx_linux; | |
3a13a53b | 1263 | } |
3aee8918 PA |
1264 | else |
1265 | have_ptrace_getfpxregs = 1; | |
3a13a53b | 1266 | } |
1570b33e L |
1267 | #endif |
1268 | ||
1269 | if (!use_xml) | |
1270 | { | |
3aee8918 PA |
1271 | x86_xcr0 = I386_XSTATE_SSE_MASK; |
1272 | ||
1570b33e L |
1273 | /* Don't use XML. */ |
1274 | #ifdef __x86_64__ | |
3aee8918 PA |
1275 | if (machine == EM_X86_64) |
1276 | return tdesc_amd64_linux_no_xml; | |
1570b33e | 1277 | else |
1570b33e | 1278 | #endif |
3aee8918 | 1279 | return tdesc_i386_linux_no_xml; |
1570b33e L |
1280 | } |
1281 | ||
1570b33e L |
1282 | if (have_ptrace_getregset == -1) |
1283 | { | |
3aee8918 | 1284 | uint64_t xstateregs[(I386_XSTATE_SSE_SIZE / sizeof (uint64_t))]; |
1570b33e | 1285 | struct iovec iov; |
1570b33e L |
1286 | |
1287 | iov.iov_base = xstateregs; | |
1288 | iov.iov_len = sizeof (xstateregs); | |
1289 | ||
1290 | /* Check if PTRACE_GETREGSET works. */ | |
3aee8918 PA |
1291 | if (ptrace (PTRACE_GETREGSET, tid, |
1292 | (unsigned int) NT_X86_XSTATE, (long) &iov) < 0) | |
1293 | have_ptrace_getregset = 0; | |
1294 | else | |
1570b33e | 1295 | { |
3aee8918 PA |
1296 | have_ptrace_getregset = 1; |
1297 | ||
1298 | /* Get XCR0 from XSAVE extended state. */ | |
1299 | xcr0 = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET | |
1300 | / sizeof (uint64_t))]; | |
1301 | ||
1302 | /* Use PTRACE_GETREGSET if it is available. */ | |
1303 | for (regset = x86_regsets; | |
1304 | regset->fill_function != NULL; regset++) | |
1305 | if (regset->get_request == PTRACE_GETREGSET) | |
1306 | regset->size = I386_XSTATE_SIZE (xcr0); | |
1307 | else if (regset->type != GENERAL_REGS) | |
1308 | regset->size = 0; | |
1570b33e | 1309 | } |
1570b33e L |
1310 | } |
1311 | ||
3aee8918 PA |
1312 | /* Check the native XCR0 only if PTRACE_GETREGSET is available. */ |
1313 | avx = (have_ptrace_getregset | |
1314 | && (xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK); | |
1315 | ||
1316 | /* AVX is the highest feature we support. */ | |
1317 | if (avx) | |
1318 | x86_xcr0 = xcr0; | |
1570b33e | 1319 | |
3aee8918 PA |
1320 | if (machine == EM_X86_64) |
1321 | { | |
1570b33e | 1322 | #ifdef __x86_64__ |
3aee8918 PA |
1323 | if (avx) |
1324 | { | |
1325 | if (!is_elf64) | |
1326 | return tdesc_x32_avx_linux; | |
4d47af5c | 1327 | else |
3aee8918 PA |
1328 | return tdesc_amd64_avx_linux; |
1329 | } | |
1330 | else | |
1331 | { | |
1332 | if (!is_elf64) | |
1333 | return tdesc_x32_linux; | |
1334 | else | |
1335 | return tdesc_amd64_linux; | |
1570b33e | 1336 | } |
3aee8918 | 1337 | #endif |
1570b33e | 1338 | } |
3aee8918 PA |
1339 | else |
1340 | { | |
1341 | if (avx) | |
1342 | return tdesc_i386_avx_linux; | |
1343 | else | |
1344 | return tdesc_i386_linux; | |
1345 | } | |
1346 | ||
1347 | gdb_assert_not_reached ("failed to return tdesc"); | |
1348 | } | |
1349 | ||
1350 | /* Callback for find_inferior. Stops iteration when a thread with a | |
1351 | given PID is found. */ | |
1352 | ||
1353 | static int | |
1354 | same_process_callback (struct inferior_list_entry *entry, void *data) | |
1355 | { | |
1356 | int pid = *(int *) data; | |
1357 | ||
1358 | return (ptid_get_pid (entry->id) == pid); | |
1359 | } | |
1360 | ||
1361 | /* Callback for for_each_inferior. Calls the arch_setup routine for | |
1362 | each process. */ | |
1363 | ||
1364 | static void | |
1365 | x86_arch_setup_process_callback (struct inferior_list_entry *entry) | |
1366 | { | |
1367 | int pid = ptid_get_pid (entry->id); | |
1368 | ||
1369 | /* Look up any thread of this processes. */ | |
1370 | current_inferior | |
1371 | = (struct thread_info *) find_inferior (&all_threads, | |
1372 | same_process_callback, &pid); | |
1373 | ||
1374 | the_low_target.arch_setup (); | |
1375 | } | |
1376 | ||
1377 | /* Update all the target description of all processes; a new GDB | |
1378 | connected, and it may or not support xml target descriptions. */ | |
1379 | ||
1380 | static void | |
1381 | x86_linux_update_xmltarget (void) | |
1382 | { | |
1383 | struct thread_info *save_inferior = current_inferior; | |
1384 | ||
1385 | /* Before changing the register cache's internal layout, flush the | |
1386 | contents of the current valid caches back to the threads, and | |
1387 | release the current regcache objects. */ | |
1388 | regcache_release (); | |
1389 | ||
1390 | for_each_inferior (&all_processes, x86_arch_setup_process_callback); | |
1391 | ||
1392 | current_inferior = save_inferior; | |
1570b33e L |
1393 | } |
1394 | ||
1395 | /* Process qSupported query, "xmlRegisters=". Update the buffer size for | |
1396 | PTRACE_GETREGSET. */ | |
1397 | ||
1398 | static void | |
1399 | x86_linux_process_qsupported (const char *query) | |
1400 | { | |
1401 | /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters=" | |
1402 | with "i386" in qSupported query, it supports x86 XML target | |
1403 | descriptions. */ | |
1404 | use_xml = 0; | |
1405 | if (query != NULL && strncmp (query, "xmlRegisters=", 13) == 0) | |
1406 | { | |
1407 | char *copy = xstrdup (query + 13); | |
1408 | char *p; | |
1409 | ||
1410 | for (p = strtok (copy, ","); p != NULL; p = strtok (NULL, ",")) | |
1411 | { | |
1412 | if (strcmp (p, "i386") == 0) | |
1413 | { | |
1414 | use_xml = 1; | |
1415 | break; | |
1416 | } | |
1417 | } | |
1418 | ||
1419 | free (copy); | |
1420 | } | |
1421 | ||
1422 | x86_linux_update_xmltarget (); | |
1423 | } | |
1424 | ||
3aee8918 | 1425 | /* Common for x86/x86-64. */ |
d0722149 | 1426 | |
3aee8918 PA |
1427 | static struct regsets_info x86_regsets_info = |
1428 | { | |
1429 | x86_regsets, /* regsets */ | |
1430 | 0, /* num_regsets */ | |
1431 | NULL, /* disabled_regsets */ | |
1432 | }; | |
214d508e L |
1433 | |
1434 | #ifdef __x86_64__ | |
3aee8918 PA |
1435 | static struct regs_info amd64_linux_regs_info = |
1436 | { | |
1437 | NULL, /* regset_bitmap */ | |
1438 | NULL, /* usrregs_info */ | |
1439 | &x86_regsets_info | |
1440 | }; | |
d0722149 | 1441 | #endif |
3aee8918 PA |
1442 | static struct usrregs_info i386_linux_usrregs_info = |
1443 | { | |
1444 | I386_NUM_REGS, | |
1445 | i386_regmap, | |
1446 | }; | |
d0722149 | 1447 | |
3aee8918 PA |
1448 | static struct regs_info i386_linux_regs_info = |
1449 | { | |
1450 | NULL, /* regset_bitmap */ | |
1451 | &i386_linux_usrregs_info, | |
1452 | &x86_regsets_info | |
1453 | }; | |
d0722149 | 1454 | |
3aee8918 PA |
1455 | const struct regs_info * |
1456 | x86_linux_regs_info (void) | |
1457 | { | |
1458 | #ifdef __x86_64__ | |
1459 | if (is_64bit_tdesc ()) | |
1460 | return &amd64_linux_regs_info; | |
1461 | else | |
1462 | #endif | |
1463 | return &i386_linux_regs_info; | |
1464 | } | |
d0722149 | 1465 | |
3aee8918 PA |
1466 | /* Initialize the target description for the architecture of the |
1467 | inferior. */ | |
1570b33e | 1468 | |
3aee8918 PA |
1469 | static void |
1470 | x86_arch_setup (void) | |
1471 | { | |
1472 | current_process ()->tdesc = x86_linux_read_description (); | |
d0722149 DE |
1473 | } |
1474 | ||
219f2f23 PA |
1475 | static int |
1476 | x86_supports_tracepoints (void) | |
1477 | { | |
1478 | return 1; | |
1479 | } | |
1480 | ||
fa593d66 PA |
1481 | static void |
1482 | append_insns (CORE_ADDR *to, size_t len, const unsigned char *buf) | |
1483 | { | |
1484 | write_inferior_memory (*to, buf, len); | |
1485 | *to += len; | |
1486 | } | |
1487 | ||
1488 | static int | |
1489 | push_opcode (unsigned char *buf, char *op) | |
1490 | { | |
1491 | unsigned char *buf_org = buf; | |
1492 | ||
1493 | while (1) | |
1494 | { | |
1495 | char *endptr; | |
1496 | unsigned long ul = strtoul (op, &endptr, 16); | |
1497 | ||
1498 | if (endptr == op) | |
1499 | break; | |
1500 | ||
1501 | *buf++ = ul; | |
1502 | op = endptr; | |
1503 | } | |
1504 | ||
1505 | return buf - buf_org; | |
1506 | } | |
1507 | ||
1508 | #ifdef __x86_64__ | |
1509 | ||
1510 | /* Build a jump pad that saves registers and calls a collection | |
1511 | function. Writes a jump instruction to the jump pad to | |
1512 | JJUMPAD_INSN. The caller is responsible to write it in at the | |
1513 | tracepoint address. */ | |
1514 | ||
1515 | static int | |
1516 | amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr, | |
1517 | CORE_ADDR collector, | |
1518 | CORE_ADDR lockaddr, | |
1519 | ULONGEST orig_size, | |
1520 | CORE_ADDR *jump_entry, | |
405f8e94 SS |
1521 | CORE_ADDR *trampoline, |
1522 | ULONGEST *trampoline_size, | |
fa593d66 PA |
1523 | unsigned char *jjump_pad_insn, |
1524 | ULONGEST *jjump_pad_insn_size, | |
1525 | CORE_ADDR *adjusted_insn_addr, | |
405f8e94 SS |
1526 | CORE_ADDR *adjusted_insn_addr_end, |
1527 | char *err) | |
fa593d66 PA |
1528 | { |
1529 | unsigned char buf[40]; | |
1530 | int i, offset; | |
f4647387 YQ |
1531 | int64_t loffset; |
1532 | ||
fa593d66 PA |
1533 | CORE_ADDR buildaddr = *jump_entry; |
1534 | ||
1535 | /* Build the jump pad. */ | |
1536 | ||
1537 | /* First, do tracepoint data collection. Save registers. */ | |
1538 | i = 0; | |
1539 | /* Need to ensure stack pointer saved first. */ | |
1540 | buf[i++] = 0x54; /* push %rsp */ | |
1541 | buf[i++] = 0x55; /* push %rbp */ | |
1542 | buf[i++] = 0x57; /* push %rdi */ | |
1543 | buf[i++] = 0x56; /* push %rsi */ | |
1544 | buf[i++] = 0x52; /* push %rdx */ | |
1545 | buf[i++] = 0x51; /* push %rcx */ | |
1546 | buf[i++] = 0x53; /* push %rbx */ | |
1547 | buf[i++] = 0x50; /* push %rax */ | |
1548 | buf[i++] = 0x41; buf[i++] = 0x57; /* push %r15 */ | |
1549 | buf[i++] = 0x41; buf[i++] = 0x56; /* push %r14 */ | |
1550 | buf[i++] = 0x41; buf[i++] = 0x55; /* push %r13 */ | |
1551 | buf[i++] = 0x41; buf[i++] = 0x54; /* push %r12 */ | |
1552 | buf[i++] = 0x41; buf[i++] = 0x53; /* push %r11 */ | |
1553 | buf[i++] = 0x41; buf[i++] = 0x52; /* push %r10 */ | |
1554 | buf[i++] = 0x41; buf[i++] = 0x51; /* push %r9 */ | |
1555 | buf[i++] = 0x41; buf[i++] = 0x50; /* push %r8 */ | |
1556 | buf[i++] = 0x9c; /* pushfq */ | |
1557 | buf[i++] = 0x48; /* movl <addr>,%rdi */ | |
1558 | buf[i++] = 0xbf; | |
1559 | *((unsigned long *)(buf + i)) = (unsigned long) tpaddr; | |
1560 | i += sizeof (unsigned long); | |
1561 | buf[i++] = 0x57; /* push %rdi */ | |
1562 | append_insns (&buildaddr, i, buf); | |
1563 | ||
1564 | /* Stack space for the collecting_t object. */ | |
1565 | i = 0; | |
1566 | i += push_opcode (&buf[i], "48 83 ec 18"); /* sub $0x18,%rsp */ | |
1567 | i += push_opcode (&buf[i], "48 b8"); /* mov <tpoint>,%rax */ | |
1568 | memcpy (buf + i, &tpoint, 8); | |
1569 | i += 8; | |
1570 | i += push_opcode (&buf[i], "48 89 04 24"); /* mov %rax,(%rsp) */ | |
1571 | i += push_opcode (&buf[i], | |
1572 | "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */ | |
1573 | i += push_opcode (&buf[i], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */ | |
1574 | append_insns (&buildaddr, i, buf); | |
1575 | ||
1576 | /* spin-lock. */ | |
1577 | i = 0; | |
1578 | i += push_opcode (&buf[i], "48 be"); /* movl <lockaddr>,%rsi */ | |
1579 | memcpy (&buf[i], (void *) &lockaddr, 8); | |
1580 | i += 8; | |
1581 | i += push_opcode (&buf[i], "48 89 e1"); /* mov %rsp,%rcx */ | |
1582 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1583 | i += push_opcode (&buf[i], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */ | |
1584 | i += push_opcode (&buf[i], "48 85 c0"); /* test %rax,%rax */ | |
1585 | i += push_opcode (&buf[i], "75 f4"); /* jne <again> */ | |
1586 | append_insns (&buildaddr, i, buf); | |
1587 | ||
1588 | /* Set up the gdb_collect call. */ | |
1589 | /* At this point, (stack pointer + 0x18) is the base of our saved | |
1590 | register block. */ | |
1591 | ||
1592 | i = 0; | |
1593 | i += push_opcode (&buf[i], "48 89 e6"); /* mov %rsp,%rsi */ | |
1594 | i += push_opcode (&buf[i], "48 83 c6 18"); /* add $0x18,%rsi */ | |
1595 | ||
1596 | /* tpoint address may be 64-bit wide. */ | |
1597 | i += push_opcode (&buf[i], "48 bf"); /* movl <addr>,%rdi */ | |
1598 | memcpy (buf + i, &tpoint, 8); | |
1599 | i += 8; | |
1600 | append_insns (&buildaddr, i, buf); | |
1601 | ||
1602 | /* The collector function being in the shared library, may be | |
1603 | >31-bits away off the jump pad. */ | |
1604 | i = 0; | |
1605 | i += push_opcode (&buf[i], "48 b8"); /* mov $collector,%rax */ | |
1606 | memcpy (buf + i, &collector, 8); | |
1607 | i += 8; | |
1608 | i += push_opcode (&buf[i], "ff d0"); /* callq *%rax */ | |
1609 | append_insns (&buildaddr, i, buf); | |
1610 | ||
1611 | /* Clear the spin-lock. */ | |
1612 | i = 0; | |
1613 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1614 | i += push_opcode (&buf[i], "48 a3"); /* mov %rax, lockaddr */ | |
1615 | memcpy (buf + i, &lockaddr, 8); | |
1616 | i += 8; | |
1617 | append_insns (&buildaddr, i, buf); | |
1618 | ||
1619 | /* Remove stack that had been used for the collect_t object. */ | |
1620 | i = 0; | |
1621 | i += push_opcode (&buf[i], "48 83 c4 18"); /* add $0x18,%rsp */ | |
1622 | append_insns (&buildaddr, i, buf); | |
1623 | ||
1624 | /* Restore register state. */ | |
1625 | i = 0; | |
1626 | buf[i++] = 0x48; /* add $0x8,%rsp */ | |
1627 | buf[i++] = 0x83; | |
1628 | buf[i++] = 0xc4; | |
1629 | buf[i++] = 0x08; | |
1630 | buf[i++] = 0x9d; /* popfq */ | |
1631 | buf[i++] = 0x41; buf[i++] = 0x58; /* pop %r8 */ | |
1632 | buf[i++] = 0x41; buf[i++] = 0x59; /* pop %r9 */ | |
1633 | buf[i++] = 0x41; buf[i++] = 0x5a; /* pop %r10 */ | |
1634 | buf[i++] = 0x41; buf[i++] = 0x5b; /* pop %r11 */ | |
1635 | buf[i++] = 0x41; buf[i++] = 0x5c; /* pop %r12 */ | |
1636 | buf[i++] = 0x41; buf[i++] = 0x5d; /* pop %r13 */ | |
1637 | buf[i++] = 0x41; buf[i++] = 0x5e; /* pop %r14 */ | |
1638 | buf[i++] = 0x41; buf[i++] = 0x5f; /* pop %r15 */ | |
1639 | buf[i++] = 0x58; /* pop %rax */ | |
1640 | buf[i++] = 0x5b; /* pop %rbx */ | |
1641 | buf[i++] = 0x59; /* pop %rcx */ | |
1642 | buf[i++] = 0x5a; /* pop %rdx */ | |
1643 | buf[i++] = 0x5e; /* pop %rsi */ | |
1644 | buf[i++] = 0x5f; /* pop %rdi */ | |
1645 | buf[i++] = 0x5d; /* pop %rbp */ | |
1646 | buf[i++] = 0x5c; /* pop %rsp */ | |
1647 | append_insns (&buildaddr, i, buf); | |
1648 | ||
1649 | /* Now, adjust the original instruction to execute in the jump | |
1650 | pad. */ | |
1651 | *adjusted_insn_addr = buildaddr; | |
1652 | relocate_instruction (&buildaddr, tpaddr); | |
1653 | *adjusted_insn_addr_end = buildaddr; | |
1654 | ||
1655 | /* Finally, write a jump back to the program. */ | |
f4647387 YQ |
1656 | |
1657 | loffset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn)); | |
1658 | if (loffset > INT_MAX || loffset < INT_MIN) | |
1659 | { | |
1660 | sprintf (err, | |
1661 | "E.Jump back from jump pad too far from tracepoint " | |
1662 | "(offset 0x%" PRIx64 " > int32).", loffset); | |
1663 | return 1; | |
1664 | } | |
1665 | ||
1666 | offset = (int) loffset; | |
fa593d66 PA |
1667 | memcpy (buf, jump_insn, sizeof (jump_insn)); |
1668 | memcpy (buf + 1, &offset, 4); | |
1669 | append_insns (&buildaddr, sizeof (jump_insn), buf); | |
1670 | ||
1671 | /* The jump pad is now built. Wire in a jump to our jump pad. This | |
1672 | is always done last (by our caller actually), so that we can | |
1673 | install fast tracepoints with threads running. This relies on | |
1674 | the agent's atomic write support. */ | |
f4647387 YQ |
1675 | loffset = *jump_entry - (tpaddr + sizeof (jump_insn)); |
1676 | if (loffset > INT_MAX || loffset < INT_MIN) | |
1677 | { | |
1678 | sprintf (err, | |
1679 | "E.Jump pad too far from tracepoint " | |
1680 | "(offset 0x%" PRIx64 " > int32).", loffset); | |
1681 | return 1; | |
1682 | } | |
1683 | ||
1684 | offset = (int) loffset; | |
1685 | ||
fa593d66 PA |
1686 | memcpy (buf, jump_insn, sizeof (jump_insn)); |
1687 | memcpy (buf + 1, &offset, 4); | |
1688 | memcpy (jjump_pad_insn, buf, sizeof (jump_insn)); | |
1689 | *jjump_pad_insn_size = sizeof (jump_insn); | |
1690 | ||
1691 | /* Return the end address of our pad. */ | |
1692 | *jump_entry = buildaddr; | |
1693 | ||
1694 | return 0; | |
1695 | } | |
1696 | ||
1697 | #endif /* __x86_64__ */ | |
1698 | ||
1699 | /* Build a jump pad that saves registers and calls a collection | |
1700 | function. Writes a jump instruction to the jump pad to | |
1701 | JJUMPAD_INSN. The caller is responsible to write it in at the | |
1702 | tracepoint address. */ | |
1703 | ||
1704 | static int | |
1705 | i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr, | |
1706 | CORE_ADDR collector, | |
1707 | CORE_ADDR lockaddr, | |
1708 | ULONGEST orig_size, | |
1709 | CORE_ADDR *jump_entry, | |
405f8e94 SS |
1710 | CORE_ADDR *trampoline, |
1711 | ULONGEST *trampoline_size, | |
fa593d66 PA |
1712 | unsigned char *jjump_pad_insn, |
1713 | ULONGEST *jjump_pad_insn_size, | |
1714 | CORE_ADDR *adjusted_insn_addr, | |
405f8e94 SS |
1715 | CORE_ADDR *adjusted_insn_addr_end, |
1716 | char *err) | |
fa593d66 PA |
1717 | { |
1718 | unsigned char buf[0x100]; | |
1719 | int i, offset; | |
1720 | CORE_ADDR buildaddr = *jump_entry; | |
1721 | ||
1722 | /* Build the jump pad. */ | |
1723 | ||
1724 | /* First, do tracepoint data collection. Save registers. */ | |
1725 | i = 0; | |
1726 | buf[i++] = 0x60; /* pushad */ | |
1727 | buf[i++] = 0x68; /* push tpaddr aka $pc */ | |
1728 | *((int *)(buf + i)) = (int) tpaddr; | |
1729 | i += 4; | |
1730 | buf[i++] = 0x9c; /* pushf */ | |
1731 | buf[i++] = 0x1e; /* push %ds */ | |
1732 | buf[i++] = 0x06; /* push %es */ | |
1733 | buf[i++] = 0x0f; /* push %fs */ | |
1734 | buf[i++] = 0xa0; | |
1735 | buf[i++] = 0x0f; /* push %gs */ | |
1736 | buf[i++] = 0xa8; | |
1737 | buf[i++] = 0x16; /* push %ss */ | |
1738 | buf[i++] = 0x0e; /* push %cs */ | |
1739 | append_insns (&buildaddr, i, buf); | |
1740 | ||
1741 | /* Stack space for the collecting_t object. */ | |
1742 | i = 0; | |
1743 | i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */ | |
1744 | ||
1745 | /* Build the object. */ | |
1746 | i += push_opcode (&buf[i], "b8"); /* mov <tpoint>,%eax */ | |
1747 | memcpy (buf + i, &tpoint, 4); | |
1748 | i += 4; | |
1749 | i += push_opcode (&buf[i], "89 04 24"); /* mov %eax,(%esp) */ | |
1750 | ||
1751 | i += push_opcode (&buf[i], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */ | |
1752 | i += push_opcode (&buf[i], "89 44 24 04"); /* mov %eax,0x4(%esp) */ | |
1753 | append_insns (&buildaddr, i, buf); | |
1754 | ||
1755 | /* spin-lock. Note this is using cmpxchg, which leaves i386 behind. | |
1756 | If we cared for it, this could be using xchg alternatively. */ | |
1757 | ||
1758 | i = 0; | |
1759 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1760 | i += push_opcode (&buf[i], "f0 0f b1 25"); /* lock cmpxchg | |
1761 | %esp,<lockaddr> */ | |
1762 | memcpy (&buf[i], (void *) &lockaddr, 4); | |
1763 | i += 4; | |
1764 | i += push_opcode (&buf[i], "85 c0"); /* test %eax,%eax */ | |
1765 | i += push_opcode (&buf[i], "75 f2"); /* jne <again> */ | |
1766 | append_insns (&buildaddr, i, buf); | |
1767 | ||
1768 | ||
1769 | /* Set up arguments to the gdb_collect call. */ | |
1770 | i = 0; | |
1771 | i += push_opcode (&buf[i], "89 e0"); /* mov %esp,%eax */ | |
1772 | i += push_opcode (&buf[i], "83 c0 08"); /* add $0x08,%eax */ | |
1773 | i += push_opcode (&buf[i], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */ | |
1774 | append_insns (&buildaddr, i, buf); | |
1775 | ||
1776 | i = 0; | |
1777 | i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */ | |
1778 | append_insns (&buildaddr, i, buf); | |
1779 | ||
1780 | i = 0; | |
1781 | i += push_opcode (&buf[i], "c7 04 24"); /* movl <addr>,(%esp) */ | |
1782 | memcpy (&buf[i], (void *) &tpoint, 4); | |
1783 | i += 4; | |
1784 | append_insns (&buildaddr, i, buf); | |
1785 | ||
1786 | buf[0] = 0xe8; /* call <reladdr> */ | |
1787 | offset = collector - (buildaddr + sizeof (jump_insn)); | |
1788 | memcpy (buf + 1, &offset, 4); | |
1789 | append_insns (&buildaddr, 5, buf); | |
1790 | /* Clean up after the call. */ | |
1791 | buf[0] = 0x83; /* add $0x8,%esp */ | |
1792 | buf[1] = 0xc4; | |
1793 | buf[2] = 0x08; | |
1794 | append_insns (&buildaddr, 3, buf); | |
1795 | ||
1796 | ||
1797 | /* Clear the spin-lock. This would need the LOCK prefix on older | |
1798 | broken archs. */ | |
1799 | i = 0; | |
1800 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1801 | i += push_opcode (&buf[i], "a3"); /* mov %eax, lockaddr */ | |
1802 | memcpy (buf + i, &lockaddr, 4); | |
1803 | i += 4; | |
1804 | append_insns (&buildaddr, i, buf); | |
1805 | ||
1806 | ||
1807 | /* Remove stack that had been used for the collect_t object. */ | |
1808 | i = 0; | |
1809 | i += push_opcode (&buf[i], "83 c4 08"); /* add $0x08,%esp */ | |
1810 | append_insns (&buildaddr, i, buf); | |
1811 | ||
1812 | i = 0; | |
1813 | buf[i++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */ | |
1814 | buf[i++] = 0xc4; | |
1815 | buf[i++] = 0x04; | |
1816 | buf[i++] = 0x17; /* pop %ss */ | |
1817 | buf[i++] = 0x0f; /* pop %gs */ | |
1818 | buf[i++] = 0xa9; | |
1819 | buf[i++] = 0x0f; /* pop %fs */ | |
1820 | buf[i++] = 0xa1; | |
1821 | buf[i++] = 0x07; /* pop %es */ | |
405f8e94 | 1822 | buf[i++] = 0x1f; /* pop %ds */ |
fa593d66 PA |
1823 | buf[i++] = 0x9d; /* popf */ |
1824 | buf[i++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */ | |
1825 | buf[i++] = 0xc4; | |
1826 | buf[i++] = 0x04; | |
1827 | buf[i++] = 0x61; /* popad */ | |
1828 | append_insns (&buildaddr, i, buf); | |
1829 | ||
1830 | /* Now, adjust the original instruction to execute in the jump | |
1831 | pad. */ | |
1832 | *adjusted_insn_addr = buildaddr; | |
1833 | relocate_instruction (&buildaddr, tpaddr); | |
1834 | *adjusted_insn_addr_end = buildaddr; | |
1835 | ||
1836 | /* Write the jump back to the program. */ | |
1837 | offset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn)); | |
1838 | memcpy (buf, jump_insn, sizeof (jump_insn)); | |
1839 | memcpy (buf + 1, &offset, 4); | |
1840 | append_insns (&buildaddr, sizeof (jump_insn), buf); | |
1841 | ||
1842 | /* The jump pad is now built. Wire in a jump to our jump pad. This | |
1843 | is always done last (by our caller actually), so that we can | |
1844 | install fast tracepoints with threads running. This relies on | |
1845 | the agent's atomic write support. */ | |
405f8e94 SS |
1846 | if (orig_size == 4) |
1847 | { | |
1848 | /* Create a trampoline. */ | |
1849 | *trampoline_size = sizeof (jump_insn); | |
1850 | if (!claim_trampoline_space (*trampoline_size, trampoline)) | |
1851 | { | |
1852 | /* No trampoline space available. */ | |
1853 | strcpy (err, | |
1854 | "E.Cannot allocate trampoline space needed for fast " | |
1855 | "tracepoints on 4-byte instructions."); | |
1856 | return 1; | |
1857 | } | |
1858 | ||
1859 | offset = *jump_entry - (*trampoline + sizeof (jump_insn)); | |
1860 | memcpy (buf, jump_insn, sizeof (jump_insn)); | |
1861 | memcpy (buf + 1, &offset, 4); | |
1862 | write_inferior_memory (*trampoline, buf, sizeof (jump_insn)); | |
1863 | ||
1864 | /* Use a 16-bit relative jump instruction to jump to the trampoline. */ | |
1865 | offset = (*trampoline - (tpaddr + sizeof (small_jump_insn))) & 0xffff; | |
1866 | memcpy (buf, small_jump_insn, sizeof (small_jump_insn)); | |
1867 | memcpy (buf + 2, &offset, 2); | |
1868 | memcpy (jjump_pad_insn, buf, sizeof (small_jump_insn)); | |
1869 | *jjump_pad_insn_size = sizeof (small_jump_insn); | |
1870 | } | |
1871 | else | |
1872 | { | |
1873 | /* Else use a 32-bit relative jump instruction. */ | |
1874 | offset = *jump_entry - (tpaddr + sizeof (jump_insn)); | |
1875 | memcpy (buf, jump_insn, sizeof (jump_insn)); | |
1876 | memcpy (buf + 1, &offset, 4); | |
1877 | memcpy (jjump_pad_insn, buf, sizeof (jump_insn)); | |
1878 | *jjump_pad_insn_size = sizeof (jump_insn); | |
1879 | } | |
fa593d66 PA |
1880 | |
1881 | /* Return the end address of our pad. */ | |
1882 | *jump_entry = buildaddr; | |
1883 | ||
1884 | return 0; | |
1885 | } | |
1886 | ||
1887 | static int | |
1888 | x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr, | |
1889 | CORE_ADDR collector, | |
1890 | CORE_ADDR lockaddr, | |
1891 | ULONGEST orig_size, | |
1892 | CORE_ADDR *jump_entry, | |
405f8e94 SS |
1893 | CORE_ADDR *trampoline, |
1894 | ULONGEST *trampoline_size, | |
fa593d66 PA |
1895 | unsigned char *jjump_pad_insn, |
1896 | ULONGEST *jjump_pad_insn_size, | |
1897 | CORE_ADDR *adjusted_insn_addr, | |
405f8e94 SS |
1898 | CORE_ADDR *adjusted_insn_addr_end, |
1899 | char *err) | |
fa593d66 PA |
1900 | { |
1901 | #ifdef __x86_64__ | |
3aee8918 | 1902 | if (is_64bit_tdesc ()) |
fa593d66 PA |
1903 | return amd64_install_fast_tracepoint_jump_pad (tpoint, tpaddr, |
1904 | collector, lockaddr, | |
1905 | orig_size, jump_entry, | |
405f8e94 | 1906 | trampoline, trampoline_size, |
fa593d66 PA |
1907 | jjump_pad_insn, |
1908 | jjump_pad_insn_size, | |
1909 | adjusted_insn_addr, | |
405f8e94 SS |
1910 | adjusted_insn_addr_end, |
1911 | err); | |
fa593d66 PA |
1912 | #endif |
1913 | ||
1914 | return i386_install_fast_tracepoint_jump_pad (tpoint, tpaddr, | |
1915 | collector, lockaddr, | |
1916 | orig_size, jump_entry, | |
405f8e94 | 1917 | trampoline, trampoline_size, |
fa593d66 PA |
1918 | jjump_pad_insn, |
1919 | jjump_pad_insn_size, | |
1920 | adjusted_insn_addr, | |
405f8e94 SS |
1921 | adjusted_insn_addr_end, |
1922 | err); | |
1923 | } | |
1924 | ||
1925 | /* Return the minimum instruction length for fast tracepoints on x86/x86-64 | |
1926 | architectures. */ | |
1927 | ||
1928 | static int | |
1929 | x86_get_min_fast_tracepoint_insn_len (void) | |
1930 | { | |
1931 | static int warned_about_fast_tracepoints = 0; | |
1932 | ||
1933 | #ifdef __x86_64__ | |
1934 | /* On x86-64, 5-byte jump instructions with a 4-byte offset are always | |
1935 | used for fast tracepoints. */ | |
3aee8918 | 1936 | if (is_64bit_tdesc ()) |
405f8e94 SS |
1937 | return 5; |
1938 | #endif | |
1939 | ||
58b4daa5 | 1940 | if (agent_loaded_p ()) |
405f8e94 SS |
1941 | { |
1942 | char errbuf[IPA_BUFSIZ]; | |
1943 | ||
1944 | errbuf[0] = '\0'; | |
1945 | ||
1946 | /* On x86, if trampolines are available, then 4-byte jump instructions | |
1947 | with a 2-byte offset may be used, otherwise 5-byte jump instructions | |
1948 | with a 4-byte offset are used instead. */ | |
1949 | if (have_fast_tracepoint_trampoline_buffer (errbuf)) | |
1950 | return 4; | |
1951 | else | |
1952 | { | |
1953 | /* GDB has no channel to explain to user why a shorter fast | |
1954 | tracepoint is not possible, but at least make GDBserver | |
1955 | mention that something has gone awry. */ | |
1956 | if (!warned_about_fast_tracepoints) | |
1957 | { | |
1958 | warning ("4-byte fast tracepoints not available; %s\n", errbuf); | |
1959 | warned_about_fast_tracepoints = 1; | |
1960 | } | |
1961 | return 5; | |
1962 | } | |
1963 | } | |
1964 | else | |
1965 | { | |
1966 | /* Indicate that the minimum length is currently unknown since the IPA | |
1967 | has not loaded yet. */ | |
1968 | return 0; | |
1969 | } | |
fa593d66 PA |
1970 | } |
1971 | ||
6a271cae PA |
1972 | static void |
1973 | add_insns (unsigned char *start, int len) | |
1974 | { | |
1975 | CORE_ADDR buildaddr = current_insn_ptr; | |
1976 | ||
1977 | if (debug_threads) | |
1978 | fprintf (stderr, "Adding %d bytes of insn at %s\n", | |
1979 | len, paddress (buildaddr)); | |
1980 | ||
1981 | append_insns (&buildaddr, len, start); | |
1982 | current_insn_ptr = buildaddr; | |
1983 | } | |
1984 | ||
6a271cae PA |
1985 | /* Our general strategy for emitting code is to avoid specifying raw |
1986 | bytes whenever possible, and instead copy a block of inline asm | |
1987 | that is embedded in the function. This is a little messy, because | |
1988 | we need to keep the compiler from discarding what looks like dead | |
1989 | code, plus suppress various warnings. */ | |
1990 | ||
9e4344e5 PA |
1991 | #define EMIT_ASM(NAME, INSNS) \ |
1992 | do \ | |
1993 | { \ | |
1994 | extern unsigned char start_ ## NAME, end_ ## NAME; \ | |
1995 | add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \ | |
493e2a69 | 1996 | __asm__ ("jmp end_" #NAME "\n" \ |
9e4344e5 PA |
1997 | "\t" "start_" #NAME ":" \ |
1998 | "\t" INSNS "\n" \ | |
1999 | "\t" "end_" #NAME ":"); \ | |
2000 | } while (0) | |
6a271cae PA |
2001 | |
2002 | #ifdef __x86_64__ | |
2003 | ||
2004 | #define EMIT_ASM32(NAME,INSNS) \ | |
9e4344e5 PA |
2005 | do \ |
2006 | { \ | |
2007 | extern unsigned char start_ ## NAME, end_ ## NAME; \ | |
2008 | add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \ | |
2009 | __asm__ (".code32\n" \ | |
2010 | "\t" "jmp end_" #NAME "\n" \ | |
2011 | "\t" "start_" #NAME ":\n" \ | |
2012 | "\t" INSNS "\n" \ | |
2013 | "\t" "end_" #NAME ":\n" \ | |
2014 | ".code64\n"); \ | |
2015 | } while (0) | |
6a271cae PA |
2016 | |
2017 | #else | |
2018 | ||
2019 | #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS) | |
2020 | ||
2021 | #endif | |
2022 | ||
2023 | #ifdef __x86_64__ | |
2024 | ||
2025 | static void | |
2026 | amd64_emit_prologue (void) | |
2027 | { | |
2028 | EMIT_ASM (amd64_prologue, | |
2029 | "pushq %rbp\n\t" | |
2030 | "movq %rsp,%rbp\n\t" | |
2031 | "sub $0x20,%rsp\n\t" | |
2032 | "movq %rdi,-8(%rbp)\n\t" | |
2033 | "movq %rsi,-16(%rbp)"); | |
2034 | } | |
2035 | ||
2036 | ||
2037 | static void | |
2038 | amd64_emit_epilogue (void) | |
2039 | { | |
2040 | EMIT_ASM (amd64_epilogue, | |
2041 | "movq -16(%rbp),%rdi\n\t" | |
2042 | "movq %rax,(%rdi)\n\t" | |
2043 | "xor %rax,%rax\n\t" | |
2044 | "leave\n\t" | |
2045 | "ret"); | |
2046 | } | |
2047 | ||
2048 | static void | |
2049 | amd64_emit_add (void) | |
2050 | { | |
2051 | EMIT_ASM (amd64_add, | |
2052 | "add (%rsp),%rax\n\t" | |
2053 | "lea 0x8(%rsp),%rsp"); | |
2054 | } | |
2055 | ||
2056 | static void | |
2057 | amd64_emit_sub (void) | |
2058 | { | |
2059 | EMIT_ASM (amd64_sub, | |
2060 | "sub %rax,(%rsp)\n\t" | |
2061 | "pop %rax"); | |
2062 | } | |
2063 | ||
2064 | static void | |
2065 | amd64_emit_mul (void) | |
2066 | { | |
2067 | emit_error = 1; | |
2068 | } | |
2069 | ||
2070 | static void | |
2071 | amd64_emit_lsh (void) | |
2072 | { | |
2073 | emit_error = 1; | |
2074 | } | |
2075 | ||
2076 | static void | |
2077 | amd64_emit_rsh_signed (void) | |
2078 | { | |
2079 | emit_error = 1; | |
2080 | } | |
2081 | ||
2082 | static void | |
2083 | amd64_emit_rsh_unsigned (void) | |
2084 | { | |
2085 | emit_error = 1; | |
2086 | } | |
2087 | ||
2088 | static void | |
2089 | amd64_emit_ext (int arg) | |
2090 | { | |
2091 | switch (arg) | |
2092 | { | |
2093 | case 8: | |
2094 | EMIT_ASM (amd64_ext_8, | |
2095 | "cbtw\n\t" | |
2096 | "cwtl\n\t" | |
2097 | "cltq"); | |
2098 | break; | |
2099 | case 16: | |
2100 | EMIT_ASM (amd64_ext_16, | |
2101 | "cwtl\n\t" | |
2102 | "cltq"); | |
2103 | break; | |
2104 | case 32: | |
2105 | EMIT_ASM (amd64_ext_32, | |
2106 | "cltq"); | |
2107 | break; | |
2108 | default: | |
2109 | emit_error = 1; | |
2110 | } | |
2111 | } | |
2112 | ||
2113 | static void | |
2114 | amd64_emit_log_not (void) | |
2115 | { | |
2116 | EMIT_ASM (amd64_log_not, | |
2117 | "test %rax,%rax\n\t" | |
2118 | "sete %cl\n\t" | |
2119 | "movzbq %cl,%rax"); | |
2120 | } | |
2121 | ||
2122 | static void | |
2123 | amd64_emit_bit_and (void) | |
2124 | { | |
2125 | EMIT_ASM (amd64_and, | |
2126 | "and (%rsp),%rax\n\t" | |
2127 | "lea 0x8(%rsp),%rsp"); | |
2128 | } | |
2129 | ||
2130 | static void | |
2131 | amd64_emit_bit_or (void) | |
2132 | { | |
2133 | EMIT_ASM (amd64_or, | |
2134 | "or (%rsp),%rax\n\t" | |
2135 | "lea 0x8(%rsp),%rsp"); | |
2136 | } | |
2137 | ||
2138 | static void | |
2139 | amd64_emit_bit_xor (void) | |
2140 | { | |
2141 | EMIT_ASM (amd64_xor, | |
2142 | "xor (%rsp),%rax\n\t" | |
2143 | "lea 0x8(%rsp),%rsp"); | |
2144 | } | |
2145 | ||
2146 | static void | |
2147 | amd64_emit_bit_not (void) | |
2148 | { | |
2149 | EMIT_ASM (amd64_bit_not, | |
2150 | "xorq $0xffffffffffffffff,%rax"); | |
2151 | } | |
2152 | ||
2153 | static void | |
2154 | amd64_emit_equal (void) | |
2155 | { | |
2156 | EMIT_ASM (amd64_equal, | |
2157 | "cmp %rax,(%rsp)\n\t" | |
2158 | "je .Lamd64_equal_true\n\t" | |
2159 | "xor %rax,%rax\n\t" | |
2160 | "jmp .Lamd64_equal_end\n\t" | |
2161 | ".Lamd64_equal_true:\n\t" | |
2162 | "mov $0x1,%rax\n\t" | |
2163 | ".Lamd64_equal_end:\n\t" | |
2164 | "lea 0x8(%rsp),%rsp"); | |
2165 | } | |
2166 | ||
2167 | static void | |
2168 | amd64_emit_less_signed (void) | |
2169 | { | |
2170 | EMIT_ASM (amd64_less_signed, | |
2171 | "cmp %rax,(%rsp)\n\t" | |
2172 | "jl .Lamd64_less_signed_true\n\t" | |
2173 | "xor %rax,%rax\n\t" | |
2174 | "jmp .Lamd64_less_signed_end\n\t" | |
2175 | ".Lamd64_less_signed_true:\n\t" | |
2176 | "mov $1,%rax\n\t" | |
2177 | ".Lamd64_less_signed_end:\n\t" | |
2178 | "lea 0x8(%rsp),%rsp"); | |
2179 | } | |
2180 | ||
2181 | static void | |
2182 | amd64_emit_less_unsigned (void) | |
2183 | { | |
2184 | EMIT_ASM (amd64_less_unsigned, | |
2185 | "cmp %rax,(%rsp)\n\t" | |
2186 | "jb .Lamd64_less_unsigned_true\n\t" | |
2187 | "xor %rax,%rax\n\t" | |
2188 | "jmp .Lamd64_less_unsigned_end\n\t" | |
2189 | ".Lamd64_less_unsigned_true:\n\t" | |
2190 | "mov $1,%rax\n\t" | |
2191 | ".Lamd64_less_unsigned_end:\n\t" | |
2192 | "lea 0x8(%rsp),%rsp"); | |
2193 | } | |
2194 | ||
2195 | static void | |
2196 | amd64_emit_ref (int size) | |
2197 | { | |
2198 | switch (size) | |
2199 | { | |
2200 | case 1: | |
2201 | EMIT_ASM (amd64_ref1, | |
2202 | "movb (%rax),%al"); | |
2203 | break; | |
2204 | case 2: | |
2205 | EMIT_ASM (amd64_ref2, | |
2206 | "movw (%rax),%ax"); | |
2207 | break; | |
2208 | case 4: | |
2209 | EMIT_ASM (amd64_ref4, | |
2210 | "movl (%rax),%eax"); | |
2211 | break; | |
2212 | case 8: | |
2213 | EMIT_ASM (amd64_ref8, | |
2214 | "movq (%rax),%rax"); | |
2215 | break; | |
2216 | } | |
2217 | } | |
2218 | ||
2219 | static void | |
2220 | amd64_emit_if_goto (int *offset_p, int *size_p) | |
2221 | { | |
2222 | EMIT_ASM (amd64_if_goto, | |
2223 | "mov %rax,%rcx\n\t" | |
2224 | "pop %rax\n\t" | |
2225 | "cmp $0,%rcx\n\t" | |
2226 | ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0"); | |
2227 | if (offset_p) | |
2228 | *offset_p = 10; | |
2229 | if (size_p) | |
2230 | *size_p = 4; | |
2231 | } | |
2232 | ||
2233 | static void | |
2234 | amd64_emit_goto (int *offset_p, int *size_p) | |
2235 | { | |
2236 | EMIT_ASM (amd64_goto, | |
2237 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0"); | |
2238 | if (offset_p) | |
2239 | *offset_p = 1; | |
2240 | if (size_p) | |
2241 | *size_p = 4; | |
2242 | } | |
2243 | ||
2244 | static void | |
2245 | amd64_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size) | |
2246 | { | |
2247 | int diff = (to - (from + size)); | |
2248 | unsigned char buf[sizeof (int)]; | |
2249 | ||
2250 | if (size != 4) | |
2251 | { | |
2252 | emit_error = 1; | |
2253 | return; | |
2254 | } | |
2255 | ||
2256 | memcpy (buf, &diff, sizeof (int)); | |
2257 | write_inferior_memory (from, buf, sizeof (int)); | |
2258 | } | |
2259 | ||
2260 | static void | |
4e29fb54 | 2261 | amd64_emit_const (LONGEST num) |
6a271cae PA |
2262 | { |
2263 | unsigned char buf[16]; | |
2264 | int i; | |
2265 | CORE_ADDR buildaddr = current_insn_ptr; | |
2266 | ||
2267 | i = 0; | |
2268 | buf[i++] = 0x48; buf[i++] = 0xb8; /* mov $<n>,%rax */ | |
b00ad6ff | 2269 | memcpy (&buf[i], &num, sizeof (num)); |
6a271cae PA |
2270 | i += 8; |
2271 | append_insns (&buildaddr, i, buf); | |
2272 | current_insn_ptr = buildaddr; | |
2273 | } | |
2274 | ||
2275 | static void | |
2276 | amd64_emit_call (CORE_ADDR fn) | |
2277 | { | |
2278 | unsigned char buf[16]; | |
2279 | int i; | |
2280 | CORE_ADDR buildaddr; | |
4e29fb54 | 2281 | LONGEST offset64; |
6a271cae PA |
2282 | |
2283 | /* The destination function being in the shared library, may be | |
2284 | >31-bits away off the compiled code pad. */ | |
2285 | ||
2286 | buildaddr = current_insn_ptr; | |
2287 | ||
2288 | offset64 = fn - (buildaddr + 1 /* call op */ + 4 /* 32-bit offset */); | |
2289 | ||
2290 | i = 0; | |
2291 | ||
2292 | if (offset64 > INT_MAX || offset64 < INT_MIN) | |
2293 | { | |
2294 | /* Offset is too large for a call. Use callq, but that requires | |
2295 | a register, so avoid it if possible. Use r10, since it is | |
2296 | call-clobbered, we don't have to push/pop it. */ | |
2297 | buf[i++] = 0x48; /* mov $fn,%r10 */ | |
2298 | buf[i++] = 0xba; | |
2299 | memcpy (buf + i, &fn, 8); | |
2300 | i += 8; | |
2301 | buf[i++] = 0xff; /* callq *%r10 */ | |
2302 | buf[i++] = 0xd2; | |
2303 | } | |
2304 | else | |
2305 | { | |
2306 | int offset32 = offset64; /* we know we can't overflow here. */ | |
2307 | memcpy (buf + i, &offset32, 4); | |
2308 | i += 4; | |
2309 | } | |
2310 | ||
2311 | append_insns (&buildaddr, i, buf); | |
2312 | current_insn_ptr = buildaddr; | |
2313 | } | |
2314 | ||
2315 | static void | |
2316 | amd64_emit_reg (int reg) | |
2317 | { | |
2318 | unsigned char buf[16]; | |
2319 | int i; | |
2320 | CORE_ADDR buildaddr; | |
2321 | ||
2322 | /* Assume raw_regs is still in %rdi. */ | |
2323 | buildaddr = current_insn_ptr; | |
2324 | i = 0; | |
2325 | buf[i++] = 0xbe; /* mov $<n>,%esi */ | |
b00ad6ff | 2326 | memcpy (&buf[i], ®, sizeof (reg)); |
6a271cae PA |
2327 | i += 4; |
2328 | append_insns (&buildaddr, i, buf); | |
2329 | current_insn_ptr = buildaddr; | |
2330 | amd64_emit_call (get_raw_reg_func_addr ()); | |
2331 | } | |
2332 | ||
2333 | static void | |
2334 | amd64_emit_pop (void) | |
2335 | { | |
2336 | EMIT_ASM (amd64_pop, | |
2337 | "pop %rax"); | |
2338 | } | |
2339 | ||
2340 | static void | |
2341 | amd64_emit_stack_flush (void) | |
2342 | { | |
2343 | EMIT_ASM (amd64_stack_flush, | |
2344 | "push %rax"); | |
2345 | } | |
2346 | ||
2347 | static void | |
2348 | amd64_emit_zero_ext (int arg) | |
2349 | { | |
2350 | switch (arg) | |
2351 | { | |
2352 | case 8: | |
2353 | EMIT_ASM (amd64_zero_ext_8, | |
2354 | "and $0xff,%rax"); | |
2355 | break; | |
2356 | case 16: | |
2357 | EMIT_ASM (amd64_zero_ext_16, | |
2358 | "and $0xffff,%rax"); | |
2359 | break; | |
2360 | case 32: | |
2361 | EMIT_ASM (amd64_zero_ext_32, | |
2362 | "mov $0xffffffff,%rcx\n\t" | |
2363 | "and %rcx,%rax"); | |
2364 | break; | |
2365 | default: | |
2366 | emit_error = 1; | |
2367 | } | |
2368 | } | |
2369 | ||
2370 | static void | |
2371 | amd64_emit_swap (void) | |
2372 | { | |
2373 | EMIT_ASM (amd64_swap, | |
2374 | "mov %rax,%rcx\n\t" | |
2375 | "pop %rax\n\t" | |
2376 | "push %rcx"); | |
2377 | } | |
2378 | ||
2379 | static void | |
2380 | amd64_emit_stack_adjust (int n) | |
2381 | { | |
2382 | unsigned char buf[16]; | |
2383 | int i; | |
2384 | CORE_ADDR buildaddr = current_insn_ptr; | |
2385 | ||
2386 | i = 0; | |
2387 | buf[i++] = 0x48; /* lea $<n>(%rsp),%rsp */ | |
2388 | buf[i++] = 0x8d; | |
2389 | buf[i++] = 0x64; | |
2390 | buf[i++] = 0x24; | |
2391 | /* This only handles adjustments up to 16, but we don't expect any more. */ | |
2392 | buf[i++] = n * 8; | |
2393 | append_insns (&buildaddr, i, buf); | |
2394 | current_insn_ptr = buildaddr; | |
2395 | } | |
2396 | ||
2397 | /* FN's prototype is `LONGEST(*fn)(int)'. */ | |
2398 | ||
2399 | static void | |
2400 | amd64_emit_int_call_1 (CORE_ADDR fn, int arg1) | |
2401 | { | |
2402 | unsigned char buf[16]; | |
2403 | int i; | |
2404 | CORE_ADDR buildaddr; | |
2405 | ||
2406 | buildaddr = current_insn_ptr; | |
2407 | i = 0; | |
2408 | buf[i++] = 0xbf; /* movl $<n>,%edi */ | |
b00ad6ff | 2409 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
2410 | i += 4; |
2411 | append_insns (&buildaddr, i, buf); | |
2412 | current_insn_ptr = buildaddr; | |
2413 | amd64_emit_call (fn); | |
2414 | } | |
2415 | ||
4e29fb54 | 2416 | /* FN's prototype is `void(*fn)(int,LONGEST)'. */ |
6a271cae PA |
2417 | |
2418 | static void | |
2419 | amd64_emit_void_call_2 (CORE_ADDR fn, int arg1) | |
2420 | { | |
2421 | unsigned char buf[16]; | |
2422 | int i; | |
2423 | CORE_ADDR buildaddr; | |
2424 | ||
2425 | buildaddr = current_insn_ptr; | |
2426 | i = 0; | |
2427 | buf[i++] = 0xbf; /* movl $<n>,%edi */ | |
b00ad6ff | 2428 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
2429 | i += 4; |
2430 | append_insns (&buildaddr, i, buf); | |
2431 | current_insn_ptr = buildaddr; | |
2432 | EMIT_ASM (amd64_void_call_2_a, | |
2433 | /* Save away a copy of the stack top. */ | |
2434 | "push %rax\n\t" | |
2435 | /* Also pass top as the second argument. */ | |
2436 | "mov %rax,%rsi"); | |
2437 | amd64_emit_call (fn); | |
2438 | EMIT_ASM (amd64_void_call_2_b, | |
2439 | /* Restore the stack top, %rax may have been trashed. */ | |
2440 | "pop %rax"); | |
2441 | } | |
2442 | ||
6b9801d4 SS |
2443 | void |
2444 | amd64_emit_eq_goto (int *offset_p, int *size_p) | |
2445 | { | |
2446 | EMIT_ASM (amd64_eq, | |
2447 | "cmp %rax,(%rsp)\n\t" | |
2448 | "jne .Lamd64_eq_fallthru\n\t" | |
2449 | "lea 0x8(%rsp),%rsp\n\t" | |
2450 | "pop %rax\n\t" | |
2451 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2452 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2453 | ".Lamd64_eq_fallthru:\n\t" | |
2454 | "lea 0x8(%rsp),%rsp\n\t" | |
2455 | "pop %rax"); | |
2456 | ||
2457 | if (offset_p) | |
2458 | *offset_p = 13; | |
2459 | if (size_p) | |
2460 | *size_p = 4; | |
2461 | } | |
2462 | ||
2463 | void | |
2464 | amd64_emit_ne_goto (int *offset_p, int *size_p) | |
2465 | { | |
2466 | EMIT_ASM (amd64_ne, | |
2467 | "cmp %rax,(%rsp)\n\t" | |
2468 | "je .Lamd64_ne_fallthru\n\t" | |
2469 | "lea 0x8(%rsp),%rsp\n\t" | |
2470 | "pop %rax\n\t" | |
2471 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2472 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2473 | ".Lamd64_ne_fallthru:\n\t" | |
2474 | "lea 0x8(%rsp),%rsp\n\t" | |
2475 | "pop %rax"); | |
2476 | ||
2477 | if (offset_p) | |
2478 | *offset_p = 13; | |
2479 | if (size_p) | |
2480 | *size_p = 4; | |
2481 | } | |
2482 | ||
2483 | void | |
2484 | amd64_emit_lt_goto (int *offset_p, int *size_p) | |
2485 | { | |
2486 | EMIT_ASM (amd64_lt, | |
2487 | "cmp %rax,(%rsp)\n\t" | |
2488 | "jnl .Lamd64_lt_fallthru\n\t" | |
2489 | "lea 0x8(%rsp),%rsp\n\t" | |
2490 | "pop %rax\n\t" | |
2491 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2492 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2493 | ".Lamd64_lt_fallthru:\n\t" | |
2494 | "lea 0x8(%rsp),%rsp\n\t" | |
2495 | "pop %rax"); | |
2496 | ||
2497 | if (offset_p) | |
2498 | *offset_p = 13; | |
2499 | if (size_p) | |
2500 | *size_p = 4; | |
2501 | } | |
2502 | ||
2503 | void | |
2504 | amd64_emit_le_goto (int *offset_p, int *size_p) | |
2505 | { | |
2506 | EMIT_ASM (amd64_le, | |
2507 | "cmp %rax,(%rsp)\n\t" | |
2508 | "jnle .Lamd64_le_fallthru\n\t" | |
2509 | "lea 0x8(%rsp),%rsp\n\t" | |
2510 | "pop %rax\n\t" | |
2511 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2512 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2513 | ".Lamd64_le_fallthru:\n\t" | |
2514 | "lea 0x8(%rsp),%rsp\n\t" | |
2515 | "pop %rax"); | |
2516 | ||
2517 | if (offset_p) | |
2518 | *offset_p = 13; | |
2519 | if (size_p) | |
2520 | *size_p = 4; | |
2521 | } | |
2522 | ||
2523 | void | |
2524 | amd64_emit_gt_goto (int *offset_p, int *size_p) | |
2525 | { | |
2526 | EMIT_ASM (amd64_gt, | |
2527 | "cmp %rax,(%rsp)\n\t" | |
2528 | "jng .Lamd64_gt_fallthru\n\t" | |
2529 | "lea 0x8(%rsp),%rsp\n\t" | |
2530 | "pop %rax\n\t" | |
2531 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2532 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2533 | ".Lamd64_gt_fallthru:\n\t" | |
2534 | "lea 0x8(%rsp),%rsp\n\t" | |
2535 | "pop %rax"); | |
2536 | ||
2537 | if (offset_p) | |
2538 | *offset_p = 13; | |
2539 | if (size_p) | |
2540 | *size_p = 4; | |
2541 | } | |
2542 | ||
2543 | void | |
2544 | amd64_emit_ge_goto (int *offset_p, int *size_p) | |
2545 | { | |
2546 | EMIT_ASM (amd64_ge, | |
2547 | "cmp %rax,(%rsp)\n\t" | |
2548 | "jnge .Lamd64_ge_fallthru\n\t" | |
2549 | ".Lamd64_ge_jump:\n\t" | |
2550 | "lea 0x8(%rsp),%rsp\n\t" | |
2551 | "pop %rax\n\t" | |
2552 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2553 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2554 | ".Lamd64_ge_fallthru:\n\t" | |
2555 | "lea 0x8(%rsp),%rsp\n\t" | |
2556 | "pop %rax"); | |
2557 | ||
2558 | if (offset_p) | |
2559 | *offset_p = 13; | |
2560 | if (size_p) | |
2561 | *size_p = 4; | |
2562 | } | |
2563 | ||
6a271cae PA |
2564 | struct emit_ops amd64_emit_ops = |
2565 | { | |
2566 | amd64_emit_prologue, | |
2567 | amd64_emit_epilogue, | |
2568 | amd64_emit_add, | |
2569 | amd64_emit_sub, | |
2570 | amd64_emit_mul, | |
2571 | amd64_emit_lsh, | |
2572 | amd64_emit_rsh_signed, | |
2573 | amd64_emit_rsh_unsigned, | |
2574 | amd64_emit_ext, | |
2575 | amd64_emit_log_not, | |
2576 | amd64_emit_bit_and, | |
2577 | amd64_emit_bit_or, | |
2578 | amd64_emit_bit_xor, | |
2579 | amd64_emit_bit_not, | |
2580 | amd64_emit_equal, | |
2581 | amd64_emit_less_signed, | |
2582 | amd64_emit_less_unsigned, | |
2583 | amd64_emit_ref, | |
2584 | amd64_emit_if_goto, | |
2585 | amd64_emit_goto, | |
2586 | amd64_write_goto_address, | |
2587 | amd64_emit_const, | |
2588 | amd64_emit_call, | |
2589 | amd64_emit_reg, | |
2590 | amd64_emit_pop, | |
2591 | amd64_emit_stack_flush, | |
2592 | amd64_emit_zero_ext, | |
2593 | amd64_emit_swap, | |
2594 | amd64_emit_stack_adjust, | |
2595 | amd64_emit_int_call_1, | |
6b9801d4 SS |
2596 | amd64_emit_void_call_2, |
2597 | amd64_emit_eq_goto, | |
2598 | amd64_emit_ne_goto, | |
2599 | amd64_emit_lt_goto, | |
2600 | amd64_emit_le_goto, | |
2601 | amd64_emit_gt_goto, | |
2602 | amd64_emit_ge_goto | |
6a271cae PA |
2603 | }; |
2604 | ||
2605 | #endif /* __x86_64__ */ | |
2606 | ||
2607 | static void | |
2608 | i386_emit_prologue (void) | |
2609 | { | |
2610 | EMIT_ASM32 (i386_prologue, | |
2611 | "push %ebp\n\t" | |
bf15cbda SS |
2612 | "mov %esp,%ebp\n\t" |
2613 | "push %ebx"); | |
6a271cae PA |
2614 | /* At this point, the raw regs base address is at 8(%ebp), and the |
2615 | value pointer is at 12(%ebp). */ | |
2616 | } | |
2617 | ||
2618 | static void | |
2619 | i386_emit_epilogue (void) | |
2620 | { | |
2621 | EMIT_ASM32 (i386_epilogue, | |
2622 | "mov 12(%ebp),%ecx\n\t" | |
2623 | "mov %eax,(%ecx)\n\t" | |
2624 | "mov %ebx,0x4(%ecx)\n\t" | |
2625 | "xor %eax,%eax\n\t" | |
bf15cbda | 2626 | "pop %ebx\n\t" |
6a271cae PA |
2627 | "pop %ebp\n\t" |
2628 | "ret"); | |
2629 | } | |
2630 | ||
2631 | static void | |
2632 | i386_emit_add (void) | |
2633 | { | |
2634 | EMIT_ASM32 (i386_add, | |
2635 | "add (%esp),%eax\n\t" | |
2636 | "adc 0x4(%esp),%ebx\n\t" | |
2637 | "lea 0x8(%esp),%esp"); | |
2638 | } | |
2639 | ||
2640 | static void | |
2641 | i386_emit_sub (void) | |
2642 | { | |
2643 | EMIT_ASM32 (i386_sub, | |
2644 | "subl %eax,(%esp)\n\t" | |
2645 | "sbbl %ebx,4(%esp)\n\t" | |
2646 | "pop %eax\n\t" | |
2647 | "pop %ebx\n\t"); | |
2648 | } | |
2649 | ||
2650 | static void | |
2651 | i386_emit_mul (void) | |
2652 | { | |
2653 | emit_error = 1; | |
2654 | } | |
2655 | ||
2656 | static void | |
2657 | i386_emit_lsh (void) | |
2658 | { | |
2659 | emit_error = 1; | |
2660 | } | |
2661 | ||
2662 | static void | |
2663 | i386_emit_rsh_signed (void) | |
2664 | { | |
2665 | emit_error = 1; | |
2666 | } | |
2667 | ||
2668 | static void | |
2669 | i386_emit_rsh_unsigned (void) | |
2670 | { | |
2671 | emit_error = 1; | |
2672 | } | |
2673 | ||
2674 | static void | |
2675 | i386_emit_ext (int arg) | |
2676 | { | |
2677 | switch (arg) | |
2678 | { | |
2679 | case 8: | |
2680 | EMIT_ASM32 (i386_ext_8, | |
2681 | "cbtw\n\t" | |
2682 | "cwtl\n\t" | |
2683 | "movl %eax,%ebx\n\t" | |
2684 | "sarl $31,%ebx"); | |
2685 | break; | |
2686 | case 16: | |
2687 | EMIT_ASM32 (i386_ext_16, | |
2688 | "cwtl\n\t" | |
2689 | "movl %eax,%ebx\n\t" | |
2690 | "sarl $31,%ebx"); | |
2691 | break; | |
2692 | case 32: | |
2693 | EMIT_ASM32 (i386_ext_32, | |
2694 | "movl %eax,%ebx\n\t" | |
2695 | "sarl $31,%ebx"); | |
2696 | break; | |
2697 | default: | |
2698 | emit_error = 1; | |
2699 | } | |
2700 | } | |
2701 | ||
2702 | static void | |
2703 | i386_emit_log_not (void) | |
2704 | { | |
2705 | EMIT_ASM32 (i386_log_not, | |
2706 | "or %ebx,%eax\n\t" | |
2707 | "test %eax,%eax\n\t" | |
2708 | "sete %cl\n\t" | |
2709 | "xor %ebx,%ebx\n\t" | |
2710 | "movzbl %cl,%eax"); | |
2711 | } | |
2712 | ||
2713 | static void | |
2714 | i386_emit_bit_and (void) | |
2715 | { | |
2716 | EMIT_ASM32 (i386_and, | |
2717 | "and (%esp),%eax\n\t" | |
2718 | "and 0x4(%esp),%ebx\n\t" | |
2719 | "lea 0x8(%esp),%esp"); | |
2720 | } | |
2721 | ||
2722 | static void | |
2723 | i386_emit_bit_or (void) | |
2724 | { | |
2725 | EMIT_ASM32 (i386_or, | |
2726 | "or (%esp),%eax\n\t" | |
2727 | "or 0x4(%esp),%ebx\n\t" | |
2728 | "lea 0x8(%esp),%esp"); | |
2729 | } | |
2730 | ||
2731 | static void | |
2732 | i386_emit_bit_xor (void) | |
2733 | { | |
2734 | EMIT_ASM32 (i386_xor, | |
2735 | "xor (%esp),%eax\n\t" | |
2736 | "xor 0x4(%esp),%ebx\n\t" | |
2737 | "lea 0x8(%esp),%esp"); | |
2738 | } | |
2739 | ||
2740 | static void | |
2741 | i386_emit_bit_not (void) | |
2742 | { | |
2743 | EMIT_ASM32 (i386_bit_not, | |
2744 | "xor $0xffffffff,%eax\n\t" | |
2745 | "xor $0xffffffff,%ebx\n\t"); | |
2746 | } | |
2747 | ||
2748 | static void | |
2749 | i386_emit_equal (void) | |
2750 | { | |
2751 | EMIT_ASM32 (i386_equal, | |
2752 | "cmpl %ebx,4(%esp)\n\t" | |
2753 | "jne .Li386_equal_false\n\t" | |
2754 | "cmpl %eax,(%esp)\n\t" | |
2755 | "je .Li386_equal_true\n\t" | |
2756 | ".Li386_equal_false:\n\t" | |
2757 | "xor %eax,%eax\n\t" | |
2758 | "jmp .Li386_equal_end\n\t" | |
2759 | ".Li386_equal_true:\n\t" | |
2760 | "mov $1,%eax\n\t" | |
2761 | ".Li386_equal_end:\n\t" | |
2762 | "xor %ebx,%ebx\n\t" | |
2763 | "lea 0x8(%esp),%esp"); | |
2764 | } | |
2765 | ||
2766 | static void | |
2767 | i386_emit_less_signed (void) | |
2768 | { | |
2769 | EMIT_ASM32 (i386_less_signed, | |
2770 | "cmpl %ebx,4(%esp)\n\t" | |
2771 | "jl .Li386_less_signed_true\n\t" | |
2772 | "jne .Li386_less_signed_false\n\t" | |
2773 | "cmpl %eax,(%esp)\n\t" | |
2774 | "jl .Li386_less_signed_true\n\t" | |
2775 | ".Li386_less_signed_false:\n\t" | |
2776 | "xor %eax,%eax\n\t" | |
2777 | "jmp .Li386_less_signed_end\n\t" | |
2778 | ".Li386_less_signed_true:\n\t" | |
2779 | "mov $1,%eax\n\t" | |
2780 | ".Li386_less_signed_end:\n\t" | |
2781 | "xor %ebx,%ebx\n\t" | |
2782 | "lea 0x8(%esp),%esp"); | |
2783 | } | |
2784 | ||
2785 | static void | |
2786 | i386_emit_less_unsigned (void) | |
2787 | { | |
2788 | EMIT_ASM32 (i386_less_unsigned, | |
2789 | "cmpl %ebx,4(%esp)\n\t" | |
2790 | "jb .Li386_less_unsigned_true\n\t" | |
2791 | "jne .Li386_less_unsigned_false\n\t" | |
2792 | "cmpl %eax,(%esp)\n\t" | |
2793 | "jb .Li386_less_unsigned_true\n\t" | |
2794 | ".Li386_less_unsigned_false:\n\t" | |
2795 | "xor %eax,%eax\n\t" | |
2796 | "jmp .Li386_less_unsigned_end\n\t" | |
2797 | ".Li386_less_unsigned_true:\n\t" | |
2798 | "mov $1,%eax\n\t" | |
2799 | ".Li386_less_unsigned_end:\n\t" | |
2800 | "xor %ebx,%ebx\n\t" | |
2801 | "lea 0x8(%esp),%esp"); | |
2802 | } | |
2803 | ||
2804 | static void | |
2805 | i386_emit_ref (int size) | |
2806 | { | |
2807 | switch (size) | |
2808 | { | |
2809 | case 1: | |
2810 | EMIT_ASM32 (i386_ref1, | |
2811 | "movb (%eax),%al"); | |
2812 | break; | |
2813 | case 2: | |
2814 | EMIT_ASM32 (i386_ref2, | |
2815 | "movw (%eax),%ax"); | |
2816 | break; | |
2817 | case 4: | |
2818 | EMIT_ASM32 (i386_ref4, | |
2819 | "movl (%eax),%eax"); | |
2820 | break; | |
2821 | case 8: | |
2822 | EMIT_ASM32 (i386_ref8, | |
2823 | "movl 4(%eax),%ebx\n\t" | |
2824 | "movl (%eax),%eax"); | |
2825 | break; | |
2826 | } | |
2827 | } | |
2828 | ||
2829 | static void | |
2830 | i386_emit_if_goto (int *offset_p, int *size_p) | |
2831 | { | |
2832 | EMIT_ASM32 (i386_if_goto, | |
2833 | "mov %eax,%ecx\n\t" | |
2834 | "or %ebx,%ecx\n\t" | |
2835 | "pop %eax\n\t" | |
2836 | "pop %ebx\n\t" | |
2837 | "cmpl $0,%ecx\n\t" | |
2838 | /* Don't trust the assembler to choose the right jump */ | |
2839 | ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0"); | |
2840 | ||
2841 | if (offset_p) | |
2842 | *offset_p = 11; /* be sure that this matches the sequence above */ | |
2843 | if (size_p) | |
2844 | *size_p = 4; | |
2845 | } | |
2846 | ||
2847 | static void | |
2848 | i386_emit_goto (int *offset_p, int *size_p) | |
2849 | { | |
2850 | EMIT_ASM32 (i386_goto, | |
2851 | /* Don't trust the assembler to choose the right jump */ | |
2852 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0"); | |
2853 | if (offset_p) | |
2854 | *offset_p = 1; | |
2855 | if (size_p) | |
2856 | *size_p = 4; | |
2857 | } | |
2858 | ||
2859 | static void | |
2860 | i386_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size) | |
2861 | { | |
2862 | int diff = (to - (from + size)); | |
2863 | unsigned char buf[sizeof (int)]; | |
2864 | ||
2865 | /* We're only doing 4-byte sizes at the moment. */ | |
2866 | if (size != 4) | |
2867 | { | |
2868 | emit_error = 1; | |
2869 | return; | |
2870 | } | |
2871 | ||
2872 | memcpy (buf, &diff, sizeof (int)); | |
2873 | write_inferior_memory (from, buf, sizeof (int)); | |
2874 | } | |
2875 | ||
2876 | static void | |
4e29fb54 | 2877 | i386_emit_const (LONGEST num) |
6a271cae PA |
2878 | { |
2879 | unsigned char buf[16]; | |
b00ad6ff | 2880 | int i, hi, lo; |
6a271cae PA |
2881 | CORE_ADDR buildaddr = current_insn_ptr; |
2882 | ||
2883 | i = 0; | |
2884 | buf[i++] = 0xb8; /* mov $<n>,%eax */ | |
b00ad6ff NF |
2885 | lo = num & 0xffffffff; |
2886 | memcpy (&buf[i], &lo, sizeof (lo)); | |
6a271cae PA |
2887 | i += 4; |
2888 | hi = ((num >> 32) & 0xffffffff); | |
2889 | if (hi) | |
2890 | { | |
2891 | buf[i++] = 0xbb; /* mov $<n>,%ebx */ | |
b00ad6ff | 2892 | memcpy (&buf[i], &hi, sizeof (hi)); |
6a271cae PA |
2893 | i += 4; |
2894 | } | |
2895 | else | |
2896 | { | |
2897 | buf[i++] = 0x31; buf[i++] = 0xdb; /* xor %ebx,%ebx */ | |
2898 | } | |
2899 | append_insns (&buildaddr, i, buf); | |
2900 | current_insn_ptr = buildaddr; | |
2901 | } | |
2902 | ||
2903 | static void | |
2904 | i386_emit_call (CORE_ADDR fn) | |
2905 | { | |
2906 | unsigned char buf[16]; | |
2907 | int i, offset; | |
2908 | CORE_ADDR buildaddr; | |
2909 | ||
2910 | buildaddr = current_insn_ptr; | |
2911 | i = 0; | |
2912 | buf[i++] = 0xe8; /* call <reladdr> */ | |
2913 | offset = ((int) fn) - (buildaddr + 5); | |
2914 | memcpy (buf + 1, &offset, 4); | |
2915 | append_insns (&buildaddr, 5, buf); | |
2916 | current_insn_ptr = buildaddr; | |
2917 | } | |
2918 | ||
2919 | static void | |
2920 | i386_emit_reg (int reg) | |
2921 | { | |
2922 | unsigned char buf[16]; | |
2923 | int i; | |
2924 | CORE_ADDR buildaddr; | |
2925 | ||
2926 | EMIT_ASM32 (i386_reg_a, | |
2927 | "sub $0x8,%esp"); | |
2928 | buildaddr = current_insn_ptr; | |
2929 | i = 0; | |
2930 | buf[i++] = 0xb8; /* mov $<n>,%eax */ | |
b00ad6ff | 2931 | memcpy (&buf[i], ®, sizeof (reg)); |
6a271cae PA |
2932 | i += 4; |
2933 | append_insns (&buildaddr, i, buf); | |
2934 | current_insn_ptr = buildaddr; | |
2935 | EMIT_ASM32 (i386_reg_b, | |
2936 | "mov %eax,4(%esp)\n\t" | |
2937 | "mov 8(%ebp),%eax\n\t" | |
2938 | "mov %eax,(%esp)"); | |
2939 | i386_emit_call (get_raw_reg_func_addr ()); | |
2940 | EMIT_ASM32 (i386_reg_c, | |
2941 | "xor %ebx,%ebx\n\t" | |
2942 | "lea 0x8(%esp),%esp"); | |
2943 | } | |
2944 | ||
2945 | static void | |
2946 | i386_emit_pop (void) | |
2947 | { | |
2948 | EMIT_ASM32 (i386_pop, | |
2949 | "pop %eax\n\t" | |
2950 | "pop %ebx"); | |
2951 | } | |
2952 | ||
2953 | static void | |
2954 | i386_emit_stack_flush (void) | |
2955 | { | |
2956 | EMIT_ASM32 (i386_stack_flush, | |
2957 | "push %ebx\n\t" | |
2958 | "push %eax"); | |
2959 | } | |
2960 | ||
2961 | static void | |
2962 | i386_emit_zero_ext (int arg) | |
2963 | { | |
2964 | switch (arg) | |
2965 | { | |
2966 | case 8: | |
2967 | EMIT_ASM32 (i386_zero_ext_8, | |
2968 | "and $0xff,%eax\n\t" | |
2969 | "xor %ebx,%ebx"); | |
2970 | break; | |
2971 | case 16: | |
2972 | EMIT_ASM32 (i386_zero_ext_16, | |
2973 | "and $0xffff,%eax\n\t" | |
2974 | "xor %ebx,%ebx"); | |
2975 | break; | |
2976 | case 32: | |
2977 | EMIT_ASM32 (i386_zero_ext_32, | |
2978 | "xor %ebx,%ebx"); | |
2979 | break; | |
2980 | default: | |
2981 | emit_error = 1; | |
2982 | } | |
2983 | } | |
2984 | ||
2985 | static void | |
2986 | i386_emit_swap (void) | |
2987 | { | |
2988 | EMIT_ASM32 (i386_swap, | |
2989 | "mov %eax,%ecx\n\t" | |
2990 | "mov %ebx,%edx\n\t" | |
2991 | "pop %eax\n\t" | |
2992 | "pop %ebx\n\t" | |
2993 | "push %edx\n\t" | |
2994 | "push %ecx"); | |
2995 | } | |
2996 | ||
2997 | static void | |
2998 | i386_emit_stack_adjust (int n) | |
2999 | { | |
3000 | unsigned char buf[16]; | |
3001 | int i; | |
3002 | CORE_ADDR buildaddr = current_insn_ptr; | |
3003 | ||
3004 | i = 0; | |
3005 | buf[i++] = 0x8d; /* lea $<n>(%esp),%esp */ | |
3006 | buf[i++] = 0x64; | |
3007 | buf[i++] = 0x24; | |
3008 | buf[i++] = n * 8; | |
3009 | append_insns (&buildaddr, i, buf); | |
3010 | current_insn_ptr = buildaddr; | |
3011 | } | |
3012 | ||
3013 | /* FN's prototype is `LONGEST(*fn)(int)'. */ | |
3014 | ||
3015 | static void | |
3016 | i386_emit_int_call_1 (CORE_ADDR fn, int arg1) | |
3017 | { | |
3018 | unsigned char buf[16]; | |
3019 | int i; | |
3020 | CORE_ADDR buildaddr; | |
3021 | ||
3022 | EMIT_ASM32 (i386_int_call_1_a, | |
3023 | /* Reserve a bit of stack space. */ | |
3024 | "sub $0x8,%esp"); | |
3025 | /* Put the one argument on the stack. */ | |
3026 | buildaddr = current_insn_ptr; | |
3027 | i = 0; | |
3028 | buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */ | |
3029 | buf[i++] = 0x04; | |
3030 | buf[i++] = 0x24; | |
b00ad6ff | 3031 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
3032 | i += 4; |
3033 | append_insns (&buildaddr, i, buf); | |
3034 | current_insn_ptr = buildaddr; | |
3035 | i386_emit_call (fn); | |
3036 | EMIT_ASM32 (i386_int_call_1_c, | |
3037 | "mov %edx,%ebx\n\t" | |
3038 | "lea 0x8(%esp),%esp"); | |
3039 | } | |
3040 | ||
4e29fb54 | 3041 | /* FN's prototype is `void(*fn)(int,LONGEST)'. */ |
6a271cae PA |
3042 | |
3043 | static void | |
3044 | i386_emit_void_call_2 (CORE_ADDR fn, int arg1) | |
3045 | { | |
3046 | unsigned char buf[16]; | |
3047 | int i; | |
3048 | CORE_ADDR buildaddr; | |
3049 | ||
3050 | EMIT_ASM32 (i386_void_call_2_a, | |
3051 | /* Preserve %eax only; we don't have to worry about %ebx. */ | |
3052 | "push %eax\n\t" | |
3053 | /* Reserve a bit of stack space for arguments. */ | |
3054 | "sub $0x10,%esp\n\t" | |
3055 | /* Copy "top" to the second argument position. (Note that | |
3056 | we can't assume function won't scribble on its | |
3057 | arguments, so don't try to restore from this.) */ | |
3058 | "mov %eax,4(%esp)\n\t" | |
3059 | "mov %ebx,8(%esp)"); | |
3060 | /* Put the first argument on the stack. */ | |
3061 | buildaddr = current_insn_ptr; | |
3062 | i = 0; | |
3063 | buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */ | |
3064 | buf[i++] = 0x04; | |
3065 | buf[i++] = 0x24; | |
b00ad6ff | 3066 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
3067 | i += 4; |
3068 | append_insns (&buildaddr, i, buf); | |
3069 | current_insn_ptr = buildaddr; | |
3070 | i386_emit_call (fn); | |
3071 | EMIT_ASM32 (i386_void_call_2_b, | |
3072 | "lea 0x10(%esp),%esp\n\t" | |
3073 | /* Restore original stack top. */ | |
3074 | "pop %eax"); | |
3075 | } | |
3076 | ||
6b9801d4 SS |
3077 | |
3078 | void | |
3079 | i386_emit_eq_goto (int *offset_p, int *size_p) | |
3080 | { | |
3081 | EMIT_ASM32 (eq, | |
3082 | /* Check low half first, more likely to be decider */ | |
3083 | "cmpl %eax,(%esp)\n\t" | |
3084 | "jne .Leq_fallthru\n\t" | |
3085 | "cmpl %ebx,4(%esp)\n\t" | |
3086 | "jne .Leq_fallthru\n\t" | |
3087 | "lea 0x8(%esp),%esp\n\t" | |
3088 | "pop %eax\n\t" | |
3089 | "pop %ebx\n\t" | |
3090 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3091 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3092 | ".Leq_fallthru:\n\t" | |
3093 | "lea 0x8(%esp),%esp\n\t" | |
3094 | "pop %eax\n\t" | |
3095 | "pop %ebx"); | |
3096 | ||
3097 | if (offset_p) | |
3098 | *offset_p = 18; | |
3099 | if (size_p) | |
3100 | *size_p = 4; | |
3101 | } | |
3102 | ||
3103 | void | |
3104 | i386_emit_ne_goto (int *offset_p, int *size_p) | |
3105 | { | |
3106 | EMIT_ASM32 (ne, | |
3107 | /* Check low half first, more likely to be decider */ | |
3108 | "cmpl %eax,(%esp)\n\t" | |
3109 | "jne .Lne_jump\n\t" | |
3110 | "cmpl %ebx,4(%esp)\n\t" | |
3111 | "je .Lne_fallthru\n\t" | |
3112 | ".Lne_jump:\n\t" | |
3113 | "lea 0x8(%esp),%esp\n\t" | |
3114 | "pop %eax\n\t" | |
3115 | "pop %ebx\n\t" | |
3116 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3117 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3118 | ".Lne_fallthru:\n\t" | |
3119 | "lea 0x8(%esp),%esp\n\t" | |
3120 | "pop %eax\n\t" | |
3121 | "pop %ebx"); | |
3122 | ||
3123 | if (offset_p) | |
3124 | *offset_p = 18; | |
3125 | if (size_p) | |
3126 | *size_p = 4; | |
3127 | } | |
3128 | ||
3129 | void | |
3130 | i386_emit_lt_goto (int *offset_p, int *size_p) | |
3131 | { | |
3132 | EMIT_ASM32 (lt, | |
3133 | "cmpl %ebx,4(%esp)\n\t" | |
3134 | "jl .Llt_jump\n\t" | |
3135 | "jne .Llt_fallthru\n\t" | |
3136 | "cmpl %eax,(%esp)\n\t" | |
3137 | "jnl .Llt_fallthru\n\t" | |
3138 | ".Llt_jump:\n\t" | |
3139 | "lea 0x8(%esp),%esp\n\t" | |
3140 | "pop %eax\n\t" | |
3141 | "pop %ebx\n\t" | |
3142 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3143 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3144 | ".Llt_fallthru:\n\t" | |
3145 | "lea 0x8(%esp),%esp\n\t" | |
3146 | "pop %eax\n\t" | |
3147 | "pop %ebx"); | |
3148 | ||
3149 | if (offset_p) | |
3150 | *offset_p = 20; | |
3151 | if (size_p) | |
3152 | *size_p = 4; | |
3153 | } | |
3154 | ||
3155 | void | |
3156 | i386_emit_le_goto (int *offset_p, int *size_p) | |
3157 | { | |
3158 | EMIT_ASM32 (le, | |
3159 | "cmpl %ebx,4(%esp)\n\t" | |
3160 | "jle .Lle_jump\n\t" | |
3161 | "jne .Lle_fallthru\n\t" | |
3162 | "cmpl %eax,(%esp)\n\t" | |
3163 | "jnle .Lle_fallthru\n\t" | |
3164 | ".Lle_jump:\n\t" | |
3165 | "lea 0x8(%esp),%esp\n\t" | |
3166 | "pop %eax\n\t" | |
3167 | "pop %ebx\n\t" | |
3168 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3169 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3170 | ".Lle_fallthru:\n\t" | |
3171 | "lea 0x8(%esp),%esp\n\t" | |
3172 | "pop %eax\n\t" | |
3173 | "pop %ebx"); | |
3174 | ||
3175 | if (offset_p) | |
3176 | *offset_p = 20; | |
3177 | if (size_p) | |
3178 | *size_p = 4; | |
3179 | } | |
3180 | ||
3181 | void | |
3182 | i386_emit_gt_goto (int *offset_p, int *size_p) | |
3183 | { | |
3184 | EMIT_ASM32 (gt, | |
3185 | "cmpl %ebx,4(%esp)\n\t" | |
3186 | "jg .Lgt_jump\n\t" | |
3187 | "jne .Lgt_fallthru\n\t" | |
3188 | "cmpl %eax,(%esp)\n\t" | |
3189 | "jng .Lgt_fallthru\n\t" | |
3190 | ".Lgt_jump:\n\t" | |
3191 | "lea 0x8(%esp),%esp\n\t" | |
3192 | "pop %eax\n\t" | |
3193 | "pop %ebx\n\t" | |
3194 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3195 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3196 | ".Lgt_fallthru:\n\t" | |
3197 | "lea 0x8(%esp),%esp\n\t" | |
3198 | "pop %eax\n\t" | |
3199 | "pop %ebx"); | |
3200 | ||
3201 | if (offset_p) | |
3202 | *offset_p = 20; | |
3203 | if (size_p) | |
3204 | *size_p = 4; | |
3205 | } | |
3206 | ||
3207 | void | |
3208 | i386_emit_ge_goto (int *offset_p, int *size_p) | |
3209 | { | |
3210 | EMIT_ASM32 (ge, | |
3211 | "cmpl %ebx,4(%esp)\n\t" | |
3212 | "jge .Lge_jump\n\t" | |
3213 | "jne .Lge_fallthru\n\t" | |
3214 | "cmpl %eax,(%esp)\n\t" | |
3215 | "jnge .Lge_fallthru\n\t" | |
3216 | ".Lge_jump:\n\t" | |
3217 | "lea 0x8(%esp),%esp\n\t" | |
3218 | "pop %eax\n\t" | |
3219 | "pop %ebx\n\t" | |
3220 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3221 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3222 | ".Lge_fallthru:\n\t" | |
3223 | "lea 0x8(%esp),%esp\n\t" | |
3224 | "pop %eax\n\t" | |
3225 | "pop %ebx"); | |
3226 | ||
3227 | if (offset_p) | |
3228 | *offset_p = 20; | |
3229 | if (size_p) | |
3230 | *size_p = 4; | |
3231 | } | |
3232 | ||
6a271cae PA |
3233 | struct emit_ops i386_emit_ops = |
3234 | { | |
3235 | i386_emit_prologue, | |
3236 | i386_emit_epilogue, | |
3237 | i386_emit_add, | |
3238 | i386_emit_sub, | |
3239 | i386_emit_mul, | |
3240 | i386_emit_lsh, | |
3241 | i386_emit_rsh_signed, | |
3242 | i386_emit_rsh_unsigned, | |
3243 | i386_emit_ext, | |
3244 | i386_emit_log_not, | |
3245 | i386_emit_bit_and, | |
3246 | i386_emit_bit_or, | |
3247 | i386_emit_bit_xor, | |
3248 | i386_emit_bit_not, | |
3249 | i386_emit_equal, | |
3250 | i386_emit_less_signed, | |
3251 | i386_emit_less_unsigned, | |
3252 | i386_emit_ref, | |
3253 | i386_emit_if_goto, | |
3254 | i386_emit_goto, | |
3255 | i386_write_goto_address, | |
3256 | i386_emit_const, | |
3257 | i386_emit_call, | |
3258 | i386_emit_reg, | |
3259 | i386_emit_pop, | |
3260 | i386_emit_stack_flush, | |
3261 | i386_emit_zero_ext, | |
3262 | i386_emit_swap, | |
3263 | i386_emit_stack_adjust, | |
3264 | i386_emit_int_call_1, | |
6b9801d4 SS |
3265 | i386_emit_void_call_2, |
3266 | i386_emit_eq_goto, | |
3267 | i386_emit_ne_goto, | |
3268 | i386_emit_lt_goto, | |
3269 | i386_emit_le_goto, | |
3270 | i386_emit_gt_goto, | |
3271 | i386_emit_ge_goto | |
6a271cae PA |
3272 | }; |
3273 | ||
3274 | ||
3275 | static struct emit_ops * | |
3276 | x86_emit_ops (void) | |
3277 | { | |
3278 | #ifdef __x86_64__ | |
3aee8918 | 3279 | if (is_64bit_tdesc ()) |
6a271cae PA |
3280 | return &amd64_emit_ops; |
3281 | else | |
3282 | #endif | |
3283 | return &i386_emit_ops; | |
3284 | } | |
3285 | ||
c2d6af84 PA |
3286 | static int |
3287 | x86_supports_range_stepping (void) | |
3288 | { | |
3289 | return 1; | |
3290 | } | |
3291 | ||
d0722149 DE |
3292 | /* This is initialized assuming an amd64 target. |
3293 | x86_arch_setup will correct it for i386 or amd64 targets. */ | |
3294 | ||
3295 | struct linux_target_ops the_low_target = | |
3296 | { | |
3297 | x86_arch_setup, | |
3aee8918 PA |
3298 | x86_linux_regs_info, |
3299 | x86_cannot_fetch_register, | |
3300 | x86_cannot_store_register, | |
c14dfd32 | 3301 | NULL, /* fetch_register */ |
d0722149 DE |
3302 | x86_get_pc, |
3303 | x86_set_pc, | |
3304 | x86_breakpoint, | |
3305 | x86_breakpoint_len, | |
3306 | NULL, | |
3307 | 1, | |
3308 | x86_breakpoint_at, | |
aa5ca48f DE |
3309 | x86_insert_point, |
3310 | x86_remove_point, | |
3311 | x86_stopped_by_watchpoint, | |
3312 | x86_stopped_data_address, | |
d0722149 DE |
3313 | /* collect_ptrace_register/supply_ptrace_register are not needed in the |
3314 | native i386 case (no registers smaller than an xfer unit), and are not | |
3315 | used in the biarch case (HAVE_LINUX_USRREGS is not defined). */ | |
3316 | NULL, | |
3317 | NULL, | |
3318 | /* need to fix up i386 siginfo if host is amd64 */ | |
3319 | x86_siginfo_fixup, | |
aa5ca48f DE |
3320 | x86_linux_new_process, |
3321 | x86_linux_new_thread, | |
1570b33e | 3322 | x86_linux_prepare_to_resume, |
219f2f23 | 3323 | x86_linux_process_qsupported, |
fa593d66 PA |
3324 | x86_supports_tracepoints, |
3325 | x86_get_thread_area, | |
6a271cae | 3326 | x86_install_fast_tracepoint_jump_pad, |
405f8e94 SS |
3327 | x86_emit_ops, |
3328 | x86_get_min_fast_tracepoint_insn_len, | |
c2d6af84 | 3329 | x86_supports_range_stepping, |
d0722149 | 3330 | }; |
3aee8918 PA |
3331 | |
3332 | void | |
3333 | initialize_low_arch (void) | |
3334 | { | |
3335 | /* Initialize the Linux target descriptions. */ | |
3336 | #ifdef __x86_64__ | |
3337 | init_registers_amd64_linux (); | |
3338 | init_registers_amd64_avx_linux (); | |
3339 | init_registers_x32_linux (); | |
7e5aaa09 | 3340 | init_registers_x32_avx_linux (); |
3aee8918 PA |
3341 | |
3342 | tdesc_amd64_linux_no_xml = xmalloc (sizeof (struct target_desc)); | |
3343 | copy_target_description (tdesc_amd64_linux_no_xml, tdesc_amd64_linux); | |
3344 | tdesc_amd64_linux_no_xml->xmltarget = xmltarget_amd64_linux_no_xml; | |
3345 | #endif | |
3346 | init_registers_i386_linux (); | |
3347 | init_registers_i386_mmx_linux (); | |
3348 | init_registers_i386_avx_linux (); | |
3349 | ||
3350 | tdesc_i386_linux_no_xml = xmalloc (sizeof (struct target_desc)); | |
3351 | copy_target_description (tdesc_i386_linux_no_xml, tdesc_i386_linux); | |
3352 | tdesc_i386_linux_no_xml->xmltarget = xmltarget_i386_linux_no_xml; | |
3353 | ||
3354 | initialize_regsets_info (&x86_regsets_info); | |
3355 | } |