[deliverable/binutils-gdb.git] / gdb / gdbserver / win32-i386-low.c

/* Copyright (C) 2007-2017 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "server.h"
#include "win32-low.h"
#include "x86-low.h"
#include "x86-xstate.h"
#ifdef __x86_64__
#include "arch/amd64.h"
#endif
#include "arch/i386.h"
#include "tdesc.h"

#ifndef CONTEXT_EXTENDED_REGISTERS
#define CONTEXT_EXTENDED_REGISTERS 0
#endif

#define FCS_REGNUM 27
#define FOP_REGNUM 31

#define FLAG_TRACE_BIT 0x100

static struct x86_debug_reg_state debug_reg_state;

static int
update_debug_registers_callback (thread_info *thr, void *pid_p)
{
  win32_thread_info *th = (win32_thread_info *) thread_target_data (thr);
  int pid = *(int *) pid_p;

  /* Only update the threads of this process.  */
  if (pid_of (thr) == pid)
    {
      /* The actual update is done later just before resuming the lwp,
	 we just mark that the registers need updating.  */
      th->debug_registers_changed = 1;
    }

  return 0;
}

/* Update the inferior's debug register REGNUM from STATE.  */

static void
x86_dr_low_set_addr (int regnum, CORE_ADDR addr)
{
  /* Only update the threads of this process.  */
  int pid = pid_of (current_thread);

  gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR);

  find_inferior (&all_threads, update_debug_registers_callback, &pid);
}

/* Update the inferior's DR7 debug control register from STATE.  */

static void
x86_dr_low_set_control (unsigned long control)
{
  /* Only update the threads of this process.  */
  int pid = pid_of (current_thread);

  find_inferior (&all_threads, update_debug_registers_callback, &pid);
}

/* Return the current value of a DR register of the current thread's
   context.  */

static DWORD64
win32_get_current_dr (int dr)
{
  win32_thread_info *th
    = (win32_thread_info *) thread_target_data (current_thread);

  win32_require_context (th);

#define RET_DR(DR)				\
  case DR:					\
    return th->context.Dr ## DR

  switch (dr)
    {
      RET_DR (0);
      RET_DR (1);
      RET_DR (2);
      RET_DR (3);
      RET_DR (6);
      RET_DR (7);
    }

#undef RET_DR

  gdb_assert_not_reached ("unhandled dr");
}

static CORE_ADDR
x86_dr_low_get_addr (int regnum)
{
  gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR);

  return win32_get_current_dr (regnum - DR_FIRSTADDR);
}

static unsigned long
x86_dr_low_get_control (void)
{
  return win32_get_current_dr (7);
}

/* Get the value of the DR6 debug status register from the inferior
   and record it in STATE.  */

static unsigned long
x86_dr_low_get_status (void)
{
  return win32_get_current_dr (6);
}

/* Low-level function vector.  */
struct x86_dr_low_type x86_dr_low =
  {
    x86_dr_low_set_control,
    x86_dr_low_set_addr,
    x86_dr_low_get_addr,
    x86_dr_low_get_status,
    x86_dr_low_get_control,
    sizeof (void *),
  };

/* Breakpoint/watchpoint support.  */

static int
i386_supports_z_point_type (char z_type)
{
  switch (z_type)
    {
    case Z_PACKET_WRITE_WP:
    case Z_PACKET_ACCESS_WP:
      return 1;
    default:
      return 0;
    }
}

static int
i386_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
		   int size, struct raw_breakpoint *bp)
{
  switch (type)
    {
    case raw_bkpt_type_write_wp:
    case raw_bkpt_type_access_wp:
      {
	enum target_hw_bp_type hw_type
	  = raw_bkpt_type_to_target_hw_bp_type (type);

	return x86_dr_insert_watchpoint (&debug_reg_state,
					 hw_type, addr, size);
      }
    default:
      /* Unsupported.  */
      return 1;
    }
}

static int
i386_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
		   int size, struct raw_breakpoint *bp)
{
  switch (type)
    {
    case raw_bkpt_type_write_wp:
    case raw_bkpt_type_access_wp:
      {
	enum target_hw_bp_type hw_type
	  = raw_bkpt_type_to_target_hw_bp_type (type);

	return x86_dr_remove_watchpoint (&debug_reg_state,
					 hw_type, addr, size);
      }
    default:
      /* Unsupported.  */
      return 1;
    }
}

static int
x86_stopped_by_watchpoint (void)
{
  return x86_dr_stopped_by_watchpoint (&debug_reg_state);
}

static CORE_ADDR
x86_stopped_data_address (void)
{
  CORE_ADDR addr;
  if (x86_dr_stopped_data_address (&debug_reg_state, &addr))
    return addr;
  return 0;
}

static void
i386_initial_stuff (void)
{
  x86_low_init_dregs (&debug_reg_state);
}

static void
i386_get_thread_context (win32_thread_info *th)
{
  /* Requesting the CONTEXT_EXTENDED_REGISTERS register set fails if
     the system doesn't support extended registers.  */
  static DWORD extended_registers = CONTEXT_EXTENDED_REGISTERS;

 again:
  th->context.ContextFlags = (CONTEXT_FULL
			      | CONTEXT_FLOATING_POINT
			      | CONTEXT_DEBUG_REGISTERS
			      | extended_registers);

  if (!GetThreadContext (th->h, &th->context))
    {
      DWORD e = GetLastError ();

      if (extended_registers && e == ERROR_INVALID_PARAMETER)
	{
	  extended_registers = 0;
	  goto again;
	}

      error ("GetThreadContext failure %ld\n", (long) e);
    }
}

static void
i386_prepare_to_resume (win32_thread_info *th)
{
  if (th->debug_registers_changed)
    {
      struct x86_debug_reg_state *dr = &debug_reg_state;

      win32_require_context (th);

      th->context.Dr0 = dr->dr_mirror[0];
      th->context.Dr1 = dr->dr_mirror[1];
      th->context.Dr2 = dr->dr_mirror[2];
      th->context.Dr3 = dr->dr_mirror[3];
      /* th->context.Dr6 = dr->dr_status_mirror;
	 FIXME: should we set dr6 also ?? */
      th->context.Dr7 = dr->dr_control_mirror;

      th->debug_registers_changed = 0;
    }
}

static void
i386_thread_added (win32_thread_info *th)
{
  th->debug_registers_changed = 1;
}

static void
i386_single_step (win32_thread_info *th)
{
  th->context.EFlags |= FLAG_TRACE_BIT;
}

#ifndef __x86_64__

/* An array of offset mappings into a Win32 Context structure.
   This is a one-to-one mapping which is indexed by gdb's register
   numbers.  It retrieves an offset into the context structure where
   the 4 byte register is located.
   An offset value of -1 indicates that Win32 does not provide this
   register in it's CONTEXT structure.  In this case regptr will return
   a pointer into a dummy register.  */
#define context_offset(x) ((int)&(((CONTEXT *)NULL)->x))
static const int mappings[] = {
  context_offset (Eax),
  context_offset (Ecx),
  context_offset (Edx),
  context_offset (Ebx),
  context_offset (Esp),
  context_offset (Ebp),
  context_offset (Esi),
  context_offset (Edi),
  context_offset (Eip),
  context_offset (EFlags),
  context_offset (SegCs),
  context_offset (SegSs),
  context_offset (SegDs),
  context_offset (SegEs),
  context_offset (SegFs),
  context_offset (SegGs),
  context_offset (FloatSave.RegisterArea[0 * 10]),
  context_offset (FloatSave.RegisterArea[1 * 10]),
  context_offset (FloatSave.RegisterArea[2 * 10]),
  context_offset (FloatSave.RegisterArea[3 * 10]),
  context_offset (FloatSave.RegisterArea[4 * 10]),
  context_offset (FloatSave.RegisterArea[5 * 10]),
  context_offset (FloatSave.RegisterArea[6 * 10]),
  context_offset (FloatSave.RegisterArea[7 * 10]),
  context_offset (FloatSave.ControlWord),
  context_offset (FloatSave.StatusWord),
  context_offset (FloatSave.TagWord),
  context_offset (FloatSave.ErrorSelector),
  context_offset (FloatSave.ErrorOffset),
  context_offset (FloatSave.DataSelector),
  context_offset (FloatSave.DataOffset),
  context_offset (FloatSave.ErrorSelector),
  /* XMM0-7 */
  context_offset (ExtendedRegisters[10 * 16]),
  context_offset (ExtendedRegisters[11 * 16]),
  context_offset (ExtendedRegisters[12 * 16]),
  context_offset (ExtendedRegisters[13 * 16]),
  context_offset (ExtendedRegisters[14 * 16]),
  context_offset (ExtendedRegisters[15 * 16]),
  context_offset (ExtendedRegisters[16 * 16]),
  context_offset (ExtendedRegisters[17 * 16]),
  /* MXCSR */
  context_offset (ExtendedRegisters[24])
};
#undef context_offset

#else /* __x86_64__ */

#define context_offset(x) (offsetof (CONTEXT, x))
static const int mappings[] =
{
  context_offset (Rax),
  context_offset (Rbx),
  context_offset (Rcx),
  context_offset (Rdx),
  context_offset (Rsi),
  context_offset (Rdi),
  context_offset (Rbp),
  context_offset (Rsp),
  context_offset (R8),
  context_offset (R9),
  context_offset (R10),
  context_offset (R11),
  context_offset (R12),
  context_offset (R13),
  context_offset (R14),
  context_offset (R15),
  context_offset (Rip),
  context_offset (EFlags),
  context_offset (SegCs),
  context_offset (SegSs),
  context_offset (SegDs),
  context_offset (SegEs),
  context_offset (SegFs),
  context_offset (SegGs),
  context_offset (FloatSave.FloatRegisters[0]),
  context_offset (FloatSave.FloatRegisters[1]),
  context_offset (FloatSave.FloatRegisters[2]),
  context_offset (FloatSave.FloatRegisters[3]),
  context_offset (FloatSave.FloatRegisters[4]),
  context_offset (FloatSave.FloatRegisters[5]),
  context_offset (FloatSave.FloatRegisters[6]),
  context_offset (FloatSave.FloatRegisters[7]),
  context_offset (FloatSave.ControlWord),
  context_offset (FloatSave.StatusWord),
  context_offset (FloatSave.TagWord),
  context_offset (FloatSave.ErrorSelector),
  context_offset (FloatSave.ErrorOffset),
  context_offset (FloatSave.DataSelector),
  context_offset (FloatSave.DataOffset),
  context_offset (FloatSave.ErrorSelector)
  /* XMM0-7 */ ,
  context_offset (Xmm0),
  context_offset (Xmm1),
  context_offset (Xmm2),
  context_offset (Xmm3),
  context_offset (Xmm4),
  context_offset (Xmm5),
  context_offset (Xmm6),
  context_offset (Xmm7),
  context_offset (Xmm8),
  context_offset (Xmm9),
  context_offset (Xmm10),
  context_offset (Xmm11),
  context_offset (Xmm12),
  context_offset (Xmm13),
  context_offset (Xmm14),
  context_offset (Xmm15),
  /* MXCSR */
  context_offset (FloatSave.MxCsr)
};
#undef context_offset

#endif /* __x86_64__ */

/* Fetch register from gdbserver regcache data.  */
static void
i386_fetch_inferior_register (struct regcache *regcache,
			      win32_thread_info *th, int r)
{
  char *context_offset = (char *) &th->context + mappings[r];

  long l;
  if (r == FCS_REGNUM)
    {
      l = *((long *) context_offset) & 0xffff;
      supply_register (regcache, r, (char *) &l);
    }
  else if (r == FOP_REGNUM)
    {
      l = (*((long *) context_offset) >> 16) & ((1 << 11) - 1);
      supply_register (regcache, r, (char *) &l);
    }
  else
    supply_register (regcache, r, context_offset);
}

/* Store a new register value into the thread context of TH.  */
static void
i386_store_inferior_register (struct regcache *regcache,
			      win32_thread_info *th, int r)
{
  char *context_offset = (char *) &th->context + mappings[r];
  collect_register (regcache, r, context_offset);
}

static const unsigned char i386_win32_breakpoint = 0xcc;
#define i386_win32_breakpoint_len 1

static void
i386_arch_setup (void)
{
  struct target_desc *tdesc;

#ifdef __x86_64__
  tdesc = amd64_create_target_description (X86_XSTATE_SSE_MASK, false,
						 false);
#else
  tdesc = i386_create_target_description (X86_XSTATE_SSE_MASK, false);
#endif

  init_target_desc (tdesc);

  win32_tdesc = tdesc;
}

struct win32_target_ops the_low_target = {
  i386_arch_setup,
  sizeof (mappings) / sizeof (mappings[0]),
  i386_initial_stuff,
  i386_get_thread_context,
  i386_prepare_to_resume,
  i386_thread_added,
  i386_fetch_inferior_register,
  i386_store_inferior_register,
  i386_single_step,
  &i386_win32_breakpoint,
  i386_win32_breakpoint_len,
  i386_supports_z_point_type,
  i386_insert_point,
  i386_remove_point,
  x86_stopped_by_watchpoint,
  x86_stopped_data_address
};
Commit	Line	Data
61baf725	1	/* Copyright (C) 2007-2017 Free Software Foundation, Inc.
68070c10 PA	2
	3	This file is part of GDB.
	4
	5	This program is free software; you can redistribute it and/or modify
	6	it under the terms of the GNU General Public License as published by
a9762ec7	7	the Free Software Foundation; either version 3 of the License, or
68070c10 PA	8	(at your option) any later version.
	9
	10	This program is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	GNU General Public License for more details.
	14
	15	You should have received a copy of the GNU General Public License
a9762ec7	16	along with this program. If not, see <http://www.gnu.org/licenses/>. */
68070c10 PA	17
	18	#include "server.h"
	19	#include "win32-low.h"
df7e5265	20	#include "x86-low.h"
22916b07 YQ	21	#include "x86-xstate.h"
	22	#ifdef __x86_64__
	23	#include "arch/amd64.h"
	24	#endif
	25	#include "arch/i386.h"
cc4d742f	26	#include "tdesc.h"
68070c10	27
54709339 PM	28	#ifndef CONTEXT_EXTENDED_REGISTERS
	29	#define CONTEXT_EXTENDED_REGISTERS 0
	30	#endif
	31
68070c10 PA	32	#define FCS_REGNUM 27
	33	#define FOP_REGNUM 31
	34
	35	#define FLAG_TRACE_BIT 0x100
	36
df7e5265	37	static struct x86_debug_reg_state debug_reg_state;
68070c10	38
a2abc7de	39	static int
9c80ecd6	40	update_debug_registers_callback (thread_info thr, void pid_p)
a2abc7de	41	{
6afd337d	42	win32_thread_info th = (win32_thread_info ) thread_target_data (thr);
a2abc7de PA	43	int pid = (int ) pid_p;
	44
	45	/* Only update the threads of this process. */
	46	if (pid_of (thr) == pid)
	47	{
	48	/* The actual update is done later just before resuming the lwp,
	49	we just mark that the registers need updating. */
	50	th->debug_registers_changed = 1;
	51	}
	52
	53	return 0;
	54	}
34b34921	55
aa5ca48f DE	56	/* Update the inferior's debug register REGNUM from STATE. */
aa5ca48f DE	57
42995dbd	58	static void
df7e5265	59	x86_dr_low_set_addr (int regnum, CORE_ADDR addr)
aa5ca48f	60	{
a2abc7de PA	61	/* Only update the threads of this process. */
a2abc7de PA	62	int pid = pid_of (current_thread);
aa5ca48f	63
0a5b1e09	64	gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR);
964e4306	65
a2abc7de	66	find_inferior (&all_threads, update_debug_registers_callback, &pid);
964e4306 PA	67	}
964e4306 PA	68
aa5ca48f DE	69	/* Update the inferior's DR7 debug control register from STATE. */
aa5ca48f DE	70
42995dbd	71	static void
df7e5265	72	x86_dr_low_set_control (unsigned long control)
aa5ca48f	73	{
a2abc7de PA	74	/* Only update the threads of this process. */
	75	int pid = pid_of (current_thread);
	76
	77	find_inferior (&all_threads, update_debug_registers_callback, &pid);
	78	}
	79
	80	/* Return the current value of a DR register of the current thread's
	81	context. */
	82
	83	static DWORD64
	84	win32_get_current_dr (int dr)
	85	{
c3de4d92	86	win32_thread_info *th
6afd337d	87	= (win32_thread_info *) thread_target_data (current_thread);
a2abc7de PA	88
	89	win32_require_context (th);
	90
	91	#define RET_DR(DR) \
	92	case DR: \
	93	return th->context.Dr ## DR
	94
	95	switch (dr)
	96	{
	97	RET_DR (0);
	98	RET_DR (1);
	99	RET_DR (2);
	100	RET_DR (3);
	101	RET_DR (6);
	102	RET_DR (7);
	103	}
	104
	105	#undef RET_DR
	106
	107	gdb_assert_not_reached ("unhandled dr");
	108	}
	109
	110	static CORE_ADDR
	111	x86_dr_low_get_addr (int regnum)
	112	{
	113	gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR);
	114
	115	return win32_get_current_dr (regnum - DR_FIRSTADDR);
aa5ca48f DE	116	}
aa5ca48f DE	117
42995dbd	118	static unsigned long
df7e5265	119	x86_dr_low_get_control (void)
964e4306	120	{
a2abc7de	121	return win32_get_current_dr (7);
964e4306 PA	122	}
964e4306 PA	123
aa5ca48f DE	124	/* Get the value of the DR6 debug status register from the inferior
	125	and record it in STATE. */
	126
42995dbd	127	static unsigned long
df7e5265	128	x86_dr_low_get_status (void)
aa5ca48f	129	{
a2abc7de	130	return win32_get_current_dr (6);
aa5ca48f DE	131	}
aa5ca48f DE	132
42995dbd	133	/* Low-level function vector. */
df7e5265	134	struct x86_dr_low_type x86_dr_low =
42995dbd	135	{
df7e5265 GB	136	x86_dr_low_set_control,
	137	x86_dr_low_set_addr,
	138	x86_dr_low_get_addr,
	139	x86_dr_low_get_status,
	140	x86_dr_low_get_control,
42995dbd GB	141	sizeof (void *),
	142	};
	143
802e8e6d	144	/* Breakpoint/watchpoint support. */
aa5ca48f DE	145
aa5ca48f DE	146	static int
802e8e6d PA	147	i386_supports_z_point_type (char z_type)
	148	{
	149	switch (z_type)
	150	{
	151	case Z_PACKET_WRITE_WP:
	152	case Z_PACKET_ACCESS_WP:
	153	return 1;
	154	default:
	155	return 0;
	156	}
	157	}
	158
	159	static int
	160	i386_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
	161	int size, struct raw_breakpoint *bp)
aa5ca48f DE	162	{
	163	switch (type)
	164	{
802e8e6d PA	165	case raw_bkpt_type_write_wp:
802e8e6d PA	166	case raw_bkpt_type_access_wp:
a4165e94	167	{
802e8e6d PA	168	enum target_hw_bp_type hw_type
802e8e6d PA	169	= raw_bkpt_type_to_target_hw_bp_type (type);
a4165e94	170
df7e5265 GB	171	return x86_dr_insert_watchpoint (&debug_reg_state,
df7e5265 GB	172	hw_type, addr, size);
a4165e94	173	}
aa5ca48f DE	174	default:
	175	/* Unsupported. */
	176	return 1;
	177	}
	178	}
	179
	180	static int
802e8e6d PA	181	i386_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
802e8e6d PA	182	int size, struct raw_breakpoint *bp)
aa5ca48f DE	183	{
	184	switch (type)
	185	{
802e8e6d PA	186	case raw_bkpt_type_write_wp:
802e8e6d PA	187	case raw_bkpt_type_access_wp:
a4165e94	188	{
802e8e6d PA	189	enum target_hw_bp_type hw_type
802e8e6d PA	190	= raw_bkpt_type_to_target_hw_bp_type (type);
a4165e94	191
df7e5265 GB	192	return x86_dr_remove_watchpoint (&debug_reg_state,
df7e5265 GB	193	hw_type, addr, size);
a4165e94	194	}
aa5ca48f DE	195	default:
	196	/* Unsupported. */
	197	return 1;
	198	}
	199	}
	200
	201	static int
df7e5265	202	x86_stopped_by_watchpoint (void)
aa5ca48f	203	{
df7e5265	204	return x86_dr_stopped_by_watchpoint (&debug_reg_state);
aa5ca48f DE	205	}
	206
	207	static CORE_ADDR
df7e5265	208	x86_stopped_data_address (void)
aa5ca48f DE	209	{
aa5ca48f DE	210	CORE_ADDR addr;
df7e5265	211	if (x86_dr_stopped_data_address (&debug_reg_state, &addr))
aa5ca48f DE	212	return addr;
	213	return 0;
	214	}
	215
68070c10	216	static void
34b34921	217	i386_initial_stuff (void)
68070c10	218	{
df7e5265	219	x86_low_init_dregs (&debug_reg_state);
68070c10 PA	220	}
	221
	222	static void
a2abc7de	223	i386_get_thread_context (win32_thread_info *th)
68070c10	224	{
912cf4ba PA	225	/* Requesting the CONTEXT_EXTENDED_REGISTERS register set fails if
	226	the system doesn't support extended registers. */
	227	static DWORD extended_registers = CONTEXT_EXTENDED_REGISTERS;
34b34921	228
912cf4ba PA	229	again:
	230	th->context.ContextFlags = (CONTEXT_FULL
	231	\| CONTEXT_FLOATING_POINT
	232	\| CONTEXT_DEBUG_REGISTERS
	233	\| extended_registers);
	234
	235	if (!GetThreadContext (th->h, &th->context))
	236	{
	237	DWORD e = GetLastError ();
	238
	239	if (extended_registers && e == ERROR_INVALID_PARAMETER)
	240	{
	241	extended_registers = 0;
	242	goto again;
	243	}
	244
	245	error ("GetThreadContext failure %ld\n", (long) e);
	246	}
68070c10 PA	247	}
	248
	249	static void
a2abc7de	250	i386_prepare_to_resume (win32_thread_info *th)
68070c10	251	{
a2abc7de	252	if (th->debug_registers_changed)
34b34921	253	{
df7e5265	254	struct x86_debug_reg_state *dr = &debug_reg_state;
a2abc7de PA	255
	256	win32_require_context (th);
	257
aa5ca48f DE	258	th->context.Dr0 = dr->dr_mirror[0];
	259	th->context.Dr1 = dr->dr_mirror[1];
	260	th->context.Dr2 = dr->dr_mirror[2];
	261	th->context.Dr3 = dr->dr_mirror[3];
8d26e50c	262	/* th->context.Dr6 = dr->dr_status_mirror;
34b34921	263	FIXME: should we set dr6 also ?? */
8d26e50c	264	th->context.Dr7 = dr->dr_control_mirror;
34b34921	265
a2abc7de PA	266	th->debug_registers_changed = 0;
a2abc7de PA	267	}
68070c10 PA	268	}
68070c10 PA	269
68070c10	270	static void
34b34921	271	i386_thread_added (win32_thread_info *th)
68070c10	272	{
a2abc7de	273	th->debug_registers_changed = 1;
68070c10 PA	274	}
	275
	276	static void
34b34921	277	i386_single_step (win32_thread_info *th)
68070c10 PA	278	{
	279	th->context.EFlags \|= FLAG_TRACE_BIT;
	280	}
	281
1c07cc19	282	#ifndef __x86_64__
54709339	283
68070c10 PA	284	/* An array of offset mappings into a Win32 Context structure.
	285	This is a one-to-one mapping which is indexed by gdb's register
	286	numbers. It retrieves an offset into the context structure where
	287	the 4 byte register is located.
	288	An offset value of -1 indicates that Win32 does not provide this
	289	register in it's CONTEXT structure. In this case regptr will return
	290	a pointer into a dummy register. */
	291	#define context_offset(x) ((int)&(((CONTEXT *)NULL)->x))
	292	static const int mappings[] = {
	293	context_offset (Eax),
	294	context_offset (Ecx),
	295	context_offset (Edx),
	296	context_offset (Ebx),
	297	context_offset (Esp),
	298	context_offset (Ebp),
	299	context_offset (Esi),
	300	context_offset (Edi),
	301	context_offset (Eip),
	302	context_offset (EFlags),
	303	context_offset (SegCs),
	304	context_offset (SegSs),
	305	context_offset (SegDs),
	306	context_offset (SegEs),
	307	context_offset (SegFs),
	308	context_offset (SegGs),
	309	context_offset (FloatSave.RegisterArea[0 * 10]),
	310	context_offset (FloatSave.RegisterArea[1 * 10]),
	311	context_offset (FloatSave.RegisterArea[2 * 10]),
	312	context_offset (FloatSave.RegisterArea[3 * 10]),
	313	context_offset (FloatSave.RegisterArea[4 * 10]),
	314	context_offset (FloatSave.RegisterArea[5 * 10]),
	315	context_offset (FloatSave.RegisterArea[6 * 10]),
	316	context_offset (FloatSave.RegisterArea[7 * 10]),
	317	context_offset (FloatSave.ControlWord),
	318	context_offset (FloatSave.StatusWord),
	319	context_offset (FloatSave.TagWord),
	320	context_offset (FloatSave.ErrorSelector),
	321	context_offset (FloatSave.ErrorOffset),
	322	context_offset (FloatSave.DataSelector),
	323	context_offset (FloatSave.DataOffset),
	324	context_offset (FloatSave.ErrorSelector),
	325	/* XMM0-7 */
	326	context_offset (ExtendedRegisters[10 * 16]),
	327	context_offset (ExtendedRegisters[11 * 16]),
	328	context_offset (ExtendedRegisters[12 * 16]),
	329	context_offset (ExtendedRegisters[13 * 16]),
	330	context_offset (ExtendedRegisters[14 * 16]),
	331	context_offset (ExtendedRegisters[15 * 16]),
	332	context_offset (ExtendedRegisters[16 * 16]),
	333	context_offset (ExtendedRegisters[17 * 16]),
	334	/* MXCSR */
	335	context_offset (ExtendedRegisters[24])
	336	};
	337	#undef context_offset
	338
1c07cc19	339	#else /* __x86_64__ */
54709339 PM	340
	341	#define context_offset(x) (offsetof (CONTEXT, x))
	342	static const int mappings[] =
	343	{
	344	context_offset (Rax),
	345	context_offset (Rbx),
	346	context_offset (Rcx),
	347	context_offset (Rdx),
	348	context_offset (Rsi),
	349	context_offset (Rdi),
	350	context_offset (Rbp),
	351	context_offset (Rsp),
	352	context_offset (R8),
	353	context_offset (R9),
	354	context_offset (R10),
	355	context_offset (R11),
	356	context_offset (R12),
	357	context_offset (R13),
	358	context_offset (R14),
	359	context_offset (R15),
	360	context_offset (Rip),
	361	context_offset (EFlags),
	362	context_offset (SegCs),
	363	context_offset (SegSs),
	364	context_offset (SegDs),
	365	context_offset (SegEs),
	366	context_offset (SegFs),
	367	context_offset (SegGs),
	368	context_offset (FloatSave.FloatRegisters[0]),
	369	context_offset (FloatSave.FloatRegisters[1]),
	370	context_offset (FloatSave.FloatRegisters[2]),
	371	context_offset (FloatSave.FloatRegisters[3]),
	372	context_offset (FloatSave.FloatRegisters[4]),
	373	context_offset (FloatSave.FloatRegisters[5]),
	374	context_offset (FloatSave.FloatRegisters[6]),
	375	context_offset (FloatSave.FloatRegisters[7]),
	376	context_offset (FloatSave.ControlWord),
	377	context_offset (FloatSave.StatusWord),
	378	context_offset (FloatSave.TagWord),
	379	context_offset (FloatSave.ErrorSelector),
	380	context_offset (FloatSave.ErrorOffset),
	381	context_offset (FloatSave.DataSelector),
	382	context_offset (FloatSave.DataOffset),
	383	context_offset (FloatSave.ErrorSelector)
	384	/* XMM0-7 */ ,
	385	context_offset (Xmm0),
	386	context_offset (Xmm1),
	387	context_offset (Xmm2),
	388	context_offset (Xmm3),
	389	context_offset (Xmm4),
	390	context_offset (Xmm5),
	391	context_offset (Xmm6),
	392	context_offset (Xmm7),
	393	context_offset (Xmm8),
	394	context_offset (Xmm9),
	395	context_offset (Xmm10),
	396	context_offset (Xmm11),
	397	context_offset (Xmm12),
	398	context_offset (Xmm13),
	399	context_offset (Xmm14),
	400	context_offset (Xmm15),
	401	/* MXCSR */
	402	context_offset (FloatSave.MxCsr)
	403	};
404	#undef context_offset
405
1c07cc19	406	#endif /* __x86_64__ */
54709339	407
34b34921 PA	408	/* Fetch register from gdbserver regcache data. */
34b34921 PA	409	static void
442ea881 PA	410	i386_fetch_inferior_register (struct regcache *regcache,
442ea881 PA	411	win32_thread_info *th, int r)
34b34921 PA	412	{
	413	char context_offset = (char ) &th->context + mappings[r];
	414
	415	long l;
	416	if (r == FCS_REGNUM)
	417	{
	418	l = ((long ) context_offset) & 0xffff;
442ea881	419	supply_register (regcache, r, (char *) &l);
34b34921 PA	420	}
	421	else if (r == FOP_REGNUM)
	422	{
	423	l = (((long ) context_offset) >> 16) & ((1 << 11) - 1);
442ea881	424	supply_register (regcache, r, (char *) &l);
34b34921 PA	425	}
34b34921 PA	426	else
442ea881	427	supply_register (regcache, r, context_offset);
34b34921 PA	428	}
	429
	430	/* Store a new register value into the thread context of TH. */
	431	static void
442ea881 PA	432	i386_store_inferior_register (struct regcache *regcache,
442ea881 PA	433	win32_thread_info *th, int r)
34b34921 PA	434	{
34b34921 PA	435	char context_offset = (char ) &th->context + mappings[r];
442ea881	436	collect_register (regcache, r, context_offset);
34b34921 PA	437	}
34b34921 PA	438
912cf4ba PA	439	static const unsigned char i386_win32_breakpoint = 0xcc;
	440	#define i386_win32_breakpoint_len 1
	441
54709339	442	static void
3aee8918	443	i386_arch_setup (void)
54709339	444	{
cc4d742f SM	445	struct target_desc *tdesc;
cc4d742f SM	446
1c07cc19	447	#ifdef __x86_64__
cc4d742f	448	tdesc = amd64_create_target_description (X86_XSTATE_SSE_MASK, false,
22916b07	449	false);
54709339	450	#else
cc4d742f	451	tdesc = i386_create_target_description (X86_XSTATE_SSE_MASK, false);
54709339	452	#endif
cc4d742f SM	453
	454	init_target_desc (tdesc);
	455
	456	win32_tdesc = tdesc;
54709339 PM	457	}
54709339 PM	458
68070c10	459	struct win32_target_ops the_low_target = {
3aee8918	460	i386_arch_setup,
68070c10	461	sizeof (mappings) / sizeof (mappings[0]),
34b34921 PA	462	i386_initial_stuff,
34b34921 PA	463	i386_get_thread_context,
a2abc7de	464	i386_prepare_to_resume,
34b34921 PA	465	i386_thread_added,
	466	i386_fetch_inferior_register,
	467	i386_store_inferior_register,
	468	i386_single_step,
912cf4ba PA	469	&i386_win32_breakpoint,
912cf4ba PA	470	i386_win32_breakpoint_len,
802e8e6d	471	i386_supports_z_point_type,
aa5ca48f DE	472	i386_insert_point,
aa5ca48f DE	473	i386_remove_point,
df7e5265 GB	474	x86_stopped_by_watchpoint,
df7e5265 GB	475	x86_stopped_data_address
68070c10	476	};