Consistent use of (C) after "Copyright".
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
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1/* Target-machine dependent code for Renesas H8/300, for GDB.
2
28e7fd62 3 Copyright (C) 1988-2013 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20/*
21 Contributed by Steve Chamberlain
22 sac@cygnus.com
23 */
24
25#include "defs.h"
26#include "value.h"
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27#include "arch-utils.h"
28#include "regcache.h"
29#include "gdbcore.h"
30#include "objfiles.h"
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31#include "gdb_assert.h"
32#include "dis-asm.h"
33#include "dwarf2-frame.h"
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34#include "frame-base.h"
35#include "frame-unwind.h"
36
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37enum gdb_regnum
38{
39 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
40 E_RET0_REGNUM = E_R0_REGNUM,
41 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
42 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
43 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
44 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
45 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
46 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
47 E_SP_REGNUM,
48 E_CCR_REGNUM,
49 E_PC_REGNUM,
50 E_CYCLES_REGNUM,
51 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
52 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
53 E_INSTS_REGNUM,
54 E_MACH_REGNUM,
55 E_MACL_REGNUM,
56 E_SBR_REGNUM,
57 E_VBR_REGNUM
58};
59
60#define H8300_MAX_NUM_REGS 18
61
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62#define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
63#define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
f0bdd87d 64
862ba188
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65struct h8300_frame_cache
66{
67 /* Base address. */
68 CORE_ADDR base;
69 CORE_ADDR sp_offset;
70 CORE_ADDR pc;
71
1777feb0 72 /* Flag showing that a frame has been created in the prologue code. */
862ba188 73 int uses_fp;
f0bdd87d 74
862ba188
CV
75 /* Saved registers. */
76 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
77 CORE_ADDR saved_sp;
78};
79
80enum
81{
82 h8300_reg_size = 2,
83 h8300h_reg_size = 4,
84 h8300_max_reg_size = 4,
85};
86
87static int is_h8300hmode (struct gdbarch *gdbarch);
88static int is_h8300smode (struct gdbarch *gdbarch);
89static int is_h8300sxmode (struct gdbarch *gdbarch);
90static int is_h8300_normal_mode (struct gdbarch *gdbarch);
91
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92#define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
93 && !is_h8300_normal_mode (gdbarch)) \
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94 ? h8300h_reg_size : h8300_reg_size)
95
96static CORE_ADDR
97h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
98{
99 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
100}
101
102static CORE_ADDR
103h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
104{
105 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
106}
107
108static struct frame_id
94afd7a6 109h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
862ba188 110{
94afd7a6
UW
111 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
112 return frame_id_build (sp, get_frame_pc (this_frame));
862ba188
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113}
114
115/* Normal frames. */
116
117/* Allocate and initialize a frame cache. */
118
119static void
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120h8300_init_frame_cache (struct gdbarch *gdbarch,
121 struct h8300_frame_cache *cache)
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122{
123 int i;
124
125 /* Base address. */
126 cache->base = 0;
127 cache->sp_offset = 0;
128 cache->pc = 0;
129
130 /* Frameless until proven otherwise. */
131 cache->uses_fp = 0;
132
133 /* Saved registers. We initialize these to -1 since zero is a valid
134 offset (that's where %fp is supposed to be stored). */
be8626e0 135 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
862ba188
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136 cache->saved_regs[i] = -1;
137}
138
139#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
140#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
141#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
142#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
143#define IS_MOVB_EXT(x) ((x) == 0x7860)
144#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
145#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
146#define IS_MOVW_EXT(x) ((x) == 0x78e0)
147#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
1777feb0 148/* Same instructions as mov.w, just prefixed with 0x0100. */
862ba188
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149#define IS_MOVL_PRE(x) ((x) == 0x0100)
150#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
151#define IS_MOVL_EXT(x) ((x) == 0x78e0)
152#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
153
154#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
155#define IS_PUSH_FP(x) ((x) == 0x01006df6)
156#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
157#define IS_SUB2_SP(x) ((x) == 0x1b87)
158#define IS_SUB4_SP(x) ((x) == 0x1b97)
159#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
160#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
161#define IS_SUBL4_SP(x) ((x) == 0x1acf)
162#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
163#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
164#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
165#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
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166
167/* If the instruction at PC is an argument register spill, return its
168 length. Otherwise, return zero.
169
170 An argument register spill is an instruction that moves an argument
171 from the register in which it was passed to the stack slot in which
172 it really lives. It is a byte, word, or longword move from an
173 argument register to a negative offset from the frame pointer.
174
175 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
176 is used, it could be a byte, word or long move to registers r3-r5. */
177
178static int
e17a4113 179h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)
f0bdd87d 180{
e17a4113
UW
181 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
182 int w = read_memory_unsigned_integer (pc, 2, byte_order);
f0bdd87d 183
862ba188 184 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
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185 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
186 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
187 return 2;
188
862ba188 189 if (IS_MOVB_Rn16_SP (w)
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190 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
191 {
e17a4113
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192 /* ... and d:16 is negative. */
193 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
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194 return 4;
195 }
862ba188 196 else if (IS_MOVB_EXT (w))
f0bdd87d 197 {
e17a4113
UW
198 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2,
199 2, byte_order)))
f0bdd87d 200 {
e17a4113 201 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
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202
203 /* ... and d:24 is negative. */
204 if (disp < 0 && disp > 0xffffff)
205 return 8;
206 }
207 }
862ba188 208 else if (IS_MOVW_Rn16_SP (w)
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209 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
210 {
f0bdd87d 211 /* ... and d:16 is negative. */
e17a4113 212 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
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213 return 4;
214 }
862ba188 215 else if (IS_MOVW_EXT (w))
f0bdd87d 216 {
e17a4113
UW
217 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2,
218 2, byte_order)))
f0bdd87d 219 {
e17a4113 220 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
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221
222 /* ... and d:24 is negative. */
223 if (disp < 0 && disp > 0xffffff)
224 return 8;
225 }
226 }
862ba188 227 else if (IS_MOVL_PRE (w))
f0bdd87d 228 {
e17a4113 229 int w2 = read_memory_integer (pc + 2, 2, byte_order);
f0bdd87d 230
862ba188 231 if (IS_MOVL_Rn16_SP (w2)
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232 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
233 {
f0bdd87d 234 /* ... and d:16 is negative. */
e17a4113 235 if (read_memory_integer (pc + 4, 2, byte_order) < 0)
f0bdd87d
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236 return 6;
237 }
862ba188 238 else if (IS_MOVL_EXT (w2))
f0bdd87d 239 {
e17a4113 240 int w3 = read_memory_integer (pc + 4, 2, byte_order);
f0bdd87d 241
e17a4113 242 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order)))
f0bdd87d 243 {
e17a4113 244 LONGEST disp = read_memory_integer (pc + 6, 4, byte_order);
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245
246 /* ... and d:24 is negative. */
247 if (disp < 0 && disp > 0xffffff)
248 return 10;
249 }
250 }
251 }
252
253 return 0;
254}
255
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256/* Do a full analysis of the prologue at PC and update CACHE
257 accordingly. Bail out early if CURRENT_PC is reached. Return the
258 address where the analysis stopped.
259
260 We handle all cases that can be generated by gcc.
261
262 For allocating a stack frame:
263
264 mov.w r6,@-sp
265 mov.w sp,r6
266 mov.w #-n,rN
267 add.w rN,sp
268
269 mov.w r6,@-sp
270 mov.w sp,r6
271 subs #2,sp
272 (repeat)
273
274 mov.l er6,@-sp
275 mov.l sp,er6
276 add.l #-n,sp
277
278 mov.w r6,@-sp
279 mov.w sp,r6
280 subs #4,sp
281 (repeat)
282
283 For saving registers:
284
285 mov.w rN,@-sp
286 mov.l erN,@-sp
287 stm.l reglist,@-sp
288
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289 */
290
291static CORE_ADDR
e17a4113
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292h8300_analyze_prologue (struct gdbarch *gdbarch,
293 CORE_ADDR pc, CORE_ADDR current_pc,
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294 struct h8300_frame_cache *cache)
295{
e17a4113 296 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d 297 unsigned int op;
862ba188
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298 int regno, i, spill_size;
299
300 cache->sp_offset = 0;
f0bdd87d 301
f0bdd87d
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302 if (pc >= current_pc)
303 return current_pc;
304
e17a4113 305 op = read_memory_unsigned_integer (pc, 4, byte_order);
862ba188
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306
307 if (IS_PUSHFP_MOVESPFP (op))
308 {
309 cache->saved_regs[E_FP_REGNUM] = 0;
310 cache->uses_fp = 1;
311 pc += 4;
312 }
313 else if (IS_PUSH_FP (op))
314 {
315 cache->saved_regs[E_FP_REGNUM] = 0;
316 pc += 4;
317 if (pc >= current_pc)
318 return current_pc;
e17a4113 319 op = read_memory_unsigned_integer (pc, 2, byte_order);
862ba188
CV
320 if (IS_MOV_SP_FP (op))
321 {
322 cache->uses_fp = 1;
323 pc += 2;
324 }
325 }
326
327 while (pc < current_pc)
328 {
e17a4113 329 op = read_memory_unsigned_integer (pc, 2, byte_order);
862ba188
CV
330 if (IS_SUB2_SP (op))
331 {
332 cache->sp_offset += 2;
333 pc += 2;
334 }
335 else if (IS_SUB4_SP (op))
336 {
337 cache->sp_offset += 4;
338 pc += 2;
339 }
340 else if (IS_ADD_IMM_SP (op))
341 {
e17a4113 342 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order);
862ba188
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343 pc += 4;
344 }
345 else if (IS_SUB_IMM_SP (op))
346 {
e17a4113 347 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order);
862ba188
CV
348 pc += 4;
349 }
350 else if (IS_SUBL4_SP (op))
351 {
352 cache->sp_offset += 4;
353 pc += 2;
354 }
355 else if (IS_MOV_IMM_Rn (op))
356 {
e17a4113 357 int offset = read_memory_integer (pc + 2, 2, byte_order);
862ba188 358 regno = op & 0x000f;
e17a4113 359 op = read_memory_unsigned_integer (pc + 4, 2, byte_order);
862ba188
CV
360 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
361 {
362 cache->sp_offset -= offset;
363 pc += 6;
364 }
365 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
366 {
367 cache->sp_offset += offset;
368 pc += 6;
369 }
370 else
371 break;
372 }
373 else if (IS_PUSH (op))
374 {
375 regno = op & 0x000f;
376 cache->sp_offset += 2;
377 cache->saved_regs[regno] = cache->sp_offset;
378 pc += 2;
379 }
380 else if (op == 0x0100)
381 {
e17a4113 382 op = read_memory_unsigned_integer (pc + 2, 2, byte_order);
862ba188
CV
383 if (IS_PUSH (op))
384 {
385 regno = op & 0x000f;
386 cache->sp_offset += 4;
387 cache->saved_regs[regno] = cache->sp_offset;
388 pc += 4;
389 }
390 else
391 break;
392 }
393 else if ((op & 0xffcf) == 0x0100)
394 {
395 int op1;
e17a4113 396 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order);
862ba188
CV
397 if (IS_PUSH (op1))
398 {
399 /* Since the prefix is 0x01x0, this is not a simple pushm but a
400 stm.l reglist,@-sp */
401 i = ((op & 0x0030) >> 4) + 1;
402 regno = op1 & 0x000f;
403 for (; i > 0; regno++, --i)
404 {
405 cache->sp_offset += 4;
406 cache->saved_regs[regno] = cache->sp_offset;
407 }
408 pc += 4;
409 }
410 else
411 break;
412 }
413 else
414 break;
415 }
416
417 /* Check for spilling an argument register to the stack frame.
418 This could also be an initializing store from non-prologue code,
419 but I don't think there's any harm in skipping that. */
e17a4113 420 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0
862ba188
CV
421 && pc + spill_size <= current_pc)
422 pc += spill_size;
f0bdd87d
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423
424 return pc;
425}
426
427static struct h8300_frame_cache *
94afd7a6 428h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
f0bdd87d 429{
94afd7a6 430 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d 431 struct h8300_frame_cache *cache;
f0bdd87d 432 int i;
862ba188 433 CORE_ADDR current_pc;
f0bdd87d
YS
434
435 if (*this_cache)
436 return *this_cache;
437
862ba188 438 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
be8626e0 439 h8300_init_frame_cache (gdbarch, cache);
f0bdd87d
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440 *this_cache = cache;
441
442 /* In principle, for normal frames, %fp holds the frame pointer,
443 which holds the base address for the current stack frame.
444 However, for functions that don't need it, the frame pointer is
445 optional. For these "frameless" functions the frame pointer is
862ba188 446 actually the frame pointer of the calling frame. */
f0bdd87d 447
94afd7a6 448 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
f0bdd87d
YS
449 if (cache->base == 0)
450 return cache;
451
be8626e0 452 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 453
94afd7a6
UW
454 cache->pc = get_frame_func (this_frame);
455 current_pc = get_frame_pc (this_frame);
f0bdd87d 456 if (cache->pc != 0)
e17a4113 457 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache);
f0bdd87d 458
862ba188 459 if (!cache->uses_fp)
f0bdd87d
YS
460 {
461 /* We didn't find a valid frame, which means that CACHE->base
462 currently holds the frame pointer for our calling frame. If
463 we're at the start of a function, or somewhere half-way its
464 prologue, the function's frame probably hasn't been fully
465 setup yet. Try to reconstruct the base address for the stack
466 frame by looking at the stack pointer. For truly "frameless"
467 functions this might work too. */
468
94afd7a6 469 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
862ba188 470 + cache->sp_offset;
be8626e0 471 cache->saved_sp = cache->base + BINWORD (gdbarch);
862ba188
CV
472 cache->saved_regs[E_PC_REGNUM] = 0;
473 }
474 else
475 {
be8626e0
MD
476 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
477 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 478 }
f0bdd87d
YS
479
480 /* Adjust all the saved registers such that they contain addresses
481 instead of offsets. */
be8626e0 482 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
f0bdd87d 483 if (cache->saved_regs[i] != -1)
862ba188 484 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
f0bdd87d
YS
485
486 return cache;
487}
488
489static void
94afd7a6 490h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
f0bdd87d
YS
491 struct frame_id *this_id)
492{
493 struct h8300_frame_cache *cache =
94afd7a6 494 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
495
496 /* This marks the outermost frame. */
497 if (cache->base == 0)
498 return;
499
862ba188 500 *this_id = frame_id_build (cache->saved_sp, cache->pc);
f0bdd87d
YS
501}
502
94afd7a6
UW
503static struct value *
504h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
505 int regnum)
f0bdd87d 506{
94afd7a6 507 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d 508 struct h8300_frame_cache *cache =
94afd7a6 509 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
510
511 gdb_assert (regnum >= 0);
512
513 if (regnum == E_SP_REGNUM && cache->saved_sp)
94afd7a6 514 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
f0bdd87d 515
ea78bae4 516 if (regnum < gdbarch_num_regs (gdbarch)
f57d151a 517 && cache->saved_regs[regnum] != -1)
94afd7a6
UW
518 return frame_unwind_got_memory (this_frame, regnum,
519 cache->saved_regs[regnum]);
f0bdd87d 520
94afd7a6 521 return frame_unwind_got_register (this_frame, regnum, regnum);
f0bdd87d
YS
522}
523
524static const struct frame_unwind h8300_frame_unwind = {
525 NORMAL_FRAME,
8fbca658 526 default_frame_unwind_stop_reason,
f0bdd87d 527 h8300_frame_this_id,
94afd7a6
UW
528 h8300_frame_prev_register,
529 NULL,
530 default_frame_sniffer
f0bdd87d
YS
531};
532
862ba188 533static CORE_ADDR
94afd7a6 534h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
862ba188 535{
94afd7a6 536 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
862ba188
CV
537 return cache->base;
538}
539
540static const struct frame_base h8300_frame_base = {
541 &h8300_frame_unwind,
542 h8300_frame_base_address,
543 h8300_frame_base_address,
544 h8300_frame_base_address
545};
546
547static CORE_ADDR
6093d2eb 548h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
862ba188
CV
549{
550 CORE_ADDR func_addr = 0 , func_end = 0;
551
552 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
553 {
554 struct symtab_and_line sal;
555 struct h8300_frame_cache cache;
556
557 /* Found a function. */
558 sal = find_pc_line (func_addr, 0);
559 if (sal.end && sal.end < func_end)
560 /* Found a line number, use it as end of prologue. */
561 return sal.end;
562
563 /* No useable line symbol. Use prologue parsing method. */
be8626e0 564 h8300_init_frame_cache (gdbarch, &cache);
e17a4113 565 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache);
862ba188
CV
566 }
567
568 /* No function symbol -- just return the PC. */
569 return (CORE_ADDR) pc;
570}
571
f0bdd87d
YS
572/* Function: push_dummy_call
573 Setup the function arguments for calling a function in the inferior.
574 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
575 on the H8/300H.
576
577 There are actually two ABI's here: -mquickcall (the default) and
578 -mno-quickcall. With -mno-quickcall, all arguments are passed on
579 the stack after the return address, word-aligned. With
580 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
581 GCC doesn't indicate in the object file which ABI was used to
582 compile it, GDB only supports the default --- -mquickcall.
583
584 Here are the rules for -mquickcall, in detail:
585
586 Each argument, whether scalar or aggregate, is padded to occupy a
587 whole number of words. Arguments smaller than a word are padded at
588 the most significant end; those larger than a word are padded at
589 the least significant end.
590
591 The initial arguments are passed in r0 -- r2. Earlier arguments go in
592 lower-numbered registers. Multi-word arguments are passed in
593 consecutive registers, with the most significant end in the
594 lower-numbered register.
595
596 If an argument doesn't fit entirely in the remaining registers, it
597 is passed entirely on the stack. Stack arguments begin just after
598 the return address. Once an argument has overflowed onto the stack
599 this way, all subsequent arguments are passed on the stack.
600
601 The above rule has odd consequences. For example, on the h8/300s,
602 if a function takes two longs and an int as arguments:
603 - the first long will be passed in r0/r1,
604 - the second long will be passed entirely on the stack, since it
605 doesn't fit in r2,
606 - and the int will be passed on the stack, even though it could fit
607 in r2.
608
609 A weird exception: if an argument is larger than a word, but not a
610 whole number of words in length (before padding), it is passed on
611 the stack following the rules for stack arguments above, even if
612 there are sufficient registers available to hold it. Stranger
613 still, the argument registers are still `used up' --- even though
614 there's nothing in them.
615
616 So, for example, on the h8/300s, if a function expects a three-byte
617 structure and an int, the structure will go on the stack, and the
618 int will go in r2, not r0.
619
620 If the function returns an aggregate type (struct, union, or class)
621 by value, the caller must allocate space to hold the return value,
622 and pass the callee a pointer to this space as an invisible first
623 argument, in R0.
624
625 For varargs functions, the last fixed argument and all the variable
626 arguments are always passed on the stack. This means that calls to
627 varargs functions don't work properly unless there is a prototype
628 in scope.
629
630 Basically, this ABI is not good, for the following reasons:
631 - You can't call vararg functions properly unless a prototype is in scope.
632 - Structure passing is inconsistent, to no purpose I can see.
633 - It often wastes argument registers, of which there are only three
634 to begin with. */
635
636static CORE_ADDR
637h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
638 struct regcache *regcache, CORE_ADDR bp_addr,
639 int nargs, struct value **args, CORE_ADDR sp,
640 int struct_return, CORE_ADDR struct_addr)
641{
e17a4113 642 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d 643 int stack_alloc = 0, stack_offset = 0;
be8626e0 644 int wordsize = BINWORD (gdbarch);
f0bdd87d
YS
645 int reg = E_ARG0_REGNUM;
646 int argument;
647
648 /* First, make sure the stack is properly aligned. */
649 sp = align_down (sp, wordsize);
650
651 /* Now make sure there's space on the stack for the arguments. We
652 may over-allocate a little here, but that won't hurt anything. */
653 for (argument = 0; argument < nargs; argument++)
654 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
655 wordsize);
656 sp -= stack_alloc;
657
658 /* Now load as many arguments as possible into registers, and push
659 the rest onto the stack.
660 If we're returning a structure by value, then we must pass a
661 pointer to the buffer for the return value as an invisible first
662 argument. */
663 if (struct_return)
664 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
665
666 for (argument = 0; argument < nargs; argument++)
667 {
ecfb0d68 668 struct cleanup *back_to;
f0bdd87d
YS
669 struct type *type = value_type (args[argument]);
670 int len = TYPE_LENGTH (type);
671 char *contents = (char *) value_contents (args[argument]);
672
673 /* Pad the argument appropriately. */
674 int padded_len = align_up (len, wordsize);
ecfb0d68
SP
675 gdb_byte *padded = xmalloc (padded_len);
676 back_to = make_cleanup (xfree, padded);
f0bdd87d
YS
677
678 memset (padded, 0, padded_len);
679 memcpy (len < wordsize ? padded + padded_len - len : padded,
680 contents, len);
681
682 /* Could the argument fit in the remaining registers? */
683 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
684 {
685 /* Are we going to pass it on the stack anyway, for no good
686 reason? */
687 if (len > wordsize && len % wordsize)
688 {
689 /* I feel so unclean. */
690 write_memory (sp + stack_offset, padded, padded_len);
691 stack_offset += padded_len;
692
693 /* That's right --- even though we passed the argument
694 on the stack, we consume the registers anyway! Love
695 me, love my dog. */
696 reg += padded_len / wordsize;
697 }
698 else
699 {
700 /* Heavens to Betsy --- it's really going in registers!
99e42fd8
PA
701 Note that on the h8/300s, there are gaps between the
702 registers in the register file. */
f0bdd87d
YS
703 int offset;
704
705 for (offset = 0; offset < padded_len; offset += wordsize)
706 {
e17a4113
UW
707 ULONGEST word
708 = extract_unsigned_integer (padded + offset,
709 wordsize, byte_order);
f0bdd87d
YS
710 regcache_cooked_write_unsigned (regcache, reg++, word);
711 }
712 }
713 }
714 else
715 {
716 /* It doesn't fit in registers! Onto the stack it goes. */
717 write_memory (sp + stack_offset, padded, padded_len);
718 stack_offset += padded_len;
719
720 /* Once one argument has spilled onto the stack, all
721 subsequent arguments go on the stack. */
722 reg = E_ARGLAST_REGNUM + 1;
723 }
ecfb0d68
SP
724
725 do_cleanups (back_to);
f0bdd87d
YS
726 }
727
728 /* Store return address. */
729 sp -= wordsize;
e17a4113 730 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr);
f0bdd87d
YS
731
732 /* Update stack pointer. */
733 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
734
862ba188
CV
735 /* Return the new stack pointer minus the return address slot since
736 that's what DWARF2/GCC uses as the frame's CFA. */
737 return sp + wordsize;
f0bdd87d
YS
738}
739
740/* Function: extract_return_value
741 Figure out where in REGBUF the called function has left its return value.
742 Copy that into VALBUF. Be sure to account for CPU type. */
743
744static void
745h8300_extract_return_value (struct type *type, struct regcache *regcache,
746 void *valbuf)
747{
e17a4113
UW
748 struct gdbarch *gdbarch = get_regcache_arch (regcache);
749 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d
YS
750 int len = TYPE_LENGTH (type);
751 ULONGEST c, addr;
752
bad43aa5 753 switch (len)
f0bdd87d
YS
754 {
755 case 1:
756 case 2:
757 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
bad43aa5 758 store_unsigned_integer (valbuf, len, byte_order, c);
f0bdd87d
YS
759 break;
760 case 4: /* Needs two registers on plain H8/300 */
761 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
e17a4113 762 store_unsigned_integer (valbuf, 2, byte_order, c);
f0bdd87d 763 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
e17a4113 764 store_unsigned_integer ((void *)((char *) valbuf + 2), 2, byte_order, c);
f0bdd87d
YS
765 break;
766 case 8: /* long long is now 8 bytes. */
767 if (TYPE_CODE (type) == TYPE_CODE_INT)
768 {
769 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
bad43aa5
SP
770 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order);
771 store_unsigned_integer (valbuf, len, byte_order, c);
f0bdd87d
YS
772 }
773 else
774 {
a73c6dcd 775 error (_("I don't know how this 8 byte value is returned."));
f0bdd87d
YS
776 }
777 break;
778 }
779}
780
781static void
782h8300h_extract_return_value (struct type *type, struct regcache *regcache,
783 void *valbuf)
784{
e17a4113
UW
785 struct gdbarch *gdbarch = get_regcache_arch (regcache);
786 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
22e048c9 787 ULONGEST c;
f0bdd87d 788
744a8059 789 switch (TYPE_LENGTH (type))
f0bdd87d
YS
790 {
791 case 1:
792 case 2:
793 case 4:
794 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
744a8059 795 store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c);
f0bdd87d
YS
796 break;
797 case 8: /* long long is now 8 bytes. */
798 if (TYPE_CODE (type) == TYPE_CODE_INT)
799 {
862ba188 800 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
e17a4113 801 store_unsigned_integer (valbuf, 4, byte_order, c);
862ba188 802 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
e17a4113
UW
803 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4,
804 byte_order, c);
f0bdd87d
YS
805 }
806 else
807 {
a73c6dcd 808 error (_("I don't know how this 8 byte value is returned."));
f0bdd87d
YS
809 }
810 break;
811 }
812}
813
63807e1d 814static int
862ba188
CV
815h8300_use_struct_convention (struct type *value_type)
816{
817 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
1777feb0 818 stack. */
862ba188
CV
819
820 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
821 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
822 return 1;
823 return !(TYPE_LENGTH (value_type) == 1
824 || TYPE_LENGTH (value_type) == 2
825 || TYPE_LENGTH (value_type) == 4);
826}
827
63807e1d 828static int
862ba188
CV
829h8300h_use_struct_convention (struct type *value_type)
830{
831 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
1777feb0 832 returned in R0/R1, everything else on the stack. */
862ba188
CV
833 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
834 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
835 return 1;
836 return !(TYPE_LENGTH (value_type) == 1
837 || TYPE_LENGTH (value_type) == 2
838 || TYPE_LENGTH (value_type) == 4
839 || (TYPE_LENGTH (value_type) == 8
840 && TYPE_CODE (value_type) == TYPE_CODE_INT));
841}
f0bdd87d
YS
842
843/* Function: store_return_value
844 Place the appropriate value in the appropriate registers.
845 Primarily used by the RETURN command. */
846
847static void
848h8300_store_return_value (struct type *type, struct regcache *regcache,
849 const void *valbuf)
850{
e17a4113
UW
851 struct gdbarch *gdbarch = get_regcache_arch (regcache);
852 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d
YS
853 ULONGEST val;
854
744a8059 855 switch (TYPE_LENGTH (type))
f0bdd87d
YS
856 {
857 case 1:
1777feb0 858 case 2: /* short... */
744a8059 859 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
f0bdd87d
YS
860 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
861 break;
862 case 4: /* long, float */
744a8059 863 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
f0bdd87d
YS
864 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
865 (val >> 16) & 0xffff);
866 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
867 break;
1777feb0
MS
868 case 8: /* long long, double and long double
869 are all defined as 4 byte types so
870 far so this shouldn't happen. */
a73c6dcd 871 error (_("I don't know how to return an 8 byte value."));
f0bdd87d
YS
872 break;
873 }
874}
875
876static void
877h8300h_store_return_value (struct type *type, struct regcache *regcache,
878 const void *valbuf)
879{
e17a4113
UW
880 struct gdbarch *gdbarch = get_regcache_arch (regcache);
881 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d
YS
882 ULONGEST val;
883
744a8059 884 switch (TYPE_LENGTH (type))
f0bdd87d
YS
885 {
886 case 1:
887 case 2:
888 case 4: /* long, float */
744a8059 889 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
f0bdd87d
YS
890 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
891 break;
862ba188 892 case 8:
744a8059 893 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
862ba188
CV
894 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
895 (val >> 32) & 0xffffffff);
896 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
897 val & 0xffffffff);
f0bdd87d
YS
898 break;
899 }
900}
901
862ba188 902static enum return_value_convention
6a3a010b 903h8300_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101 904 struct type *type, struct regcache *regcache,
5d0d05b6 905 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
906{
907 if (h8300_use_struct_convention (type))
908 return RETURN_VALUE_STRUCT_CONVENTION;
909 if (writebuf)
910 h8300_store_return_value (type, regcache, writebuf);
911 else if (readbuf)
912 h8300_extract_return_value (type, regcache, readbuf);
913 return RETURN_VALUE_REGISTER_CONVENTION;
914}
915
916static enum return_value_convention
6a3a010b 917h8300h_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101 918 struct type *type, struct regcache *regcache,
5d0d05b6 919 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
920{
921 if (h8300h_use_struct_convention (type))
922 {
923 if (readbuf)
924 {
925 ULONGEST addr;
926
927 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
928 read_memory (addr, readbuf, TYPE_LENGTH (type));
929 }
930
931 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
932 }
933 if (writebuf)
934 h8300h_store_return_value (type, regcache, writebuf);
935 else if (readbuf)
936 h8300h_extract_return_value (type, regcache, readbuf);
937 return RETURN_VALUE_REGISTER_CONVENTION;
938}
939
f0bdd87d
YS
940static struct cmd_list_element *setmachinelist;
941
942static const char *
d93859e2 943h8300_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
944{
945 /* The register names change depending on which h8300 processor
1777feb0 946 type is selected. */
f0bdd87d
YS
947 static char *register_names[] = {
948 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
949 "sp", "", "pc", "cycles", "tick", "inst",
950 "ccr", /* pseudo register */
951 };
952 if (regno < 0
953 || regno >= (sizeof (register_names) / sizeof (*register_names)))
954 internal_error (__FILE__, __LINE__,
a73c6dcd
MS
955 _("h8300_register_name: illegal register number %d"),
956 regno);
f0bdd87d
YS
957 else
958 return register_names[regno];
959}
960
961static const char *
d93859e2 962h8300s_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
963{
964 static char *register_names[] = {
965 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
966 "sp", "", "pc", "cycles", "", "tick", "inst",
967 "mach", "macl",
968 "ccr", "exr" /* pseudo registers */
969 };
970 if (regno < 0
971 || regno >= (sizeof (register_names) / sizeof (*register_names)))
972 internal_error (__FILE__, __LINE__,
a73c6dcd 973 _("h8300s_register_name: illegal register number %d"),
f0bdd87d
YS
974 regno);
975 else
976 return register_names[regno];
977}
978
979static const char *
d93859e2 980h8300sx_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
981{
982 static char *register_names[] = {
983 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
984 "sp", "", "pc", "cycles", "", "tick", "inst",
985 "mach", "macl", "sbr", "vbr",
986 "ccr", "exr" /* pseudo registers */
987 };
988 if (regno < 0
989 || regno >= (sizeof (register_names) / sizeof (*register_names)))
990 internal_error (__FILE__, __LINE__,
a73c6dcd 991 _("h8300sx_register_name: illegal register number %d"),
f0bdd87d
YS
992 regno);
993 else
994 return register_names[regno];
995}
996
997static void
998h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
999 struct frame_info *frame, int regno)
1000{
1001 LONGEST rval;
1002 const char *name = gdbarch_register_name (gdbarch, regno);
1003
1004 if (!name || !*name)
1005 return;
1006
1007 rval = get_frame_register_signed (frame, regno);
1008
1009 fprintf_filtered (file, "%-14s ", name);
be8626e0
MD
1010 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
1011 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
f0bdd87d
YS
1012 {
1013 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1014 print_longest (file, 'u', 1, rval);
1015 }
1016 else
1017 {
be8626e0
MD
1018 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval,
1019 BINWORD (gdbarch)));
f0bdd87d
YS
1020 print_longest (file, 'd', 1, rval);
1021 }
be8626e0 1022 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d
YS
1023 {
1024 /* CCR register */
1025 int C, Z, N, V;
1026 unsigned char l = rval & 0xff;
1027 fprintf_filtered (file, "\t");
1028 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1029 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1030 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1031 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1032 N = (l & 0x8) != 0;
1033 Z = (l & 0x4) != 0;
1034 V = (l & 0x2) != 0;
1035 C = (l & 0x1) != 0;
1036 fprintf_filtered (file, "N-%d ", N);
1037 fprintf_filtered (file, "Z-%d ", Z);
1038 fprintf_filtered (file, "V-%d ", V);
1039 fprintf_filtered (file, "C-%d ", C);
1040 if ((C | Z) == 0)
1041 fprintf_filtered (file, "u> ");
1042 if ((C | Z) == 1)
1043 fprintf_filtered (file, "u<= ");
1044 if ((C == 0))
1045 fprintf_filtered (file, "u>= ");
1046 if (C == 1)
1047 fprintf_filtered (file, "u< ");
1048 if (Z == 0)
1049 fprintf_filtered (file, "!= ");
1050 if (Z == 1)
1051 fprintf_filtered (file, "== ");
1052 if ((N ^ V) == 0)
1053 fprintf_filtered (file, ">= ");
1054 if ((N ^ V) == 1)
1055 fprintf_filtered (file, "< ");
1056 if ((Z | (N ^ V)) == 0)
1057 fprintf_filtered (file, "> ");
1058 if ((Z | (N ^ V)) == 1)
1059 fprintf_filtered (file, "<= ");
1060 }
be8626e0 1061 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
f0bdd87d
YS
1062 {
1063 /* EXR register */
1064 unsigned char l = rval & 0xff;
1065 fprintf_filtered (file, "\t");
1066 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1067 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1068 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1069 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1070 }
1071 fprintf_filtered (file, "\n");
1072}
1073
1074static void
1075h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1076 struct frame_info *frame, int regno, int cpregs)
1077{
1078 if (regno < 0)
1079 {
1080 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1081 h8300_print_register (gdbarch, file, frame, regno);
be8626e0
MD
1082 h8300_print_register (gdbarch, file, frame,
1083 E_PSEUDO_CCR_REGNUM (gdbarch));
f0bdd87d 1084 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
ea78bae4 1085 if (is_h8300smode (gdbarch))
f0bdd87d 1086 {
be8626e0
MD
1087 h8300_print_register (gdbarch, file, frame,
1088 E_PSEUDO_EXR_REGNUM (gdbarch));
ea78bae4 1089 if (is_h8300sxmode (gdbarch))
f0bdd87d
YS
1090 {
1091 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1092 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1093 }
1094 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1095 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1096 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1097 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1098 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1099 }
1100 else
1101 {
1102 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1103 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1104 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1105 }
1106 }
1107 else
1108 {
1109 if (regno == E_CCR_REGNUM)
be8626e0
MD
1110 h8300_print_register (gdbarch, file, frame,
1111 E_PSEUDO_CCR_REGNUM (gdbarch));
1112 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
ea78bae4 1113 && is_h8300smode (gdbarch))
be8626e0
MD
1114 h8300_print_register (gdbarch, file, frame,
1115 E_PSEUDO_EXR_REGNUM (gdbarch));
f0bdd87d
YS
1116 else
1117 h8300_print_register (gdbarch, file, frame, regno);
1118 }
1119}
1120
1121static struct type *
1122h8300_register_type (struct gdbarch *gdbarch, int regno)
1123{
ea78bae4
UW
1124 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)
1125 + gdbarch_num_pseudo_regs (gdbarch))
f0bdd87d 1126 internal_error (__FILE__, __LINE__,
a73c6dcd
MS
1127 _("h8300_register_type: illegal register number %d"),
1128 regno);
f0bdd87d
YS
1129 else
1130 {
1131 switch (regno)
1132 {
1133 case E_PC_REGNUM:
0dfff4cb 1134 return builtin_type (gdbarch)->builtin_func_ptr;
f0bdd87d
YS
1135 case E_SP_REGNUM:
1136 case E_FP_REGNUM:
0dfff4cb 1137 return builtin_type (gdbarch)->builtin_data_ptr;
f0bdd87d 1138 default:
be8626e0 1139 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
df4df182 1140 return builtin_type (gdbarch)->builtin_uint8;
be8626e0 1141 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
df4df182 1142 return builtin_type (gdbarch)->builtin_uint8;
ea78bae4 1143 else if (is_h8300hmode (gdbarch))
df4df182 1144 return builtin_type (gdbarch)->builtin_int32;
f0bdd87d 1145 else
df4df182 1146 return builtin_type (gdbarch)->builtin_int16;
f0bdd87d
YS
1147 }
1148 }
1149}
1150
05d1431c 1151static enum register_status
f0bdd87d 1152h8300_pseudo_register_read (struct gdbarch *gdbarch,
5d0d05b6
CV
1153 struct regcache *regcache, int regno,
1154 gdb_byte *buf)
f0bdd87d 1155{
be8626e0 1156 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
05d1431c 1157 return regcache_raw_read (regcache, E_CCR_REGNUM, buf);
be8626e0 1158 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
05d1431c 1159 return regcache_raw_read (regcache, E_EXR_REGNUM, buf);
f0bdd87d 1160 else
05d1431c 1161 return regcache_raw_read (regcache, regno, buf);
f0bdd87d
YS
1162}
1163
1164static void
1165h8300_pseudo_register_write (struct gdbarch *gdbarch,
1166 struct regcache *regcache, int regno,
5d0d05b6 1167 const gdb_byte *buf)
f0bdd87d 1168{
be8626e0 1169 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1170 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
be8626e0 1171 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d
YS
1172 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1173 else
1174 regcache_raw_write (regcache, regno, buf);
1175}
1176
1177static int
d3f73121 1178h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1179{
1180 if (regno == E_CCR_REGNUM)
be8626e0 1181 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d
YS
1182 return regno;
1183}
1184
1185static int
d3f73121 1186h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1187{
1188 if (regno == E_CCR_REGNUM)
be8626e0 1189 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d 1190 if (regno == E_EXR_REGNUM)
be8626e0 1191 return E_PSEUDO_EXR_REGNUM (gdbarch);
f0bdd87d
YS
1192 return regno;
1193}
1194
f0bdd87d 1195const static unsigned char *
67d57894
MD
1196h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
1197 int *lenptr)
f0bdd87d
YS
1198{
1199 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1200 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1201
1202 *lenptr = sizeof (breakpoint);
1203 return breakpoint;
1204}
1205
f0bdd87d
YS
1206static void
1207h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1208 struct frame_info *frame, const char *args)
1209{
1210 fprintf_filtered (file, "\
1211No floating-point info available for this processor.\n");
1212}
1213
1214static struct gdbarch *
1215h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1216{
1217 struct gdbarch_tdep *tdep = NULL;
1218 struct gdbarch *gdbarch;
1219
1220 arches = gdbarch_list_lookup_by_info (arches, &info);
1221 if (arches != NULL)
1222 return arches->gdbarch;
1223
1224#if 0
1225 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1226#endif
1227
1228 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1229 return NULL;
1230
1231 gdbarch = gdbarch_alloc (&info, 0);
1232
1233 switch (info.bfd_arch_info->mach)
1234 {
1235 case bfd_mach_h8300:
1236 set_gdbarch_num_regs (gdbarch, 13);
1237 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1238 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1239 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1240 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1241 set_gdbarch_register_name (gdbarch, h8300_register_name);
1242 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1243 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
862ba188 1244 set_gdbarch_return_value (gdbarch, h8300_return_value);
f0bdd87d
YS
1245 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1246 break;
1247 case bfd_mach_h8300h:
1248 case bfd_mach_h8300hn:
1249 set_gdbarch_num_regs (gdbarch, 13);
1250 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1251 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1252 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1253 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1254 set_gdbarch_register_name (gdbarch, h8300_register_name);
1255 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1256 {
1257 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1258 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1259 }
1260 else
1261 {
1262 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1263 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1264 }
862ba188 1265 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1266 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1267 break;
1268 case bfd_mach_h8300s:
1269 case bfd_mach_h8300sn:
1270 set_gdbarch_num_regs (gdbarch, 16);
1271 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1272 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1273 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1274 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1275 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1276 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1277 {
1278 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1279 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1280 }
1281 else
1282 {
1283 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1284 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1285 }
862ba188 1286 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1287 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1288 break;
1289 case bfd_mach_h8300sx:
1290 case bfd_mach_h8300sxn:
1291 set_gdbarch_num_regs (gdbarch, 18);
1292 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1293 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1294 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1295 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1296 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1297 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1298 {
1299 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1300 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1301 }
1302 else
1303 {
1304 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1305 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1306 }
862ba188 1307 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1308 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1309 break;
1310 }
1311
1312 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1313 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1314
1315 /*
1316 * Basic register fields and methods.
1317 */
1318
1319 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
f0bdd87d
YS
1320 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1321 set_gdbarch_register_type (gdbarch, h8300_register_type);
1322 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1323 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1324
1325 /*
1326 * Frame Info
1327 */
1328 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1329
1330 /* Frame unwinder. */
f0bdd87d 1331 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
862ba188 1332 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
94afd7a6 1333 set_gdbarch_dummy_id (gdbarch, h8300_dummy_id);
862ba188 1334 frame_base_set_default (gdbarch, &h8300_frame_base);
f0bdd87d
YS
1335
1336 /*
1337 * Miscelany
1338 */
1777feb0 1339 /* Stack grows up. */
f0bdd87d
YS
1340 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1341
f0bdd87d 1342 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
f0bdd87d
YS
1343 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1344
862ba188 1345 set_gdbarch_char_signed (gdbarch, 0);
f0bdd87d
YS
1346 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1347 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1348 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1349 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
f92589cb 1350 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
f0bdd87d 1351 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
f92589cb 1352 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
f0bdd87d
YS
1353
1354 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1355
862ba188 1356 /* Hook in the DWARF CFI frame unwinder. */
94afd7a6
UW
1357 dwarf2_append_unwinders (gdbarch);
1358 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
f0bdd87d
YS
1359
1360 return gdbarch;
1361
1362}
1363
1777feb0 1364extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
f0bdd87d
YS
1365
1366void
1367_initialize_h8300_tdep (void)
1368{
1369 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1370}
1371
1372static int
1373is_h8300hmode (struct gdbarch *gdbarch)
1374{
1375 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1376 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1377 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1378 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1379 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1381}
1382
1383static int
1384is_h8300smode (struct gdbarch *gdbarch)
1385{
1386 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1387 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1388 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1389 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1390}
1391
1392static int
1393is_h8300sxmode (struct gdbarch *gdbarch)
1394{
1395 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1396 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1397}
1398
1399static int
1400is_h8300_normal_mode (struct gdbarch *gdbarch)
1401{
1402 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1403 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1404 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1405}
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