2002-09-18 Andrew Cagney <ac131313@redhat.com>
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
c906108c 1/* Target-machine dependent code for Hitachi H8/300, for GDB.
cda5a58a
AC
2
3 Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
4 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23/*
c5aa993b
JM
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
c906108c
SS
26 */
27
28#include "defs.h"
c906108c 29#include "value.h"
928e48af
CV
30#include "inferior.h"
31#include "symfile.h"
32#include "arch-utils.h"
4e052eda 33#include "regcache.h"
928e48af
CV
34#include "gdbcore.h"
35#include "objfiles.h"
36#include "gdbcmd.h"
c906108c 37
928e48af
CV
38/* Extra info which is saved in each frame_info. */
39struct frame_extra_info
40{
41 CORE_ADDR from_pc;
42 CORE_ADDR args_pointer;
43 CORE_ADDR locals_pointer;
44};
c906108c 45
928e48af
CV
46#define E_NUM_REGS (h8300smode ? 14 : 13)
47
48enum
49{
50 h8300_reg_size = 2,
51 h8300h_reg_size = 4,
52 h8300_max_reg_size = 4,
53};
54#define BINWORD (h8300hmode ? h8300h_reg_size : h8300_reg_size)
55
56enum gdb_regnum
57{
58 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
59 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM,
60 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
61 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
62 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
63 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
64 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
65 E_SP_REGNUM,
66 E_CCR_REGNUM,
67 E_PC_REGNUM,
68 E_CYCLES_REGNUM,
69 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
70 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
71 E_INSTS_REGNUM
72};
c906108c
SS
73
74#define UNSIGNED_SHORT(X) ((X) & 0xffff)
75
76#define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
77#define IS_PUSH_FP(x) (x == 0x6df6)
78#define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
79#define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
80#define IS_SUB2_SP(x) (x==0x1b87)
81#define IS_SUB4_SP(x) (x==0x1b97)
82#define IS_SUBL_SP(x) (x==0x7a37)
83#define IS_MOVK_R5(x) (x==0x7905)
84#define IS_SUB_R5SP(x) (x==0x1957)
85
928e48af
CV
86/* If the instruction at PC is an argument register spill, return its
87 length. Otherwise, return zero.
c906108c 88
928e48af
CV
89 An argument register spill is an instruction that moves an argument
90 from the register in which it was passed to the stack slot in which
91 it really lives. It is a byte, word, or longword move from an
92 argument register to a negative offset from the frame pointer. */
c906108c 93
928e48af
CV
94static int
95h8300_is_argument_spill (CORE_ADDR pc)
96{
97 int w = read_memory_unsigned_integer (pc, 2);
98
99 if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */
100 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
101 {
102 int w2 = read_memory_integer (pc + 2, 2);
103
104 /* ... and d:16 is negative. */
105 if (w2 < 0)
106 return 4;
107 }
108 else if (w == 0x7860)
109 {
110 int w2 = read_memory_integer (pc + 2, 2);
c906108c 111
928e48af
CV
112 if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */
113 {
114 LONGEST disp = read_memory_integer (pc + 4, 4);
c906108c 115
928e48af
CV
116 /* ... and d:24 is negative. */
117 if (disp < 0 && disp > 0xffffff)
118 return 8;
119 }
120 }
121 else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */
122 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
123 {
124 int w2 = read_memory_integer (pc + 2, 2);
c906108c 125
928e48af
CV
126 /* ... and d:16 is negative. */
127 if (w2 < 0)
128 return 4;
129 }
130 else if (w == 0x78e0)
131 {
132 int w2 = read_memory_integer (pc + 2, 2);
c906108c 133
928e48af
CV
134 if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */
135 {
136 LONGEST disp = read_memory_integer (pc + 4, 4);
137
138 /* ... and d:24 is negative. */
139 if (disp < 0 && disp > 0xffffff)
140 return 8;
141 }
142 }
143 else if (w == 0x0100)
144 {
145 int w2 = read_memory_integer (pc + 2, 2);
146
147 if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */
148 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
149 {
150 int w3 = read_memory_integer (pc + 4, 2);
151
152 /* ... and d:16 is negative. */
153 if (w3 < 0)
154 return 6;
155 }
156 else if (w2 == 0x78e0)
157 {
158 int w3 = read_memory_integer (pc + 4, 2);
159
160 if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */
161 {
162 LONGEST disp = read_memory_integer (pc + 6, 4);
163
164 /* ... and d:24 is negative. */
165 if (disp < 0 && disp > 0xffffff)
166 return 10;
167 }
168 }
169 }
170
171 return 0;
172}
173
174static CORE_ADDR
fba45db2 175h8300_skip_prologue (CORE_ADDR start_pc)
c906108c
SS
176{
177 short int w;
178 int adjust = 0;
179
180 /* Skip past all push and stm insns. */
181 while (1)
182 {
183 w = read_memory_unsigned_integer (start_pc, 2);
184 /* First look for push insns. */
185 if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
186 {
187 w = read_memory_unsigned_integer (start_pc + 2, 2);
188 adjust = 2;
189 }
190
191 if (IS_PUSH (w))
192 {
193 start_pc += 2 + adjust;
194 w = read_memory_unsigned_integer (start_pc, 2);
195 continue;
196 }
197 adjust = 0;
198 break;
199 }
200
201 /* Skip past a move to FP, either word or long sized */
202 w = read_memory_unsigned_integer (start_pc, 2);
203 if (w == 0x0100)
204 {
205 w = read_memory_unsigned_integer (start_pc + 2, 2);
206 adjust += 2;
207 }
208
209 if (IS_MOVE_FP (w))
210 {
211 start_pc += 2 + adjust;
212 w = read_memory_unsigned_integer (start_pc, 2);
213 }
214
215 /* Check for loading either a word constant into r5;
216 long versions are handled by the SUBL_SP below. */
217 if (IS_MOVK_R5 (w))
218 {
219 start_pc += 2;
220 w = read_memory_unsigned_integer (start_pc, 2);
221 }
222
223 /* Now check for subtracting r5 from sp, word sized only. */
224 if (IS_SUB_R5SP (w))
225 {
226 start_pc += 2 + adjust;
227 w = read_memory_unsigned_integer (start_pc, 2);
228 }
229
230 /* Check for subs #2 and subs #4. */
231 while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
232 {
233 start_pc += 2 + adjust;
234 w = read_memory_unsigned_integer (start_pc, 2);
235 }
236
237 /* Check for a 32bit subtract. */
238 if (IS_SUBL_SP (w))
239 start_pc += 6 + adjust;
240
928e48af
CV
241 /* Check for spilling an argument register to the stack frame.
242 This could also be an initializing store from non-prologue code,
243 but I don't think there's any harm in skipping that. */
244 for (;;)
245 {
246 int spill_size = h8300_is_argument_spill (start_pc);
247 if (spill_size == 0)
248 break;
249 start_pc += spill_size;
250 }
251
c906108c
SS
252 return start_pc;
253}
254
928e48af 255static int
7e78f0ca 256gdb_print_insn_h8300 (bfd_vma memaddr, disassemble_info * info)
c906108c
SS
257{
258 if (h8300smode)
259 return print_insn_h8300s (memaddr, info);
260 else if (h8300hmode)
261 return print_insn_h8300h (memaddr, info);
262 else
263 return print_insn_h8300 (memaddr, info);
264}
265
c906108c
SS
266/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
267 is not the address of a valid instruction, the address of the next
268 instruction beyond ADDR otherwise. *PWORD1 receives the first word
c5aa993b 269 of the instruction. */
c906108c 270
928e48af 271static CORE_ADDR
d1a8e808 272h8300_next_prologue_insn (CORE_ADDR addr, CORE_ADDR lim, unsigned short* pword1)
c906108c
SS
273{
274 char buf[2];
275 if (addr < lim + 8)
276 {
277 read_memory (addr, buf, 2);
278 *pword1 = extract_signed_integer (buf, 2);
279
280 return addr + 2;
281 }
282 return 0;
283}
284
285/* Examine the prologue of a function. `ip' points to the first instruction.
286 `limit' is the limit of the prologue (e.g. the addr of the first
287 linenumber, or perhaps the program counter if we're stepping through).
288 `frame_sp' is the stack pointer value in use in this frame.
289 `fsr' is a pointer to a frame_saved_regs structure into which we put
290 info about the registers saved by this frame.
291 `fi' is a struct frame_info pointer; we fill in various fields in it
292 to reflect the offsets of the arg pointer and the locals pointer. */
293
928e48af
CV
294/* Any function with a frame looks like this
295 SECOND ARG
296 FIRST ARG
297 RET PC
298 SAVED R2
299 SAVED R3
300 SAVED FP <-FP POINTS HERE
301 LOCALS0
302 LOCALS1 <-SP POINTS HERE
303 */
304
c906108c 305static CORE_ADDR
928e48af
CV
306h8300_examine_prologue (register CORE_ADDR ip, register CORE_ADDR limit,
307 CORE_ADDR after_prolog_fp, CORE_ADDR *fsr,
308 struct frame_info *fi)
c906108c
SS
309{
310 register CORE_ADDR next_ip;
311 int r;
312 int have_fp = 0;
928e48af 313 unsigned short insn_word;
c906108c
SS
314 /* Number of things pushed onto stack, starts at 2/4, 'cause the
315 PC is already there */
928e48af 316 unsigned int reg_save_depth = BINWORD;
c906108c
SS
317
318 unsigned int auto_depth = 0; /* Number of bytes of autos */
319
320 char in_frame[11]; /* One for each reg */
321
322 int adjust = 0;
323
324 memset (in_frame, 1, 11);
325 for (r = 0; r < 8; r++)
326 {
928e48af 327 fsr[r] = 0;
c906108c
SS
328 }
329 if (after_prolog_fp == 0)
330 {
928e48af 331 after_prolog_fp = read_register (E_SP_REGNUM);
c906108c
SS
332 }
333
334 /* If the PC isn't valid, quit now. */
335 if (ip == 0 || ip & (h8300hmode ? ~0xffffff : ~0xffff))
336 return 0;
337
d1a8e808 338 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
339
340 if (insn_word == 0x0100)
341 {
342 insn_word = read_memory_unsigned_integer (ip + 2, 2);
343 adjust = 2;
344 }
345
346 /* Skip over any fp push instructions */
928e48af 347 fsr[E_FP_REGNUM] = after_prolog_fp;
c906108c
SS
348 while (next_ip && IS_PUSH_FP (insn_word))
349 {
350 ip = next_ip + adjust;
351
352 in_frame[insn_word & 0x7] = reg_save_depth;
d1a8e808 353 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
354 reg_save_depth += 2 + adjust;
355 }
356
357 /* Is this a move into the fp */
358 if (next_ip && IS_MOV_SP_FP (insn_word))
359 {
360 ip = next_ip;
d1a8e808 361 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
362 have_fp = 1;
363 }
364
365 /* Skip over any stack adjustment, happens either with a number of
366 sub#2,sp or a mov #x,r5 sub r5,sp */
367
368 if (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
369 {
370 while (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
371 {
372 auto_depth += IS_SUB2_SP (insn_word) ? 2 : 4;
373 ip = next_ip;
d1a8e808 374 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
375 }
376 }
377 else
378 {
379 if (next_ip && IS_MOVK_R5 (insn_word))
380 {
381 ip = next_ip;
d1a8e808 382 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
383 auto_depth += insn_word;
384
d1a8e808 385 next_ip = h8300_next_prologue_insn (next_ip, limit, &insn_word);
c906108c
SS
386 auto_depth += insn_word;
387 }
388 if (next_ip && IS_SUBL_SP (insn_word))
389 {
390 ip = next_ip;
391 auto_depth += read_memory_unsigned_integer (ip, 4);
392 ip += 4;
393
d1a8e808 394 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
395 }
396 }
397
398 /* Now examine the push insns to determine where everything lives
399 on the stack. */
400 while (1)
401 {
402 adjust = 0;
403 if (!next_ip)
404 break;
405
406 if (insn_word == 0x0100)
407 {
408 ip = next_ip;
d1a8e808 409 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
410 adjust = 2;
411 }
412
413 if (IS_PUSH (insn_word))
414 {
415 ip = next_ip;
d1a8e808 416 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
928e48af 417 fsr[r] = after_prolog_fp + auto_depth;
c906108c
SS
418 auto_depth += 2 + adjust;
419 continue;
420 }
421
422 /* Now check for push multiple insns. */
423 if (insn_word == 0x0110 || insn_word == 0x0120 || insn_word == 0x0130)
424 {
425 int count = ((insn_word >> 4) & 0xf) + 1;
426 int start, i;
427
428 ip = next_ip;
d1a8e808 429 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
430 start = insn_word & 0x7;
431
432 for (i = start; i <= start + count; i++)
433 {
928e48af 434 fsr[i] = after_prolog_fp + auto_depth;
c906108c
SS
435 auto_depth += 4;
436 }
437 }
438 break;
439 }
440
441 /* The args are always reffed based from the stack pointer */
928e48af 442 fi->extra_info->args_pointer = after_prolog_fp;
c906108c 443 /* Locals are always reffed based from the fp */
928e48af 444 fi->extra_info->locals_pointer = after_prolog_fp;
c906108c 445 /* The PC is at a known place */
928e48af 446 fi->extra_info->from_pc =
7e78f0ca 447 read_memory_unsigned_integer (after_prolog_fp + BINWORD, BINWORD);
c906108c
SS
448
449 /* Rememeber any others too */
928e48af 450 in_frame[E_PC_REGNUM] = 0;
c5aa993b 451
c906108c
SS
452 if (have_fp)
453 /* We keep the old FP in the SP spot */
928e48af 454 fsr[E_SP_REGNUM] = read_memory_unsigned_integer (fsr[E_FP_REGNUM], BINWORD);
c906108c 455 else
928e48af 456 fsr[E_SP_REGNUM] = after_prolog_fp + auto_depth;
c906108c
SS
457
458 return (ip);
459}
460
928e48af
CV
461static void
462h8300_frame_init_saved_regs (struct frame_info *fi)
c906108c 463{
928e48af
CV
464 CORE_ADDR func_addr, func_end;
465
466 if (!fi->saved_regs)
467 {
468 frame_saved_regs_zalloc (fi);
469
470 /* Find the beginning of this function, so we can analyze its
471 prologue. */
472 if (find_pc_partial_function (fi->pc, NULL, &func_addr, &func_end))
473 {
474 struct symtab_and_line sal = find_pc_line (func_addr, 0);
475 CORE_ADDR limit = (sal.end && sal.end < fi->pc) ? sal.end : fi->pc;
476 /* This will fill in fields in fi. */
477 h8300_examine_prologue (func_addr, limit, fi->frame, fi->saved_regs, fi);
478 }
479 /* Else we're out of luck (can't debug completely stripped code).
480 FIXME. */
481 }
482}
483
484/* Given a GDB frame, determine the address of the calling function's frame.
485 This will be used to create a new GDB frame struct, and then
486 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
487
488 For us, the frame address is its stack pointer value, so we look up
489 the function prologue to determine the caller's sp value, and return it. */
490
491static CORE_ADDR
492h8300_frame_chain (struct frame_info *thisframe)
493{
494 if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
495 { /* initialize the from_pc now */
135c175f
AC
496 thisframe->extra_info->from_pc =
497 deprecated_read_register_dummy (thisframe->pc, thisframe->frame,
498 E_PC_REGNUM);
928e48af 499 return thisframe->frame;
c906108c 500 }
928e48af 501 return thisframe->saved_regs[E_SP_REGNUM];
c906108c
SS
502}
503
504/* Return the saved PC from this frame.
505
506 If the frame has a memory copy of SRP_REGNUM, use that. If not,
507 just use the register SRP_REGNUM itself. */
508
928e48af 509static CORE_ADDR
fba45db2 510h8300_frame_saved_pc (struct frame_info *frame)
c906108c 511{
c5aa993b 512 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
135c175f
AC
513 return deprecated_read_register_dummy (frame->pc, frame->frame,
514 E_PC_REGNUM);
c906108c 515 else
928e48af 516 return frame->extra_info->from_pc;
c906108c
SS
517}
518
928e48af
CV
519static void
520h8300_init_extra_frame_info (int fromleaf, struct frame_info *fi)
521{
522 if (!fi->extra_info)
523 {
524 fi->extra_info = (struct frame_extra_info *)
525 frame_obstack_alloc (sizeof (struct frame_extra_info));
526 fi->extra_info->from_pc = 0;
527 fi->extra_info->args_pointer = 0; /* Unknown */
528 fi->extra_info->locals_pointer = 0; /* Unknown */
529
530 if (!fi->pc)
531 {
532 if (fi->next)
533 fi->pc = h8300_frame_saved_pc (fi->next);
534 }
535 h8300_frame_init_saved_regs (fi);
536 }
537}
538
539static CORE_ADDR
7256e1a5 540h8300_frame_locals_address (struct frame_info *fi)
c906108c 541{
c5aa993b 542 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
c906108c 543 return (CORE_ADDR) 0; /* Not sure what else to do... */
928e48af 544 return fi->extra_info->locals_pointer;
c906108c
SS
545}
546
547/* Return the address of the argument block for the frame
548 described by FI. Returns 0 if the address is unknown. */
549
928e48af 550static CORE_ADDR
7256e1a5 551h8300_frame_args_address (struct frame_info *fi)
c906108c 552{
c5aa993b 553 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
c906108c 554 return (CORE_ADDR) 0; /* Not sure what else to do... */
928e48af 555 return fi->extra_info->args_pointer;
c906108c
SS
556}
557
928e48af
CV
558/* Round N up or down to the nearest multiple of UNIT.
559 Evaluate N only once, UNIT several times.
560 UNIT must be a power of two. */
561#define round_up(n, unit) (((n) + (unit) - 1) & -(unit))
562#define round_down(n, unit) ((n) & -(unit))
563
c906108c
SS
564/* Function: push_arguments
565 Setup the function arguments for calling a function in the inferior.
928e48af
CV
566 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
567 on the H8/300H.
568
569 There are actually two ABI's here: -mquickcall (the default) and
570 -mno-quickcall. With -mno-quickcall, all arguments are passed on
571 the stack after the return address, word-aligned. With
572 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
573 GCC doesn't indicate in the object file which ABI was used to
574 compile it, GDB only supports the default --- -mquickcall.
575
576 Here are the rules for -mquickcall, in detail:
577
578 Each argument, whether scalar or aggregate, is padded to occupy a
579 whole number of words. Arguments smaller than a word are padded at
580 the most significant end; those larger than a word are padded at
581 the least significant end.
582
583 The initial arguments are passed in r0 -- r2. Earlier arguments go in
584 lower-numbered registers. Multi-word arguments are passed in
585 consecutive registers, with the most significant end in the
586 lower-numbered register.
587
588 If an argument doesn't fit entirely in the remaining registers, it
589 is passed entirely on the stack. Stack arguments begin just after
590 the return address. Once an argument has overflowed onto the stack
591 this way, all subsequent arguments are passed on the stack.
592
593 The above rule has odd consequences. For example, on the h8/300s,
594 if a function takes two longs and an int as arguments:
595 - the first long will be passed in r0/r1,
596 - the second long will be passed entirely on the stack, since it
597 doesn't fit in r2,
598 - and the int will be passed on the stack, even though it could fit
599 in r2.
600
601 A weird exception: if an argument is larger than a word, but not a
602 whole number of words in length (before padding), it is passed on
603 the stack following the rules for stack arguments above, even if
604 there are sufficient registers available to hold it. Stranger
605 still, the argument registers are still `used up' --- even though
606 there's nothing in them.
607
608 So, for example, on the h8/300s, if a function expects a three-byte
609 structure and an int, the structure will go on the stack, and the
610 int will go in r2, not r0.
611
612 If the function returns an aggregate type (struct, union, or class)
613 by value, the caller must allocate space to hold the return value,
614 and pass the callee a pointer to this space as an invisible first
615 argument, in R0.
616
617 For varargs functions, the last fixed argument and all the variable
618 arguments are always passed on the stack. This means that calls to
619 varargs functions don't work properly unless there is a prototype
620 in scope.
621
622 Basically, this ABI is not good, for the following reasons:
623 - You can't call vararg functions properly unless a prototype is in scope.
624 - Structure passing is inconsistent, to no purpose I can see.
625 - It often wastes argument registers, of which there are only three
626 to begin with. */
c906108c 627
928e48af 628static CORE_ADDR
fba45db2 629h8300_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
928e48af 630 int struct_return, CORE_ADDR struct_addr)
c906108c
SS
631{
632 int stack_align, stack_alloc, stack_offset;
928e48af
CV
633 int wordsize = BINWORD;
634 int reg;
635 int argument;
636
637 /* First, make sure the stack is properly aligned. */
638 sp = round_down (sp, wordsize);
639
640 /* Now make sure there's space on the stack for the arguments. We
641 may over-allocate a little here, but that won't hurt anything. */
642 stack_alloc = 0;
643 for (argument = 0; argument < nargs; argument++)
644 stack_alloc += round_up (TYPE_LENGTH (VALUE_TYPE (args[argument])),
645 wordsize);
646 sp -= stack_alloc;
647
648 /* Now load as many arguments as possible into registers, and push
649 the rest onto the stack. */
650 reg = E_ARG0_REGNUM;
651 stack_offset = 0;
652
653 /* If we're returning a structure by value, then we must pass a
654 pointer to the buffer for the return value as an invisible first
655 argument. */
656 if (struct_return)
657 write_register (reg++, struct_addr);
658
659 for (argument = 0; argument < nargs; argument++)
c906108c 660 {
928e48af
CV
661 struct type *type = VALUE_TYPE (args[argument]);
662 int len = TYPE_LENGTH (type);
663 char *contents = (char *) VALUE_CONTENTS (args[argument]);
664
665 /* Pad the argument appropriately. */
666 int padded_len = round_up (len, wordsize);
667 char *padded = alloca (padded_len);
668
669 memset (padded, 0, padded_len);
670 memcpy (len < wordsize ? padded + padded_len - len : padded,
671 contents, len);
672
673 /* Could the argument fit in the remaining registers? */
674 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
675 {
676 /* Are we going to pass it on the stack anyway, for no good
677 reason? */
678 if (len > wordsize && len % wordsize)
679 {
680 /* I feel so unclean. */
681 write_memory (sp + stack_offset, padded, padded_len);
682 stack_offset += padded_len;
683
684 /* That's right --- even though we passed the argument
685 on the stack, we consume the registers anyway! Love
686 me, love my dog. */
687 reg += padded_len / wordsize;
688 }
689 else
690 {
691 /* Heavens to Betsy --- it's really going in registers!
692 It would be nice if we could use write_register_bytes
693 here, but on the h8/300s, there are gaps between
694 the registers in the register file. */
695 int offset;
696
697 for (offset = 0; offset < padded_len; offset += wordsize)
698 {
699 ULONGEST word = extract_address (padded + offset, wordsize);
700 write_register (reg++, word);
701 }
702 }
703 }
c906108c 704 else
928e48af
CV
705 {
706 /* It doesn't fit in registers! Onto the stack it goes. */
707 write_memory (sp + stack_offset, padded, padded_len);
708 stack_offset += padded_len;
709
710 /* Once one argument has spilled onto the stack, all
711 subsequent arguments go on the stack. */
712 reg = E_ARGLAST_REGNUM + 1;
713 }
c906108c 714 }
928e48af 715
c906108c
SS
716 return sp;
717}
718
719/* Function: push_return_address
720 Setup the return address for a dummy frame, as called by
721 call_function_by_hand. Only necessary when you are using an
722 empty CALL_DUMMY, ie. the target will not actually be executing
723 a JSR/BSR instruction. */
724
928e48af 725static CORE_ADDR
fba45db2 726h8300_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c
SS
727{
728 unsigned char buf[4];
928e48af 729 int wordsize = BINWORD;
c906108c
SS
730
731 sp -= wordsize;
732 store_unsigned_integer (buf, wordsize, CALL_DUMMY_ADDRESS ());
733 write_memory (sp, buf, wordsize);
734 return sp;
735}
736
7256e1a5 737/* Function: h8300_pop_frame
c906108c
SS
738 Restore the machine to the state it had before the current frame
739 was created. Usually used either by the "RETURN" command, or by
740 call_function_by_hand after the dummy_frame is finished. */
741
928e48af 742static void
fba45db2 743h8300_pop_frame (void)
c906108c 744{
928e48af 745 unsigned regno;
c906108c
SS
746 struct frame_info *frame = get_current_frame ();
747
c5aa993b 748 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
c906108c 749 {
c5aa993b 750 generic_pop_dummy_frame ();
c906108c
SS
751 }
752 else
753 {
928e48af 754 for (regno = 0; regno < 8; regno++)
c906108c 755 {
928e48af 756 /* Don't forget E_SP_REGNUM is a frame_saved_regs struct is the
c906108c 757 actual value we want, not the address of the value we want. */
928e48af
CV
758 if (frame->saved_regs[regno] && regno != E_SP_REGNUM)
759 write_register (regno,
760 read_memory_integer (frame->saved_regs[regno],
761 BINWORD));
762 else if (frame->saved_regs[regno] && regno == E_SP_REGNUM)
763 write_register (regno, frame->frame + 2 * BINWORD);
c906108c
SS
764 }
765
928e48af
CV
766 /* Don't forget to update the PC too! */
767 write_register (E_PC_REGNUM, frame->extra_info->from_pc);
c906108c
SS
768 }
769 flush_cached_frames ();
770}
771
772/* Function: extract_return_value
773 Figure out where in REGBUF the called function has left its return value.
774 Copy that into VALBUF. Be sure to account for CPU type. */
775
928e48af 776static void
fba45db2 777h8300_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 778{
928e48af
CV
779 int wordsize = BINWORD;
780 int len = TYPE_LENGTH (type);
c5aa993b
JM
781
782 switch (len)
783 {
784 case 1: /* (char) */
785 case 2: /* (short), (int) */
786 memcpy (valbuf, regbuf + REGISTER_BYTE (0) + (wordsize - len), len);
787 break;
788 case 4: /* (long), (float) */
928e48af 789 if (wordsize == 4)
c5aa993b
JM
790 {
791 memcpy (valbuf, regbuf + REGISTER_BYTE (0), 4);
792 }
793 else
794 {
795 memcpy (valbuf, regbuf + REGISTER_BYTE (0), 2);
796 memcpy (valbuf + 2, regbuf + REGISTER_BYTE (1), 2);
797 }
798 break;
799 case 8: /* (double) (doesn't seem to happen, which is good,
800 because this almost certainly isn't right. */
801 error ("I don't know how a double is returned.");
802 break;
803 }
c906108c
SS
804}
805
806/* Function: store_return_value
807 Place the appropriate value in the appropriate registers.
808 Primarily used by the RETURN command. */
809
928e48af 810static void
fba45db2 811h8300_store_return_value (struct type *type, char *valbuf)
c906108c 812{
928e48af
CV
813 int regval;
814 int wordsize = BINWORD;
815 int len = TYPE_LENGTH (type);
c906108c 816
c5aa993b
JM
817 switch (len)
818 {
819 case 1: /* char */
820 case 2: /* short, int */
821 regval = extract_address (valbuf, len);
822 write_register (0, regval);
823 break;
824 case 4: /* long, float */
825 regval = extract_address (valbuf, len);
928e48af 826 if (wordsize == 4)
c5aa993b
JM
827 {
828 write_register (0, regval);
829 }
830 else
831 {
832 write_register (0, regval >> 16);
833 write_register (1, regval & 0xffff);
834 }
835 break;
836 case 8: /* presumeably double, but doesn't seem to happen */
837 error ("I don't know how to return a double.");
838 break;
839 }
c906108c
SS
840}
841
928e48af 842static struct cmd_list_element *setmachinelist;
c906108c 843
928e48af
CV
844static const char *
845h8300_register_name (int regno)
c906108c 846{
928e48af
CV
847 /* The register names change depending on whether the h8300h processor
848 type is selected. */
849 static char *h8300_register_names[] = {
850 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
851 "sp", "ccr","pc","cycles", "tick", "inst", ""
852 };
853 static char *h8300s_register_names[] = {
854 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
855 "sp", "ccr", "pc", "cycles", "exr", "tick", "inst"
856 };
857 char **register_names =
858 h8300smode ? h8300s_register_names : h8300_register_names;
859 if (regno < 0 || regno >= E_NUM_REGS)
860 internal_error (__FILE__, __LINE__,
861 "h8300_register_name: illegal register number %d", regno);
c906108c 862 else
928e48af 863 return register_names[regno];
c906108c
SS
864}
865
866static void
928e48af 867h8300_print_register (int regno)
c906108c 868{
928e48af
CV
869 long val = read_register (regno);
870 const char *name = h8300_register_name (regno);
c906108c 871
928e48af
CV
872 if (!name || !*name)
873 return;
c906108c 874
928e48af
CV
875 printf_filtered ("%-14s ", name);
876 if (h8300hmode)
c906108c 877 {
928e48af
CV
878 if (val)
879 printf_filtered ("0x%08lx %-8ld", val, val);
880 else
881 printf_filtered ("0x%-8lx %-8ld", val, val);
c906108c
SS
882 }
883 else
884 {
928e48af
CV
885 if (val)
886 printf_filtered ("0x%04lx %-4ld", val, val);
887 else
888 printf_filtered ("0x%-4lx %-4ld", val, val);
c906108c 889 }
928e48af 890 if (regno == E_CCR_REGNUM)
c906108c
SS
891 {
892 /* CCR register */
893 int C, Z, N, V;
928e48af 894 unsigned char b[h8300h_reg_size];
c906108c 895 unsigned char l;
cda5a58a 896 frame_register_read (selected_frame, regno, b);
928e48af 897 l = b[REGISTER_VIRTUAL_SIZE (E_CCR_REGNUM) - 1];
c906108c 898 printf_unfiltered ("\t");
906709f4
AV
899 printf_unfiltered ("I-%d ", (l & 0x80) != 0);
900 printf_unfiltered ("UI-%d ", (l & 0x40) != 0);
901 printf_unfiltered ("H-%d ", (l & 0x20) != 0);
902 printf_unfiltered ("U-%d ", (l & 0x10) != 0);
c906108c
SS
903 N = (l & 0x8) != 0;
904 Z = (l & 0x4) != 0;
905 V = (l & 0x2) != 0;
906 C = (l & 0x1) != 0;
907 printf_unfiltered ("N-%d ", N);
908 printf_unfiltered ("Z-%d ", Z);
909 printf_unfiltered ("V-%d ", V);
910 printf_unfiltered ("C-%d ", C);
911 if ((C | Z) == 0)
912 printf_unfiltered ("u> ");
913 if ((C | Z) == 1)
914 printf_unfiltered ("u<= ");
915 if ((C == 0))
916 printf_unfiltered ("u>= ");
917 if (C == 1)
918 printf_unfiltered ("u< ");
919 if (Z == 0)
920 printf_unfiltered ("!= ");
921 if (Z == 1)
922 printf_unfiltered ("== ");
923 if ((N ^ V) == 0)
924 printf_unfiltered (">= ");
925 if ((N ^ V) == 1)
926 printf_unfiltered ("< ");
927 if ((Z | (N ^ V)) == 0)
928 printf_unfiltered ("> ");
929 if ((Z | (N ^ V)) == 1)
930 printf_unfiltered ("<= ");
931 }
928e48af 932 else if (regno == E_EXR_REGNUM && h8300smode)
fc974602
AV
933 {
934 /* EXR register */
928e48af 935 unsigned char b[h8300h_reg_size];
fc974602 936 unsigned char l;
40cd92ad 937 frame_register_read (selected_frame, regno, b);
928e48af 938 l = b[REGISTER_VIRTUAL_SIZE (E_EXR_REGNUM) - 1];
fc974602 939 printf_unfiltered ("\t");
d194345b 940 printf_unfiltered ("T-%d - - - ", (l & 0x80) != 0);
fc974602
AV
941 printf_unfiltered ("I2-%d ", (l & 4) != 0);
942 printf_unfiltered ("I1-%d ", (l & 2) != 0);
943 printf_unfiltered ("I0-%d", (l & 1) != 0);
d194345b 944 }
928e48af
CV
945 printf_filtered ("\n");
946}
947
948static void
949h8300_do_registers_info (int regno, int cpregs)
950{
951 if (regno < 0)
952 for (regno = 0; regno < E_NUM_REGS; ++regno)
953 h8300_print_register (regno);
954 else
955 h8300_print_register (regno);
956}
957
958static CORE_ADDR
959h8300_saved_pc_after_call (struct frame_info *ignore)
960{
961 return read_memory_unsigned_integer (read_register (E_SP_REGNUM), BINWORD);
962}
963
964static int
965h8300_register_byte (int regno)
966{
967 if (regno < 0 || regno >= E_NUM_REGS)
968 internal_error (__FILE__, __LINE__,
969 "h8300_register_byte: illegal register number %d", regno);
970 else
971 return regno * BINWORD;
972}
973
974static int
975h8300_register_raw_size (int regno)
976{
977 if (regno < 0 || regno >= E_NUM_REGS)
978 internal_error (__FILE__, __LINE__,
979 "h8300_register_raw_size: illegal register number %d",
980 regno);
981 else
982 return BINWORD;
983}
984
985static struct type *
986h8300_register_virtual_type (int regno)
987{
988 if (regno < 0 || regno >= E_NUM_REGS)
989 internal_error (__FILE__, __LINE__,
990 "h8300_register_virtual_type: illegal register number %d",
991 regno);
992 else
993 return h8300hmode ?
994 builtin_type_unsigned_long : builtin_type_unsigned_short;
995}
996
997static void
998h8300_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
999{
1000 write_register (0, addr);
1001}
1002
1003static int
1004h8300_use_struct_convention (int gcc_p, struct type *type)
1005{
1006 return 1;
1007}
1008
1009static CORE_ADDR
1010h8300_extract_struct_value_address (char *regbuf)
1011{
1012 return extract_address (regbuf + h8300_register_byte (E_ARG0_REGNUM),
1013 h8300_register_raw_size (E_ARG0_REGNUM));
1014}
1015
1016const static unsigned char *
1017h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1018{
1019 /*static unsigned char breakpoint[] = { 0x7A, 0xFF };*/ /* ??? */
1020 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1021
1022 *lenptr = sizeof (breakpoint);
1023 return breakpoint;
1024}
1025
1026static void
1027h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1028 struct frame_info *frame, const char *args)
1029{
1030 fprintf_filtered (file, "\
1031No floating-point info available for this processor.\n");
1032}
1033
1034static struct gdbarch *
1035h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1036{
1037 static LONGEST call_dummy_words[1] = { 0 };
1038 struct gdbarch_tdep *tdep = NULL;
1039 struct gdbarch *gdbarch;
1040
1041 arches = gdbarch_list_lookup_by_info (arches, &info);
1042 if (arches != NULL)
1043 return arches->gdbarch;
1044
1045#if 0
1046 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1047#endif
1048
1049 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1050 return NULL;
1051
1052 switch (info.bfd_arch_info->mach)
1053 {
1054 case bfd_mach_h8300:
1055 h8300smode = 0;
1056 h8300hmode = 0;
1057 break;
1058 case bfd_mach_h8300h:
1059 h8300smode = 0;
1060 h8300hmode = 1;
1061 break;
1062 case bfd_mach_h8300s:
1063 h8300smode = 1;
1064 h8300hmode = 1;
1065 break;
1066 }
1067
1068 gdbarch = gdbarch_alloc (&info, 0);
1069
1070 /*
1071 * Basic register fields and methods.
1072 */
1073
1074 set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
1075 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1076 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1077 set_gdbarch_fp_regnum (gdbarch, E_FP_REGNUM);
1078 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1079 set_gdbarch_register_name (gdbarch, h8300_register_name);
1080 set_gdbarch_register_size (gdbarch, BINWORD);
1081 set_gdbarch_register_bytes (gdbarch, E_NUM_REGS * BINWORD);
1082 set_gdbarch_register_byte (gdbarch, h8300_register_byte);
1083 set_gdbarch_register_raw_size (gdbarch, h8300_register_raw_size);
1084 set_gdbarch_max_register_raw_size (gdbarch, h8300h_reg_size);
1085 set_gdbarch_register_virtual_size (gdbarch, h8300_register_raw_size);
1086 set_gdbarch_max_register_virtual_size (gdbarch, h8300h_reg_size);
1087 set_gdbarch_register_virtual_type (gdbarch, h8300_register_virtual_type);
1088 set_gdbarch_do_registers_info (gdbarch, h8300_do_registers_info);
1089 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1090
1091 /*
1092 * Frame Info
1093 */
1094 set_gdbarch_init_extra_frame_info (gdbarch, h8300_init_extra_frame_info);
1095 set_gdbarch_frame_init_saved_regs (gdbarch, h8300_frame_init_saved_regs);
1096 set_gdbarch_frame_chain (gdbarch, h8300_frame_chain);
1097 set_gdbarch_get_saved_register (gdbarch, generic_unwind_get_saved_register);
1098 set_gdbarch_saved_pc_after_call (gdbarch, h8300_saved_pc_after_call);
1099 set_gdbarch_frame_saved_pc (gdbarch, h8300_frame_saved_pc);
1100 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1101 set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
1102 set_gdbarch_frame_args_address (gdbarch, h8300_frame_args_address);
1103 set_gdbarch_frame_locals_address (gdbarch, h8300_frame_locals_address);
1104
1105 /*
1106 * Miscelany
1107 */
1108 /* Stack grows up. */
1109 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1110 /* PC stops zero byte after a trap instruction
1111 (which means: exactly on trap instruction). */
1112 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1113 /* This value is almost never non-zero... */
1114 set_gdbarch_function_start_offset (gdbarch, 0);
1115 /* This value is almost never non-zero... */
1116 set_gdbarch_frame_args_skip (gdbarch, 0);
1117 /* OK to default this value to 'unknown'. */
1118 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1119 set_gdbarch_frameless_function_invocation (gdbarch,
1120 frameless_look_for_prologue);
1121
1122 /* W/o prototype, coerce float args to double. */
5247b418 1123 /* set_gdbarch_coerce_float_to_double (gdbarch, standard_coerce_float_to_double); */
928e48af
CV
1124
1125 /*
1126 * Call Dummies
1127 *
1128 * These values and methods are used when gdb calls a target function. */
1129 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1130 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1131 set_gdbarch_push_return_address (gdbarch, h8300_push_return_address);
1132 set_gdbarch_deprecated_extract_return_value (gdbarch, h8300_extract_return_value);
1133 set_gdbarch_push_arguments (gdbarch, h8300_push_arguments);
1134 set_gdbarch_pop_frame (gdbarch, h8300_pop_frame);
1135 set_gdbarch_store_struct_return (gdbarch, h8300_store_struct_return);
1136 set_gdbarch_deprecated_store_return_value (gdbarch, h8300_store_return_value);
1137 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, h8300_extract_struct_value_address);
1138 set_gdbarch_use_struct_convention (gdbarch, h8300_use_struct_convention);
1139 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1140 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1141 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1142 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1143 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1144 set_gdbarch_call_dummy_length (gdbarch, 0);
1145 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1146 set_gdbarch_call_dummy_p (gdbarch, 1);
1147 set_gdbarch_call_dummy_words (gdbarch, call_dummy_words);
1148 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1149 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1150 /* set_gdbarch_call_dummy_stack_adjust */
1151 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1152 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
1153
1154 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1155 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1156 set_gdbarch_ptr_bit (gdbarch, BINWORD * TARGET_CHAR_BIT);
1157 set_gdbarch_addr_bit (gdbarch, BINWORD * TARGET_CHAR_BIT);
1158
5247b418 1159 /* set_gdbarch_stack_align (gdbarch, SOME_stack_align); */
928e48af
CV
1160 set_gdbarch_extra_stack_alignment_needed (gdbarch, 0);
1161 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1162
1163 return gdbarch;
c906108c
SS
1164}
1165
1166void
fba45db2 1167_initialize_h8300_tdep (void)
c906108c
SS
1168{
1169 tm_print_insn = gdb_print_insn_h8300;
928e48af 1170 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
c906108c 1171}
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