* gdb.dwarf2/dw2-noloc.S: New file.
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
f0bdd87d
YS
1/* Target-machine dependent code for Renesas H8/300, for GDB.
2
6aba47ca
DJ
3 Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999,
4 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
f0bdd87d
YS
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
197e01b6
EZ
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
f0bdd87d
YS
22
23/*
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
26 */
27
28#include "defs.h"
29#include "value.h"
f0bdd87d
YS
30#include "arch-utils.h"
31#include "regcache.h"
32#include "gdbcore.h"
33#include "objfiles.h"
f0bdd87d
YS
34#include "gdb_assert.h"
35#include "dis-asm.h"
36#include "dwarf2-frame.h"
f0bdd87d
YS
37#include "frame-base.h"
38#include "frame-unwind.h"
39
f0bdd87d
YS
40enum gdb_regnum
41{
42 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
43 E_RET0_REGNUM = E_R0_REGNUM,
44 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
45 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
46 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
47 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
48 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
49 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
50 E_SP_REGNUM,
51 E_CCR_REGNUM,
52 E_PC_REGNUM,
53 E_CYCLES_REGNUM,
54 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
55 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
56 E_INSTS_REGNUM,
57 E_MACH_REGNUM,
58 E_MACL_REGNUM,
59 E_SBR_REGNUM,
60 E_VBR_REGNUM
61};
62
63#define H8300_MAX_NUM_REGS 18
64
65#define E_PSEUDO_CCR_REGNUM (NUM_REGS)
66#define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
67
862ba188
CV
68struct h8300_frame_cache
69{
70 /* Base address. */
71 CORE_ADDR base;
72 CORE_ADDR sp_offset;
73 CORE_ADDR pc;
74
75 /* Flag showing that a frame has been created in the prologue code. */
76 int uses_fp;
f0bdd87d 77
862ba188
CV
78 /* Saved registers. */
79 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
80 CORE_ADDR saved_sp;
81};
82
83enum
84{
85 h8300_reg_size = 2,
86 h8300h_reg_size = 4,
87 h8300_max_reg_size = 4,
88};
89
90static int is_h8300hmode (struct gdbarch *gdbarch);
91static int is_h8300smode (struct gdbarch *gdbarch);
92static int is_h8300sxmode (struct gdbarch *gdbarch);
93static int is_h8300_normal_mode (struct gdbarch *gdbarch);
94
95#define BINWORD ((is_h8300hmode (current_gdbarch) \
96 && !is_h8300_normal_mode (current_gdbarch)) \
97 ? h8300h_reg_size : h8300_reg_size)
98
99static CORE_ADDR
100h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
101{
102 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
103}
104
105static CORE_ADDR
106h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
107{
108 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
109}
110
111static struct frame_id
112h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
113{
114 return frame_id_build (h8300_unwind_sp (gdbarch, next_frame),
115 frame_pc_unwind (next_frame));
116}
117
118/* Normal frames. */
119
120/* Allocate and initialize a frame cache. */
121
122static void
123h8300_init_frame_cache (struct h8300_frame_cache *cache)
124{
125 int i;
126
127 /* Base address. */
128 cache->base = 0;
129 cache->sp_offset = 0;
130 cache->pc = 0;
131
132 /* Frameless until proven otherwise. */
133 cache->uses_fp = 0;
134
135 /* Saved registers. We initialize these to -1 since zero is a valid
136 offset (that's where %fp is supposed to be stored). */
137 for (i = 0; i < NUM_REGS; i++)
138 cache->saved_regs[i] = -1;
139}
140
141#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
142#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
143#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
144#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
145#define IS_MOVB_EXT(x) ((x) == 0x7860)
146#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
147#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
148#define IS_MOVW_EXT(x) ((x) == 0x78e0)
149#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
150/* Same instructions as mov.w, just prefixed with 0x0100 */
151#define IS_MOVL_PRE(x) ((x) == 0x0100)
152#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
153#define IS_MOVL_EXT(x) ((x) == 0x78e0)
154#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
155
156#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
157#define IS_PUSH_FP(x) ((x) == 0x01006df6)
158#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
159#define IS_SUB2_SP(x) ((x) == 0x1b87)
160#define IS_SUB4_SP(x) ((x) == 0x1b97)
161#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
162#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
163#define IS_SUBL4_SP(x) ((x) == 0x1acf)
164#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
165#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
166#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
167#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
f0bdd87d
YS
168
169/* If the instruction at PC is an argument register spill, return its
170 length. Otherwise, return zero.
171
172 An argument register spill is an instruction that moves an argument
173 from the register in which it was passed to the stack slot in which
174 it really lives. It is a byte, word, or longword move from an
175 argument register to a negative offset from the frame pointer.
176
177 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
178 is used, it could be a byte, word or long move to registers r3-r5. */
179
180static int
181h8300_is_argument_spill (CORE_ADDR pc)
182{
183 int w = read_memory_unsigned_integer (pc, 2);
184
862ba188 185 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
f0bdd87d
YS
186 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
187 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
188 return 2;
189
862ba188 190 if (IS_MOVB_Rn16_SP (w)
f0bdd87d
YS
191 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
192 {
862ba188 193 if (read_memory_integer (pc + 2, 2) < 0) /* ... and d:16 is negative. */
f0bdd87d
YS
194 return 4;
195 }
862ba188 196 else if (IS_MOVB_EXT (w))
f0bdd87d 197 {
862ba188 198 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
f0bdd87d
YS
199 {
200 LONGEST disp = read_memory_integer (pc + 4, 4);
201
202 /* ... and d:24 is negative. */
203 if (disp < 0 && disp > 0xffffff)
204 return 8;
205 }
206 }
862ba188 207 else if (IS_MOVW_Rn16_SP (w)
f0bdd87d
YS
208 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
209 {
f0bdd87d 210 /* ... and d:16 is negative. */
862ba188 211 if (read_memory_integer (pc + 2, 2) < 0)
f0bdd87d
YS
212 return 4;
213 }
862ba188 214 else if (IS_MOVW_EXT (w))
f0bdd87d 215 {
862ba188 216 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
f0bdd87d
YS
217 {
218 LONGEST disp = read_memory_integer (pc + 4, 4);
219
220 /* ... and d:24 is negative. */
221 if (disp < 0 && disp > 0xffffff)
222 return 8;
223 }
224 }
862ba188 225 else if (IS_MOVL_PRE (w))
f0bdd87d
YS
226 {
227 int w2 = read_memory_integer (pc + 2, 2);
228
862ba188 229 if (IS_MOVL_Rn16_SP (w2)
f0bdd87d
YS
230 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
231 {
f0bdd87d 232 /* ... and d:16 is negative. */
862ba188 233 if (read_memory_integer (pc + 4, 2) < 0)
f0bdd87d
YS
234 return 6;
235 }
862ba188 236 else if (IS_MOVL_EXT (w2))
f0bdd87d
YS
237 {
238 int w3 = read_memory_integer (pc + 4, 2);
239
862ba188 240 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2)))
f0bdd87d
YS
241 {
242 LONGEST disp = read_memory_integer (pc + 6, 4);
243
244 /* ... and d:24 is negative. */
245 if (disp < 0 && disp > 0xffffff)
246 return 10;
247 }
248 }
249 }
250
251 return 0;
252}
253
f0bdd87d
YS
254/* Do a full analysis of the prologue at PC and update CACHE
255 accordingly. Bail out early if CURRENT_PC is reached. Return the
256 address where the analysis stopped.
257
258 We handle all cases that can be generated by gcc.
259
260 For allocating a stack frame:
261
262 mov.w r6,@-sp
263 mov.w sp,r6
264 mov.w #-n,rN
265 add.w rN,sp
266
267 mov.w r6,@-sp
268 mov.w sp,r6
269 subs #2,sp
270 (repeat)
271
272 mov.l er6,@-sp
273 mov.l sp,er6
274 add.l #-n,sp
275
276 mov.w r6,@-sp
277 mov.w sp,r6
278 subs #4,sp
279 (repeat)
280
281 For saving registers:
282
283 mov.w rN,@-sp
284 mov.l erN,@-sp
285 stm.l reglist,@-sp
286
f0bdd87d
YS
287 */
288
289static CORE_ADDR
290h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
291 struct h8300_frame_cache *cache)
292{
293 unsigned int op;
862ba188
CV
294 int regno, i, spill_size;
295
296 cache->sp_offset = 0;
f0bdd87d 297
f0bdd87d
YS
298 if (pc >= current_pc)
299 return current_pc;
300
862ba188
CV
301 op = read_memory_unsigned_integer (pc, 4);
302
303 if (IS_PUSHFP_MOVESPFP (op))
304 {
305 cache->saved_regs[E_FP_REGNUM] = 0;
306 cache->uses_fp = 1;
307 pc += 4;
308 }
309 else if (IS_PUSH_FP (op))
310 {
311 cache->saved_regs[E_FP_REGNUM] = 0;
312 pc += 4;
313 if (pc >= current_pc)
314 return current_pc;
315 op = read_memory_unsigned_integer (pc, 2);
316 if (IS_MOV_SP_FP (op))
317 {
318 cache->uses_fp = 1;
319 pc += 2;
320 }
321 }
322
323 while (pc < current_pc)
324 {
325 op = read_memory_unsigned_integer (pc, 2);
326 if (IS_SUB2_SP (op))
327 {
328 cache->sp_offset += 2;
329 pc += 2;
330 }
331 else if (IS_SUB4_SP (op))
332 {
333 cache->sp_offset += 4;
334 pc += 2;
335 }
336 else if (IS_ADD_IMM_SP (op))
337 {
338 cache->sp_offset += -read_memory_integer (pc + 2, 2);
339 pc += 4;
340 }
341 else if (IS_SUB_IMM_SP (op))
342 {
343 cache->sp_offset += read_memory_integer (pc + 2, 2);
344 pc += 4;
345 }
346 else if (IS_SUBL4_SP (op))
347 {
348 cache->sp_offset += 4;
349 pc += 2;
350 }
351 else if (IS_MOV_IMM_Rn (op))
352 {
353 int offset = read_memory_integer (pc + 2, 2);
354 regno = op & 0x000f;
355 op = read_memory_unsigned_integer (pc + 4, 2);
356 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
357 {
358 cache->sp_offset -= offset;
359 pc += 6;
360 }
361 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
362 {
363 cache->sp_offset += offset;
364 pc += 6;
365 }
366 else
367 break;
368 }
369 else if (IS_PUSH (op))
370 {
371 regno = op & 0x000f;
372 cache->sp_offset += 2;
373 cache->saved_regs[regno] = cache->sp_offset;
374 pc += 2;
375 }
376 else if (op == 0x0100)
377 {
378 op = read_memory_unsigned_integer (pc + 2, 2);
379 if (IS_PUSH (op))
380 {
381 regno = op & 0x000f;
382 cache->sp_offset += 4;
383 cache->saved_regs[regno] = cache->sp_offset;
384 pc += 4;
385 }
386 else
387 break;
388 }
389 else if ((op & 0xffcf) == 0x0100)
390 {
391 int op1;
392 op1 = read_memory_unsigned_integer (pc + 2, 2);
393 if (IS_PUSH (op1))
394 {
395 /* Since the prefix is 0x01x0, this is not a simple pushm but a
396 stm.l reglist,@-sp */
397 i = ((op & 0x0030) >> 4) + 1;
398 regno = op1 & 0x000f;
399 for (; i > 0; regno++, --i)
400 {
401 cache->sp_offset += 4;
402 cache->saved_regs[regno] = cache->sp_offset;
403 }
404 pc += 4;
405 }
406 else
407 break;
408 }
409 else
410 break;
411 }
412
413 /* Check for spilling an argument register to the stack frame.
414 This could also be an initializing store from non-prologue code,
415 but I don't think there's any harm in skipping that. */
416 while ((spill_size = h8300_is_argument_spill (pc)) > 0
417 && pc + spill_size <= current_pc)
418 pc += spill_size;
f0bdd87d
YS
419
420 return pc;
421}
422
423static struct h8300_frame_cache *
424h8300_frame_cache (struct frame_info *next_frame, void **this_cache)
425{
426 struct h8300_frame_cache *cache;
427 char buf[4];
428 int i;
862ba188 429 CORE_ADDR current_pc;
f0bdd87d
YS
430
431 if (*this_cache)
432 return *this_cache;
433
862ba188
CV
434 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
435 h8300_init_frame_cache (cache);
f0bdd87d
YS
436 *this_cache = cache;
437
438 /* In principle, for normal frames, %fp holds the frame pointer,
439 which holds the base address for the current stack frame.
440 However, for functions that don't need it, the frame pointer is
441 optional. For these "frameless" functions the frame pointer is
862ba188 442 actually the frame pointer of the calling frame. */
f0bdd87d 443
862ba188 444 cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM);
f0bdd87d
YS
445 if (cache->base == 0)
446 return cache;
447
862ba188 448 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
f0bdd87d 449
93d42b30 450 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
862ba188 451 current_pc = frame_pc_unwind (next_frame);
f0bdd87d 452 if (cache->pc != 0)
862ba188 453 h8300_analyze_prologue (cache->pc, current_pc, cache);
f0bdd87d 454
862ba188 455 if (!cache->uses_fp)
f0bdd87d
YS
456 {
457 /* We didn't find a valid frame, which means that CACHE->base
458 currently holds the frame pointer for our calling frame. If
459 we're at the start of a function, or somewhere half-way its
460 prologue, the function's frame probably hasn't been fully
461 setup yet. Try to reconstruct the base address for the stack
462 frame by looking at the stack pointer. For truly "frameless"
463 functions this might work too. */
464
862ba188
CV
465 cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM)
466 + cache->sp_offset;
467 cache->saved_sp = cache->base + BINWORD;
468 cache->saved_regs[E_PC_REGNUM] = 0;
469 }
470 else
471 {
472 cache->saved_sp = cache->base + 2 * BINWORD;
473 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
f0bdd87d 474 }
f0bdd87d
YS
475
476 /* Adjust all the saved registers such that they contain addresses
477 instead of offsets. */
478 for (i = 0; i < NUM_REGS; i++)
479 if (cache->saved_regs[i] != -1)
862ba188 480 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
f0bdd87d
YS
481
482 return cache;
483}
484
485static void
486h8300_frame_this_id (struct frame_info *next_frame, void **this_cache,
487 struct frame_id *this_id)
488{
489 struct h8300_frame_cache *cache =
490 h8300_frame_cache (next_frame, this_cache);
491
492 /* This marks the outermost frame. */
493 if (cache->base == 0)
494 return;
495
862ba188 496 *this_id = frame_id_build (cache->saved_sp, cache->pc);
f0bdd87d
YS
497}
498
499static void
500h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache,
501 int regnum, int *optimizedp,
502 enum lval_type *lvalp, CORE_ADDR *addrp,
5d0d05b6 503 int *realnump, gdb_byte *valuep)
f0bdd87d
YS
504{
505 struct h8300_frame_cache *cache =
506 h8300_frame_cache (next_frame, this_cache);
507
508 gdb_assert (regnum >= 0);
509
510 if (regnum == E_SP_REGNUM && cache->saved_sp)
511 {
512 *optimizedp = 0;
513 *lvalp = not_lval;
514 *addrp = 0;
515 *realnump = -1;
516 if (valuep)
862ba188 517 store_unsigned_integer (valuep, BINWORD, cache->saved_sp);
f0bdd87d
YS
518 return;
519 }
520
521 if (regnum < NUM_REGS && cache->saved_regs[regnum] != -1)
522 {
523 *optimizedp = 0;
524 *lvalp = lval_memory;
525 *addrp = cache->saved_regs[regnum];
526 *realnump = -1;
527 if (valuep)
862ba188 528 read_memory (*addrp, valuep, register_size (current_gdbarch, regnum));
f0bdd87d
YS
529 return;
530 }
531
5efde112
DJ
532 *optimizedp = 0;
533 *lvalp = lval_register;
534 *addrp = 0;
535 *realnump = regnum;
536 if (valuep)
537 frame_unwind_register (next_frame, *realnump, valuep);
f0bdd87d
YS
538}
539
540static const struct frame_unwind h8300_frame_unwind = {
541 NORMAL_FRAME,
542 h8300_frame_this_id,
543 h8300_frame_prev_register
544};
545
546static const struct frame_unwind *
547h8300_frame_sniffer (struct frame_info *next_frame)
548{
549 return &h8300_frame_unwind;
550}
551
862ba188
CV
552static CORE_ADDR
553h8300_frame_base_address (struct frame_info *next_frame, void **this_cache)
554{
555 struct h8300_frame_cache *cache = h8300_frame_cache (next_frame, this_cache);
556 return cache->base;
557}
558
559static const struct frame_base h8300_frame_base = {
560 &h8300_frame_unwind,
561 h8300_frame_base_address,
562 h8300_frame_base_address,
563 h8300_frame_base_address
564};
565
566static CORE_ADDR
567h8300_skip_prologue (CORE_ADDR pc)
568{
569 CORE_ADDR func_addr = 0 , func_end = 0;
570
571 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
572 {
573 struct symtab_and_line sal;
574 struct h8300_frame_cache cache;
575
576 /* Found a function. */
577 sal = find_pc_line (func_addr, 0);
578 if (sal.end && sal.end < func_end)
579 /* Found a line number, use it as end of prologue. */
580 return sal.end;
581
582 /* No useable line symbol. Use prologue parsing method. */
583 h8300_init_frame_cache (&cache);
584 return h8300_analyze_prologue (func_addr, func_end, &cache);
585 }
586
587 /* No function symbol -- just return the PC. */
588 return (CORE_ADDR) pc;
589}
590
f0bdd87d
YS
591/* Function: push_dummy_call
592 Setup the function arguments for calling a function in the inferior.
593 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
594 on the H8/300H.
595
596 There are actually two ABI's here: -mquickcall (the default) and
597 -mno-quickcall. With -mno-quickcall, all arguments are passed on
598 the stack after the return address, word-aligned. With
599 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
600 GCC doesn't indicate in the object file which ABI was used to
601 compile it, GDB only supports the default --- -mquickcall.
602
603 Here are the rules for -mquickcall, in detail:
604
605 Each argument, whether scalar or aggregate, is padded to occupy a
606 whole number of words. Arguments smaller than a word are padded at
607 the most significant end; those larger than a word are padded at
608 the least significant end.
609
610 The initial arguments are passed in r0 -- r2. Earlier arguments go in
611 lower-numbered registers. Multi-word arguments are passed in
612 consecutive registers, with the most significant end in the
613 lower-numbered register.
614
615 If an argument doesn't fit entirely in the remaining registers, it
616 is passed entirely on the stack. Stack arguments begin just after
617 the return address. Once an argument has overflowed onto the stack
618 this way, all subsequent arguments are passed on the stack.
619
620 The above rule has odd consequences. For example, on the h8/300s,
621 if a function takes two longs and an int as arguments:
622 - the first long will be passed in r0/r1,
623 - the second long will be passed entirely on the stack, since it
624 doesn't fit in r2,
625 - and the int will be passed on the stack, even though it could fit
626 in r2.
627
628 A weird exception: if an argument is larger than a word, but not a
629 whole number of words in length (before padding), it is passed on
630 the stack following the rules for stack arguments above, even if
631 there are sufficient registers available to hold it. Stranger
632 still, the argument registers are still `used up' --- even though
633 there's nothing in them.
634
635 So, for example, on the h8/300s, if a function expects a three-byte
636 structure and an int, the structure will go on the stack, and the
637 int will go in r2, not r0.
638
639 If the function returns an aggregate type (struct, union, or class)
640 by value, the caller must allocate space to hold the return value,
641 and pass the callee a pointer to this space as an invisible first
642 argument, in R0.
643
644 For varargs functions, the last fixed argument and all the variable
645 arguments are always passed on the stack. This means that calls to
646 varargs functions don't work properly unless there is a prototype
647 in scope.
648
649 Basically, this ABI is not good, for the following reasons:
650 - You can't call vararg functions properly unless a prototype is in scope.
651 - Structure passing is inconsistent, to no purpose I can see.
652 - It often wastes argument registers, of which there are only three
653 to begin with. */
654
655static CORE_ADDR
656h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
657 struct regcache *regcache, CORE_ADDR bp_addr,
658 int nargs, struct value **args, CORE_ADDR sp,
659 int struct_return, CORE_ADDR struct_addr)
660{
661 int stack_alloc = 0, stack_offset = 0;
662 int wordsize = BINWORD;
663 int reg = E_ARG0_REGNUM;
664 int argument;
665
666 /* First, make sure the stack is properly aligned. */
667 sp = align_down (sp, wordsize);
668
669 /* Now make sure there's space on the stack for the arguments. We
670 may over-allocate a little here, but that won't hurt anything. */
671 for (argument = 0; argument < nargs; argument++)
672 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
673 wordsize);
674 sp -= stack_alloc;
675
676 /* Now load as many arguments as possible into registers, and push
677 the rest onto the stack.
678 If we're returning a structure by value, then we must pass a
679 pointer to the buffer for the return value as an invisible first
680 argument. */
681 if (struct_return)
682 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
683
684 for (argument = 0; argument < nargs; argument++)
685 {
686 struct type *type = value_type (args[argument]);
687 int len = TYPE_LENGTH (type);
688 char *contents = (char *) value_contents (args[argument]);
689
690 /* Pad the argument appropriately. */
691 int padded_len = align_up (len, wordsize);
5d0d05b6 692 gdb_byte *padded = alloca (padded_len);
f0bdd87d
YS
693
694 memset (padded, 0, padded_len);
695 memcpy (len < wordsize ? padded + padded_len - len : padded,
696 contents, len);
697
698 /* Could the argument fit in the remaining registers? */
699 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
700 {
701 /* Are we going to pass it on the stack anyway, for no good
702 reason? */
703 if (len > wordsize && len % wordsize)
704 {
705 /* I feel so unclean. */
706 write_memory (sp + stack_offset, padded, padded_len);
707 stack_offset += padded_len;
708
709 /* That's right --- even though we passed the argument
710 on the stack, we consume the registers anyway! Love
711 me, love my dog. */
712 reg += padded_len / wordsize;
713 }
714 else
715 {
716 /* Heavens to Betsy --- it's really going in registers!
717 It would be nice if we could use write_register_bytes
718 here, but on the h8/300s, there are gaps between
719 the registers in the register file. */
720 int offset;
721
722 for (offset = 0; offset < padded_len; offset += wordsize)
723 {
724 ULONGEST word = extract_unsigned_integer (padded + offset,
725 wordsize);
726 regcache_cooked_write_unsigned (regcache, reg++, word);
727 }
728 }
729 }
730 else
731 {
732 /* It doesn't fit in registers! Onto the stack it goes. */
733 write_memory (sp + stack_offset, padded, padded_len);
734 stack_offset += padded_len;
735
736 /* Once one argument has spilled onto the stack, all
737 subsequent arguments go on the stack. */
738 reg = E_ARGLAST_REGNUM + 1;
739 }
740 }
741
742 /* Store return address. */
743 sp -= wordsize;
744 write_memory_unsigned_integer (sp, wordsize, bp_addr);
745
746 /* Update stack pointer. */
747 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
748
862ba188
CV
749 /* Return the new stack pointer minus the return address slot since
750 that's what DWARF2/GCC uses as the frame's CFA. */
751 return sp + wordsize;
f0bdd87d
YS
752}
753
754/* Function: extract_return_value
755 Figure out where in REGBUF the called function has left its return value.
756 Copy that into VALBUF. Be sure to account for CPU type. */
757
758static void
759h8300_extract_return_value (struct type *type, struct regcache *regcache,
760 void *valbuf)
761{
762 int len = TYPE_LENGTH (type);
763 ULONGEST c, addr;
764
765 switch (len)
766 {
767 case 1:
768 case 2:
769 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
770 store_unsigned_integer (valbuf, len, c);
771 break;
772 case 4: /* Needs two registers on plain H8/300 */
773 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
774 store_unsigned_integer (valbuf, 2, c);
775 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
776 store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
777 break;
778 case 8: /* long long is now 8 bytes. */
779 if (TYPE_CODE (type) == TYPE_CODE_INT)
780 {
781 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
782 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
783 store_unsigned_integer (valbuf, len, c);
784 }
785 else
786 {
787 error ("I don't know how this 8 byte value is returned.");
788 }
789 break;
790 }
791}
792
793static void
794h8300h_extract_return_value (struct type *type, struct regcache *regcache,
795 void *valbuf)
796{
797 int len = TYPE_LENGTH (type);
798 ULONGEST c, addr;
799
800 switch (len)
801 {
802 case 1:
803 case 2:
804 case 4:
805 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
806 store_unsigned_integer (valbuf, len, c);
807 break;
808 case 8: /* long long is now 8 bytes. */
809 if (TYPE_CODE (type) == TYPE_CODE_INT)
810 {
862ba188
CV
811 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
812 store_unsigned_integer (valbuf, 4, c);
813 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
814 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c);
f0bdd87d
YS
815 }
816 else
817 {
818 error ("I don't know how this 8 byte value is returned.");
819 }
820 break;
821 }
822}
823
862ba188
CV
824int
825h8300_use_struct_convention (struct type *value_type)
826{
827 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
828 stack. */
829
830 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
831 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
832 return 1;
833 return !(TYPE_LENGTH (value_type) == 1
834 || TYPE_LENGTH (value_type) == 2
835 || TYPE_LENGTH (value_type) == 4);
836}
837
838int
839h8300h_use_struct_convention (struct type *value_type)
840{
841 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
842 returned in R0/R1, everything else on the stack. */
843 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
844 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
845 return 1;
846 return !(TYPE_LENGTH (value_type) == 1
847 || TYPE_LENGTH (value_type) == 2
848 || TYPE_LENGTH (value_type) == 4
849 || (TYPE_LENGTH (value_type) == 8
850 && TYPE_CODE (value_type) == TYPE_CODE_INT));
851}
f0bdd87d
YS
852
853/* Function: store_return_value
854 Place the appropriate value in the appropriate registers.
855 Primarily used by the RETURN command. */
856
857static void
858h8300_store_return_value (struct type *type, struct regcache *regcache,
859 const void *valbuf)
860{
861 int len = TYPE_LENGTH (type);
862 ULONGEST val;
863
864 switch (len)
865 {
866 case 1:
867 case 2: /* short... */
868 val = extract_unsigned_integer (valbuf, len);
869 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
870 break;
871 case 4: /* long, float */
872 val = extract_unsigned_integer (valbuf, len);
873 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
874 (val >> 16) & 0xffff);
875 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
876 break;
877 case 8: /* long long, double and long double are all defined
878 as 4 byte types so far so this shouldn't happen. */
879 error ("I don't know how to return an 8 byte value.");
880 break;
881 }
882}
883
884static void
885h8300h_store_return_value (struct type *type, struct regcache *regcache,
886 const void *valbuf)
887{
888 int len = TYPE_LENGTH (type);
889 ULONGEST val;
890
891 switch (len)
892 {
893 case 1:
894 case 2:
895 case 4: /* long, float */
896 val = extract_unsigned_integer (valbuf, len);
897 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
898 break;
862ba188
CV
899 case 8:
900 val = extract_unsigned_integer (valbuf, len);
901 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
902 (val >> 32) & 0xffffffff);
903 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
904 val & 0xffffffff);
f0bdd87d
YS
905 break;
906 }
907}
908
862ba188
CV
909static enum return_value_convention
910h8300_return_value (struct gdbarch *gdbarch, struct type *type,
911 struct regcache *regcache,
5d0d05b6 912 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
913{
914 if (h8300_use_struct_convention (type))
915 return RETURN_VALUE_STRUCT_CONVENTION;
916 if (writebuf)
917 h8300_store_return_value (type, regcache, writebuf);
918 else if (readbuf)
919 h8300_extract_return_value (type, regcache, readbuf);
920 return RETURN_VALUE_REGISTER_CONVENTION;
921}
922
923static enum return_value_convention
924h8300h_return_value (struct gdbarch *gdbarch, struct type *type,
925 struct regcache *regcache,
5d0d05b6 926 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
927{
928 if (h8300h_use_struct_convention (type))
929 {
930 if (readbuf)
931 {
932 ULONGEST addr;
933
934 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
935 read_memory (addr, readbuf, TYPE_LENGTH (type));
936 }
937
938 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
939 }
940 if (writebuf)
941 h8300h_store_return_value (type, regcache, writebuf);
942 else if (readbuf)
943 h8300h_extract_return_value (type, regcache, readbuf);
944 return RETURN_VALUE_REGISTER_CONVENTION;
945}
946
f0bdd87d
YS
947static struct cmd_list_element *setmachinelist;
948
949static const char *
950h8300_register_name (int regno)
951{
952 /* The register names change depending on which h8300 processor
953 type is selected. */
954 static char *register_names[] = {
955 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
956 "sp", "", "pc", "cycles", "tick", "inst",
957 "ccr", /* pseudo register */
958 };
959 if (regno < 0
960 || regno >= (sizeof (register_names) / sizeof (*register_names)))
961 internal_error (__FILE__, __LINE__,
962 "h8300_register_name: illegal register number %d", regno);
963 else
964 return register_names[regno];
965}
966
967static const char *
968h8300s_register_name (int regno)
969{
970 static char *register_names[] = {
971 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
972 "sp", "", "pc", "cycles", "", "tick", "inst",
973 "mach", "macl",
974 "ccr", "exr" /* pseudo registers */
975 };
976 if (regno < 0
977 || regno >= (sizeof (register_names) / sizeof (*register_names)))
978 internal_error (__FILE__, __LINE__,
979 "h8300s_register_name: illegal register number %d",
980 regno);
981 else
982 return register_names[regno];
983}
984
985static const char *
986h8300sx_register_name (int regno)
987{
988 static char *register_names[] = {
989 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
990 "sp", "", "pc", "cycles", "", "tick", "inst",
991 "mach", "macl", "sbr", "vbr",
992 "ccr", "exr" /* pseudo registers */
993 };
994 if (regno < 0
995 || regno >= (sizeof (register_names) / sizeof (*register_names)))
996 internal_error (__FILE__, __LINE__,
997 "h8300sx_register_name: illegal register number %d",
998 regno);
999 else
1000 return register_names[regno];
1001}
1002
1003static void
1004h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1005 struct frame_info *frame, int regno)
1006{
1007 LONGEST rval;
1008 const char *name = gdbarch_register_name (gdbarch, regno);
1009
1010 if (!name || !*name)
1011 return;
1012
1013 rval = get_frame_register_signed (frame, regno);
1014
1015 fprintf_filtered (file, "%-14s ", name);
1016 if ((regno == E_PSEUDO_CCR_REGNUM) || \
1017 (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)))
1018 {
1019 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1020 print_longest (file, 'u', 1, rval);
1021 }
1022 else
1023 {
1024 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, BINWORD));
1025 print_longest (file, 'd', 1, rval);
1026 }
1027 if (regno == E_PSEUDO_CCR_REGNUM)
1028 {
1029 /* CCR register */
1030 int C, Z, N, V;
1031 unsigned char l = rval & 0xff;
1032 fprintf_filtered (file, "\t");
1033 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1034 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1035 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1036 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1037 N = (l & 0x8) != 0;
1038 Z = (l & 0x4) != 0;
1039 V = (l & 0x2) != 0;
1040 C = (l & 0x1) != 0;
1041 fprintf_filtered (file, "N-%d ", N);
1042 fprintf_filtered (file, "Z-%d ", Z);
1043 fprintf_filtered (file, "V-%d ", V);
1044 fprintf_filtered (file, "C-%d ", C);
1045 if ((C | Z) == 0)
1046 fprintf_filtered (file, "u> ");
1047 if ((C | Z) == 1)
1048 fprintf_filtered (file, "u<= ");
1049 if ((C == 0))
1050 fprintf_filtered (file, "u>= ");
1051 if (C == 1)
1052 fprintf_filtered (file, "u< ");
1053 if (Z == 0)
1054 fprintf_filtered (file, "!= ");
1055 if (Z == 1)
1056 fprintf_filtered (file, "== ");
1057 if ((N ^ V) == 0)
1058 fprintf_filtered (file, ">= ");
1059 if ((N ^ V) == 1)
1060 fprintf_filtered (file, "< ");
1061 if ((Z | (N ^ V)) == 0)
1062 fprintf_filtered (file, "> ");
1063 if ((Z | (N ^ V)) == 1)
1064 fprintf_filtered (file, "<= ");
1065 }
1066 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
1067 {
1068 /* EXR register */
1069 unsigned char l = rval & 0xff;
1070 fprintf_filtered (file, "\t");
1071 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1072 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1073 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1074 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1075 }
1076 fprintf_filtered (file, "\n");
1077}
1078
1079static void
1080h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1081 struct frame_info *frame, int regno, int cpregs)
1082{
1083 if (regno < 0)
1084 {
1085 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1086 h8300_print_register (gdbarch, file, frame, regno);
1087 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1088 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1089 if (is_h8300smode (current_gdbarch))
1090 {
1091 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1092 if (is_h8300sxmode (current_gdbarch))
1093 {
1094 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1095 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1096 }
1097 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1098 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1099 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1100 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1101 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1102 }
1103 else
1104 {
1105 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1106 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1107 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1108 }
1109 }
1110 else
1111 {
1112 if (regno == E_CCR_REGNUM)
1113 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1114 else if (regno == E_PSEUDO_EXR_REGNUM
1115 && is_h8300smode (current_gdbarch))
1116 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1117 else
1118 h8300_print_register (gdbarch, file, frame, regno);
1119 }
1120}
1121
1122static struct type *
1123h8300_register_type (struct gdbarch *gdbarch, int regno)
1124{
1125 if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
1126 internal_error (__FILE__, __LINE__,
1127 "h8300_register_type: illegal register number %d", regno);
1128 else
1129 {
1130 switch (regno)
1131 {
1132 case E_PC_REGNUM:
1133 return builtin_type_void_func_ptr;
1134 case E_SP_REGNUM:
1135 case E_FP_REGNUM:
1136 return builtin_type_void_data_ptr;
1137 default:
1138 if (regno == E_PSEUDO_CCR_REGNUM)
1139 return builtin_type_uint8;
1140 else if (regno == E_PSEUDO_EXR_REGNUM)
1141 return builtin_type_uint8;
1142 else if (is_h8300hmode (current_gdbarch))
1143 return builtin_type_int32;
1144 else
1145 return builtin_type_int16;
1146 }
1147 }
1148}
1149
1150static void
1151h8300_pseudo_register_read (struct gdbarch *gdbarch,
5d0d05b6
CV
1152 struct regcache *regcache, int regno,
1153 gdb_byte *buf)
f0bdd87d
YS
1154{
1155 if (regno == E_PSEUDO_CCR_REGNUM)
1156 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1157 else if (regno == E_PSEUDO_EXR_REGNUM)
1158 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1159 else
1160 regcache_raw_read (regcache, regno, buf);
1161}
1162
1163static void
1164h8300_pseudo_register_write (struct gdbarch *gdbarch,
1165 struct regcache *regcache, int regno,
5d0d05b6 1166 const gdb_byte *buf)
f0bdd87d
YS
1167{
1168 if (regno == E_PSEUDO_CCR_REGNUM)
1169 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1170 else if (regno == E_PSEUDO_EXR_REGNUM)
1171 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1172 else
1173 regcache_raw_write (regcache, regno, buf);
1174}
1175
1176static int
1177h8300_dbg_reg_to_regnum (int regno)
1178{
1179 if (regno == E_CCR_REGNUM)
1180 return E_PSEUDO_CCR_REGNUM;
1181 return regno;
1182}
1183
1184static int
1185h8300s_dbg_reg_to_regnum (int regno)
1186{
1187 if (regno == E_CCR_REGNUM)
1188 return E_PSEUDO_CCR_REGNUM;
1189 if (regno == E_EXR_REGNUM)
1190 return E_PSEUDO_EXR_REGNUM;
1191 return regno;
1192}
1193
f0bdd87d
YS
1194const static unsigned char *
1195h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1196{
1197 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1198 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1199
1200 *lenptr = sizeof (breakpoint);
1201 return breakpoint;
1202}
1203
f0bdd87d
YS
1204static void
1205h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1206 struct frame_info *frame, const char *args)
1207{
1208 fprintf_filtered (file, "\
1209No floating-point info available for this processor.\n");
1210}
1211
1212static struct gdbarch *
1213h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1214{
1215 struct gdbarch_tdep *tdep = NULL;
1216 struct gdbarch *gdbarch;
1217
1218 arches = gdbarch_list_lookup_by_info (arches, &info);
1219 if (arches != NULL)
1220 return arches->gdbarch;
1221
1222#if 0
1223 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1224#endif
1225
1226 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1227 return NULL;
1228
1229 gdbarch = gdbarch_alloc (&info, 0);
1230
1231 switch (info.bfd_arch_info->mach)
1232 {
1233 case bfd_mach_h8300:
1234 set_gdbarch_num_regs (gdbarch, 13);
1235 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1236 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1237 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1238 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1239 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1240 set_gdbarch_register_name (gdbarch, h8300_register_name);
1241 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1242 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
862ba188 1243 set_gdbarch_return_value (gdbarch, h8300_return_value);
f0bdd87d
YS
1244 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1245 break;
1246 case bfd_mach_h8300h:
1247 case bfd_mach_h8300hn:
1248 set_gdbarch_num_regs (gdbarch, 13);
1249 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1250 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1251 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1252 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1253 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1254 set_gdbarch_register_name (gdbarch, h8300_register_name);
1255 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1256 {
1257 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1258 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1259 }
1260 else
1261 {
1262 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1263 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1264 }
862ba188 1265 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1266 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1267 break;
1268 case bfd_mach_h8300s:
1269 case bfd_mach_h8300sn:
1270 set_gdbarch_num_regs (gdbarch, 16);
1271 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1272 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1273 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1274 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1275 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1276 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1277 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1278 {
1279 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1280 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1281 }
1282 else
1283 {
1284 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1285 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1286 }
862ba188 1287 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1288 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1289 break;
1290 case bfd_mach_h8300sx:
1291 case bfd_mach_h8300sxn:
1292 set_gdbarch_num_regs (gdbarch, 18);
1293 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1294 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1295 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1296 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1297 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1298 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1299 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1300 {
1301 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1302 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1303 }
1304 else
1305 {
1306 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1307 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1308 }
862ba188 1309 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1310 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1311 break;
1312 }
1313
1314 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1315 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1316
1317 /*
1318 * Basic register fields and methods.
1319 */
1320
1321 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
f0bdd87d
YS
1322 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1323 set_gdbarch_register_type (gdbarch, h8300_register_type);
1324 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1325 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1326
1327 /*
1328 * Frame Info
1329 */
1330 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1331
1332 /* Frame unwinder. */
f0bdd87d 1333 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
862ba188
CV
1334 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
1335 set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id);
1336 frame_base_set_default (gdbarch, &h8300_frame_base);
f0bdd87d
YS
1337
1338 /*
1339 * Miscelany
1340 */
1341 /* Stack grows up. */
1342 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1343
f0bdd87d 1344 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
f0bdd87d
YS
1345 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1346
862ba188 1347 set_gdbarch_char_signed (gdbarch, 0);
f0bdd87d
YS
1348 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1349 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1350 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1351 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1352 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1353
1354 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1355
862ba188
CV
1356 /* Hook in the DWARF CFI frame unwinder. */
1357 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
f0bdd87d
YS
1358 frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer);
1359
1360 return gdbarch;
1361
1362}
1363
1364extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1365
1366void
1367_initialize_h8300_tdep (void)
1368{
1369 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1370}
1371
1372static int
1373is_h8300hmode (struct gdbarch *gdbarch)
1374{
1375 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1376 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1377 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1378 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1379 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1381}
1382
1383static int
1384is_h8300smode (struct gdbarch *gdbarch)
1385{
1386 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1387 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1388 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1389 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1390}
1391
1392static int
1393is_h8300sxmode (struct gdbarch *gdbarch)
1394{
1395 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1396 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1397}
1398
1399static int
1400is_h8300_normal_mode (struct gdbarch *gdbarch)
1401{
1402 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1403 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1404 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1405}
This page took 0.202477 seconds and 4 git commands to generate.