2003-07-22 Elena Zannoni <ezannoni@redhat.com>
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
c906108c 1/* Target-machine dependent code for Hitachi H8/300, for GDB.
cda5a58a
AC
2
3 Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
1e698235 4 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23/*
c5aa993b
JM
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
c906108c
SS
26 */
27
28#include "defs.h"
c906108c 29#include "value.h"
928e48af
CV
30#include "inferior.h"
31#include "symfile.h"
32#include "arch-utils.h"
4e052eda 33#include "regcache.h"
928e48af
CV
34#include "gdbcore.h"
35#include "objfiles.h"
36#include "gdbcmd.h"
4904ba5b 37#include "gdb_assert.h"
c906108c 38
928e48af
CV
39/* Extra info which is saved in each frame_info. */
40struct frame_extra_info
41{
42 CORE_ADDR from_pc;
928e48af 43};
c906108c 44
928e48af
CV
45enum
46{
47 h8300_reg_size = 2,
48 h8300h_reg_size = 4,
49 h8300_max_reg_size = 4,
50};
51#define BINWORD (h8300hmode ? h8300h_reg_size : h8300_reg_size)
52
53enum gdb_regnum
54{
55 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
0261a0d0
CV
56 E_RET0_REGNUM = E_R0_REGNUM,
57 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
928e48af
CV
58 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
59 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
60 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
61 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
62 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
63 E_SP_REGNUM,
64 E_CCR_REGNUM,
65 E_PC_REGNUM,
66 E_CYCLES_REGNUM,
67 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
68 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
084edea5
CV
69 E_INSTS_REGNUM,
70 E_MACH_REGNUM,
71 E_MACL_REGNUM,
72 E_SBR_REGNUM,
73 E_VBR_REGNUM
928e48af 74};
c906108c 75
4bb1dc5e
CV
76#define E_PSEUDO_CCR_REGNUM (NUM_REGS)
77#define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
78
c906108c
SS
79#define UNSIGNED_SHORT(X) ((X) & 0xffff)
80
81#define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
82#define IS_PUSH_FP(x) (x == 0x6df6)
83#define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
84#define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
85#define IS_SUB2_SP(x) (x==0x1b87)
86#define IS_SUB4_SP(x) (x==0x1b97)
87#define IS_SUBL_SP(x) (x==0x7a37)
88#define IS_MOVK_R5(x) (x==0x7905)
89#define IS_SUB_R5SP(x) (x==0x1957)
90
928e48af
CV
91/* If the instruction at PC is an argument register spill, return its
92 length. Otherwise, return zero.
c906108c 93
928e48af
CV
94 An argument register spill is an instruction that moves an argument
95 from the register in which it was passed to the stack slot in which
96 it really lives. It is a byte, word, or longword move from an
4bb1dc5e
CV
97 argument register to a negative offset from the frame pointer.
98
99 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
100 is used, it could be a byte, word or long move to registers r3-r5. */
c906108c 101
928e48af
CV
102static int
103h8300_is_argument_spill (CORE_ADDR pc)
104{
105 int w = read_memory_unsigned_integer (pc, 2);
106
4bb1dc5e
CV
107 if (((w & 0xff88) == 0x0c88 /* mov.b Rsl, Rdl */
108 || (w & 0xff88) == 0x0d00 /* mov.w Rs, Rd */
109 || (w & 0xff88) == 0x0f80) /* mov.l Rs, Rd */
110 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
111 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5)/* Rd is R3, R4 or R5 */
112 return 2;
113
928e48af
CV
114 if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */
115 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
116 {
117 int w2 = read_memory_integer (pc + 2, 2);
118
119 /* ... and d:16 is negative. */
120 if (w2 < 0)
121 return 4;
122 }
123 else if (w == 0x7860)
124 {
125 int w2 = read_memory_integer (pc + 2, 2);
c906108c 126
928e48af
CV
127 if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */
128 {
129 LONGEST disp = read_memory_integer (pc + 4, 4);
c906108c 130
928e48af
CV
131 /* ... and d:24 is negative. */
132 if (disp < 0 && disp > 0xffffff)
133 return 8;
134 }
135 }
136 else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */
137 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
138 {
139 int w2 = read_memory_integer (pc + 2, 2);
c906108c 140
928e48af
CV
141 /* ... and d:16 is negative. */
142 if (w2 < 0)
143 return 4;
144 }
145 else if (w == 0x78e0)
146 {
147 int w2 = read_memory_integer (pc + 2, 2);
c906108c 148
928e48af
CV
149 if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */
150 {
151 LONGEST disp = read_memory_integer (pc + 4, 4);
152
153 /* ... and d:24 is negative. */
154 if (disp < 0 && disp > 0xffffff)
155 return 8;
156 }
157 }
158 else if (w == 0x0100)
159 {
160 int w2 = read_memory_integer (pc + 2, 2);
161
162 if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */
163 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
164 {
165 int w3 = read_memory_integer (pc + 4, 2);
166
167 /* ... and d:16 is negative. */
168 if (w3 < 0)
169 return 6;
170 }
171 else if (w2 == 0x78e0)
172 {
173 int w3 = read_memory_integer (pc + 4, 2);
174
175 if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */
176 {
177 LONGEST disp = read_memory_integer (pc + 6, 4);
178
179 /* ... and d:24 is negative. */
180 if (disp < 0 && disp > 0xffffff)
181 return 10;
182 }
183 }
184 }
185
186 return 0;
187}
188
189static CORE_ADDR
fba45db2 190h8300_skip_prologue (CORE_ADDR start_pc)
c906108c
SS
191{
192 short int w;
193 int adjust = 0;
194
195 /* Skip past all push and stm insns. */
196 while (1)
197 {
198 w = read_memory_unsigned_integer (start_pc, 2);
199 /* First look for push insns. */
200 if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
201 {
202 w = read_memory_unsigned_integer (start_pc + 2, 2);
203 adjust = 2;
204 }
205
206 if (IS_PUSH (w))
207 {
208 start_pc += 2 + adjust;
209 w = read_memory_unsigned_integer (start_pc, 2);
210 continue;
211 }
212 adjust = 0;
213 break;
214 }
215
216 /* Skip past a move to FP, either word or long sized */
217 w = read_memory_unsigned_integer (start_pc, 2);
218 if (w == 0x0100)
219 {
220 w = read_memory_unsigned_integer (start_pc + 2, 2);
221 adjust += 2;
222 }
223
224 if (IS_MOVE_FP (w))
225 {
226 start_pc += 2 + adjust;
227 w = read_memory_unsigned_integer (start_pc, 2);
228 }
229
230 /* Check for loading either a word constant into r5;
231 long versions are handled by the SUBL_SP below. */
232 if (IS_MOVK_R5 (w))
233 {
234 start_pc += 2;
235 w = read_memory_unsigned_integer (start_pc, 2);
236 }
237
238 /* Now check for subtracting r5 from sp, word sized only. */
239 if (IS_SUB_R5SP (w))
240 {
241 start_pc += 2 + adjust;
242 w = read_memory_unsigned_integer (start_pc, 2);
243 }
244
245 /* Check for subs #2 and subs #4. */
246 while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
247 {
248 start_pc += 2 + adjust;
249 w = read_memory_unsigned_integer (start_pc, 2);
250 }
251
252 /* Check for a 32bit subtract. */
253 if (IS_SUBL_SP (w))
254 start_pc += 6 + adjust;
255
4bb1dc5e
CV
256 /* Skip past another possible stm insn for registers R3 to R5 (possibly used
257 for register qualified arguments. */
258 w = read_memory_unsigned_integer (start_pc, 2);
259 /* First look for push insns. */
260 if (w == 0x0110 || w == 0x0120 || w == 0x0130)
261 {
262 w = read_memory_unsigned_integer (start_pc + 2, 2);
263 if (IS_PUSH (w) && (w & 0xf) >= 0x3 && (w & 0xf) <= 0x5)
264 start_pc += 4;
265 }
266
928e48af
CV
267 /* Check for spilling an argument register to the stack frame.
268 This could also be an initializing store from non-prologue code,
269 but I don't think there's any harm in skipping that. */
270 for (;;)
271 {
272 int spill_size = h8300_is_argument_spill (start_pc);
273 if (spill_size == 0)
274 break;
275 start_pc += spill_size;
276 }
277
c906108c
SS
278 return start_pc;
279}
280
c906108c
SS
281/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
282 is not the address of a valid instruction, the address of the next
283 instruction beyond ADDR otherwise. *PWORD1 receives the first word
c5aa993b 284 of the instruction. */
c906108c 285
928e48af 286static CORE_ADDR
884a26c8
MS
287h8300_next_prologue_insn (CORE_ADDR addr,
288 CORE_ADDR lim,
289 unsigned short* pword1)
c906108c
SS
290{
291 char buf[2];
292 if (addr < lim + 8)
293 {
294 read_memory (addr, buf, 2);
295 *pword1 = extract_signed_integer (buf, 2);
296
297 return addr + 2;
298 }
299 return 0;
300}
301
302/* Examine the prologue of a function. `ip' points to the first instruction.
303 `limit' is the limit of the prologue (e.g. the addr of the first
304 linenumber, or perhaps the program counter if we're stepping through).
305 `frame_sp' is the stack pointer value in use in this frame.
306 `fsr' is a pointer to a frame_saved_regs structure into which we put
307 info about the registers saved by this frame.
308 `fi' is a struct frame_info pointer; we fill in various fields in it
309 to reflect the offsets of the arg pointer and the locals pointer. */
310
928e48af
CV
311/* Any function with a frame looks like this
312 SECOND ARG
313 FIRST ARG
314 RET PC
315 SAVED R2
316 SAVED R3
317 SAVED FP <-FP POINTS HERE
318 LOCALS0
319 LOCALS1 <-SP POINTS HERE
320 */
321
c906108c 322static CORE_ADDR
928e48af
CV
323h8300_examine_prologue (register CORE_ADDR ip, register CORE_ADDR limit,
324 CORE_ADDR after_prolog_fp, CORE_ADDR *fsr,
325 struct frame_info *fi)
c906108c
SS
326{
327 register CORE_ADDR next_ip;
328 int r;
329 int have_fp = 0;
928e48af 330 unsigned short insn_word;
c906108c
SS
331 /* Number of things pushed onto stack, starts at 2/4, 'cause the
332 PC is already there */
928e48af 333 unsigned int reg_save_depth = BINWORD;
c906108c
SS
334
335 unsigned int auto_depth = 0; /* Number of bytes of autos */
336
337 char in_frame[11]; /* One for each reg */
338
339 int adjust = 0;
340
341 memset (in_frame, 1, 11);
342 for (r = 0; r < 8; r++)
343 {
928e48af 344 fsr[r] = 0;
c906108c
SS
345 }
346 if (after_prolog_fp == 0)
347 {
928e48af 348 after_prolog_fp = read_register (E_SP_REGNUM);
c906108c
SS
349 }
350
351 /* If the PC isn't valid, quit now. */
352 if (ip == 0 || ip & (h8300hmode ? ~0xffffff : ~0xffff))
353 return 0;
354
d1a8e808 355 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c 356
4bb1dc5e 357 if (insn_word == 0x0100) /* mov.l */
c906108c
SS
358 {
359 insn_word = read_memory_unsigned_integer (ip + 2, 2);
360 adjust = 2;
361 }
362
363 /* Skip over any fp push instructions */
928e48af 364 fsr[E_FP_REGNUM] = after_prolog_fp;
c906108c
SS
365 while (next_ip && IS_PUSH_FP (insn_word))
366 {
367 ip = next_ip + adjust;
368
369 in_frame[insn_word & 0x7] = reg_save_depth;
d1a8e808 370 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
371 reg_save_depth += 2 + adjust;
372 }
373
374 /* Is this a move into the fp */
375 if (next_ip && IS_MOV_SP_FP (insn_word))
376 {
377 ip = next_ip;
d1a8e808 378 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
379 have_fp = 1;
380 }
381
382 /* Skip over any stack adjustment, happens either with a number of
383 sub#2,sp or a mov #x,r5 sub r5,sp */
384
385 if (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
386 {
387 while (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
388 {
389 auto_depth += IS_SUB2_SP (insn_word) ? 2 : 4;
390 ip = next_ip;
d1a8e808 391 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
392 }
393 }
394 else
395 {
396 if (next_ip && IS_MOVK_R5 (insn_word))
397 {
398 ip = next_ip;
d1a8e808 399 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
400 auto_depth += insn_word;
401
d1a8e808 402 next_ip = h8300_next_prologue_insn (next_ip, limit, &insn_word);
c906108c
SS
403 auto_depth += insn_word;
404 }
405 if (next_ip && IS_SUBL_SP (insn_word))
406 {
407 ip = next_ip;
408 auto_depth += read_memory_unsigned_integer (ip, 4);
409 ip += 4;
410
d1a8e808 411 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
412 }
413 }
414
415 /* Now examine the push insns to determine where everything lives
416 on the stack. */
417 while (1)
418 {
419 adjust = 0;
420 if (!next_ip)
421 break;
422
423 if (insn_word == 0x0100)
424 {
425 ip = next_ip;
d1a8e808 426 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
427 adjust = 2;
428 }
429
430 if (IS_PUSH (insn_word))
431 {
ddd216ea
CV
432 auto_depth += 2 + adjust;
433 fsr[insn_word & 0x7] = after_prolog_fp - auto_depth;
c906108c 434 ip = next_ip;
d1a8e808 435 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
436 continue;
437 }
438
439 /* Now check for push multiple insns. */
440 if (insn_word == 0x0110 || insn_word == 0x0120 || insn_word == 0x0130)
441 {
442 int count = ((insn_word >> 4) & 0xf) + 1;
443 int start, i;
444
445 ip = next_ip;
d1a8e808 446 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
447 start = insn_word & 0x7;
448
6d305052 449 for (i = start; i < start + count; i++)
c906108c 450 {
c906108c 451 auto_depth += 4;
ddd216ea 452 fsr[i] = after_prolog_fp - auto_depth;
c906108c
SS
453 }
454 }
455 break;
456 }
457
c906108c 458 /* The PC is at a known place */
da50a4b7 459 get_frame_extra_info (fi)->from_pc =
7e78f0ca 460 read_memory_unsigned_integer (after_prolog_fp + BINWORD, BINWORD);
c906108c
SS
461
462 /* Rememeber any others too */
928e48af 463 in_frame[E_PC_REGNUM] = 0;
c5aa993b 464
c906108c
SS
465 if (have_fp)
466 /* We keep the old FP in the SP spot */
884a26c8
MS
467 fsr[E_SP_REGNUM] = read_memory_unsigned_integer (fsr[E_FP_REGNUM],
468 BINWORD);
c906108c 469 else
928e48af 470 fsr[E_SP_REGNUM] = after_prolog_fp + auto_depth;
c906108c
SS
471
472 return (ip);
473}
474
928e48af
CV
475static void
476h8300_frame_init_saved_regs (struct frame_info *fi)
c906108c 477{
928e48af
CV
478 CORE_ADDR func_addr, func_end;
479
b2fb4676 480 if (!get_frame_saved_regs (fi))
928e48af
CV
481 {
482 frame_saved_regs_zalloc (fi);
483
484 /* Find the beginning of this function, so we can analyze its
485 prologue. */
884a26c8
MS
486 if (find_pc_partial_function (get_frame_pc (fi), NULL,
487 &func_addr, &func_end))
928e48af
CV
488 {
489 struct symtab_and_line sal = find_pc_line (func_addr, 0);
884a26c8
MS
490 CORE_ADDR limit = (sal.end && sal.end < get_frame_pc (fi))
491 ? sal.end : get_frame_pc (fi);
928e48af 492 /* This will fill in fields in fi. */
1e2330ba
AC
493 h8300_examine_prologue (func_addr, limit, get_frame_base (fi),
494 get_frame_saved_regs (fi), fi);
928e48af
CV
495 }
496 /* Else we're out of luck (can't debug completely stripped code).
497 FIXME. */
498 }
499}
500
a5afb99f
AC
501/* Given a GDB frame, determine the address of the calling function's
502 frame. This will be used to create a new GDB frame struct, and
e9582e71
AC
503 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
504 will be called for the new frame.
928e48af
CV
505
506 For us, the frame address is its stack pointer value, so we look up
884a26c8
MS
507 the function prologue to determine the caller's sp value, and
508 return it. */
928e48af
CV
509
510static CORE_ADDR
511h8300_frame_chain (struct frame_info *thisframe)
512{
1e2330ba
AC
513 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe),
514 get_frame_base (thisframe),
515 get_frame_base (thisframe)))
928e48af 516 { /* initialize the from_pc now */
da50a4b7 517 get_frame_extra_info (thisframe)->from_pc =
1e2330ba
AC
518 deprecated_read_register_dummy (get_frame_pc (thisframe),
519 get_frame_base (thisframe),
135c175f 520 E_PC_REGNUM);
1e2330ba 521 return get_frame_base (thisframe);
c906108c 522 }
b2fb4676 523 return get_frame_saved_regs (thisframe)[E_SP_REGNUM];
c906108c
SS
524}
525
526/* Return the saved PC from this frame.
527
528 If the frame has a memory copy of SRP_REGNUM, use that. If not,
529 just use the register SRP_REGNUM itself. */
530
928e48af 531static CORE_ADDR
fba45db2 532h8300_frame_saved_pc (struct frame_info *frame)
c906108c 533{
1e2330ba
AC
534 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
535 get_frame_base (frame),
536 get_frame_base (frame)))
537 return deprecated_read_register_dummy (get_frame_pc (frame),
538 get_frame_base (frame),
135c175f 539 E_PC_REGNUM);
c906108c 540 else
da50a4b7 541 return get_frame_extra_info (frame)->from_pc;
c906108c
SS
542}
543
928e48af
CV
544static void
545h8300_init_extra_frame_info (int fromleaf, struct frame_info *fi)
546{
da50a4b7 547 if (!get_frame_extra_info (fi))
928e48af 548 {
a00a19e9 549 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
da50a4b7 550 get_frame_extra_info (fi)->from_pc = 0;
928e48af 551
50abf9e5 552 if (!get_frame_pc (fi))
928e48af 553 {
11c02a10
AC
554 if (get_next_frame (fi))
555 deprecated_update_frame_pc_hack (fi, h8300_frame_saved_pc (get_next_frame (fi)));
928e48af
CV
556 }
557 h8300_frame_init_saved_regs (fi);
558 }
559}
560
928e48af
CV
561/* Round N up or down to the nearest multiple of UNIT.
562 Evaluate N only once, UNIT several times.
563 UNIT must be a power of two. */
564#define round_up(n, unit) (((n) + (unit) - 1) & -(unit))
565#define round_down(n, unit) ((n) & -(unit))
566
63d47a7d 567/* Function: push_dummy_call
c906108c 568 Setup the function arguments for calling a function in the inferior.
928e48af
CV
569 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
570 on the H8/300H.
571
572 There are actually two ABI's here: -mquickcall (the default) and
573 -mno-quickcall. With -mno-quickcall, all arguments are passed on
574 the stack after the return address, word-aligned. With
575 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
576 GCC doesn't indicate in the object file which ABI was used to
577 compile it, GDB only supports the default --- -mquickcall.
578
579 Here are the rules for -mquickcall, in detail:
580
581 Each argument, whether scalar or aggregate, is padded to occupy a
582 whole number of words. Arguments smaller than a word are padded at
583 the most significant end; those larger than a word are padded at
584 the least significant end.
585
586 The initial arguments are passed in r0 -- r2. Earlier arguments go in
587 lower-numbered registers. Multi-word arguments are passed in
588 consecutive registers, with the most significant end in the
589 lower-numbered register.
590
591 If an argument doesn't fit entirely in the remaining registers, it
592 is passed entirely on the stack. Stack arguments begin just after
593 the return address. Once an argument has overflowed onto the stack
594 this way, all subsequent arguments are passed on the stack.
595
596 The above rule has odd consequences. For example, on the h8/300s,
597 if a function takes two longs and an int as arguments:
598 - the first long will be passed in r0/r1,
599 - the second long will be passed entirely on the stack, since it
600 doesn't fit in r2,
601 - and the int will be passed on the stack, even though it could fit
602 in r2.
603
604 A weird exception: if an argument is larger than a word, but not a
605 whole number of words in length (before padding), it is passed on
606 the stack following the rules for stack arguments above, even if
607 there are sufficient registers available to hold it. Stranger
608 still, the argument registers are still `used up' --- even though
609 there's nothing in them.
610
611 So, for example, on the h8/300s, if a function expects a three-byte
612 structure and an int, the structure will go on the stack, and the
613 int will go in r2, not r0.
614
615 If the function returns an aggregate type (struct, union, or class)
616 by value, the caller must allocate space to hold the return value,
617 and pass the callee a pointer to this space as an invisible first
618 argument, in R0.
619
620 For varargs functions, the last fixed argument and all the variable
621 arguments are always passed on the stack. This means that calls to
622 varargs functions don't work properly unless there is a prototype
623 in scope.
624
625 Basically, this ABI is not good, for the following reasons:
626 - You can't call vararg functions properly unless a prototype is in scope.
627 - Structure passing is inconsistent, to no purpose I can see.
628 - It often wastes argument registers, of which there are only three
629 to begin with. */
c906108c 630
928e48af 631static CORE_ADDR
63d47a7d
CV
632h8300_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
633 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
634 struct value **args, CORE_ADDR sp, int struct_return,
635 CORE_ADDR struct_addr)
c906108c 636{
63d47a7d 637 int stack_alloc = 0, stack_offset = 0;
928e48af 638 int wordsize = BINWORD;
63d47a7d 639 int reg = E_ARG0_REGNUM;
928e48af
CV
640 int argument;
641
642 /* First, make sure the stack is properly aligned. */
643 sp = round_down (sp, wordsize);
644
645 /* Now make sure there's space on the stack for the arguments. We
646 may over-allocate a little here, but that won't hurt anything. */
928e48af
CV
647 for (argument = 0; argument < nargs; argument++)
648 stack_alloc += round_up (TYPE_LENGTH (VALUE_TYPE (args[argument])),
649 wordsize);
650 sp -= stack_alloc;
651
652 /* Now load as many arguments as possible into registers, and push
63d47a7d
CV
653 the rest onto the stack.
654 If we're returning a structure by value, then we must pass a
928e48af
CV
655 pointer to the buffer for the return value as an invisible first
656 argument. */
657 if (struct_return)
63d47a7d 658 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
928e48af
CV
659
660 for (argument = 0; argument < nargs; argument++)
c906108c 661 {
928e48af
CV
662 struct type *type = VALUE_TYPE (args[argument]);
663 int len = TYPE_LENGTH (type);
664 char *contents = (char *) VALUE_CONTENTS (args[argument]);
665
666 /* Pad the argument appropriately. */
667 int padded_len = round_up (len, wordsize);
668 char *padded = alloca (padded_len);
669
670 memset (padded, 0, padded_len);
671 memcpy (len < wordsize ? padded + padded_len - len : padded,
672 contents, len);
673
674 /* Could the argument fit in the remaining registers? */
675 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
676 {
677 /* Are we going to pass it on the stack anyway, for no good
678 reason? */
679 if (len > wordsize && len % wordsize)
680 {
681 /* I feel so unclean. */
682 write_memory (sp + stack_offset, padded, padded_len);
683 stack_offset += padded_len;
684
685 /* That's right --- even though we passed the argument
686 on the stack, we consume the registers anyway! Love
687 me, love my dog. */
688 reg += padded_len / wordsize;
689 }
690 else
691 {
692 /* Heavens to Betsy --- it's really going in registers!
693 It would be nice if we could use write_register_bytes
694 here, but on the h8/300s, there are gaps between
695 the registers in the register file. */
696 int offset;
697
698 for (offset = 0; offset < padded_len; offset += wordsize)
699 {
884a26c8
MS
700 ULONGEST word = extract_unsigned_integer (padded + offset,
701 wordsize);
63d47a7d 702 regcache_cooked_write_unsigned (regcache, reg++, word);
928e48af
CV
703 }
704 }
705 }
c906108c 706 else
928e48af
CV
707 {
708 /* It doesn't fit in registers! Onto the stack it goes. */
709 write_memory (sp + stack_offset, padded, padded_len);
710 stack_offset += padded_len;
711
712 /* Once one argument has spilled onto the stack, all
713 subsequent arguments go on the stack. */
714 reg = E_ARGLAST_REGNUM + 1;
715 }
c906108c 716 }
928e48af 717
63d47a7d
CV
718 /* Store return address. */
719 sp -= wordsize;
720 write_memory_unsigned_integer (sp, wordsize, bp_addr);
c906108c 721
63d47a7d
CV
722 /* Update stack pointer. */
723 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
c906108c 724
c906108c
SS
725 return sp;
726}
727
7256e1a5 728/* Function: h8300_pop_frame
c906108c
SS
729 Restore the machine to the state it had before the current frame
730 was created. Usually used either by the "RETURN" command, or by
731 call_function_by_hand after the dummy_frame is finished. */
732
928e48af 733static void
fba45db2 734h8300_pop_frame (void)
c906108c 735{
928e48af 736 unsigned regno;
c906108c
SS
737 struct frame_info *frame = get_current_frame ();
738
1e2330ba
AC
739 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
740 get_frame_base (frame),
741 get_frame_base (frame)))
c906108c 742 {
c5aa993b 743 generic_pop_dummy_frame ();
c906108c
SS
744 }
745 else
746 {
928e48af 747 for (regno = 0; regno < 8; regno++)
c906108c 748 {
928e48af 749 /* Don't forget E_SP_REGNUM is a frame_saved_regs struct is the
c906108c 750 actual value we want, not the address of the value we want. */
b2fb4676 751 if (get_frame_saved_regs (frame)[regno] && regno != E_SP_REGNUM)
928e48af 752 write_register (regno,
884a26c8
MS
753 read_memory_integer
754 (get_frame_saved_regs (frame)[regno], BINWORD));
b2fb4676 755 else if (get_frame_saved_regs (frame)[regno] && regno == E_SP_REGNUM)
1e2330ba 756 write_register (regno, get_frame_base (frame) + 2 * BINWORD);
c906108c
SS
757 }
758
928e48af 759 /* Don't forget to update the PC too! */
da50a4b7 760 write_register (E_PC_REGNUM, get_frame_extra_info (frame)->from_pc);
c906108c
SS
761 }
762 flush_cached_frames ();
763}
764
765/* Function: extract_return_value
766 Figure out where in REGBUF the called function has left its return value.
767 Copy that into VALBUF. Be sure to account for CPU type. */
768
928e48af 769static void
0261a0d0
CV
770h8300_extract_return_value (struct type *type, struct regcache *regcache,
771 void *valbuf)
c906108c 772{
928e48af 773 int len = TYPE_LENGTH (type);
708cc1b6 774 ULONGEST c, addr;
c5aa993b
JM
775
776 switch (len)
777 {
0261a0d0
CV
778 case 1:
779 case 2:
780 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
781 store_unsigned_integer (valbuf, len, c);
782 break;
783 case 4: /* Needs two registers on plain H8/300 */
784 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
785 store_unsigned_integer (valbuf, 2, c);
786 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
787 store_unsigned_integer ((void*)((char *)valbuf + 2), 2, c);
788 break;
708cc1b6
MS
789 case 8: /* long long is now 8 bytes. */
790 if (TYPE_CODE (type) == TYPE_CODE_INT)
791 {
792 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
793 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
794 store_unsigned_integer (valbuf, len, c);
795 }
796 else
797 {
798 error ("I don't know how this 8 byte value is returned.");
799 }
0261a0d0
CV
800 break;
801 }
802}
803
804static void
805h8300h_extract_return_value (struct type *type, struct regcache *regcache,
806 void *valbuf)
807{
808 int len = TYPE_LENGTH (type);
708cc1b6 809 ULONGEST c, addr;
0261a0d0
CV
810
811 switch (len)
812 {
813 case 1:
814 case 2:
815 case 4:
816 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
817 store_unsigned_integer (valbuf, len, c);
818 break;
708cc1b6
MS
819 case 8: /* long long is now 8 bytes. */
820 if (TYPE_CODE (type) == TYPE_CODE_INT)
821 {
822 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
823 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
824 store_unsigned_integer (valbuf, len, c);
825 }
826 else
827 {
828 error ("I don't know how this 8 byte value is returned.");
829 }
0261a0d0 830 break;
c5aa993b 831 }
c906108c
SS
832}
833
0261a0d0 834
c906108c
SS
835/* Function: store_return_value
836 Place the appropriate value in the appropriate registers.
837 Primarily used by the RETURN command. */
838
928e48af 839static void
0261a0d0
CV
840h8300_store_return_value (struct type *type, struct regcache *regcache,
841 const void *valbuf)
c906108c 842{
928e48af 843 int len = TYPE_LENGTH (type);
0261a0d0 844 ULONGEST val;
c906108c 845
c5aa993b
JM
846 switch (len)
847 {
0261a0d0 848 case 1:
708cc1b6 849 case 2: /* short... */
0261a0d0
CV
850 val = extract_unsigned_integer (valbuf, len);
851 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
852 break;
708cc1b6 853 case 4: /* long, float */
0261a0d0
CV
854 val = extract_unsigned_integer (valbuf, len);
855 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
856 (val >> 16) &0xffff);
857 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
858 break;
708cc1b6
MS
859 case 8: /* long long, double and long double are all defined
860 as 4 byte types so far so this shouldn't happen. */
861 error ("I don't know how to return an 8 byte value.");
0261a0d0
CV
862 break;
863 }
864}
865
866static void
867h8300h_store_return_value (struct type *type, struct regcache *regcache,
868 const void *valbuf)
869{
870 int len = TYPE_LENGTH (type);
871 ULONGEST val;
872
873 switch (len)
874 {
875 case 1:
876 case 2:
708cc1b6 877 case 4: /* long, float */
0261a0d0
CV
878 val = extract_unsigned_integer (valbuf, len);
879 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
880 break;
708cc1b6
MS
881 case 8: /* long long, double and long double are all defined
882 as 4 byte types so far so this shouldn't happen. */
883 error ("I don't know how to return an 8 byte value.");
0261a0d0 884 break;
c5aa993b 885 }
c906108c
SS
886}
887
928e48af 888static struct cmd_list_element *setmachinelist;
c906108c 889
928e48af
CV
890static const char *
891h8300_register_name (int regno)
c906108c 892{
084edea5 893 /* The register names change depending on which h8300 processor
928e48af 894 type is selected. */
084edea5 895 static char *register_names[] = {
928e48af 896 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
4bb1dc5e
CV
897 "sp", "","pc","cycles", "tick", "inst",
898 "ccr", /* pseudo register */
928e48af 899 };
084edea5
CV
900 if (regno < 0
901 || regno >= (sizeof (register_names) / sizeof (*register_names)))
902 internal_error (__FILE__, __LINE__,
903 "h8300_register_name: illegal register number %d", regno);
904 else
905 return register_names[regno];
906}
907
908static const char *
909h8300s_register_name (int regno)
910{
911 static char *register_names[] = {
928e48af 912 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
4bb1dc5e 913 "sp", "", "pc", "cycles", "", "tick", "inst",
7be04a68 914 "mach", "macl",
4bb1dc5e 915 "ccr", "exr" /* pseudo registers */
928e48af 916 };
084edea5
CV
917 if (regno < 0
918 || regno >= (sizeof (register_names) / sizeof (*register_names)))
919 internal_error (__FILE__, __LINE__,
920 "h8300s_register_name: illegal register number %d", regno);
921 else
922 return register_names[regno];
923}
924
925static const char *
926h8300sx_register_name (int regno)
927{
928 static char *register_names[] = {
929 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
4bb1dc5e
CV
930 "sp", "", "pc", "cycles", "", "tick", "inst",
931 "mach", "macl", "sbr", "vbr",
932 "ccr", "exr" /* pseudo registers */
084edea5
CV
933 };
934 if (regno < 0
935 || regno >= (sizeof (register_names) / sizeof (*register_names)))
928e48af 936 internal_error (__FILE__, __LINE__,
084edea5 937 "h8300sx_register_name: illegal register number %d", regno);
c906108c 938 else
928e48af 939 return register_names[regno];
c906108c
SS
940}
941
942static void
4904ba5b
AC
943h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
944 struct frame_info *frame, int regno)
c906108c 945{
084edea5
CV
946 LONGEST rval;
947 const char *name = gdbarch_register_name (gdbarch, regno);
c906108c 948
928e48af
CV
949 if (!name || !*name)
950 return;
c906108c 951
084edea5 952 frame_read_signed_register (frame, regno, &rval);
4904ba5b
AC
953
954 fprintf_filtered (file, "%-14s ", name);
4bb1dc5e 955 if (regno == E_PSEUDO_CCR_REGNUM || (regno == E_PSEUDO_EXR_REGNUM && h8300smode))
c906108c 956 {
084edea5
CV
957 fprintf_filtered (file, "0x%02x ", (unsigned char)rval);
958 print_longest (file, 'u', 1, rval);
c906108c
SS
959 }
960 else
961 {
084edea5
CV
962 fprintf_filtered (file, "0x%s ", phex ((ULONGEST)rval, BINWORD));
963 print_longest (file, 'd', 1, rval);
c906108c 964 }
4bb1dc5e 965 if (regno == E_PSEUDO_CCR_REGNUM)
c906108c
SS
966 {
967 /* CCR register */
968 int C, Z, N, V;
084edea5 969 unsigned char l = rval & 0xff;
4904ba5b
AC
970 fprintf_filtered (file, "\t");
971 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
972 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
973 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
974 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
c906108c
SS
975 N = (l & 0x8) != 0;
976 Z = (l & 0x4) != 0;
977 V = (l & 0x2) != 0;
978 C = (l & 0x1) != 0;
4904ba5b
AC
979 fprintf_filtered (file, "N-%d ", N);
980 fprintf_filtered (file, "Z-%d ", Z);
981 fprintf_filtered (file, "V-%d ", V);
982 fprintf_filtered (file, "C-%d ", C);
c906108c 983 if ((C | Z) == 0)
4904ba5b 984 fprintf_filtered (file, "u> ");
c906108c 985 if ((C | Z) == 1)
4904ba5b 986 fprintf_filtered (file, "u<= ");
c906108c 987 if ((C == 0))
4904ba5b 988 fprintf_filtered (file, "u>= ");
c906108c 989 if (C == 1)
4904ba5b 990 fprintf_filtered (file, "u< ");
c906108c 991 if (Z == 0)
4904ba5b 992 fprintf_filtered (file, "!= ");
c906108c 993 if (Z == 1)
4904ba5b 994 fprintf_filtered (file, "== ");
c906108c 995 if ((N ^ V) == 0)
4904ba5b 996 fprintf_filtered (file, ">= ");
c906108c 997 if ((N ^ V) == 1)
4904ba5b 998 fprintf_filtered (file, "< ");
c906108c 999 if ((Z | (N ^ V)) == 0)
4904ba5b 1000 fprintf_filtered (file, "> ");
c906108c 1001 if ((Z | (N ^ V)) == 1)
4904ba5b 1002 fprintf_filtered (file, "<= ");
c906108c 1003 }
4bb1dc5e 1004 else if (regno == E_PSEUDO_EXR_REGNUM && h8300smode)
fc974602
AV
1005 {
1006 /* EXR register */
084edea5 1007 unsigned char l = rval & 0xff;
4904ba5b
AC
1008 fprintf_filtered (file, "\t");
1009 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1010 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1011 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1012 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
d194345b 1013 }
4904ba5b 1014 fprintf_filtered (file, "\n");
928e48af
CV
1015}
1016
1017static void
4904ba5b
AC
1018h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1019 struct frame_info *frame, int regno, int cpregs)
928e48af
CV
1020{
1021 if (regno < 0)
4bb1dc5e
CV
1022 {
1023 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1024 h8300_print_register (gdbarch, file, frame, regno);
1025 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1026 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1027 if (h8300smode)
1028 {
1029 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1030 if (h8300sxmode)
1031 {
1032 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1033 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
4bb1dc5e 1034 }
7be04a68
MS
1035 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1036 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
4bb1dc5e
CV
1037 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1038 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1039 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1040 }
1041 else
1042 {
1043 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1044 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1045 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1046 }
1047 }
928e48af 1048 else
4bb1dc5e
CV
1049 {
1050 if (regno == E_CCR_REGNUM)
1051 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1052 else if (regno == E_PSEUDO_EXR_REGNUM && h8300smode)
1053 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1054 else
1055 h8300_print_register (gdbarch, file, frame, regno);
1056 }
928e48af
CV
1057}
1058
1059static CORE_ADDR
1060h8300_saved_pc_after_call (struct frame_info *ignore)
1061{
1062 return read_memory_unsigned_integer (read_register (E_SP_REGNUM), BINWORD);
1063}
1064
928e48af 1065static struct type *
055c394a 1066h8300_register_type (struct gdbarch *gdbarch, int regno)
928e48af 1067{
4bb1dc5e 1068 if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
928e48af 1069 internal_error (__FILE__, __LINE__,
055c394a 1070 "h8300_register_type: illegal register number %d",
928e48af
CV
1071 regno);
1072 else
084edea5
CV
1073 {
1074 switch (regno)
1075 {
1076 case E_PC_REGNUM:
1077 return builtin_type_void_func_ptr;
1078 case E_SP_REGNUM:
1079 case E_FP_REGNUM:
1080 return builtin_type_void_data_ptr;
084edea5 1081 default:
4bb1dc5e
CV
1082 if (regno == E_PSEUDO_CCR_REGNUM)
1083 return builtin_type_uint8;
1084 else if (regno == E_PSEUDO_EXR_REGNUM)
1085 return builtin_type_uint8;
1086 else if (h8300hmode)
1087 return builtin_type_int32;
1088 else
1089 return builtin_type_int16;
084edea5
CV
1090 }
1091 }
928e48af
CV
1092}
1093
4bb1dc5e
CV
1094static void
1095h8300_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1096 int regno, void *buf)
1097{
1098 if (regno == E_PSEUDO_CCR_REGNUM)
1099 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1100 else if (regno == E_PSEUDO_EXR_REGNUM)
1101 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1102 else
1103 regcache_raw_read (regcache, regno, buf);
1104}
1105
1106static void
1107h8300_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1108 int regno, const void *buf)
1109{
1110 if (regno == E_PSEUDO_CCR_REGNUM)
1111 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1112 else if (regno == E_PSEUDO_EXR_REGNUM)
1113 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1114 else
1115 regcache_raw_write (regcache, regno, buf);
1116}
1117
1118static int
1119h8300_dbg_reg_to_regnum (int regno)
1120{
1121 if (regno == E_CCR_REGNUM)
1122 return E_PSEUDO_CCR_REGNUM;
1123 return regno;
1124}
1125
1126static int
1127h8300s_dbg_reg_to_regnum (int regno)
1128{
1129 if (regno == E_CCR_REGNUM)
1130 return E_PSEUDO_CCR_REGNUM;
1131 if (regno == E_EXR_REGNUM)
1132 return E_PSEUDO_EXR_REGNUM;
1133 return regno;
1134}
1135
928e48af 1136static CORE_ADDR
0261a0d0 1137h8300_extract_struct_value_address (struct regcache *regcache)
928e48af 1138{
0261a0d0
CV
1139 ULONGEST addr;
1140 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
1141 return addr;
928e48af
CV
1142}
1143
1144const static unsigned char *
1145h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1146{
1147 /*static unsigned char breakpoint[] = { 0x7A, 0xFF };*/ /* ??? */
1148 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1149
1150 *lenptr = sizeof (breakpoint);
1151 return breakpoint;
1152}
1153
0261a0d0
CV
1154static CORE_ADDR
1155h8300_push_dummy_code (struct gdbarch *gdbarch,
1156 CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
1157 struct value **args, int nargs,
1158 struct type *value_type,
1159 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
1160{
1161 /* Allocate space sufficient for a breakpoint. */
1162 sp = (sp - 2) & ~1;
1163 /* Store the address of that breakpoint */
1164 *bp_addr = sp;
1165 /* h8300 always starts the call at the callee's entry point. */
1166 *real_pc = funaddr;
1167 return sp;
1168}
1169
928e48af
CV
1170static void
1171h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1172 struct frame_info *frame, const char *args)
1173{
1174 fprintf_filtered (file, "\
1175No floating-point info available for this processor.\n");
1176}
1177
1178static struct gdbarch *
1179h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1180{
928e48af
CV
1181 struct gdbarch_tdep *tdep = NULL;
1182 struct gdbarch *gdbarch;
1183
1184 arches = gdbarch_list_lookup_by_info (arches, &info);
1185 if (arches != NULL)
1186 return arches->gdbarch;
1187
1188#if 0
1189 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1190#endif
1191
1192 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1193 return NULL;
1194
084edea5
CV
1195 gdbarch = gdbarch_alloc (&info, 0);
1196
928e48af
CV
1197 switch (info.bfd_arch_info->mach)
1198 {
0a48e7e8
MS
1199 case bfd_mach_h8300:
1200 h8300sxmode = 0;
1201 h8300smode = 0;
1202 h8300hmode = 0;
084edea5 1203 set_gdbarch_num_regs (gdbarch, 13);
4bb1dc5e
CV
1204 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1205 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1206 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1207 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1208 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
084edea5 1209 set_gdbarch_register_name (gdbarch, h8300_register_name);
084edea5
CV
1210 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1211 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
0261a0d0
CV
1212 set_gdbarch_extract_return_value (gdbarch, h8300_extract_return_value);
1213 set_gdbarch_store_return_value (gdbarch, h8300_store_return_value);
4bb1dc5e 1214 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
0a48e7e8
MS
1215 break;
1216 case bfd_mach_h8300h:
8efca6ba 1217 case bfd_mach_h8300hn:
0a48e7e8
MS
1218 h8300sxmode = 0;
1219 h8300smode = 0;
1220 h8300hmode = 1;
084edea5 1221 set_gdbarch_num_regs (gdbarch, 13);
4bb1dc5e
CV
1222 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1223 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1224 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1225 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1226 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
084edea5 1227 set_gdbarch_register_name (gdbarch, h8300_register_name);
084edea5
CV
1228 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1229 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
0261a0d0
CV
1230 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1231 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1232 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
0a48e7e8
MS
1233 break;
1234 case bfd_mach_h8300s:
8efca6ba 1235 case bfd_mach_h8300sn:
0a48e7e8
MS
1236 h8300sxmode = 0;
1237 h8300smode = 1;
1238 h8300hmode = 1;
7be04a68 1239 set_gdbarch_num_regs (gdbarch, 16);
4bb1dc5e
CV
1240 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1241 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1242 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1243 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1244 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
084edea5 1245 set_gdbarch_register_name (gdbarch, h8300s_register_name);
084edea5
CV
1246 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1247 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
0261a0d0
CV
1248 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1249 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1250 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
0a48e7e8
MS
1251 break;
1252 case bfd_mach_h8300sx:
084edea5 1253 case bfd_mach_h8300sxn:
0a48e7e8
MS
1254 h8300sxmode = 1;
1255 h8300smode = 1;
1256 h8300hmode = 1;
084edea5 1257 set_gdbarch_num_regs (gdbarch, 18);
4bb1dc5e
CV
1258 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1259 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1260 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1261 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1262 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
084edea5 1263 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
084edea5
CV
1264 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1265 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
0261a0d0
CV
1266 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1267 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1268 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
0a48e7e8 1269 break;
928e48af
CV
1270 }
1271
4bb1dc5e
CV
1272 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1273 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1274
a5afb99f
AC
1275 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1276 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1277 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1278
928e48af
CV
1279 /*
1280 * Basic register fields and methods.
1281 */
1282
928e48af 1283 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
0ba6dca9 1284 set_gdbarch_deprecated_fp_regnum (gdbarch, E_FP_REGNUM);
928e48af 1285 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
055c394a 1286 set_gdbarch_register_type (gdbarch, h8300_register_type);
4904ba5b 1287 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
928e48af
CV
1288 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1289
1290 /*
1291 * Frame Info
1292 */
0261a0d0
CV
1293 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1294
884a26c8
MS
1295 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch,
1296 h8300_frame_init_saved_regs);
1297 set_gdbarch_deprecated_init_extra_frame_info (gdbarch,
1298 h8300_init_extra_frame_info);
618ce49f 1299 set_gdbarch_deprecated_frame_chain (gdbarch, h8300_frame_chain);
884a26c8
MS
1300 set_gdbarch_deprecated_saved_pc_after_call (gdbarch,
1301 h8300_saved_pc_after_call);
8bedc050 1302 set_gdbarch_deprecated_frame_saved_pc (gdbarch, h8300_frame_saved_pc);
63d47a7d 1303 set_gdbarch_deprecated_pop_frame (gdbarch, h8300_pop_frame);
928e48af
CV
1304
1305 /*
1306 * Miscelany
1307 */
1308 /* Stack grows up. */
1309 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1310 /* PC stops zero byte after a trap instruction
1311 (which means: exactly on trap instruction). */
1312 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1313 /* This value is almost never non-zero... */
1314 set_gdbarch_function_start_offset (gdbarch, 0);
1315 /* This value is almost never non-zero... */
1316 set_gdbarch_frame_args_skip (gdbarch, 0);
928e48af
CV
1317 set_gdbarch_frameless_function_invocation (gdbarch,
1318 frameless_look_for_prologue);
1319
0261a0d0
CV
1320 set_gdbarch_extract_struct_value_address (gdbarch,
1321 h8300_extract_struct_value_address);
1fd35568 1322 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
928e48af 1323 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
0261a0d0 1324 set_gdbarch_push_dummy_code (gdbarch, h8300_push_dummy_code);
63d47a7d 1325 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
928e48af
CV
1326
1327 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1328 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
708cc1b6 1329 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
084edea5
CV
1330 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1331 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
928e48af 1332
5247b418 1333 /* set_gdbarch_stack_align (gdbarch, SOME_stack_align); */
928e48af
CV
1334 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1335
708cc1b6
MS
1336 /* Char is unsigned. */
1337 set_gdbarch_char_signed (gdbarch, 0);
1338
928e48af 1339 return gdbarch;
c906108c
SS
1340}
1341
a78f21af
AC
1342extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1343
c906108c 1344void
fba45db2 1345_initialize_h8300_tdep (void)
c906108c 1346{
928e48af 1347 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
c906108c 1348}
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