2004-02-09 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
85a453d5 1/* Target-machine dependent code for Renesas H8/300, for GDB.
cda5a58a
AC
2
3 Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
1e698235 4 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23/*
c5aa993b
JM
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
c906108c
SS
26 */
27
28#include "defs.h"
c906108c 29#include "value.h"
928e48af
CV
30#include "inferior.h"
31#include "symfile.h"
32#include "arch-utils.h"
4e052eda 33#include "regcache.h"
928e48af
CV
34#include "gdbcore.h"
35#include "objfiles.h"
36#include "gdbcmd.h"
4904ba5b 37#include "gdb_assert.h"
a89aa300 38#include "dis-asm.h"
c906108c 39
928e48af
CV
40/* Extra info which is saved in each frame_info. */
41struct frame_extra_info
42{
43 CORE_ADDR from_pc;
928e48af 44};
c906108c 45
928e48af
CV
46enum
47{
48 h8300_reg_size = 2,
49 h8300h_reg_size = 4,
50 h8300_max_reg_size = 4,
51};
454d0511
DD
52
53static int is_h8300hmode (struct gdbarch *gdbarch);
54static int is_h8300smode (struct gdbarch *gdbarch);
55static int is_h8300sxmode (struct gdbarch *gdbarch);
56static int is_h8300_normal_mode (struct gdbarch *gdbarch);
57
58#define BINWORD (is_h8300hmode (current_gdbarch) && \
59 !is_h8300_normal_mode (current_gdbarch) ? h8300h_reg_size : h8300_reg_size)
928e48af
CV
60
61enum gdb_regnum
62{
63 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
0261a0d0
CV
64 E_RET0_REGNUM = E_R0_REGNUM,
65 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
928e48af
CV
66 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
67 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
68 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
69 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
70 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
71 E_SP_REGNUM,
72 E_CCR_REGNUM,
73 E_PC_REGNUM,
74 E_CYCLES_REGNUM,
75 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
76 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
084edea5
CV
77 E_INSTS_REGNUM,
78 E_MACH_REGNUM,
79 E_MACL_REGNUM,
80 E_SBR_REGNUM,
81 E_VBR_REGNUM
928e48af 82};
c906108c 83
4bb1dc5e
CV
84#define E_PSEUDO_CCR_REGNUM (NUM_REGS)
85#define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
86
c906108c
SS
87#define UNSIGNED_SHORT(X) ((X) & 0xffff)
88
89#define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
90#define IS_PUSH_FP(x) (x == 0x6df6)
91#define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
92#define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
93#define IS_SUB2_SP(x) (x==0x1b87)
94#define IS_SUB4_SP(x) (x==0x1b97)
95#define IS_SUBL_SP(x) (x==0x7a37)
96#define IS_MOVK_R5(x) (x==0x7905)
97#define IS_SUB_R5SP(x) (x==0x1957)
98
928e48af
CV
99/* If the instruction at PC is an argument register spill, return its
100 length. Otherwise, return zero.
c906108c 101
928e48af
CV
102 An argument register spill is an instruction that moves an argument
103 from the register in which it was passed to the stack slot in which
104 it really lives. It is a byte, word, or longword move from an
4bb1dc5e
CV
105 argument register to a negative offset from the frame pointer.
106
107 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
108 is used, it could be a byte, word or long move to registers r3-r5. */
c906108c 109
928e48af
CV
110static int
111h8300_is_argument_spill (CORE_ADDR pc)
112{
113 int w = read_memory_unsigned_integer (pc, 2);
114
4bb1dc5e
CV
115 if (((w & 0xff88) == 0x0c88 /* mov.b Rsl, Rdl */
116 || (w & 0xff88) == 0x0d00 /* mov.w Rs, Rd */
117 || (w & 0xff88) == 0x0f80) /* mov.l Rs, Rd */
118 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
119 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5)/* Rd is R3, R4 or R5 */
120 return 2;
121
928e48af
CV
122 if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */
123 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
124 {
125 int w2 = read_memory_integer (pc + 2, 2);
126
127 /* ... and d:16 is negative. */
128 if (w2 < 0)
129 return 4;
130 }
131 else if (w == 0x7860)
132 {
133 int w2 = read_memory_integer (pc + 2, 2);
c906108c 134
928e48af
CV
135 if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */
136 {
137 LONGEST disp = read_memory_integer (pc + 4, 4);
c906108c 138
928e48af
CV
139 /* ... and d:24 is negative. */
140 if (disp < 0 && disp > 0xffffff)
141 return 8;
142 }
143 }
144 else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */
145 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
146 {
147 int w2 = read_memory_integer (pc + 2, 2);
c906108c 148
928e48af
CV
149 /* ... and d:16 is negative. */
150 if (w2 < 0)
151 return 4;
152 }
153 else if (w == 0x78e0)
154 {
155 int w2 = read_memory_integer (pc + 2, 2);
c906108c 156
928e48af
CV
157 if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */
158 {
159 LONGEST disp = read_memory_integer (pc + 4, 4);
160
161 /* ... and d:24 is negative. */
162 if (disp < 0 && disp > 0xffffff)
163 return 8;
164 }
165 }
166 else if (w == 0x0100)
167 {
168 int w2 = read_memory_integer (pc + 2, 2);
169
170 if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */
171 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
172 {
173 int w3 = read_memory_integer (pc + 4, 2);
174
175 /* ... and d:16 is negative. */
176 if (w3 < 0)
177 return 6;
178 }
179 else if (w2 == 0x78e0)
180 {
181 int w3 = read_memory_integer (pc + 4, 2);
182
183 if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */
184 {
185 LONGEST disp = read_memory_integer (pc + 6, 4);
186
187 /* ... and d:24 is negative. */
188 if (disp < 0 && disp > 0xffffff)
189 return 10;
190 }
191 }
192 }
193
194 return 0;
195}
196
197static CORE_ADDR
fba45db2 198h8300_skip_prologue (CORE_ADDR start_pc)
c906108c
SS
199{
200 short int w;
201 int adjust = 0;
202
203 /* Skip past all push and stm insns. */
204 while (1)
205 {
206 w = read_memory_unsigned_integer (start_pc, 2);
207 /* First look for push insns. */
208 if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
209 {
210 w = read_memory_unsigned_integer (start_pc + 2, 2);
211 adjust = 2;
212 }
213
214 if (IS_PUSH (w))
215 {
216 start_pc += 2 + adjust;
217 w = read_memory_unsigned_integer (start_pc, 2);
218 continue;
219 }
220 adjust = 0;
221 break;
222 }
223
224 /* Skip past a move to FP, either word or long sized */
225 w = read_memory_unsigned_integer (start_pc, 2);
226 if (w == 0x0100)
227 {
228 w = read_memory_unsigned_integer (start_pc + 2, 2);
229 adjust += 2;
230 }
231
232 if (IS_MOVE_FP (w))
233 {
234 start_pc += 2 + adjust;
235 w = read_memory_unsigned_integer (start_pc, 2);
236 }
237
238 /* Check for loading either a word constant into r5;
239 long versions are handled by the SUBL_SP below. */
240 if (IS_MOVK_R5 (w))
241 {
242 start_pc += 2;
243 w = read_memory_unsigned_integer (start_pc, 2);
244 }
245
246 /* Now check for subtracting r5 from sp, word sized only. */
247 if (IS_SUB_R5SP (w))
248 {
249 start_pc += 2 + adjust;
250 w = read_memory_unsigned_integer (start_pc, 2);
251 }
252
253 /* Check for subs #2 and subs #4. */
254 while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
255 {
256 start_pc += 2 + adjust;
257 w = read_memory_unsigned_integer (start_pc, 2);
258 }
259
260 /* Check for a 32bit subtract. */
261 if (IS_SUBL_SP (w))
262 start_pc += 6 + adjust;
263
4bb1dc5e
CV
264 /* Skip past another possible stm insn for registers R3 to R5 (possibly used
265 for register qualified arguments. */
266 w = read_memory_unsigned_integer (start_pc, 2);
267 /* First look for push insns. */
268 if (w == 0x0110 || w == 0x0120 || w == 0x0130)
269 {
270 w = read_memory_unsigned_integer (start_pc + 2, 2);
271 if (IS_PUSH (w) && (w & 0xf) >= 0x3 && (w & 0xf) <= 0x5)
272 start_pc += 4;
273 }
274
928e48af
CV
275 /* Check for spilling an argument register to the stack frame.
276 This could also be an initializing store from non-prologue code,
277 but I don't think there's any harm in skipping that. */
278 for (;;)
279 {
280 int spill_size = h8300_is_argument_spill (start_pc);
281 if (spill_size == 0)
282 break;
283 start_pc += spill_size;
284 }
285
c906108c
SS
286 return start_pc;
287}
288
c906108c
SS
289/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
290 is not the address of a valid instruction, the address of the next
291 instruction beyond ADDR otherwise. *PWORD1 receives the first word
c5aa993b 292 of the instruction. */
c906108c 293
928e48af 294static CORE_ADDR
884a26c8
MS
295h8300_next_prologue_insn (CORE_ADDR addr,
296 CORE_ADDR lim,
297 unsigned short* pword1)
c906108c
SS
298{
299 char buf[2];
300 if (addr < lim + 8)
301 {
302 read_memory (addr, buf, 2);
303 *pword1 = extract_signed_integer (buf, 2);
304
305 return addr + 2;
306 }
307 return 0;
308}
309
310/* Examine the prologue of a function. `ip' points to the first instruction.
311 `limit' is the limit of the prologue (e.g. the addr of the first
312 linenumber, or perhaps the program counter if we're stepping through).
313 `frame_sp' is the stack pointer value in use in this frame.
314 `fsr' is a pointer to a frame_saved_regs structure into which we put
315 info about the registers saved by this frame.
316 `fi' is a struct frame_info pointer; we fill in various fields in it
317 to reflect the offsets of the arg pointer and the locals pointer. */
318
928e48af
CV
319/* Any function with a frame looks like this
320 SECOND ARG
321 FIRST ARG
322 RET PC
323 SAVED R2
324 SAVED R3
325 SAVED FP <-FP POINTS HERE
326 LOCALS0
327 LOCALS1 <-SP POINTS HERE
328 */
329
c906108c 330static CORE_ADDR
aa1ee363 331h8300_examine_prologue (CORE_ADDR ip, CORE_ADDR limit,
928e48af
CV
332 CORE_ADDR after_prolog_fp, CORE_ADDR *fsr,
333 struct frame_info *fi)
c906108c 334{
52f0bd74 335 CORE_ADDR next_ip;
c906108c
SS
336 int r;
337 int have_fp = 0;
928e48af 338 unsigned short insn_word;
c906108c
SS
339 /* Number of things pushed onto stack, starts at 2/4, 'cause the
340 PC is already there */
928e48af 341 unsigned int reg_save_depth = BINWORD;
c906108c
SS
342
343 unsigned int auto_depth = 0; /* Number of bytes of autos */
344
345 char in_frame[11]; /* One for each reg */
346
347 int adjust = 0;
348
349 memset (in_frame, 1, 11);
350 for (r = 0; r < 8; r++)
351 {
928e48af 352 fsr[r] = 0;
c906108c
SS
353 }
354 if (after_prolog_fp == 0)
355 {
928e48af 356 after_prolog_fp = read_register (E_SP_REGNUM);
c906108c
SS
357 }
358
359 /* If the PC isn't valid, quit now. */
454d0511
DD
360 if (ip == 0 || ip & (is_h8300hmode (current_gdbarch) &&
361 !is_h8300_normal_mode (current_gdbarch) ? ~0xffffff : ~0xffff))
c906108c
SS
362 return 0;
363
d1a8e808 364 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c 365
4bb1dc5e 366 if (insn_word == 0x0100) /* mov.l */
c906108c
SS
367 {
368 insn_word = read_memory_unsigned_integer (ip + 2, 2);
369 adjust = 2;
370 }
371
372 /* Skip over any fp push instructions */
928e48af 373 fsr[E_FP_REGNUM] = after_prolog_fp;
c906108c
SS
374 while (next_ip && IS_PUSH_FP (insn_word))
375 {
376 ip = next_ip + adjust;
377
378 in_frame[insn_word & 0x7] = reg_save_depth;
d1a8e808 379 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
380 reg_save_depth += 2 + adjust;
381 }
382
383 /* Is this a move into the fp */
384 if (next_ip && IS_MOV_SP_FP (insn_word))
385 {
386 ip = next_ip;
d1a8e808 387 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
388 have_fp = 1;
389 }
390
391 /* Skip over any stack adjustment, happens either with a number of
392 sub#2,sp or a mov #x,r5 sub r5,sp */
393
394 if (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
395 {
396 while (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
397 {
398 auto_depth += IS_SUB2_SP (insn_word) ? 2 : 4;
399 ip = next_ip;
d1a8e808 400 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
401 }
402 }
403 else
404 {
405 if (next_ip && IS_MOVK_R5 (insn_word))
406 {
407 ip = next_ip;
d1a8e808 408 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
409 auto_depth += insn_word;
410
d1a8e808 411 next_ip = h8300_next_prologue_insn (next_ip, limit, &insn_word);
c906108c
SS
412 auto_depth += insn_word;
413 }
414 if (next_ip && IS_SUBL_SP (insn_word))
415 {
416 ip = next_ip;
417 auto_depth += read_memory_unsigned_integer (ip, 4);
418 ip += 4;
419
d1a8e808 420 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
421 }
422 }
423
424 /* Now examine the push insns to determine where everything lives
425 on the stack. */
426 while (1)
427 {
428 adjust = 0;
429 if (!next_ip)
430 break;
431
432 if (insn_word == 0x0100)
433 {
434 ip = next_ip;
d1a8e808 435 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
436 adjust = 2;
437 }
438
439 if (IS_PUSH (insn_word))
440 {
ddd216ea
CV
441 auto_depth += 2 + adjust;
442 fsr[insn_word & 0x7] = after_prolog_fp - auto_depth;
c906108c 443 ip = next_ip;
d1a8e808 444 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
445 continue;
446 }
447
448 /* Now check for push multiple insns. */
449 if (insn_word == 0x0110 || insn_word == 0x0120 || insn_word == 0x0130)
450 {
451 int count = ((insn_word >> 4) & 0xf) + 1;
452 int start, i;
453
454 ip = next_ip;
d1a8e808 455 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
456 start = insn_word & 0x7;
457
6d305052 458 for (i = start; i < start + count; i++)
c906108c 459 {
c906108c 460 auto_depth += 4;
ddd216ea 461 fsr[i] = after_prolog_fp - auto_depth;
c906108c
SS
462 }
463 }
464 break;
465 }
466
c906108c 467 /* The PC is at a known place */
da50a4b7 468 get_frame_extra_info (fi)->from_pc =
7e78f0ca 469 read_memory_unsigned_integer (after_prolog_fp + BINWORD, BINWORD);
c906108c
SS
470
471 /* Rememeber any others too */
928e48af 472 in_frame[E_PC_REGNUM] = 0;
c5aa993b 473
c906108c
SS
474 if (have_fp)
475 /* We keep the old FP in the SP spot */
884a26c8
MS
476 fsr[E_SP_REGNUM] = read_memory_unsigned_integer (fsr[E_FP_REGNUM],
477 BINWORD);
c906108c 478 else
928e48af 479 fsr[E_SP_REGNUM] = after_prolog_fp + auto_depth;
c906108c
SS
480
481 return (ip);
482}
483
928e48af
CV
484static void
485h8300_frame_init_saved_regs (struct frame_info *fi)
c906108c 486{
928e48af
CV
487 CORE_ADDR func_addr, func_end;
488
1b1d3794 489 if (!deprecated_get_frame_saved_regs (fi))
928e48af
CV
490 {
491 frame_saved_regs_zalloc (fi);
492
493 /* Find the beginning of this function, so we can analyze its
494 prologue. */
884a26c8
MS
495 if (find_pc_partial_function (get_frame_pc (fi), NULL,
496 &func_addr, &func_end))
928e48af
CV
497 {
498 struct symtab_and_line sal = find_pc_line (func_addr, 0);
884a26c8
MS
499 CORE_ADDR limit = (sal.end && sal.end < get_frame_pc (fi))
500 ? sal.end : get_frame_pc (fi);
928e48af 501 /* This will fill in fields in fi. */
1e2330ba 502 h8300_examine_prologue (func_addr, limit, get_frame_base (fi),
1b1d3794 503 deprecated_get_frame_saved_regs (fi), fi);
928e48af
CV
504 }
505 /* Else we're out of luck (can't debug completely stripped code).
506 FIXME. */
507 }
508}
509
a5afb99f
AC
510/* Given a GDB frame, determine the address of the calling function's
511 frame. This will be used to create a new GDB frame struct, and
e9582e71
AC
512 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
513 will be called for the new frame.
928e48af
CV
514
515 For us, the frame address is its stack pointer value, so we look up
884a26c8
MS
516 the function prologue to determine the caller's sp value, and
517 return it. */
928e48af
CV
518
519static CORE_ADDR
520h8300_frame_chain (struct frame_info *thisframe)
521{
1e2330ba
AC
522 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe),
523 get_frame_base (thisframe),
524 get_frame_base (thisframe)))
928e48af 525 { /* initialize the from_pc now */
da50a4b7 526 get_frame_extra_info (thisframe)->from_pc =
1e2330ba
AC
527 deprecated_read_register_dummy (get_frame_pc (thisframe),
528 get_frame_base (thisframe),
135c175f 529 E_PC_REGNUM);
1e2330ba 530 return get_frame_base (thisframe);
c906108c 531 }
1b1d3794 532 return deprecated_get_frame_saved_regs (thisframe)[E_SP_REGNUM];
c906108c
SS
533}
534
535/* Return the saved PC from this frame.
536
537 If the frame has a memory copy of SRP_REGNUM, use that. If not,
538 just use the register SRP_REGNUM itself. */
539
928e48af 540static CORE_ADDR
fba45db2 541h8300_frame_saved_pc (struct frame_info *frame)
c906108c 542{
1e2330ba
AC
543 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
544 get_frame_base (frame),
545 get_frame_base (frame)))
546 return deprecated_read_register_dummy (get_frame_pc (frame),
547 get_frame_base (frame),
135c175f 548 E_PC_REGNUM);
c906108c 549 else
da50a4b7 550 return get_frame_extra_info (frame)->from_pc;
c906108c
SS
551}
552
928e48af
CV
553static void
554h8300_init_extra_frame_info (int fromleaf, struct frame_info *fi)
555{
da50a4b7 556 if (!get_frame_extra_info (fi))
928e48af 557 {
a00a19e9 558 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
da50a4b7 559 get_frame_extra_info (fi)->from_pc = 0;
928e48af 560
50abf9e5 561 if (!get_frame_pc (fi))
928e48af 562 {
11c02a10
AC
563 if (get_next_frame (fi))
564 deprecated_update_frame_pc_hack (fi, h8300_frame_saved_pc (get_next_frame (fi)));
928e48af
CV
565 }
566 h8300_frame_init_saved_regs (fi);
567 }
568}
569
63d47a7d 570/* Function: push_dummy_call
c906108c 571 Setup the function arguments for calling a function in the inferior.
928e48af
CV
572 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
573 on the H8/300H.
574
575 There are actually two ABI's here: -mquickcall (the default) and
576 -mno-quickcall. With -mno-quickcall, all arguments are passed on
577 the stack after the return address, word-aligned. With
578 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
579 GCC doesn't indicate in the object file which ABI was used to
580 compile it, GDB only supports the default --- -mquickcall.
581
582 Here are the rules for -mquickcall, in detail:
583
584 Each argument, whether scalar or aggregate, is padded to occupy a
585 whole number of words. Arguments smaller than a word are padded at
586 the most significant end; those larger than a word are padded at
587 the least significant end.
588
589 The initial arguments are passed in r0 -- r2. Earlier arguments go in
590 lower-numbered registers. Multi-word arguments are passed in
591 consecutive registers, with the most significant end in the
592 lower-numbered register.
593
594 If an argument doesn't fit entirely in the remaining registers, it
595 is passed entirely on the stack. Stack arguments begin just after
596 the return address. Once an argument has overflowed onto the stack
597 this way, all subsequent arguments are passed on the stack.
598
599 The above rule has odd consequences. For example, on the h8/300s,
600 if a function takes two longs and an int as arguments:
601 - the first long will be passed in r0/r1,
602 - the second long will be passed entirely on the stack, since it
603 doesn't fit in r2,
604 - and the int will be passed on the stack, even though it could fit
605 in r2.
606
607 A weird exception: if an argument is larger than a word, but not a
608 whole number of words in length (before padding), it is passed on
609 the stack following the rules for stack arguments above, even if
610 there are sufficient registers available to hold it. Stranger
611 still, the argument registers are still `used up' --- even though
612 there's nothing in them.
613
614 So, for example, on the h8/300s, if a function expects a three-byte
615 structure and an int, the structure will go on the stack, and the
616 int will go in r2, not r0.
617
618 If the function returns an aggregate type (struct, union, or class)
619 by value, the caller must allocate space to hold the return value,
620 and pass the callee a pointer to this space as an invisible first
621 argument, in R0.
622
623 For varargs functions, the last fixed argument and all the variable
624 arguments are always passed on the stack. This means that calls to
625 varargs functions don't work properly unless there is a prototype
626 in scope.
627
628 Basically, this ABI is not good, for the following reasons:
629 - You can't call vararg functions properly unless a prototype is in scope.
630 - Structure passing is inconsistent, to no purpose I can see.
631 - It often wastes argument registers, of which there are only three
632 to begin with. */
c906108c 633
928e48af 634static CORE_ADDR
63d47a7d
CV
635h8300_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
636 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
637 struct value **args, CORE_ADDR sp, int struct_return,
638 CORE_ADDR struct_addr)
c906108c 639{
63d47a7d 640 int stack_alloc = 0, stack_offset = 0;
928e48af 641 int wordsize = BINWORD;
63d47a7d 642 int reg = E_ARG0_REGNUM;
928e48af
CV
643 int argument;
644
645 /* First, make sure the stack is properly aligned. */
5b03f266 646 sp = align_down (sp, wordsize);
928e48af
CV
647
648 /* Now make sure there's space on the stack for the arguments. We
649 may over-allocate a little here, but that won't hurt anything. */
928e48af 650 for (argument = 0; argument < nargs; argument++)
5b03f266 651 stack_alloc += align_up (TYPE_LENGTH (VALUE_TYPE (args[argument])),
928e48af
CV
652 wordsize);
653 sp -= stack_alloc;
654
655 /* Now load as many arguments as possible into registers, and push
63d47a7d
CV
656 the rest onto the stack.
657 If we're returning a structure by value, then we must pass a
928e48af
CV
658 pointer to the buffer for the return value as an invisible first
659 argument. */
660 if (struct_return)
63d47a7d 661 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
928e48af
CV
662
663 for (argument = 0; argument < nargs; argument++)
c906108c 664 {
928e48af
CV
665 struct type *type = VALUE_TYPE (args[argument]);
666 int len = TYPE_LENGTH (type);
667 char *contents = (char *) VALUE_CONTENTS (args[argument]);
668
669 /* Pad the argument appropriately. */
5b03f266 670 int padded_len = align_up (len, wordsize);
928e48af
CV
671 char *padded = alloca (padded_len);
672
673 memset (padded, 0, padded_len);
674 memcpy (len < wordsize ? padded + padded_len - len : padded,
675 contents, len);
676
677 /* Could the argument fit in the remaining registers? */
678 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
679 {
680 /* Are we going to pass it on the stack anyway, for no good
681 reason? */
682 if (len > wordsize && len % wordsize)
683 {
684 /* I feel so unclean. */
685 write_memory (sp + stack_offset, padded, padded_len);
686 stack_offset += padded_len;
687
688 /* That's right --- even though we passed the argument
689 on the stack, we consume the registers anyway! Love
690 me, love my dog. */
691 reg += padded_len / wordsize;
692 }
693 else
694 {
695 /* Heavens to Betsy --- it's really going in registers!
696 It would be nice if we could use write_register_bytes
697 here, but on the h8/300s, there are gaps between
698 the registers in the register file. */
699 int offset;
700
701 for (offset = 0; offset < padded_len; offset += wordsize)
702 {
884a26c8
MS
703 ULONGEST word = extract_unsigned_integer (padded + offset,
704 wordsize);
63d47a7d 705 regcache_cooked_write_unsigned (regcache, reg++, word);
928e48af
CV
706 }
707 }
708 }
c906108c 709 else
928e48af
CV
710 {
711 /* It doesn't fit in registers! Onto the stack it goes. */
712 write_memory (sp + stack_offset, padded, padded_len);
713 stack_offset += padded_len;
714
715 /* Once one argument has spilled onto the stack, all
716 subsequent arguments go on the stack. */
717 reg = E_ARGLAST_REGNUM + 1;
718 }
c906108c 719 }
928e48af 720
63d47a7d
CV
721 /* Store return address. */
722 sp -= wordsize;
723 write_memory_unsigned_integer (sp, wordsize, bp_addr);
c906108c 724
63d47a7d
CV
725 /* Update stack pointer. */
726 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
c906108c 727
c906108c
SS
728 return sp;
729}
730
7256e1a5 731/* Function: h8300_pop_frame
c906108c
SS
732 Restore the machine to the state it had before the current frame
733 was created. Usually used either by the "RETURN" command, or by
734 call_function_by_hand after the dummy_frame is finished. */
735
928e48af 736static void
fba45db2 737h8300_pop_frame (void)
c906108c 738{
928e48af 739 unsigned regno;
c906108c
SS
740 struct frame_info *frame = get_current_frame ();
741
1e2330ba
AC
742 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
743 get_frame_base (frame),
744 get_frame_base (frame)))
c906108c 745 {
c5aa993b 746 generic_pop_dummy_frame ();
c906108c
SS
747 }
748 else
749 {
928e48af 750 for (regno = 0; regno < 8; regno++)
c906108c 751 {
928e48af 752 /* Don't forget E_SP_REGNUM is a frame_saved_regs struct is the
c906108c 753 actual value we want, not the address of the value we want. */
1b1d3794 754 if (deprecated_get_frame_saved_regs (frame)[regno] && regno != E_SP_REGNUM)
928e48af 755 write_register (regno,
884a26c8 756 read_memory_integer
1b1d3794
AC
757 (deprecated_get_frame_saved_regs (frame)[regno], BINWORD));
758 else if (deprecated_get_frame_saved_regs (frame)[regno] && regno == E_SP_REGNUM)
1e2330ba 759 write_register (regno, get_frame_base (frame) + 2 * BINWORD);
c906108c
SS
760 }
761
928e48af 762 /* Don't forget to update the PC too! */
da50a4b7 763 write_register (E_PC_REGNUM, get_frame_extra_info (frame)->from_pc);
c906108c
SS
764 }
765 flush_cached_frames ();
766}
767
768/* Function: extract_return_value
769 Figure out where in REGBUF the called function has left its return value.
770 Copy that into VALBUF. Be sure to account for CPU type. */
771
928e48af 772static void
0261a0d0
CV
773h8300_extract_return_value (struct type *type, struct regcache *regcache,
774 void *valbuf)
c906108c 775{
928e48af 776 int len = TYPE_LENGTH (type);
708cc1b6 777 ULONGEST c, addr;
c5aa993b
JM
778
779 switch (len)
780 {
0261a0d0
CV
781 case 1:
782 case 2:
783 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
784 store_unsigned_integer (valbuf, len, c);
785 break;
786 case 4: /* Needs two registers on plain H8/300 */
787 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
788 store_unsigned_integer (valbuf, 2, c);
789 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
790 store_unsigned_integer ((void*)((char *)valbuf + 2), 2, c);
791 break;
708cc1b6
MS
792 case 8: /* long long is now 8 bytes. */
793 if (TYPE_CODE (type) == TYPE_CODE_INT)
794 {
795 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
796 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
797 store_unsigned_integer (valbuf, len, c);
798 }
799 else
800 {
801 error ("I don't know how this 8 byte value is returned.");
802 }
0261a0d0
CV
803 break;
804 }
805}
806
807static void
808h8300h_extract_return_value (struct type *type, struct regcache *regcache,
809 void *valbuf)
810{
811 int len = TYPE_LENGTH (type);
708cc1b6 812 ULONGEST c, addr;
0261a0d0
CV
813
814 switch (len)
815 {
816 case 1:
817 case 2:
818 case 4:
819 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
820 store_unsigned_integer (valbuf, len, c);
821 break;
708cc1b6
MS
822 case 8: /* long long is now 8 bytes. */
823 if (TYPE_CODE (type) == TYPE_CODE_INT)
824 {
825 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
826 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
827 store_unsigned_integer (valbuf, len, c);
828 }
829 else
830 {
831 error ("I don't know how this 8 byte value is returned.");
832 }
0261a0d0 833 break;
c5aa993b 834 }
c906108c
SS
835}
836
0261a0d0 837
c906108c
SS
838/* Function: store_return_value
839 Place the appropriate value in the appropriate registers.
840 Primarily used by the RETURN command. */
841
928e48af 842static void
0261a0d0
CV
843h8300_store_return_value (struct type *type, struct regcache *regcache,
844 const void *valbuf)
c906108c 845{
928e48af 846 int len = TYPE_LENGTH (type);
0261a0d0 847 ULONGEST val;
c906108c 848
c5aa993b
JM
849 switch (len)
850 {
0261a0d0 851 case 1:
708cc1b6 852 case 2: /* short... */
0261a0d0
CV
853 val = extract_unsigned_integer (valbuf, len);
854 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
855 break;
708cc1b6 856 case 4: /* long, float */
0261a0d0
CV
857 val = extract_unsigned_integer (valbuf, len);
858 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
859 (val >> 16) &0xffff);
860 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
861 break;
708cc1b6
MS
862 case 8: /* long long, double and long double are all defined
863 as 4 byte types so far so this shouldn't happen. */
864 error ("I don't know how to return an 8 byte value.");
0261a0d0
CV
865 break;
866 }
867}
868
869static void
870h8300h_store_return_value (struct type *type, struct regcache *regcache,
871 const void *valbuf)
872{
873 int len = TYPE_LENGTH (type);
874 ULONGEST val;
875
876 switch (len)
877 {
878 case 1:
879 case 2:
708cc1b6 880 case 4: /* long, float */
0261a0d0
CV
881 val = extract_unsigned_integer (valbuf, len);
882 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
883 break;
708cc1b6
MS
884 case 8: /* long long, double and long double are all defined
885 as 4 byte types so far so this shouldn't happen. */
886 error ("I don't know how to return an 8 byte value.");
0261a0d0 887 break;
c5aa993b 888 }
c906108c
SS
889}
890
928e48af 891static struct cmd_list_element *setmachinelist;
c906108c 892
928e48af
CV
893static const char *
894h8300_register_name (int regno)
c906108c 895{
084edea5 896 /* The register names change depending on which h8300 processor
928e48af 897 type is selected. */
084edea5 898 static char *register_names[] = {
928e48af 899 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
4bb1dc5e
CV
900 "sp", "","pc","cycles", "tick", "inst",
901 "ccr", /* pseudo register */
928e48af 902 };
084edea5
CV
903 if (regno < 0
904 || regno >= (sizeof (register_names) / sizeof (*register_names)))
905 internal_error (__FILE__, __LINE__,
906 "h8300_register_name: illegal register number %d", regno);
907 else
908 return register_names[regno];
909}
910
911static const char *
912h8300s_register_name (int regno)
913{
914 static char *register_names[] = {
928e48af 915 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
4bb1dc5e 916 "sp", "", "pc", "cycles", "", "tick", "inst",
7be04a68 917 "mach", "macl",
4bb1dc5e 918 "ccr", "exr" /* pseudo registers */
928e48af 919 };
084edea5
CV
920 if (regno < 0
921 || regno >= (sizeof (register_names) / sizeof (*register_names)))
922 internal_error (__FILE__, __LINE__,
923 "h8300s_register_name: illegal register number %d", regno);
924 else
925 return register_names[regno];
926}
927
928static const char *
929h8300sx_register_name (int regno)
930{
931 static char *register_names[] = {
932 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
4bb1dc5e
CV
933 "sp", "", "pc", "cycles", "", "tick", "inst",
934 "mach", "macl", "sbr", "vbr",
935 "ccr", "exr" /* pseudo registers */
084edea5
CV
936 };
937 if (regno < 0
938 || regno >= (sizeof (register_names) / sizeof (*register_names)))
928e48af 939 internal_error (__FILE__, __LINE__,
084edea5 940 "h8300sx_register_name: illegal register number %d", regno);
c906108c 941 else
928e48af 942 return register_names[regno];
c906108c
SS
943}
944
945static void
4904ba5b
AC
946h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
947 struct frame_info *frame, int regno)
c906108c 948{
084edea5
CV
949 LONGEST rval;
950 const char *name = gdbarch_register_name (gdbarch, regno);
c906108c 951
928e48af
CV
952 if (!name || !*name)
953 return;
c906108c 954
7f5f525d 955 rval = get_frame_register_signed (frame, regno);
4904ba5b
AC
956
957 fprintf_filtered (file, "%-14s ", name);
454d0511
DD
958 if (regno == E_PSEUDO_CCR_REGNUM ||
959 (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)))
c906108c 960 {
084edea5
CV
961 fprintf_filtered (file, "0x%02x ", (unsigned char)rval);
962 print_longest (file, 'u', 1, rval);
c906108c
SS
963 }
964 else
965 {
084edea5
CV
966 fprintf_filtered (file, "0x%s ", phex ((ULONGEST)rval, BINWORD));
967 print_longest (file, 'd', 1, rval);
c906108c 968 }
4bb1dc5e 969 if (regno == E_PSEUDO_CCR_REGNUM)
c906108c
SS
970 {
971 /* CCR register */
972 int C, Z, N, V;
084edea5 973 unsigned char l = rval & 0xff;
4904ba5b
AC
974 fprintf_filtered (file, "\t");
975 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
976 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
977 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
978 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
c906108c
SS
979 N = (l & 0x8) != 0;
980 Z = (l & 0x4) != 0;
981 V = (l & 0x2) != 0;
982 C = (l & 0x1) != 0;
4904ba5b
AC
983 fprintf_filtered (file, "N-%d ", N);
984 fprintf_filtered (file, "Z-%d ", Z);
985 fprintf_filtered (file, "V-%d ", V);
986 fprintf_filtered (file, "C-%d ", C);
c906108c 987 if ((C | Z) == 0)
4904ba5b 988 fprintf_filtered (file, "u> ");
c906108c 989 if ((C | Z) == 1)
4904ba5b 990 fprintf_filtered (file, "u<= ");
c906108c 991 if ((C == 0))
4904ba5b 992 fprintf_filtered (file, "u>= ");
c906108c 993 if (C == 1)
4904ba5b 994 fprintf_filtered (file, "u< ");
c906108c 995 if (Z == 0)
4904ba5b 996 fprintf_filtered (file, "!= ");
c906108c 997 if (Z == 1)
4904ba5b 998 fprintf_filtered (file, "== ");
c906108c 999 if ((N ^ V) == 0)
4904ba5b 1000 fprintf_filtered (file, ">= ");
c906108c 1001 if ((N ^ V) == 1)
4904ba5b 1002 fprintf_filtered (file, "< ");
c906108c 1003 if ((Z | (N ^ V)) == 0)
4904ba5b 1004 fprintf_filtered (file, "> ");
c906108c 1005 if ((Z | (N ^ V)) == 1)
4904ba5b 1006 fprintf_filtered (file, "<= ");
c906108c 1007 }
454d0511 1008 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
fc974602
AV
1009 {
1010 /* EXR register */
084edea5 1011 unsigned char l = rval & 0xff;
4904ba5b
AC
1012 fprintf_filtered (file, "\t");
1013 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1014 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1015 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1016 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
d194345b 1017 }
4904ba5b 1018 fprintf_filtered (file, "\n");
928e48af
CV
1019}
1020
1021static void
4904ba5b
AC
1022h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1023 struct frame_info *frame, int regno, int cpregs)
928e48af
CV
1024{
1025 if (regno < 0)
4bb1dc5e
CV
1026 {
1027 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1028 h8300_print_register (gdbarch, file, frame, regno);
1029 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1030 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
454d0511 1031 if (is_h8300smode (current_gdbarch))
4bb1dc5e
CV
1032 {
1033 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
454d0511 1034 if (is_h8300sxmode (current_gdbarch))
4bb1dc5e
CV
1035 {
1036 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1037 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
4bb1dc5e 1038 }
7be04a68
MS
1039 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1040 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
4bb1dc5e
CV
1041 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1042 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1043 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1044 }
1045 else
1046 {
1047 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1048 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1049 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1050 }
1051 }
928e48af 1052 else
4bb1dc5e
CV
1053 {
1054 if (regno == E_CCR_REGNUM)
1055 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
454d0511 1056 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
4bb1dc5e
CV
1057 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1058 else
1059 h8300_print_register (gdbarch, file, frame, regno);
1060 }
928e48af
CV
1061}
1062
1063static CORE_ADDR
1064h8300_saved_pc_after_call (struct frame_info *ignore)
1065{
1066 return read_memory_unsigned_integer (read_register (E_SP_REGNUM), BINWORD);
1067}
1068
928e48af 1069static struct type *
055c394a 1070h8300_register_type (struct gdbarch *gdbarch, int regno)
928e48af 1071{
4bb1dc5e 1072 if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
928e48af 1073 internal_error (__FILE__, __LINE__,
055c394a 1074 "h8300_register_type: illegal register number %d",
928e48af
CV
1075 regno);
1076 else
084edea5
CV
1077 {
1078 switch (regno)
1079 {
1080 case E_PC_REGNUM:
1081 return builtin_type_void_func_ptr;
1082 case E_SP_REGNUM:
1083 case E_FP_REGNUM:
1084 return builtin_type_void_data_ptr;
084edea5 1085 default:
4bb1dc5e
CV
1086 if (regno == E_PSEUDO_CCR_REGNUM)
1087 return builtin_type_uint8;
1088 else if (regno == E_PSEUDO_EXR_REGNUM)
1089 return builtin_type_uint8;
454d0511 1090 else if (is_h8300hmode (current_gdbarch))
4bb1dc5e
CV
1091 return builtin_type_int32;
1092 else
1093 return builtin_type_int16;
084edea5
CV
1094 }
1095 }
928e48af
CV
1096}
1097
4bb1dc5e
CV
1098static void
1099h8300_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1100 int regno, void *buf)
1101{
1102 if (regno == E_PSEUDO_CCR_REGNUM)
1103 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1104 else if (regno == E_PSEUDO_EXR_REGNUM)
1105 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1106 else
1107 regcache_raw_read (regcache, regno, buf);
1108}
1109
1110static void
1111h8300_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1112 int regno, const void *buf)
1113{
1114 if (regno == E_PSEUDO_CCR_REGNUM)
1115 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1116 else if (regno == E_PSEUDO_EXR_REGNUM)
1117 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1118 else
1119 regcache_raw_write (regcache, regno, buf);
1120}
1121
1122static int
1123h8300_dbg_reg_to_regnum (int regno)
1124{
1125 if (regno == E_CCR_REGNUM)
1126 return E_PSEUDO_CCR_REGNUM;
1127 return regno;
1128}
1129
1130static int
1131h8300s_dbg_reg_to_regnum (int regno)
1132{
1133 if (regno == E_CCR_REGNUM)
1134 return E_PSEUDO_CCR_REGNUM;
1135 if (regno == E_EXR_REGNUM)
1136 return E_PSEUDO_EXR_REGNUM;
1137 return regno;
1138}
1139
928e48af 1140static CORE_ADDR
0261a0d0 1141h8300_extract_struct_value_address (struct regcache *regcache)
928e48af 1142{
0261a0d0
CV
1143 ULONGEST addr;
1144 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
1145 return addr;
928e48af
CV
1146}
1147
1148const static unsigned char *
1149h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1150{
1151 /*static unsigned char breakpoint[] = { 0x7A, 0xFF };*/ /* ??? */
1152 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1153
1154 *lenptr = sizeof (breakpoint);
1155 return breakpoint;
1156}
1157
0261a0d0
CV
1158static CORE_ADDR
1159h8300_push_dummy_code (struct gdbarch *gdbarch,
1160 CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
1161 struct value **args, int nargs,
1162 struct type *value_type,
1163 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
1164{
1165 /* Allocate space sufficient for a breakpoint. */
1166 sp = (sp - 2) & ~1;
1167 /* Store the address of that breakpoint */
1168 *bp_addr = sp;
1169 /* h8300 always starts the call at the callee's entry point. */
1170 *real_pc = funaddr;
1171 return sp;
1172}
1173
928e48af
CV
1174static void
1175h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1176 struct frame_info *frame, const char *args)
1177{
1178 fprintf_filtered (file, "\
1179No floating-point info available for this processor.\n");
1180}
1181
1182static struct gdbarch *
1183h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1184{
928e48af
CV
1185 struct gdbarch_tdep *tdep = NULL;
1186 struct gdbarch *gdbarch;
1187
1188 arches = gdbarch_list_lookup_by_info (arches, &info);
1189 if (arches != NULL)
1190 return arches->gdbarch;
1191
1192#if 0
1193 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1194#endif
1195
1196 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1197 return NULL;
1198
084edea5
CV
1199 gdbarch = gdbarch_alloc (&info, 0);
1200
928e48af
CV
1201 switch (info.bfd_arch_info->mach)
1202 {
0a48e7e8 1203 case bfd_mach_h8300:
084edea5 1204 set_gdbarch_num_regs (gdbarch, 13);
4bb1dc5e
CV
1205 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1206 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1207 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1208 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1209 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
084edea5 1210 set_gdbarch_register_name (gdbarch, h8300_register_name);
084edea5
CV
1211 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1212 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
0261a0d0
CV
1213 set_gdbarch_extract_return_value (gdbarch, h8300_extract_return_value);
1214 set_gdbarch_store_return_value (gdbarch, h8300_store_return_value);
4bb1dc5e 1215 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
0a48e7e8
MS
1216 break;
1217 case bfd_mach_h8300h:
8efca6ba 1218 case bfd_mach_h8300hn:
084edea5 1219 set_gdbarch_num_regs (gdbarch, 13);
4bb1dc5e
CV
1220 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1221 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1222 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1223 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1224 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
084edea5 1225 set_gdbarch_register_name (gdbarch, h8300_register_name);
c98a2b49
SA
1226 if(info.bfd_arch_info->mach != bfd_mach_h8300hn)
1227 {
c98a2b49
SA
1228 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1229 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1230 }
1231 else
1232 {
c98a2b49
SA
1233 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1234 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1235 }
0261a0d0
CV
1236 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1237 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1238 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
0a48e7e8
MS
1239 break;
1240 case bfd_mach_h8300s:
8efca6ba 1241 case bfd_mach_h8300sn:
7be04a68 1242 set_gdbarch_num_regs (gdbarch, 16);
4bb1dc5e
CV
1243 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1244 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1245 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1246 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1247 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
084edea5 1248 set_gdbarch_register_name (gdbarch, h8300s_register_name);
c98a2b49
SA
1249 if(info.bfd_arch_info->mach != bfd_mach_h8300sn)
1250 {
c98a2b49
SA
1251 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1252 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1253 }
1254 else
1255 {
c98a2b49
SA
1256 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1257 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1258 }
0261a0d0
CV
1259 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1260 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1261 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
0a48e7e8
MS
1262 break;
1263 case bfd_mach_h8300sx:
084edea5 1264 case bfd_mach_h8300sxn:
084edea5 1265 set_gdbarch_num_regs (gdbarch, 18);
4bb1dc5e
CV
1266 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1267 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1268 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1269 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1270 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
084edea5 1271 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
c98a2b49
SA
1272 if(info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1273 {
c98a2b49
SA
1274 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1275 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1276 }
1277 else
1278 {
c98a2b49
SA
1279 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1280 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1281 }
0261a0d0
CV
1282 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1283 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1284 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
0a48e7e8 1285 break;
928e48af
CV
1286 }
1287
4bb1dc5e
CV
1288 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1289 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1290
a5afb99f
AC
1291 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1292 ready to unwind the PC first (see frame.c:get_prev_frame()). */
0968aa8c 1293 set_gdbarch_deprecated_init_frame_pc (gdbarch, deprecated_init_frame_pc_default);
a5afb99f 1294
928e48af
CV
1295 /*
1296 * Basic register fields and methods.
1297 */
1298
928e48af 1299 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
0ba6dca9 1300 set_gdbarch_deprecated_fp_regnum (gdbarch, E_FP_REGNUM);
928e48af 1301 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
055c394a 1302 set_gdbarch_register_type (gdbarch, h8300_register_type);
4904ba5b 1303 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
928e48af
CV
1304 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1305
1306 /*
1307 * Frame Info
1308 */
0261a0d0
CV
1309 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1310
884a26c8
MS
1311 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch,
1312 h8300_frame_init_saved_regs);
1313 set_gdbarch_deprecated_init_extra_frame_info (gdbarch,
1314 h8300_init_extra_frame_info);
618ce49f 1315 set_gdbarch_deprecated_frame_chain (gdbarch, h8300_frame_chain);
884a26c8
MS
1316 set_gdbarch_deprecated_saved_pc_after_call (gdbarch,
1317 h8300_saved_pc_after_call);
8bedc050 1318 set_gdbarch_deprecated_frame_saved_pc (gdbarch, h8300_frame_saved_pc);
63d47a7d 1319 set_gdbarch_deprecated_pop_frame (gdbarch, h8300_pop_frame);
928e48af
CV
1320
1321 /*
1322 * Miscelany
1323 */
1324 /* Stack grows up. */
1325 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
19772a2c 1326 set_gdbarch_deprecated_frameless_function_invocation (gdbarch, legacy_frameless_look_for_prologue);
928e48af 1327
74055713 1328 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, h8300_extract_struct_value_address);
1fd35568 1329 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
928e48af 1330 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
0261a0d0 1331 set_gdbarch_push_dummy_code (gdbarch, h8300_push_dummy_code);
63d47a7d 1332 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
928e48af
CV
1333
1334 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1335 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
708cc1b6 1336 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
084edea5
CV
1337 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1338 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
928e48af 1339
928e48af
CV
1340 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1341
708cc1b6
MS
1342 /* Char is unsigned. */
1343 set_gdbarch_char_signed (gdbarch, 0);
1344
928e48af 1345 return gdbarch;
c906108c
SS
1346}
1347
a78f21af
AC
1348extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1349
c906108c 1350void
fba45db2 1351_initialize_h8300_tdep (void)
c906108c 1352{
928e48af 1353 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
c906108c 1354}
454d0511
DD
1355
1356static int
1357is_h8300hmode (struct gdbarch *gdbarch)
1358{
1359 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1360 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1361 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1362 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1363 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1364 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1365}
1366
1367static int
1368is_h8300smode (struct gdbarch *gdbarch)
1369{
1370 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1371 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1372 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1373 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1374}
1375
1376static int
1377is_h8300sxmode (struct gdbarch *gdbarch)
1378{
1379 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1381}
1382
1383static int
1384is_h8300_normal_mode (struct gdbarch *gdbarch)
1385{
1386 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1387 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1388 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1389}
1390
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