2003-09-19 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
c906108c 1/* Target-machine dependent code for Hitachi H8/300, for GDB.
cda5a58a
AC
2
3 Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
1e698235 4 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23/*
c5aa993b
JM
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
c906108c
SS
26 */
27
28#include "defs.h"
c906108c 29#include "value.h"
928e48af
CV
30#include "inferior.h"
31#include "symfile.h"
32#include "arch-utils.h"
4e052eda 33#include "regcache.h"
928e48af
CV
34#include "gdbcore.h"
35#include "objfiles.h"
36#include "gdbcmd.h"
4904ba5b 37#include "gdb_assert.h"
a89aa300 38#include "dis-asm.h"
c906108c 39
928e48af
CV
40/* Extra info which is saved in each frame_info. */
41struct frame_extra_info
42{
43 CORE_ADDR from_pc;
928e48af 44};
c906108c 45
928e48af
CV
46enum
47{
48 h8300_reg_size = 2,
49 h8300h_reg_size = 4,
50 h8300_max_reg_size = 4,
51};
52#define BINWORD (h8300hmode ? h8300h_reg_size : h8300_reg_size)
53
54enum gdb_regnum
55{
56 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
0261a0d0
CV
57 E_RET0_REGNUM = E_R0_REGNUM,
58 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
928e48af
CV
59 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
60 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
61 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
62 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
63 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
64 E_SP_REGNUM,
65 E_CCR_REGNUM,
66 E_PC_REGNUM,
67 E_CYCLES_REGNUM,
68 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
69 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
084edea5
CV
70 E_INSTS_REGNUM,
71 E_MACH_REGNUM,
72 E_MACL_REGNUM,
73 E_SBR_REGNUM,
74 E_VBR_REGNUM
928e48af 75};
c906108c 76
4bb1dc5e
CV
77#define E_PSEUDO_CCR_REGNUM (NUM_REGS)
78#define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
79
c906108c
SS
80#define UNSIGNED_SHORT(X) ((X) & 0xffff)
81
82#define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
83#define IS_PUSH_FP(x) (x == 0x6df6)
84#define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
85#define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
86#define IS_SUB2_SP(x) (x==0x1b87)
87#define IS_SUB4_SP(x) (x==0x1b97)
88#define IS_SUBL_SP(x) (x==0x7a37)
89#define IS_MOVK_R5(x) (x==0x7905)
90#define IS_SUB_R5SP(x) (x==0x1957)
91
928e48af
CV
92/* If the instruction at PC is an argument register spill, return its
93 length. Otherwise, return zero.
c906108c 94
928e48af
CV
95 An argument register spill is an instruction that moves an argument
96 from the register in which it was passed to the stack slot in which
97 it really lives. It is a byte, word, or longword move from an
4bb1dc5e
CV
98 argument register to a negative offset from the frame pointer.
99
100 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
101 is used, it could be a byte, word or long move to registers r3-r5. */
c906108c 102
928e48af
CV
103static int
104h8300_is_argument_spill (CORE_ADDR pc)
105{
106 int w = read_memory_unsigned_integer (pc, 2);
107
4bb1dc5e
CV
108 if (((w & 0xff88) == 0x0c88 /* mov.b Rsl, Rdl */
109 || (w & 0xff88) == 0x0d00 /* mov.w Rs, Rd */
110 || (w & 0xff88) == 0x0f80) /* mov.l Rs, Rd */
111 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
112 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5)/* Rd is R3, R4 or R5 */
113 return 2;
114
928e48af
CV
115 if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */
116 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
117 {
118 int w2 = read_memory_integer (pc + 2, 2);
119
120 /* ... and d:16 is negative. */
121 if (w2 < 0)
122 return 4;
123 }
124 else if (w == 0x7860)
125 {
126 int w2 = read_memory_integer (pc + 2, 2);
c906108c 127
928e48af
CV
128 if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */
129 {
130 LONGEST disp = read_memory_integer (pc + 4, 4);
c906108c 131
928e48af
CV
132 /* ... and d:24 is negative. */
133 if (disp < 0 && disp > 0xffffff)
134 return 8;
135 }
136 }
137 else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */
138 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
139 {
140 int w2 = read_memory_integer (pc + 2, 2);
c906108c 141
928e48af
CV
142 /* ... and d:16 is negative. */
143 if (w2 < 0)
144 return 4;
145 }
146 else if (w == 0x78e0)
147 {
148 int w2 = read_memory_integer (pc + 2, 2);
c906108c 149
928e48af
CV
150 if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */
151 {
152 LONGEST disp = read_memory_integer (pc + 4, 4);
153
154 /* ... and d:24 is negative. */
155 if (disp < 0 && disp > 0xffffff)
156 return 8;
157 }
158 }
159 else if (w == 0x0100)
160 {
161 int w2 = read_memory_integer (pc + 2, 2);
162
163 if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */
164 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
165 {
166 int w3 = read_memory_integer (pc + 4, 2);
167
168 /* ... and d:16 is negative. */
169 if (w3 < 0)
170 return 6;
171 }
172 else if (w2 == 0x78e0)
173 {
174 int w3 = read_memory_integer (pc + 4, 2);
175
176 if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */
177 {
178 LONGEST disp = read_memory_integer (pc + 6, 4);
179
180 /* ... and d:24 is negative. */
181 if (disp < 0 && disp > 0xffffff)
182 return 10;
183 }
184 }
185 }
186
187 return 0;
188}
189
190static CORE_ADDR
fba45db2 191h8300_skip_prologue (CORE_ADDR start_pc)
c906108c
SS
192{
193 short int w;
194 int adjust = 0;
195
196 /* Skip past all push and stm insns. */
197 while (1)
198 {
199 w = read_memory_unsigned_integer (start_pc, 2);
200 /* First look for push insns. */
201 if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
202 {
203 w = read_memory_unsigned_integer (start_pc + 2, 2);
204 adjust = 2;
205 }
206
207 if (IS_PUSH (w))
208 {
209 start_pc += 2 + adjust;
210 w = read_memory_unsigned_integer (start_pc, 2);
211 continue;
212 }
213 adjust = 0;
214 break;
215 }
216
217 /* Skip past a move to FP, either word or long sized */
218 w = read_memory_unsigned_integer (start_pc, 2);
219 if (w == 0x0100)
220 {
221 w = read_memory_unsigned_integer (start_pc + 2, 2);
222 adjust += 2;
223 }
224
225 if (IS_MOVE_FP (w))
226 {
227 start_pc += 2 + adjust;
228 w = read_memory_unsigned_integer (start_pc, 2);
229 }
230
231 /* Check for loading either a word constant into r5;
232 long versions are handled by the SUBL_SP below. */
233 if (IS_MOVK_R5 (w))
234 {
235 start_pc += 2;
236 w = read_memory_unsigned_integer (start_pc, 2);
237 }
238
239 /* Now check for subtracting r5 from sp, word sized only. */
240 if (IS_SUB_R5SP (w))
241 {
242 start_pc += 2 + adjust;
243 w = read_memory_unsigned_integer (start_pc, 2);
244 }
245
246 /* Check for subs #2 and subs #4. */
247 while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
248 {
249 start_pc += 2 + adjust;
250 w = read_memory_unsigned_integer (start_pc, 2);
251 }
252
253 /* Check for a 32bit subtract. */
254 if (IS_SUBL_SP (w))
255 start_pc += 6 + adjust;
256
4bb1dc5e
CV
257 /* Skip past another possible stm insn for registers R3 to R5 (possibly used
258 for register qualified arguments. */
259 w = read_memory_unsigned_integer (start_pc, 2);
260 /* First look for push insns. */
261 if (w == 0x0110 || w == 0x0120 || w == 0x0130)
262 {
263 w = read_memory_unsigned_integer (start_pc + 2, 2);
264 if (IS_PUSH (w) && (w & 0xf) >= 0x3 && (w & 0xf) <= 0x5)
265 start_pc += 4;
266 }
267
928e48af
CV
268 /* Check for spilling an argument register to the stack frame.
269 This could also be an initializing store from non-prologue code,
270 but I don't think there's any harm in skipping that. */
271 for (;;)
272 {
273 int spill_size = h8300_is_argument_spill (start_pc);
274 if (spill_size == 0)
275 break;
276 start_pc += spill_size;
277 }
278
c906108c
SS
279 return start_pc;
280}
281
c906108c
SS
282/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
283 is not the address of a valid instruction, the address of the next
284 instruction beyond ADDR otherwise. *PWORD1 receives the first word
c5aa993b 285 of the instruction. */
c906108c 286
928e48af 287static CORE_ADDR
884a26c8
MS
288h8300_next_prologue_insn (CORE_ADDR addr,
289 CORE_ADDR lim,
290 unsigned short* pword1)
c906108c
SS
291{
292 char buf[2];
293 if (addr < lim + 8)
294 {
295 read_memory (addr, buf, 2);
296 *pword1 = extract_signed_integer (buf, 2);
297
298 return addr + 2;
299 }
300 return 0;
301}
302
303/* Examine the prologue of a function. `ip' points to the first instruction.
304 `limit' is the limit of the prologue (e.g. the addr of the first
305 linenumber, or perhaps the program counter if we're stepping through).
306 `frame_sp' is the stack pointer value in use in this frame.
307 `fsr' is a pointer to a frame_saved_regs structure into which we put
308 info about the registers saved by this frame.
309 `fi' is a struct frame_info pointer; we fill in various fields in it
310 to reflect the offsets of the arg pointer and the locals pointer. */
311
928e48af
CV
312/* Any function with a frame looks like this
313 SECOND ARG
314 FIRST ARG
315 RET PC
316 SAVED R2
317 SAVED R3
318 SAVED FP <-FP POINTS HERE
319 LOCALS0
320 LOCALS1 <-SP POINTS HERE
321 */
322
c906108c 323static CORE_ADDR
aa1ee363 324h8300_examine_prologue (CORE_ADDR ip, CORE_ADDR limit,
928e48af
CV
325 CORE_ADDR after_prolog_fp, CORE_ADDR *fsr,
326 struct frame_info *fi)
c906108c 327{
52f0bd74 328 CORE_ADDR next_ip;
c906108c
SS
329 int r;
330 int have_fp = 0;
928e48af 331 unsigned short insn_word;
c906108c
SS
332 /* Number of things pushed onto stack, starts at 2/4, 'cause the
333 PC is already there */
928e48af 334 unsigned int reg_save_depth = BINWORD;
c906108c
SS
335
336 unsigned int auto_depth = 0; /* Number of bytes of autos */
337
338 char in_frame[11]; /* One for each reg */
339
340 int adjust = 0;
341
342 memset (in_frame, 1, 11);
343 for (r = 0; r < 8; r++)
344 {
928e48af 345 fsr[r] = 0;
c906108c
SS
346 }
347 if (after_prolog_fp == 0)
348 {
928e48af 349 after_prolog_fp = read_register (E_SP_REGNUM);
c906108c
SS
350 }
351
352 /* If the PC isn't valid, quit now. */
353 if (ip == 0 || ip & (h8300hmode ? ~0xffffff : ~0xffff))
354 return 0;
355
d1a8e808 356 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c 357
4bb1dc5e 358 if (insn_word == 0x0100) /* mov.l */
c906108c
SS
359 {
360 insn_word = read_memory_unsigned_integer (ip + 2, 2);
361 adjust = 2;
362 }
363
364 /* Skip over any fp push instructions */
928e48af 365 fsr[E_FP_REGNUM] = after_prolog_fp;
c906108c
SS
366 while (next_ip && IS_PUSH_FP (insn_word))
367 {
368 ip = next_ip + adjust;
369
370 in_frame[insn_word & 0x7] = reg_save_depth;
d1a8e808 371 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
372 reg_save_depth += 2 + adjust;
373 }
374
375 /* Is this a move into the fp */
376 if (next_ip && IS_MOV_SP_FP (insn_word))
377 {
378 ip = next_ip;
d1a8e808 379 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
380 have_fp = 1;
381 }
382
383 /* Skip over any stack adjustment, happens either with a number of
384 sub#2,sp or a mov #x,r5 sub r5,sp */
385
386 if (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
387 {
388 while (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
389 {
390 auto_depth += IS_SUB2_SP (insn_word) ? 2 : 4;
391 ip = next_ip;
d1a8e808 392 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
393 }
394 }
395 else
396 {
397 if (next_ip && IS_MOVK_R5 (insn_word))
398 {
399 ip = next_ip;
d1a8e808 400 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
401 auto_depth += insn_word;
402
d1a8e808 403 next_ip = h8300_next_prologue_insn (next_ip, limit, &insn_word);
c906108c
SS
404 auto_depth += insn_word;
405 }
406 if (next_ip && IS_SUBL_SP (insn_word))
407 {
408 ip = next_ip;
409 auto_depth += read_memory_unsigned_integer (ip, 4);
410 ip += 4;
411
d1a8e808 412 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
413 }
414 }
415
416 /* Now examine the push insns to determine where everything lives
417 on the stack. */
418 while (1)
419 {
420 adjust = 0;
421 if (!next_ip)
422 break;
423
424 if (insn_word == 0x0100)
425 {
426 ip = next_ip;
d1a8e808 427 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
428 adjust = 2;
429 }
430
431 if (IS_PUSH (insn_word))
432 {
ddd216ea
CV
433 auto_depth += 2 + adjust;
434 fsr[insn_word & 0x7] = after_prolog_fp - auto_depth;
c906108c 435 ip = next_ip;
d1a8e808 436 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
437 continue;
438 }
439
440 /* Now check for push multiple insns. */
441 if (insn_word == 0x0110 || insn_word == 0x0120 || insn_word == 0x0130)
442 {
443 int count = ((insn_word >> 4) & 0xf) + 1;
444 int start, i;
445
446 ip = next_ip;
d1a8e808 447 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
c906108c
SS
448 start = insn_word & 0x7;
449
6d305052 450 for (i = start; i < start + count; i++)
c906108c 451 {
c906108c 452 auto_depth += 4;
ddd216ea 453 fsr[i] = after_prolog_fp - auto_depth;
c906108c
SS
454 }
455 }
456 break;
457 }
458
c906108c 459 /* The PC is at a known place */
da50a4b7 460 get_frame_extra_info (fi)->from_pc =
7e78f0ca 461 read_memory_unsigned_integer (after_prolog_fp + BINWORD, BINWORD);
c906108c
SS
462
463 /* Rememeber any others too */
928e48af 464 in_frame[E_PC_REGNUM] = 0;
c5aa993b 465
c906108c
SS
466 if (have_fp)
467 /* We keep the old FP in the SP spot */
884a26c8
MS
468 fsr[E_SP_REGNUM] = read_memory_unsigned_integer (fsr[E_FP_REGNUM],
469 BINWORD);
c906108c 470 else
928e48af 471 fsr[E_SP_REGNUM] = after_prolog_fp + auto_depth;
c906108c
SS
472
473 return (ip);
474}
475
928e48af
CV
476static void
477h8300_frame_init_saved_regs (struct frame_info *fi)
c906108c 478{
928e48af
CV
479 CORE_ADDR func_addr, func_end;
480
b2fb4676 481 if (!get_frame_saved_regs (fi))
928e48af
CV
482 {
483 frame_saved_regs_zalloc (fi);
484
485 /* Find the beginning of this function, so we can analyze its
486 prologue. */
884a26c8
MS
487 if (find_pc_partial_function (get_frame_pc (fi), NULL,
488 &func_addr, &func_end))
928e48af
CV
489 {
490 struct symtab_and_line sal = find_pc_line (func_addr, 0);
884a26c8
MS
491 CORE_ADDR limit = (sal.end && sal.end < get_frame_pc (fi))
492 ? sal.end : get_frame_pc (fi);
928e48af 493 /* This will fill in fields in fi. */
1e2330ba
AC
494 h8300_examine_prologue (func_addr, limit, get_frame_base (fi),
495 get_frame_saved_regs (fi), fi);
928e48af
CV
496 }
497 /* Else we're out of luck (can't debug completely stripped code).
498 FIXME. */
499 }
500}
501
a5afb99f
AC
502/* Given a GDB frame, determine the address of the calling function's
503 frame. This will be used to create a new GDB frame struct, and
e9582e71
AC
504 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
505 will be called for the new frame.
928e48af
CV
506
507 For us, the frame address is its stack pointer value, so we look up
884a26c8
MS
508 the function prologue to determine the caller's sp value, and
509 return it. */
928e48af
CV
510
511static CORE_ADDR
512h8300_frame_chain (struct frame_info *thisframe)
513{
1e2330ba
AC
514 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe),
515 get_frame_base (thisframe),
516 get_frame_base (thisframe)))
928e48af 517 { /* initialize the from_pc now */
da50a4b7 518 get_frame_extra_info (thisframe)->from_pc =
1e2330ba
AC
519 deprecated_read_register_dummy (get_frame_pc (thisframe),
520 get_frame_base (thisframe),
135c175f 521 E_PC_REGNUM);
1e2330ba 522 return get_frame_base (thisframe);
c906108c 523 }
b2fb4676 524 return get_frame_saved_regs (thisframe)[E_SP_REGNUM];
c906108c
SS
525}
526
527/* Return the saved PC from this frame.
528
529 If the frame has a memory copy of SRP_REGNUM, use that. If not,
530 just use the register SRP_REGNUM itself. */
531
928e48af 532static CORE_ADDR
fba45db2 533h8300_frame_saved_pc (struct frame_info *frame)
c906108c 534{
1e2330ba
AC
535 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
536 get_frame_base (frame),
537 get_frame_base (frame)))
538 return deprecated_read_register_dummy (get_frame_pc (frame),
539 get_frame_base (frame),
135c175f 540 E_PC_REGNUM);
c906108c 541 else
da50a4b7 542 return get_frame_extra_info (frame)->from_pc;
c906108c
SS
543}
544
928e48af
CV
545static void
546h8300_init_extra_frame_info (int fromleaf, struct frame_info *fi)
547{
da50a4b7 548 if (!get_frame_extra_info (fi))
928e48af 549 {
a00a19e9 550 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
da50a4b7 551 get_frame_extra_info (fi)->from_pc = 0;
928e48af 552
50abf9e5 553 if (!get_frame_pc (fi))
928e48af 554 {
11c02a10
AC
555 if (get_next_frame (fi))
556 deprecated_update_frame_pc_hack (fi, h8300_frame_saved_pc (get_next_frame (fi)));
928e48af
CV
557 }
558 h8300_frame_init_saved_regs (fi);
559 }
560}
561
63d47a7d 562/* Function: push_dummy_call
c906108c 563 Setup the function arguments for calling a function in the inferior.
928e48af
CV
564 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
565 on the H8/300H.
566
567 There are actually two ABI's here: -mquickcall (the default) and
568 -mno-quickcall. With -mno-quickcall, all arguments are passed on
569 the stack after the return address, word-aligned. With
570 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
571 GCC doesn't indicate in the object file which ABI was used to
572 compile it, GDB only supports the default --- -mquickcall.
573
574 Here are the rules for -mquickcall, in detail:
575
576 Each argument, whether scalar or aggregate, is padded to occupy a
577 whole number of words. Arguments smaller than a word are padded at
578 the most significant end; those larger than a word are padded at
579 the least significant end.
580
581 The initial arguments are passed in r0 -- r2. Earlier arguments go in
582 lower-numbered registers. Multi-word arguments are passed in
583 consecutive registers, with the most significant end in the
584 lower-numbered register.
585
586 If an argument doesn't fit entirely in the remaining registers, it
587 is passed entirely on the stack. Stack arguments begin just after
588 the return address. Once an argument has overflowed onto the stack
589 this way, all subsequent arguments are passed on the stack.
590
591 The above rule has odd consequences. For example, on the h8/300s,
592 if a function takes two longs and an int as arguments:
593 - the first long will be passed in r0/r1,
594 - the second long will be passed entirely on the stack, since it
595 doesn't fit in r2,
596 - and the int will be passed on the stack, even though it could fit
597 in r2.
598
599 A weird exception: if an argument is larger than a word, but not a
600 whole number of words in length (before padding), it is passed on
601 the stack following the rules for stack arguments above, even if
602 there are sufficient registers available to hold it. Stranger
603 still, the argument registers are still `used up' --- even though
604 there's nothing in them.
605
606 So, for example, on the h8/300s, if a function expects a three-byte
607 structure and an int, the structure will go on the stack, and the
608 int will go in r2, not r0.
609
610 If the function returns an aggregate type (struct, union, or class)
611 by value, the caller must allocate space to hold the return value,
612 and pass the callee a pointer to this space as an invisible first
613 argument, in R0.
614
615 For varargs functions, the last fixed argument and all the variable
616 arguments are always passed on the stack. This means that calls to
617 varargs functions don't work properly unless there is a prototype
618 in scope.
619
620 Basically, this ABI is not good, for the following reasons:
621 - You can't call vararg functions properly unless a prototype is in scope.
622 - Structure passing is inconsistent, to no purpose I can see.
623 - It often wastes argument registers, of which there are only three
624 to begin with. */
c906108c 625
928e48af 626static CORE_ADDR
63d47a7d
CV
627h8300_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
628 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
629 struct value **args, CORE_ADDR sp, int struct_return,
630 CORE_ADDR struct_addr)
c906108c 631{
63d47a7d 632 int stack_alloc = 0, stack_offset = 0;
928e48af 633 int wordsize = BINWORD;
63d47a7d 634 int reg = E_ARG0_REGNUM;
928e48af
CV
635 int argument;
636
637 /* First, make sure the stack is properly aligned. */
5b03f266 638 sp = align_down (sp, wordsize);
928e48af
CV
639
640 /* Now make sure there's space on the stack for the arguments. We
641 may over-allocate a little here, but that won't hurt anything. */
928e48af 642 for (argument = 0; argument < nargs; argument++)
5b03f266 643 stack_alloc += align_up (TYPE_LENGTH (VALUE_TYPE (args[argument])),
928e48af
CV
644 wordsize);
645 sp -= stack_alloc;
646
647 /* Now load as many arguments as possible into registers, and push
63d47a7d
CV
648 the rest onto the stack.
649 If we're returning a structure by value, then we must pass a
928e48af
CV
650 pointer to the buffer for the return value as an invisible first
651 argument. */
652 if (struct_return)
63d47a7d 653 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
928e48af
CV
654
655 for (argument = 0; argument < nargs; argument++)
c906108c 656 {
928e48af
CV
657 struct type *type = VALUE_TYPE (args[argument]);
658 int len = TYPE_LENGTH (type);
659 char *contents = (char *) VALUE_CONTENTS (args[argument]);
660
661 /* Pad the argument appropriately. */
5b03f266 662 int padded_len = align_up (len, wordsize);
928e48af
CV
663 char *padded = alloca (padded_len);
664
665 memset (padded, 0, padded_len);
666 memcpy (len < wordsize ? padded + padded_len - len : padded,
667 contents, len);
668
669 /* Could the argument fit in the remaining registers? */
670 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
671 {
672 /* Are we going to pass it on the stack anyway, for no good
673 reason? */
674 if (len > wordsize && len % wordsize)
675 {
676 /* I feel so unclean. */
677 write_memory (sp + stack_offset, padded, padded_len);
678 stack_offset += padded_len;
679
680 /* That's right --- even though we passed the argument
681 on the stack, we consume the registers anyway! Love
682 me, love my dog. */
683 reg += padded_len / wordsize;
684 }
685 else
686 {
687 /* Heavens to Betsy --- it's really going in registers!
688 It would be nice if we could use write_register_bytes
689 here, but on the h8/300s, there are gaps between
690 the registers in the register file. */
691 int offset;
692
693 for (offset = 0; offset < padded_len; offset += wordsize)
694 {
884a26c8
MS
695 ULONGEST word = extract_unsigned_integer (padded + offset,
696 wordsize);
63d47a7d 697 regcache_cooked_write_unsigned (regcache, reg++, word);
928e48af
CV
698 }
699 }
700 }
c906108c 701 else
928e48af
CV
702 {
703 /* It doesn't fit in registers! Onto the stack it goes. */
704 write_memory (sp + stack_offset, padded, padded_len);
705 stack_offset += padded_len;
706
707 /* Once one argument has spilled onto the stack, all
708 subsequent arguments go on the stack. */
709 reg = E_ARGLAST_REGNUM + 1;
710 }
c906108c 711 }
928e48af 712
63d47a7d
CV
713 /* Store return address. */
714 sp -= wordsize;
715 write_memory_unsigned_integer (sp, wordsize, bp_addr);
c906108c 716
63d47a7d
CV
717 /* Update stack pointer. */
718 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
c906108c 719
c906108c
SS
720 return sp;
721}
722
7256e1a5 723/* Function: h8300_pop_frame
c906108c
SS
724 Restore the machine to the state it had before the current frame
725 was created. Usually used either by the "RETURN" command, or by
726 call_function_by_hand after the dummy_frame is finished. */
727
928e48af 728static void
fba45db2 729h8300_pop_frame (void)
c906108c 730{
928e48af 731 unsigned regno;
c906108c
SS
732 struct frame_info *frame = get_current_frame ();
733
1e2330ba
AC
734 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
735 get_frame_base (frame),
736 get_frame_base (frame)))
c906108c 737 {
c5aa993b 738 generic_pop_dummy_frame ();
c906108c
SS
739 }
740 else
741 {
928e48af 742 for (regno = 0; regno < 8; regno++)
c906108c 743 {
928e48af 744 /* Don't forget E_SP_REGNUM is a frame_saved_regs struct is the
c906108c 745 actual value we want, not the address of the value we want. */
b2fb4676 746 if (get_frame_saved_regs (frame)[regno] && regno != E_SP_REGNUM)
928e48af 747 write_register (regno,
884a26c8
MS
748 read_memory_integer
749 (get_frame_saved_regs (frame)[regno], BINWORD));
b2fb4676 750 else if (get_frame_saved_regs (frame)[regno] && regno == E_SP_REGNUM)
1e2330ba 751 write_register (regno, get_frame_base (frame) + 2 * BINWORD);
c906108c
SS
752 }
753
928e48af 754 /* Don't forget to update the PC too! */
da50a4b7 755 write_register (E_PC_REGNUM, get_frame_extra_info (frame)->from_pc);
c906108c
SS
756 }
757 flush_cached_frames ();
758}
759
760/* Function: extract_return_value
761 Figure out where in REGBUF the called function has left its return value.
762 Copy that into VALBUF. Be sure to account for CPU type. */
763
928e48af 764static void
0261a0d0
CV
765h8300_extract_return_value (struct type *type, struct regcache *regcache,
766 void *valbuf)
c906108c 767{
928e48af 768 int len = TYPE_LENGTH (type);
708cc1b6 769 ULONGEST c, addr;
c5aa993b
JM
770
771 switch (len)
772 {
0261a0d0
CV
773 case 1:
774 case 2:
775 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
776 store_unsigned_integer (valbuf, len, c);
777 break;
778 case 4: /* Needs two registers on plain H8/300 */
779 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
780 store_unsigned_integer (valbuf, 2, c);
781 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
782 store_unsigned_integer ((void*)((char *)valbuf + 2), 2, c);
783 break;
708cc1b6
MS
784 case 8: /* long long is now 8 bytes. */
785 if (TYPE_CODE (type) == TYPE_CODE_INT)
786 {
787 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
788 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
789 store_unsigned_integer (valbuf, len, c);
790 }
791 else
792 {
793 error ("I don't know how this 8 byte value is returned.");
794 }
0261a0d0
CV
795 break;
796 }
797}
798
799static void
800h8300h_extract_return_value (struct type *type, struct regcache *regcache,
801 void *valbuf)
802{
803 int len = TYPE_LENGTH (type);
708cc1b6 804 ULONGEST c, addr;
0261a0d0
CV
805
806 switch (len)
807 {
808 case 1:
809 case 2:
810 case 4:
811 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
812 store_unsigned_integer (valbuf, len, c);
813 break;
708cc1b6
MS
814 case 8: /* long long is now 8 bytes. */
815 if (TYPE_CODE (type) == TYPE_CODE_INT)
816 {
817 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
818 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
819 store_unsigned_integer (valbuf, len, c);
820 }
821 else
822 {
823 error ("I don't know how this 8 byte value is returned.");
824 }
0261a0d0 825 break;
c5aa993b 826 }
c906108c
SS
827}
828
0261a0d0 829
c906108c
SS
830/* Function: store_return_value
831 Place the appropriate value in the appropriate registers.
832 Primarily used by the RETURN command. */
833
928e48af 834static void
0261a0d0
CV
835h8300_store_return_value (struct type *type, struct regcache *regcache,
836 const void *valbuf)
c906108c 837{
928e48af 838 int len = TYPE_LENGTH (type);
0261a0d0 839 ULONGEST val;
c906108c 840
c5aa993b
JM
841 switch (len)
842 {
0261a0d0 843 case 1:
708cc1b6 844 case 2: /* short... */
0261a0d0
CV
845 val = extract_unsigned_integer (valbuf, len);
846 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
847 break;
708cc1b6 848 case 4: /* long, float */
0261a0d0
CV
849 val = extract_unsigned_integer (valbuf, len);
850 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
851 (val >> 16) &0xffff);
852 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
853 break;
708cc1b6
MS
854 case 8: /* long long, double and long double are all defined
855 as 4 byte types so far so this shouldn't happen. */
856 error ("I don't know how to return an 8 byte value.");
0261a0d0
CV
857 break;
858 }
859}
860
861static void
862h8300h_store_return_value (struct type *type, struct regcache *regcache,
863 const void *valbuf)
864{
865 int len = TYPE_LENGTH (type);
866 ULONGEST val;
867
868 switch (len)
869 {
870 case 1:
871 case 2:
708cc1b6 872 case 4: /* long, float */
0261a0d0
CV
873 val = extract_unsigned_integer (valbuf, len);
874 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
875 break;
708cc1b6
MS
876 case 8: /* long long, double and long double are all defined
877 as 4 byte types so far so this shouldn't happen. */
878 error ("I don't know how to return an 8 byte value.");
0261a0d0 879 break;
c5aa993b 880 }
c906108c
SS
881}
882
928e48af 883static struct cmd_list_element *setmachinelist;
c906108c 884
928e48af
CV
885static const char *
886h8300_register_name (int regno)
c906108c 887{
084edea5 888 /* The register names change depending on which h8300 processor
928e48af 889 type is selected. */
084edea5 890 static char *register_names[] = {
928e48af 891 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
4bb1dc5e
CV
892 "sp", "","pc","cycles", "tick", "inst",
893 "ccr", /* pseudo register */
928e48af 894 };
084edea5
CV
895 if (regno < 0
896 || regno >= (sizeof (register_names) / sizeof (*register_names)))
897 internal_error (__FILE__, __LINE__,
898 "h8300_register_name: illegal register number %d", regno);
899 else
900 return register_names[regno];
901}
902
903static const char *
904h8300s_register_name (int regno)
905{
906 static char *register_names[] = {
928e48af 907 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
4bb1dc5e 908 "sp", "", "pc", "cycles", "", "tick", "inst",
7be04a68 909 "mach", "macl",
4bb1dc5e 910 "ccr", "exr" /* pseudo registers */
928e48af 911 };
084edea5
CV
912 if (regno < 0
913 || regno >= (sizeof (register_names) / sizeof (*register_names)))
914 internal_error (__FILE__, __LINE__,
915 "h8300s_register_name: illegal register number %d", regno);
916 else
917 return register_names[regno];
918}
919
920static const char *
921h8300sx_register_name (int regno)
922{
923 static char *register_names[] = {
924 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
4bb1dc5e
CV
925 "sp", "", "pc", "cycles", "", "tick", "inst",
926 "mach", "macl", "sbr", "vbr",
927 "ccr", "exr" /* pseudo registers */
084edea5
CV
928 };
929 if (regno < 0
930 || regno >= (sizeof (register_names) / sizeof (*register_names)))
928e48af 931 internal_error (__FILE__, __LINE__,
084edea5 932 "h8300sx_register_name: illegal register number %d", regno);
c906108c 933 else
928e48af 934 return register_names[regno];
c906108c
SS
935}
936
937static void
4904ba5b
AC
938h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
939 struct frame_info *frame, int regno)
c906108c 940{
084edea5
CV
941 LONGEST rval;
942 const char *name = gdbarch_register_name (gdbarch, regno);
c906108c 943
928e48af
CV
944 if (!name || !*name)
945 return;
c906108c 946
084edea5 947 frame_read_signed_register (frame, regno, &rval);
4904ba5b
AC
948
949 fprintf_filtered (file, "%-14s ", name);
4bb1dc5e 950 if (regno == E_PSEUDO_CCR_REGNUM || (regno == E_PSEUDO_EXR_REGNUM && h8300smode))
c906108c 951 {
084edea5
CV
952 fprintf_filtered (file, "0x%02x ", (unsigned char)rval);
953 print_longest (file, 'u', 1, rval);
c906108c
SS
954 }
955 else
956 {
084edea5
CV
957 fprintf_filtered (file, "0x%s ", phex ((ULONGEST)rval, BINWORD));
958 print_longest (file, 'd', 1, rval);
c906108c 959 }
4bb1dc5e 960 if (regno == E_PSEUDO_CCR_REGNUM)
c906108c
SS
961 {
962 /* CCR register */
963 int C, Z, N, V;
084edea5 964 unsigned char l = rval & 0xff;
4904ba5b
AC
965 fprintf_filtered (file, "\t");
966 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
967 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
968 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
969 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
c906108c
SS
970 N = (l & 0x8) != 0;
971 Z = (l & 0x4) != 0;
972 V = (l & 0x2) != 0;
973 C = (l & 0x1) != 0;
4904ba5b
AC
974 fprintf_filtered (file, "N-%d ", N);
975 fprintf_filtered (file, "Z-%d ", Z);
976 fprintf_filtered (file, "V-%d ", V);
977 fprintf_filtered (file, "C-%d ", C);
c906108c 978 if ((C | Z) == 0)
4904ba5b 979 fprintf_filtered (file, "u> ");
c906108c 980 if ((C | Z) == 1)
4904ba5b 981 fprintf_filtered (file, "u<= ");
c906108c 982 if ((C == 0))
4904ba5b 983 fprintf_filtered (file, "u>= ");
c906108c 984 if (C == 1)
4904ba5b 985 fprintf_filtered (file, "u< ");
c906108c 986 if (Z == 0)
4904ba5b 987 fprintf_filtered (file, "!= ");
c906108c 988 if (Z == 1)
4904ba5b 989 fprintf_filtered (file, "== ");
c906108c 990 if ((N ^ V) == 0)
4904ba5b 991 fprintf_filtered (file, ">= ");
c906108c 992 if ((N ^ V) == 1)
4904ba5b 993 fprintf_filtered (file, "< ");
c906108c 994 if ((Z | (N ^ V)) == 0)
4904ba5b 995 fprintf_filtered (file, "> ");
c906108c 996 if ((Z | (N ^ V)) == 1)
4904ba5b 997 fprintf_filtered (file, "<= ");
c906108c 998 }
4bb1dc5e 999 else if (regno == E_PSEUDO_EXR_REGNUM && h8300smode)
fc974602
AV
1000 {
1001 /* EXR register */
084edea5 1002 unsigned char l = rval & 0xff;
4904ba5b
AC
1003 fprintf_filtered (file, "\t");
1004 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1005 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1006 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1007 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
d194345b 1008 }
4904ba5b 1009 fprintf_filtered (file, "\n");
928e48af
CV
1010}
1011
1012static void
4904ba5b
AC
1013h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1014 struct frame_info *frame, int regno, int cpregs)
928e48af
CV
1015{
1016 if (regno < 0)
4bb1dc5e
CV
1017 {
1018 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1019 h8300_print_register (gdbarch, file, frame, regno);
1020 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1021 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1022 if (h8300smode)
1023 {
1024 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1025 if (h8300sxmode)
1026 {
1027 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1028 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
4bb1dc5e 1029 }
7be04a68
MS
1030 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1031 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
4bb1dc5e
CV
1032 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1033 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1034 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1035 }
1036 else
1037 {
1038 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1039 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1040 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1041 }
1042 }
928e48af 1043 else
4bb1dc5e
CV
1044 {
1045 if (regno == E_CCR_REGNUM)
1046 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1047 else if (regno == E_PSEUDO_EXR_REGNUM && h8300smode)
1048 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1049 else
1050 h8300_print_register (gdbarch, file, frame, regno);
1051 }
928e48af
CV
1052}
1053
1054static CORE_ADDR
1055h8300_saved_pc_after_call (struct frame_info *ignore)
1056{
1057 return read_memory_unsigned_integer (read_register (E_SP_REGNUM), BINWORD);
1058}
1059
928e48af 1060static struct type *
055c394a 1061h8300_register_type (struct gdbarch *gdbarch, int regno)
928e48af 1062{
4bb1dc5e 1063 if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
928e48af 1064 internal_error (__FILE__, __LINE__,
055c394a 1065 "h8300_register_type: illegal register number %d",
928e48af
CV
1066 regno);
1067 else
084edea5
CV
1068 {
1069 switch (regno)
1070 {
1071 case E_PC_REGNUM:
1072 return builtin_type_void_func_ptr;
1073 case E_SP_REGNUM:
1074 case E_FP_REGNUM:
1075 return builtin_type_void_data_ptr;
084edea5 1076 default:
4bb1dc5e
CV
1077 if (regno == E_PSEUDO_CCR_REGNUM)
1078 return builtin_type_uint8;
1079 else if (regno == E_PSEUDO_EXR_REGNUM)
1080 return builtin_type_uint8;
1081 else if (h8300hmode)
1082 return builtin_type_int32;
1083 else
1084 return builtin_type_int16;
084edea5
CV
1085 }
1086 }
928e48af
CV
1087}
1088
4bb1dc5e
CV
1089static void
1090h8300_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1091 int regno, void *buf)
1092{
1093 if (regno == E_PSEUDO_CCR_REGNUM)
1094 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1095 else if (regno == E_PSEUDO_EXR_REGNUM)
1096 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1097 else
1098 regcache_raw_read (regcache, regno, buf);
1099}
1100
1101static void
1102h8300_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1103 int regno, const void *buf)
1104{
1105 if (regno == E_PSEUDO_CCR_REGNUM)
1106 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1107 else if (regno == E_PSEUDO_EXR_REGNUM)
1108 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1109 else
1110 regcache_raw_write (regcache, regno, buf);
1111}
1112
1113static int
1114h8300_dbg_reg_to_regnum (int regno)
1115{
1116 if (regno == E_CCR_REGNUM)
1117 return E_PSEUDO_CCR_REGNUM;
1118 return regno;
1119}
1120
1121static int
1122h8300s_dbg_reg_to_regnum (int regno)
1123{
1124 if (regno == E_CCR_REGNUM)
1125 return E_PSEUDO_CCR_REGNUM;
1126 if (regno == E_EXR_REGNUM)
1127 return E_PSEUDO_EXR_REGNUM;
1128 return regno;
1129}
1130
928e48af 1131static CORE_ADDR
0261a0d0 1132h8300_extract_struct_value_address (struct regcache *regcache)
928e48af 1133{
0261a0d0
CV
1134 ULONGEST addr;
1135 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
1136 return addr;
928e48af
CV
1137}
1138
1139const static unsigned char *
1140h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1141{
1142 /*static unsigned char breakpoint[] = { 0x7A, 0xFF };*/ /* ??? */
1143 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1144
1145 *lenptr = sizeof (breakpoint);
1146 return breakpoint;
1147}
1148
0261a0d0
CV
1149static CORE_ADDR
1150h8300_push_dummy_code (struct gdbarch *gdbarch,
1151 CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
1152 struct value **args, int nargs,
1153 struct type *value_type,
1154 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
1155{
1156 /* Allocate space sufficient for a breakpoint. */
1157 sp = (sp - 2) & ~1;
1158 /* Store the address of that breakpoint */
1159 *bp_addr = sp;
1160 /* h8300 always starts the call at the callee's entry point. */
1161 *real_pc = funaddr;
1162 return sp;
1163}
1164
928e48af
CV
1165static void
1166h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1167 struct frame_info *frame, const char *args)
1168{
1169 fprintf_filtered (file, "\
1170No floating-point info available for this processor.\n");
1171}
1172
1173static struct gdbarch *
1174h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1175{
928e48af
CV
1176 struct gdbarch_tdep *tdep = NULL;
1177 struct gdbarch *gdbarch;
1178
1179 arches = gdbarch_list_lookup_by_info (arches, &info);
1180 if (arches != NULL)
1181 return arches->gdbarch;
1182
1183#if 0
1184 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1185#endif
1186
1187 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1188 return NULL;
1189
084edea5
CV
1190 gdbarch = gdbarch_alloc (&info, 0);
1191
928e48af
CV
1192 switch (info.bfd_arch_info->mach)
1193 {
0a48e7e8
MS
1194 case bfd_mach_h8300:
1195 h8300sxmode = 0;
1196 h8300smode = 0;
1197 h8300hmode = 0;
084edea5 1198 set_gdbarch_num_regs (gdbarch, 13);
4bb1dc5e
CV
1199 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1200 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1201 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1202 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1203 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
084edea5 1204 set_gdbarch_register_name (gdbarch, h8300_register_name);
084edea5
CV
1205 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1206 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
0261a0d0
CV
1207 set_gdbarch_extract_return_value (gdbarch, h8300_extract_return_value);
1208 set_gdbarch_store_return_value (gdbarch, h8300_store_return_value);
4bb1dc5e 1209 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
0a48e7e8
MS
1210 break;
1211 case bfd_mach_h8300h:
8efca6ba 1212 case bfd_mach_h8300hn:
0a48e7e8
MS
1213 h8300sxmode = 0;
1214 h8300smode = 0;
1215 h8300hmode = 1;
084edea5 1216 set_gdbarch_num_regs (gdbarch, 13);
4bb1dc5e
CV
1217 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1218 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1219 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1220 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1221 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
084edea5 1222 set_gdbarch_register_name (gdbarch, h8300_register_name);
084edea5
CV
1223 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1224 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
0261a0d0
CV
1225 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1226 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1227 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
0a48e7e8
MS
1228 break;
1229 case bfd_mach_h8300s:
8efca6ba 1230 case bfd_mach_h8300sn:
0a48e7e8
MS
1231 h8300sxmode = 0;
1232 h8300smode = 1;
1233 h8300hmode = 1;
7be04a68 1234 set_gdbarch_num_regs (gdbarch, 16);
4bb1dc5e
CV
1235 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1236 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1237 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1238 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1239 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
084edea5 1240 set_gdbarch_register_name (gdbarch, h8300s_register_name);
084edea5
CV
1241 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1242 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
0261a0d0
CV
1243 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1244 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1245 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
0a48e7e8
MS
1246 break;
1247 case bfd_mach_h8300sx:
084edea5 1248 case bfd_mach_h8300sxn:
0a48e7e8
MS
1249 h8300sxmode = 1;
1250 h8300smode = 1;
1251 h8300hmode = 1;
084edea5 1252 set_gdbarch_num_regs (gdbarch, 18);
4bb1dc5e
CV
1253 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1254 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1255 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1256 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1257 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
084edea5 1258 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
084edea5
CV
1259 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1260 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
0261a0d0
CV
1261 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1262 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
4bb1dc5e 1263 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
0a48e7e8 1264 break;
928e48af
CV
1265 }
1266
4bb1dc5e
CV
1267 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1268 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1269
a5afb99f
AC
1270 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1271 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1272 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1273
928e48af
CV
1274 /*
1275 * Basic register fields and methods.
1276 */
1277
928e48af 1278 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
0ba6dca9 1279 set_gdbarch_deprecated_fp_regnum (gdbarch, E_FP_REGNUM);
928e48af 1280 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
055c394a 1281 set_gdbarch_register_type (gdbarch, h8300_register_type);
4904ba5b 1282 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
928e48af
CV
1283 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1284
1285 /*
1286 * Frame Info
1287 */
0261a0d0
CV
1288 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1289
884a26c8
MS
1290 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch,
1291 h8300_frame_init_saved_regs);
1292 set_gdbarch_deprecated_init_extra_frame_info (gdbarch,
1293 h8300_init_extra_frame_info);
618ce49f 1294 set_gdbarch_deprecated_frame_chain (gdbarch, h8300_frame_chain);
884a26c8
MS
1295 set_gdbarch_deprecated_saved_pc_after_call (gdbarch,
1296 h8300_saved_pc_after_call);
8bedc050 1297 set_gdbarch_deprecated_frame_saved_pc (gdbarch, h8300_frame_saved_pc);
63d47a7d 1298 set_gdbarch_deprecated_pop_frame (gdbarch, h8300_pop_frame);
928e48af
CV
1299
1300 /*
1301 * Miscelany
1302 */
1303 /* Stack grows up. */
1304 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1305 /* PC stops zero byte after a trap instruction
1306 (which means: exactly on trap instruction). */
1307 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1308 /* This value is almost never non-zero... */
1309 set_gdbarch_function_start_offset (gdbarch, 0);
1310 /* This value is almost never non-zero... */
1311 set_gdbarch_frame_args_skip (gdbarch, 0);
928e48af
CV
1312 set_gdbarch_frameless_function_invocation (gdbarch,
1313 frameless_look_for_prologue);
1314
0261a0d0
CV
1315 set_gdbarch_extract_struct_value_address (gdbarch,
1316 h8300_extract_struct_value_address);
1fd35568 1317 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
928e48af 1318 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
0261a0d0 1319 set_gdbarch_push_dummy_code (gdbarch, h8300_push_dummy_code);
63d47a7d 1320 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
928e48af
CV
1321
1322 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1323 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
708cc1b6 1324 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
084edea5
CV
1325 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1326 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
928e48af 1327
928e48af
CV
1328 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1329
708cc1b6
MS
1330 /* Char is unsigned. */
1331 set_gdbarch_char_signed (gdbarch, 0);
1332
928e48af 1333 return gdbarch;
c906108c
SS
1334}
1335
a78f21af
AC
1336extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1337
c906108c 1338void
fba45db2 1339_initialize_h8300_tdep (void)
c906108c 1340{
928e48af 1341 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
c906108c 1342}
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