* alphafbsd-tdep.c: Update for unwinder changes.
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
f0bdd87d
YS
1/* Target-machine dependent code for Renesas H8/300, for GDB.
2
6aba47ca 3 Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999,
9b254dd1 4 2000, 2001, 2002, 2003, 2005, 2007, 2008 Free Software Foundation, Inc.
f0bdd87d
YS
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
f0bdd87d
YS
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
f0bdd87d
YS
20
21/*
22 Contributed by Steve Chamberlain
23 sac@cygnus.com
24 */
25
26#include "defs.h"
27#include "value.h"
f0bdd87d
YS
28#include "arch-utils.h"
29#include "regcache.h"
30#include "gdbcore.h"
31#include "objfiles.h"
f0bdd87d
YS
32#include "gdb_assert.h"
33#include "dis-asm.h"
34#include "dwarf2-frame.h"
f0bdd87d
YS
35#include "frame-base.h"
36#include "frame-unwind.h"
37
f0bdd87d
YS
38enum gdb_regnum
39{
40 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
41 E_RET0_REGNUM = E_R0_REGNUM,
42 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
43 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
44 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
45 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
46 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
47 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
48 E_SP_REGNUM,
49 E_CCR_REGNUM,
50 E_PC_REGNUM,
51 E_CYCLES_REGNUM,
52 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
53 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
54 E_INSTS_REGNUM,
55 E_MACH_REGNUM,
56 E_MACL_REGNUM,
57 E_SBR_REGNUM,
58 E_VBR_REGNUM
59};
60
61#define H8300_MAX_NUM_REGS 18
62
be8626e0
MD
63#define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
64#define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
f0bdd87d 65
862ba188
CV
66struct h8300_frame_cache
67{
68 /* Base address. */
69 CORE_ADDR base;
70 CORE_ADDR sp_offset;
71 CORE_ADDR pc;
72
73 /* Flag showing that a frame has been created in the prologue code. */
74 int uses_fp;
f0bdd87d 75
862ba188
CV
76 /* Saved registers. */
77 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
78 CORE_ADDR saved_sp;
79};
80
81enum
82{
83 h8300_reg_size = 2,
84 h8300h_reg_size = 4,
85 h8300_max_reg_size = 4,
86};
87
88static int is_h8300hmode (struct gdbarch *gdbarch);
89static int is_h8300smode (struct gdbarch *gdbarch);
90static int is_h8300sxmode (struct gdbarch *gdbarch);
91static int is_h8300_normal_mode (struct gdbarch *gdbarch);
92
be8626e0
MD
93#define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
94 && !is_h8300_normal_mode (gdbarch)) \
862ba188
CV
95 ? h8300h_reg_size : h8300_reg_size)
96
97static CORE_ADDR
98h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
99{
100 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
101}
102
103static CORE_ADDR
104h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
105{
106 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
107}
108
109static struct frame_id
94afd7a6 110h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
862ba188 111{
94afd7a6
UW
112 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
113 return frame_id_build (sp, get_frame_pc (this_frame));
862ba188
CV
114}
115
116/* Normal frames. */
117
118/* Allocate and initialize a frame cache. */
119
120static void
be8626e0
MD
121h8300_init_frame_cache (struct gdbarch *gdbarch,
122 struct h8300_frame_cache *cache)
862ba188
CV
123{
124 int i;
125
126 /* Base address. */
127 cache->base = 0;
128 cache->sp_offset = 0;
129 cache->pc = 0;
130
131 /* Frameless until proven otherwise. */
132 cache->uses_fp = 0;
133
134 /* Saved registers. We initialize these to -1 since zero is a valid
135 offset (that's where %fp is supposed to be stored). */
be8626e0 136 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
862ba188
CV
137 cache->saved_regs[i] = -1;
138}
139
140#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
141#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
142#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
143#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
144#define IS_MOVB_EXT(x) ((x) == 0x7860)
145#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
146#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
147#define IS_MOVW_EXT(x) ((x) == 0x78e0)
148#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
149/* Same instructions as mov.w, just prefixed with 0x0100 */
150#define IS_MOVL_PRE(x) ((x) == 0x0100)
151#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
152#define IS_MOVL_EXT(x) ((x) == 0x78e0)
153#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
154
155#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
156#define IS_PUSH_FP(x) ((x) == 0x01006df6)
157#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
158#define IS_SUB2_SP(x) ((x) == 0x1b87)
159#define IS_SUB4_SP(x) ((x) == 0x1b97)
160#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
161#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
162#define IS_SUBL4_SP(x) ((x) == 0x1acf)
163#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
164#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
165#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
166#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
f0bdd87d
YS
167
168/* If the instruction at PC is an argument register spill, return its
169 length. Otherwise, return zero.
170
171 An argument register spill is an instruction that moves an argument
172 from the register in which it was passed to the stack slot in which
173 it really lives. It is a byte, word, or longword move from an
174 argument register to a negative offset from the frame pointer.
175
176 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
177 is used, it could be a byte, word or long move to registers r3-r5. */
178
179static int
180h8300_is_argument_spill (CORE_ADDR pc)
181{
182 int w = read_memory_unsigned_integer (pc, 2);
183
862ba188 184 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
f0bdd87d
YS
185 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
186 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
187 return 2;
188
862ba188 189 if (IS_MOVB_Rn16_SP (w)
f0bdd87d
YS
190 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
191 {
862ba188 192 if (read_memory_integer (pc + 2, 2) < 0) /* ... and d:16 is negative. */
f0bdd87d
YS
193 return 4;
194 }
862ba188 195 else if (IS_MOVB_EXT (w))
f0bdd87d 196 {
862ba188 197 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
f0bdd87d
YS
198 {
199 LONGEST disp = read_memory_integer (pc + 4, 4);
200
201 /* ... and d:24 is negative. */
202 if (disp < 0 && disp > 0xffffff)
203 return 8;
204 }
205 }
862ba188 206 else if (IS_MOVW_Rn16_SP (w)
f0bdd87d
YS
207 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
208 {
f0bdd87d 209 /* ... and d:16 is negative. */
862ba188 210 if (read_memory_integer (pc + 2, 2) < 0)
f0bdd87d
YS
211 return 4;
212 }
862ba188 213 else if (IS_MOVW_EXT (w))
f0bdd87d 214 {
862ba188 215 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
f0bdd87d
YS
216 {
217 LONGEST disp = read_memory_integer (pc + 4, 4);
218
219 /* ... and d:24 is negative. */
220 if (disp < 0 && disp > 0xffffff)
221 return 8;
222 }
223 }
862ba188 224 else if (IS_MOVL_PRE (w))
f0bdd87d
YS
225 {
226 int w2 = read_memory_integer (pc + 2, 2);
227
862ba188 228 if (IS_MOVL_Rn16_SP (w2)
f0bdd87d
YS
229 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
230 {
f0bdd87d 231 /* ... and d:16 is negative. */
862ba188 232 if (read_memory_integer (pc + 4, 2) < 0)
f0bdd87d
YS
233 return 6;
234 }
862ba188 235 else if (IS_MOVL_EXT (w2))
f0bdd87d
YS
236 {
237 int w3 = read_memory_integer (pc + 4, 2);
238
862ba188 239 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2)))
f0bdd87d
YS
240 {
241 LONGEST disp = read_memory_integer (pc + 6, 4);
242
243 /* ... and d:24 is negative. */
244 if (disp < 0 && disp > 0xffffff)
245 return 10;
246 }
247 }
248 }
249
250 return 0;
251}
252
f0bdd87d
YS
253/* Do a full analysis of the prologue at PC and update CACHE
254 accordingly. Bail out early if CURRENT_PC is reached. Return the
255 address where the analysis stopped.
256
257 We handle all cases that can be generated by gcc.
258
259 For allocating a stack frame:
260
261 mov.w r6,@-sp
262 mov.w sp,r6
263 mov.w #-n,rN
264 add.w rN,sp
265
266 mov.w r6,@-sp
267 mov.w sp,r6
268 subs #2,sp
269 (repeat)
270
271 mov.l er6,@-sp
272 mov.l sp,er6
273 add.l #-n,sp
274
275 mov.w r6,@-sp
276 mov.w sp,r6
277 subs #4,sp
278 (repeat)
279
280 For saving registers:
281
282 mov.w rN,@-sp
283 mov.l erN,@-sp
284 stm.l reglist,@-sp
285
f0bdd87d
YS
286 */
287
288static CORE_ADDR
289h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
290 struct h8300_frame_cache *cache)
291{
292 unsigned int op;
862ba188
CV
293 int regno, i, spill_size;
294
295 cache->sp_offset = 0;
f0bdd87d 296
f0bdd87d
YS
297 if (pc >= current_pc)
298 return current_pc;
299
862ba188
CV
300 op = read_memory_unsigned_integer (pc, 4);
301
302 if (IS_PUSHFP_MOVESPFP (op))
303 {
304 cache->saved_regs[E_FP_REGNUM] = 0;
305 cache->uses_fp = 1;
306 pc += 4;
307 }
308 else if (IS_PUSH_FP (op))
309 {
310 cache->saved_regs[E_FP_REGNUM] = 0;
311 pc += 4;
312 if (pc >= current_pc)
313 return current_pc;
314 op = read_memory_unsigned_integer (pc, 2);
315 if (IS_MOV_SP_FP (op))
316 {
317 cache->uses_fp = 1;
318 pc += 2;
319 }
320 }
321
322 while (pc < current_pc)
323 {
324 op = read_memory_unsigned_integer (pc, 2);
325 if (IS_SUB2_SP (op))
326 {
327 cache->sp_offset += 2;
328 pc += 2;
329 }
330 else if (IS_SUB4_SP (op))
331 {
332 cache->sp_offset += 4;
333 pc += 2;
334 }
335 else if (IS_ADD_IMM_SP (op))
336 {
337 cache->sp_offset += -read_memory_integer (pc + 2, 2);
338 pc += 4;
339 }
340 else if (IS_SUB_IMM_SP (op))
341 {
342 cache->sp_offset += read_memory_integer (pc + 2, 2);
343 pc += 4;
344 }
345 else if (IS_SUBL4_SP (op))
346 {
347 cache->sp_offset += 4;
348 pc += 2;
349 }
350 else if (IS_MOV_IMM_Rn (op))
351 {
352 int offset = read_memory_integer (pc + 2, 2);
353 regno = op & 0x000f;
354 op = read_memory_unsigned_integer (pc + 4, 2);
355 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
356 {
357 cache->sp_offset -= offset;
358 pc += 6;
359 }
360 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
361 {
362 cache->sp_offset += offset;
363 pc += 6;
364 }
365 else
366 break;
367 }
368 else if (IS_PUSH (op))
369 {
370 regno = op & 0x000f;
371 cache->sp_offset += 2;
372 cache->saved_regs[regno] = cache->sp_offset;
373 pc += 2;
374 }
375 else if (op == 0x0100)
376 {
377 op = read_memory_unsigned_integer (pc + 2, 2);
378 if (IS_PUSH (op))
379 {
380 regno = op & 0x000f;
381 cache->sp_offset += 4;
382 cache->saved_regs[regno] = cache->sp_offset;
383 pc += 4;
384 }
385 else
386 break;
387 }
388 else if ((op & 0xffcf) == 0x0100)
389 {
390 int op1;
391 op1 = read_memory_unsigned_integer (pc + 2, 2);
392 if (IS_PUSH (op1))
393 {
394 /* Since the prefix is 0x01x0, this is not a simple pushm but a
395 stm.l reglist,@-sp */
396 i = ((op & 0x0030) >> 4) + 1;
397 regno = op1 & 0x000f;
398 for (; i > 0; regno++, --i)
399 {
400 cache->sp_offset += 4;
401 cache->saved_regs[regno] = cache->sp_offset;
402 }
403 pc += 4;
404 }
405 else
406 break;
407 }
408 else
409 break;
410 }
411
412 /* Check for spilling an argument register to the stack frame.
413 This could also be an initializing store from non-prologue code,
414 but I don't think there's any harm in skipping that. */
415 while ((spill_size = h8300_is_argument_spill (pc)) > 0
416 && pc + spill_size <= current_pc)
417 pc += spill_size;
f0bdd87d
YS
418
419 return pc;
420}
421
422static struct h8300_frame_cache *
94afd7a6 423h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
f0bdd87d 424{
94afd7a6 425 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d
YS
426 struct h8300_frame_cache *cache;
427 char buf[4];
428 int i;
862ba188 429 CORE_ADDR current_pc;
f0bdd87d
YS
430
431 if (*this_cache)
432 return *this_cache;
433
862ba188 434 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
be8626e0 435 h8300_init_frame_cache (gdbarch, cache);
f0bdd87d
YS
436 *this_cache = cache;
437
438 /* In principle, for normal frames, %fp holds the frame pointer,
439 which holds the base address for the current stack frame.
440 However, for functions that don't need it, the frame pointer is
441 optional. For these "frameless" functions the frame pointer is
862ba188 442 actually the frame pointer of the calling frame. */
f0bdd87d 443
94afd7a6 444 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
f0bdd87d
YS
445 if (cache->base == 0)
446 return cache;
447
be8626e0 448 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 449
94afd7a6
UW
450 cache->pc = get_frame_func (this_frame);
451 current_pc = get_frame_pc (this_frame);
f0bdd87d 452 if (cache->pc != 0)
862ba188 453 h8300_analyze_prologue (cache->pc, current_pc, cache);
f0bdd87d 454
862ba188 455 if (!cache->uses_fp)
f0bdd87d
YS
456 {
457 /* We didn't find a valid frame, which means that CACHE->base
458 currently holds the frame pointer for our calling frame. If
459 we're at the start of a function, or somewhere half-way its
460 prologue, the function's frame probably hasn't been fully
461 setup yet. Try to reconstruct the base address for the stack
462 frame by looking at the stack pointer. For truly "frameless"
463 functions this might work too. */
464
94afd7a6 465 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
862ba188 466 + cache->sp_offset;
be8626e0 467 cache->saved_sp = cache->base + BINWORD (gdbarch);
862ba188
CV
468 cache->saved_regs[E_PC_REGNUM] = 0;
469 }
470 else
471 {
be8626e0
MD
472 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
473 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 474 }
f0bdd87d
YS
475
476 /* Adjust all the saved registers such that they contain addresses
477 instead of offsets. */
be8626e0 478 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
f0bdd87d 479 if (cache->saved_regs[i] != -1)
862ba188 480 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
f0bdd87d
YS
481
482 return cache;
483}
484
485static void
94afd7a6 486h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
f0bdd87d
YS
487 struct frame_id *this_id)
488{
489 struct h8300_frame_cache *cache =
94afd7a6 490 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
491
492 /* This marks the outermost frame. */
493 if (cache->base == 0)
494 return;
495
862ba188 496 *this_id = frame_id_build (cache->saved_sp, cache->pc);
f0bdd87d
YS
497}
498
94afd7a6
UW
499static struct value *
500h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
501 int regnum)
f0bdd87d 502{
94afd7a6 503 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d 504 struct h8300_frame_cache *cache =
94afd7a6 505 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
506
507 gdb_assert (regnum >= 0);
508
509 if (regnum == E_SP_REGNUM && cache->saved_sp)
94afd7a6 510 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
f0bdd87d 511
ea78bae4 512 if (regnum < gdbarch_num_regs (gdbarch)
f57d151a 513 && cache->saved_regs[regnum] != -1)
94afd7a6
UW
514 return frame_unwind_got_memory (this_frame, regnum,
515 cache->saved_regs[regnum]);
f0bdd87d 516
94afd7a6 517 return frame_unwind_got_register (this_frame, regnum, regnum);
f0bdd87d
YS
518}
519
520static const struct frame_unwind h8300_frame_unwind = {
521 NORMAL_FRAME,
522 h8300_frame_this_id,
94afd7a6
UW
523 h8300_frame_prev_register,
524 NULL,
525 default_frame_sniffer
f0bdd87d
YS
526};
527
862ba188 528static CORE_ADDR
94afd7a6 529h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
862ba188 530{
94afd7a6 531 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
862ba188
CV
532 return cache->base;
533}
534
535static const struct frame_base h8300_frame_base = {
536 &h8300_frame_unwind,
537 h8300_frame_base_address,
538 h8300_frame_base_address,
539 h8300_frame_base_address
540};
541
542static CORE_ADDR
6093d2eb 543h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
862ba188
CV
544{
545 CORE_ADDR func_addr = 0 , func_end = 0;
546
547 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
548 {
549 struct symtab_and_line sal;
550 struct h8300_frame_cache cache;
551
552 /* Found a function. */
553 sal = find_pc_line (func_addr, 0);
554 if (sal.end && sal.end < func_end)
555 /* Found a line number, use it as end of prologue. */
556 return sal.end;
557
558 /* No useable line symbol. Use prologue parsing method. */
be8626e0 559 h8300_init_frame_cache (gdbarch, &cache);
862ba188
CV
560 return h8300_analyze_prologue (func_addr, func_end, &cache);
561 }
562
563 /* No function symbol -- just return the PC. */
564 return (CORE_ADDR) pc;
565}
566
f0bdd87d
YS
567/* Function: push_dummy_call
568 Setup the function arguments for calling a function in the inferior.
569 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
570 on the H8/300H.
571
572 There are actually two ABI's here: -mquickcall (the default) and
573 -mno-quickcall. With -mno-quickcall, all arguments are passed on
574 the stack after the return address, word-aligned. With
575 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
576 GCC doesn't indicate in the object file which ABI was used to
577 compile it, GDB only supports the default --- -mquickcall.
578
579 Here are the rules for -mquickcall, in detail:
580
581 Each argument, whether scalar or aggregate, is padded to occupy a
582 whole number of words. Arguments smaller than a word are padded at
583 the most significant end; those larger than a word are padded at
584 the least significant end.
585
586 The initial arguments are passed in r0 -- r2. Earlier arguments go in
587 lower-numbered registers. Multi-word arguments are passed in
588 consecutive registers, with the most significant end in the
589 lower-numbered register.
590
591 If an argument doesn't fit entirely in the remaining registers, it
592 is passed entirely on the stack. Stack arguments begin just after
593 the return address. Once an argument has overflowed onto the stack
594 this way, all subsequent arguments are passed on the stack.
595
596 The above rule has odd consequences. For example, on the h8/300s,
597 if a function takes two longs and an int as arguments:
598 - the first long will be passed in r0/r1,
599 - the second long will be passed entirely on the stack, since it
600 doesn't fit in r2,
601 - and the int will be passed on the stack, even though it could fit
602 in r2.
603
604 A weird exception: if an argument is larger than a word, but not a
605 whole number of words in length (before padding), it is passed on
606 the stack following the rules for stack arguments above, even if
607 there are sufficient registers available to hold it. Stranger
608 still, the argument registers are still `used up' --- even though
609 there's nothing in them.
610
611 So, for example, on the h8/300s, if a function expects a three-byte
612 structure and an int, the structure will go on the stack, and the
613 int will go in r2, not r0.
614
615 If the function returns an aggregate type (struct, union, or class)
616 by value, the caller must allocate space to hold the return value,
617 and pass the callee a pointer to this space as an invisible first
618 argument, in R0.
619
620 For varargs functions, the last fixed argument and all the variable
621 arguments are always passed on the stack. This means that calls to
622 varargs functions don't work properly unless there is a prototype
623 in scope.
624
625 Basically, this ABI is not good, for the following reasons:
626 - You can't call vararg functions properly unless a prototype is in scope.
627 - Structure passing is inconsistent, to no purpose I can see.
628 - It often wastes argument registers, of which there are only three
629 to begin with. */
630
631static CORE_ADDR
632h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
633 struct regcache *regcache, CORE_ADDR bp_addr,
634 int nargs, struct value **args, CORE_ADDR sp,
635 int struct_return, CORE_ADDR struct_addr)
636{
637 int stack_alloc = 0, stack_offset = 0;
be8626e0 638 int wordsize = BINWORD (gdbarch);
f0bdd87d
YS
639 int reg = E_ARG0_REGNUM;
640 int argument;
641
642 /* First, make sure the stack is properly aligned. */
643 sp = align_down (sp, wordsize);
644
645 /* Now make sure there's space on the stack for the arguments. We
646 may over-allocate a little here, but that won't hurt anything. */
647 for (argument = 0; argument < nargs; argument++)
648 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
649 wordsize);
650 sp -= stack_alloc;
651
652 /* Now load as many arguments as possible into registers, and push
653 the rest onto the stack.
654 If we're returning a structure by value, then we must pass a
655 pointer to the buffer for the return value as an invisible first
656 argument. */
657 if (struct_return)
658 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
659
660 for (argument = 0; argument < nargs; argument++)
661 {
662 struct type *type = value_type (args[argument]);
663 int len = TYPE_LENGTH (type);
664 char *contents = (char *) value_contents (args[argument]);
665
666 /* Pad the argument appropriately. */
667 int padded_len = align_up (len, wordsize);
5d0d05b6 668 gdb_byte *padded = alloca (padded_len);
f0bdd87d
YS
669
670 memset (padded, 0, padded_len);
671 memcpy (len < wordsize ? padded + padded_len - len : padded,
672 contents, len);
673
674 /* Could the argument fit in the remaining registers? */
675 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
676 {
677 /* Are we going to pass it on the stack anyway, for no good
678 reason? */
679 if (len > wordsize && len % wordsize)
680 {
681 /* I feel so unclean. */
682 write_memory (sp + stack_offset, padded, padded_len);
683 stack_offset += padded_len;
684
685 /* That's right --- even though we passed the argument
686 on the stack, we consume the registers anyway! Love
687 me, love my dog. */
688 reg += padded_len / wordsize;
689 }
690 else
691 {
692 /* Heavens to Betsy --- it's really going in registers!
693 It would be nice if we could use write_register_bytes
694 here, but on the h8/300s, there are gaps between
695 the registers in the register file. */
696 int offset;
697
698 for (offset = 0; offset < padded_len; offset += wordsize)
699 {
700 ULONGEST word = extract_unsigned_integer (padded + offset,
701 wordsize);
702 regcache_cooked_write_unsigned (regcache, reg++, word);
703 }
704 }
705 }
706 else
707 {
708 /* It doesn't fit in registers! Onto the stack it goes. */
709 write_memory (sp + stack_offset, padded, padded_len);
710 stack_offset += padded_len;
711
712 /* Once one argument has spilled onto the stack, all
713 subsequent arguments go on the stack. */
714 reg = E_ARGLAST_REGNUM + 1;
715 }
716 }
717
718 /* Store return address. */
719 sp -= wordsize;
720 write_memory_unsigned_integer (sp, wordsize, bp_addr);
721
722 /* Update stack pointer. */
723 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
724
862ba188
CV
725 /* Return the new stack pointer minus the return address slot since
726 that's what DWARF2/GCC uses as the frame's CFA. */
727 return sp + wordsize;
f0bdd87d
YS
728}
729
730/* Function: extract_return_value
731 Figure out where in REGBUF the called function has left its return value.
732 Copy that into VALBUF. Be sure to account for CPU type. */
733
734static void
735h8300_extract_return_value (struct type *type, struct regcache *regcache,
736 void *valbuf)
737{
738 int len = TYPE_LENGTH (type);
739 ULONGEST c, addr;
740
741 switch (len)
742 {
743 case 1:
744 case 2:
745 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
746 store_unsigned_integer (valbuf, len, c);
747 break;
748 case 4: /* Needs two registers on plain H8/300 */
749 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
750 store_unsigned_integer (valbuf, 2, c);
751 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
752 store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
753 break;
754 case 8: /* long long is now 8 bytes. */
755 if (TYPE_CODE (type) == TYPE_CODE_INT)
756 {
757 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
758 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
759 store_unsigned_integer (valbuf, len, c);
760 }
761 else
762 {
763 error ("I don't know how this 8 byte value is returned.");
764 }
765 break;
766 }
767}
768
769static void
770h8300h_extract_return_value (struct type *type, struct regcache *regcache,
771 void *valbuf)
772{
773 int len = TYPE_LENGTH (type);
774 ULONGEST c, addr;
775
776 switch (len)
777 {
778 case 1:
779 case 2:
780 case 4:
781 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
782 store_unsigned_integer (valbuf, len, c);
783 break;
784 case 8: /* long long is now 8 bytes. */
785 if (TYPE_CODE (type) == TYPE_CODE_INT)
786 {
862ba188
CV
787 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
788 store_unsigned_integer (valbuf, 4, c);
789 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
790 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c);
f0bdd87d
YS
791 }
792 else
793 {
794 error ("I don't know how this 8 byte value is returned.");
795 }
796 break;
797 }
798}
799
862ba188
CV
800int
801h8300_use_struct_convention (struct type *value_type)
802{
803 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
804 stack. */
805
806 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
807 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
808 return 1;
809 return !(TYPE_LENGTH (value_type) == 1
810 || TYPE_LENGTH (value_type) == 2
811 || TYPE_LENGTH (value_type) == 4);
812}
813
814int
815h8300h_use_struct_convention (struct type *value_type)
816{
817 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
818 returned in R0/R1, everything else on the stack. */
819 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
820 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
821 return 1;
822 return !(TYPE_LENGTH (value_type) == 1
823 || TYPE_LENGTH (value_type) == 2
824 || TYPE_LENGTH (value_type) == 4
825 || (TYPE_LENGTH (value_type) == 8
826 && TYPE_CODE (value_type) == TYPE_CODE_INT));
827}
f0bdd87d
YS
828
829/* Function: store_return_value
830 Place the appropriate value in the appropriate registers.
831 Primarily used by the RETURN command. */
832
833static void
834h8300_store_return_value (struct type *type, struct regcache *regcache,
835 const void *valbuf)
836{
837 int len = TYPE_LENGTH (type);
838 ULONGEST val;
839
840 switch (len)
841 {
842 case 1:
843 case 2: /* short... */
844 val = extract_unsigned_integer (valbuf, len);
845 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
846 break;
847 case 4: /* long, float */
848 val = extract_unsigned_integer (valbuf, len);
849 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
850 (val >> 16) & 0xffff);
851 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
852 break;
853 case 8: /* long long, double and long double are all defined
854 as 4 byte types so far so this shouldn't happen. */
855 error ("I don't know how to return an 8 byte value.");
856 break;
857 }
858}
859
860static void
861h8300h_store_return_value (struct type *type, struct regcache *regcache,
862 const void *valbuf)
863{
864 int len = TYPE_LENGTH (type);
865 ULONGEST val;
866
867 switch (len)
868 {
869 case 1:
870 case 2:
871 case 4: /* long, float */
872 val = extract_unsigned_integer (valbuf, len);
873 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
874 break;
862ba188
CV
875 case 8:
876 val = extract_unsigned_integer (valbuf, len);
877 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
878 (val >> 32) & 0xffffffff);
879 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
880 val & 0xffffffff);
f0bdd87d
YS
881 break;
882 }
883}
884
862ba188 885static enum return_value_convention
c055b101
CV
886h8300_return_value (struct gdbarch *gdbarch, struct type *func_type,
887 struct type *type, struct regcache *regcache,
5d0d05b6 888 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
889{
890 if (h8300_use_struct_convention (type))
891 return RETURN_VALUE_STRUCT_CONVENTION;
892 if (writebuf)
893 h8300_store_return_value (type, regcache, writebuf);
894 else if (readbuf)
895 h8300_extract_return_value (type, regcache, readbuf);
896 return RETURN_VALUE_REGISTER_CONVENTION;
897}
898
899static enum return_value_convention
c055b101
CV
900h8300h_return_value (struct gdbarch *gdbarch, struct type *func_type,
901 struct type *type, struct regcache *regcache,
5d0d05b6 902 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
903{
904 if (h8300h_use_struct_convention (type))
905 {
906 if (readbuf)
907 {
908 ULONGEST addr;
909
910 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
911 read_memory (addr, readbuf, TYPE_LENGTH (type));
912 }
913
914 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
915 }
916 if (writebuf)
917 h8300h_store_return_value (type, regcache, writebuf);
918 else if (readbuf)
919 h8300h_extract_return_value (type, regcache, readbuf);
920 return RETURN_VALUE_REGISTER_CONVENTION;
921}
922
f0bdd87d
YS
923static struct cmd_list_element *setmachinelist;
924
925static const char *
d93859e2 926h8300_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
927{
928 /* The register names change depending on which h8300 processor
929 type is selected. */
930 static char *register_names[] = {
931 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
932 "sp", "", "pc", "cycles", "tick", "inst",
933 "ccr", /* pseudo register */
934 };
935 if (regno < 0
936 || regno >= (sizeof (register_names) / sizeof (*register_names)))
937 internal_error (__FILE__, __LINE__,
938 "h8300_register_name: illegal register number %d", regno);
939 else
940 return register_names[regno];
941}
942
943static const char *
d93859e2 944h8300s_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
945{
946 static char *register_names[] = {
947 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
948 "sp", "", "pc", "cycles", "", "tick", "inst",
949 "mach", "macl",
950 "ccr", "exr" /* pseudo registers */
951 };
952 if (regno < 0
953 || regno >= (sizeof (register_names) / sizeof (*register_names)))
954 internal_error (__FILE__, __LINE__,
955 "h8300s_register_name: illegal register number %d",
956 regno);
957 else
958 return register_names[regno];
959}
960
961static const char *
d93859e2 962h8300sx_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
963{
964 static char *register_names[] = {
965 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
966 "sp", "", "pc", "cycles", "", "tick", "inst",
967 "mach", "macl", "sbr", "vbr",
968 "ccr", "exr" /* pseudo registers */
969 };
970 if (regno < 0
971 || regno >= (sizeof (register_names) / sizeof (*register_names)))
972 internal_error (__FILE__, __LINE__,
973 "h8300sx_register_name: illegal register number %d",
974 regno);
975 else
976 return register_names[regno];
977}
978
979static void
980h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
981 struct frame_info *frame, int regno)
982{
983 LONGEST rval;
984 const char *name = gdbarch_register_name (gdbarch, regno);
985
986 if (!name || !*name)
987 return;
988
989 rval = get_frame_register_signed (frame, regno);
990
991 fprintf_filtered (file, "%-14s ", name);
be8626e0
MD
992 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
993 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
f0bdd87d
YS
994 {
995 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
996 print_longest (file, 'u', 1, rval);
997 }
998 else
999 {
be8626e0
MD
1000 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval,
1001 BINWORD (gdbarch)));
f0bdd87d
YS
1002 print_longest (file, 'd', 1, rval);
1003 }
be8626e0 1004 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d
YS
1005 {
1006 /* CCR register */
1007 int C, Z, N, V;
1008 unsigned char l = rval & 0xff;
1009 fprintf_filtered (file, "\t");
1010 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1011 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1012 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1013 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1014 N = (l & 0x8) != 0;
1015 Z = (l & 0x4) != 0;
1016 V = (l & 0x2) != 0;
1017 C = (l & 0x1) != 0;
1018 fprintf_filtered (file, "N-%d ", N);
1019 fprintf_filtered (file, "Z-%d ", Z);
1020 fprintf_filtered (file, "V-%d ", V);
1021 fprintf_filtered (file, "C-%d ", C);
1022 if ((C | Z) == 0)
1023 fprintf_filtered (file, "u> ");
1024 if ((C | Z) == 1)
1025 fprintf_filtered (file, "u<= ");
1026 if ((C == 0))
1027 fprintf_filtered (file, "u>= ");
1028 if (C == 1)
1029 fprintf_filtered (file, "u< ");
1030 if (Z == 0)
1031 fprintf_filtered (file, "!= ");
1032 if (Z == 1)
1033 fprintf_filtered (file, "== ");
1034 if ((N ^ V) == 0)
1035 fprintf_filtered (file, ">= ");
1036 if ((N ^ V) == 1)
1037 fprintf_filtered (file, "< ");
1038 if ((Z | (N ^ V)) == 0)
1039 fprintf_filtered (file, "> ");
1040 if ((Z | (N ^ V)) == 1)
1041 fprintf_filtered (file, "<= ");
1042 }
be8626e0 1043 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
f0bdd87d
YS
1044 {
1045 /* EXR register */
1046 unsigned char l = rval & 0xff;
1047 fprintf_filtered (file, "\t");
1048 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1049 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1050 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1051 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1052 }
1053 fprintf_filtered (file, "\n");
1054}
1055
1056static void
1057h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1058 struct frame_info *frame, int regno, int cpregs)
1059{
1060 if (regno < 0)
1061 {
1062 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1063 h8300_print_register (gdbarch, file, frame, regno);
be8626e0
MD
1064 h8300_print_register (gdbarch, file, frame,
1065 E_PSEUDO_CCR_REGNUM (gdbarch));
f0bdd87d 1066 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
ea78bae4 1067 if (is_h8300smode (gdbarch))
f0bdd87d 1068 {
be8626e0
MD
1069 h8300_print_register (gdbarch, file, frame,
1070 E_PSEUDO_EXR_REGNUM (gdbarch));
ea78bae4 1071 if (is_h8300sxmode (gdbarch))
f0bdd87d
YS
1072 {
1073 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1074 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1075 }
1076 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1077 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1078 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1079 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1080 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1081 }
1082 else
1083 {
1084 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1085 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1086 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1087 }
1088 }
1089 else
1090 {
1091 if (regno == E_CCR_REGNUM)
be8626e0
MD
1092 h8300_print_register (gdbarch, file, frame,
1093 E_PSEUDO_CCR_REGNUM (gdbarch));
1094 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
ea78bae4 1095 && is_h8300smode (gdbarch))
be8626e0
MD
1096 h8300_print_register (gdbarch, file, frame,
1097 E_PSEUDO_EXR_REGNUM (gdbarch));
f0bdd87d
YS
1098 else
1099 h8300_print_register (gdbarch, file, frame, regno);
1100 }
1101}
1102
1103static struct type *
1104h8300_register_type (struct gdbarch *gdbarch, int regno)
1105{
ea78bae4
UW
1106 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)
1107 + gdbarch_num_pseudo_regs (gdbarch))
f0bdd87d
YS
1108 internal_error (__FILE__, __LINE__,
1109 "h8300_register_type: illegal register number %d", regno);
1110 else
1111 {
1112 switch (regno)
1113 {
1114 case E_PC_REGNUM:
1115 return builtin_type_void_func_ptr;
1116 case E_SP_REGNUM:
1117 case E_FP_REGNUM:
1118 return builtin_type_void_data_ptr;
1119 default:
be8626e0 1120 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1121 return builtin_type_uint8;
be8626e0 1122 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d 1123 return builtin_type_uint8;
ea78bae4 1124 else if (is_h8300hmode (gdbarch))
f0bdd87d
YS
1125 return builtin_type_int32;
1126 else
1127 return builtin_type_int16;
1128 }
1129 }
1130}
1131
1132static void
1133h8300_pseudo_register_read (struct gdbarch *gdbarch,
5d0d05b6
CV
1134 struct regcache *regcache, int regno,
1135 gdb_byte *buf)
f0bdd87d 1136{
be8626e0 1137 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1138 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
be8626e0 1139 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d
YS
1140 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1141 else
1142 regcache_raw_read (regcache, regno, buf);
1143}
1144
1145static void
1146h8300_pseudo_register_write (struct gdbarch *gdbarch,
1147 struct regcache *regcache, int regno,
5d0d05b6 1148 const gdb_byte *buf)
f0bdd87d 1149{
be8626e0 1150 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1151 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
be8626e0 1152 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d
YS
1153 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1154 else
1155 regcache_raw_write (regcache, regno, buf);
1156}
1157
1158static int
d3f73121 1159h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1160{
1161 if (regno == E_CCR_REGNUM)
be8626e0 1162 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d
YS
1163 return regno;
1164}
1165
1166static int
d3f73121 1167h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1168{
1169 if (regno == E_CCR_REGNUM)
be8626e0 1170 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d 1171 if (regno == E_EXR_REGNUM)
be8626e0 1172 return E_PSEUDO_EXR_REGNUM (gdbarch);
f0bdd87d
YS
1173 return regno;
1174}
1175
f0bdd87d 1176const static unsigned char *
67d57894
MD
1177h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
1178 int *lenptr)
f0bdd87d
YS
1179{
1180 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1181 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1182
1183 *lenptr = sizeof (breakpoint);
1184 return breakpoint;
1185}
1186
f0bdd87d
YS
1187static void
1188h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1189 struct frame_info *frame, const char *args)
1190{
1191 fprintf_filtered (file, "\
1192No floating-point info available for this processor.\n");
1193}
1194
1195static struct gdbarch *
1196h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1197{
1198 struct gdbarch_tdep *tdep = NULL;
1199 struct gdbarch *gdbarch;
1200
1201 arches = gdbarch_list_lookup_by_info (arches, &info);
1202 if (arches != NULL)
1203 return arches->gdbarch;
1204
1205#if 0
1206 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1207#endif
1208
1209 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1210 return NULL;
1211
1212 gdbarch = gdbarch_alloc (&info, 0);
1213
1214 switch (info.bfd_arch_info->mach)
1215 {
1216 case bfd_mach_h8300:
1217 set_gdbarch_num_regs (gdbarch, 13);
1218 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1219 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1220 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1221 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1222 set_gdbarch_register_name (gdbarch, h8300_register_name);
1223 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1224 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
862ba188 1225 set_gdbarch_return_value (gdbarch, h8300_return_value);
f0bdd87d
YS
1226 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1227 break;
1228 case bfd_mach_h8300h:
1229 case bfd_mach_h8300hn:
1230 set_gdbarch_num_regs (gdbarch, 13);
1231 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1232 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1233 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1234 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1235 set_gdbarch_register_name (gdbarch, h8300_register_name);
1236 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1237 {
1238 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1239 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1240 }
1241 else
1242 {
1243 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1244 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1245 }
862ba188 1246 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1247 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1248 break;
1249 case bfd_mach_h8300s:
1250 case bfd_mach_h8300sn:
1251 set_gdbarch_num_regs (gdbarch, 16);
1252 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1253 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1254 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1255 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1256 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1257 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1258 {
1259 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1260 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1261 }
1262 else
1263 {
1264 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1265 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1266 }
862ba188 1267 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1268 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1269 break;
1270 case bfd_mach_h8300sx:
1271 case bfd_mach_h8300sxn:
1272 set_gdbarch_num_regs (gdbarch, 18);
1273 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1274 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1275 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1276 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1277 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1278 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1279 {
1280 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1281 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1282 }
1283 else
1284 {
1285 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1286 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1287 }
862ba188 1288 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1289 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1290 break;
1291 }
1292
1293 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1294 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1295
1296 /*
1297 * Basic register fields and methods.
1298 */
1299
1300 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
f0bdd87d
YS
1301 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1302 set_gdbarch_register_type (gdbarch, h8300_register_type);
1303 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1304 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1305
1306 /*
1307 * Frame Info
1308 */
1309 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1310
1311 /* Frame unwinder. */
f0bdd87d 1312 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
862ba188 1313 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
94afd7a6 1314 set_gdbarch_dummy_id (gdbarch, h8300_dummy_id);
862ba188 1315 frame_base_set_default (gdbarch, &h8300_frame_base);
f0bdd87d
YS
1316
1317 /*
1318 * Miscelany
1319 */
1320 /* Stack grows up. */
1321 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1322
f0bdd87d 1323 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
f0bdd87d
YS
1324 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1325
862ba188 1326 set_gdbarch_char_signed (gdbarch, 0);
f0bdd87d
YS
1327 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1328 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1329 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1330 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1331 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1332
1333 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1334
862ba188 1335 /* Hook in the DWARF CFI frame unwinder. */
94afd7a6
UW
1336 dwarf2_append_unwinders (gdbarch);
1337 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
f0bdd87d
YS
1338
1339 return gdbarch;
1340
1341}
1342
1343extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1344
1345void
1346_initialize_h8300_tdep (void)
1347{
1348 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1349}
1350
1351static int
1352is_h8300hmode (struct gdbarch *gdbarch)
1353{
1354 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1355 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1356 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1357 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1358 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1359 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1360}
1361
1362static int
1363is_h8300smode (struct gdbarch *gdbarch)
1364{
1365 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1366 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1367 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1368 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1369}
1370
1371static int
1372is_h8300sxmode (struct gdbarch *gdbarch)
1373{
1374 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1375 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1376}
1377
1378static int
1379is_h8300_normal_mode (struct gdbarch *gdbarch)
1380{
1381 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1382 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1383 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1384}
This page took 0.374229 seconds and 4 git commands to generate.