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[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
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1/* Target-machine dependent code for Renesas H8/300, for GDB.
2
6aba47ca 3 Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999,
9b254dd1 4 2000, 2001, 2002, 2003, 2005, 2007, 2008 Free Software Foundation, Inc.
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5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
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11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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20
21/*
22 Contributed by Steve Chamberlain
23 sac@cygnus.com
24 */
25
26#include "defs.h"
27#include "value.h"
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28#include "arch-utils.h"
29#include "regcache.h"
30#include "gdbcore.h"
31#include "objfiles.h"
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32#include "gdb_assert.h"
33#include "dis-asm.h"
34#include "dwarf2-frame.h"
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35#include "frame-base.h"
36#include "frame-unwind.h"
37
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38enum gdb_regnum
39{
40 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
41 E_RET0_REGNUM = E_R0_REGNUM,
42 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
43 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
44 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
45 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
46 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
47 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
48 E_SP_REGNUM,
49 E_CCR_REGNUM,
50 E_PC_REGNUM,
51 E_CYCLES_REGNUM,
52 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
53 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
54 E_INSTS_REGNUM,
55 E_MACH_REGNUM,
56 E_MACL_REGNUM,
57 E_SBR_REGNUM,
58 E_VBR_REGNUM
59};
60
61#define H8300_MAX_NUM_REGS 18
62
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63#define E_PSEUDO_CCR_REGNUM (gdbarch_num_regs (current_gdbarch))
64#define E_PSEUDO_EXR_REGNUM (gdbarch_num_regs (current_gdbarch)+1)
f0bdd87d 65
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66struct h8300_frame_cache
67{
68 /* Base address. */
69 CORE_ADDR base;
70 CORE_ADDR sp_offset;
71 CORE_ADDR pc;
72
73 /* Flag showing that a frame has been created in the prologue code. */
74 int uses_fp;
f0bdd87d 75
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76 /* Saved registers. */
77 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
78 CORE_ADDR saved_sp;
79};
80
81enum
82{
83 h8300_reg_size = 2,
84 h8300h_reg_size = 4,
85 h8300_max_reg_size = 4,
86};
87
88static int is_h8300hmode (struct gdbarch *gdbarch);
89static int is_h8300smode (struct gdbarch *gdbarch);
90static int is_h8300sxmode (struct gdbarch *gdbarch);
91static int is_h8300_normal_mode (struct gdbarch *gdbarch);
92
93#define BINWORD ((is_h8300hmode (current_gdbarch) \
94 && !is_h8300_normal_mode (current_gdbarch)) \
95 ? h8300h_reg_size : h8300_reg_size)
96
97static CORE_ADDR
98h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
99{
100 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
101}
102
103static CORE_ADDR
104h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
105{
106 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
107}
108
109static struct frame_id
110h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
111{
112 return frame_id_build (h8300_unwind_sp (gdbarch, next_frame),
113 frame_pc_unwind (next_frame));
114}
115
116/* Normal frames. */
117
118/* Allocate and initialize a frame cache. */
119
120static void
121h8300_init_frame_cache (struct h8300_frame_cache *cache)
122{
123 int i;
124
125 /* Base address. */
126 cache->base = 0;
127 cache->sp_offset = 0;
128 cache->pc = 0;
129
130 /* Frameless until proven otherwise. */
131 cache->uses_fp = 0;
132
133 /* Saved registers. We initialize these to -1 since zero is a valid
134 offset (that's where %fp is supposed to be stored). */
f57d151a 135 for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
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136 cache->saved_regs[i] = -1;
137}
138
139#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
140#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
141#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
142#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
143#define IS_MOVB_EXT(x) ((x) == 0x7860)
144#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
145#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
146#define IS_MOVW_EXT(x) ((x) == 0x78e0)
147#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
148/* Same instructions as mov.w, just prefixed with 0x0100 */
149#define IS_MOVL_PRE(x) ((x) == 0x0100)
150#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
151#define IS_MOVL_EXT(x) ((x) == 0x78e0)
152#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
153
154#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
155#define IS_PUSH_FP(x) ((x) == 0x01006df6)
156#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
157#define IS_SUB2_SP(x) ((x) == 0x1b87)
158#define IS_SUB4_SP(x) ((x) == 0x1b97)
159#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
160#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
161#define IS_SUBL4_SP(x) ((x) == 0x1acf)
162#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
163#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
164#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
165#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
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166
167/* If the instruction at PC is an argument register spill, return its
168 length. Otherwise, return zero.
169
170 An argument register spill is an instruction that moves an argument
171 from the register in which it was passed to the stack slot in which
172 it really lives. It is a byte, word, or longword move from an
173 argument register to a negative offset from the frame pointer.
174
175 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
176 is used, it could be a byte, word or long move to registers r3-r5. */
177
178static int
179h8300_is_argument_spill (CORE_ADDR pc)
180{
181 int w = read_memory_unsigned_integer (pc, 2);
182
862ba188 183 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
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184 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
185 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
186 return 2;
187
862ba188 188 if (IS_MOVB_Rn16_SP (w)
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189 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
190 {
862ba188 191 if (read_memory_integer (pc + 2, 2) < 0) /* ... and d:16 is negative. */
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192 return 4;
193 }
862ba188 194 else if (IS_MOVB_EXT (w))
f0bdd87d 195 {
862ba188 196 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
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197 {
198 LONGEST disp = read_memory_integer (pc + 4, 4);
199
200 /* ... and d:24 is negative. */
201 if (disp < 0 && disp > 0xffffff)
202 return 8;
203 }
204 }
862ba188 205 else if (IS_MOVW_Rn16_SP (w)
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206 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
207 {
f0bdd87d 208 /* ... and d:16 is negative. */
862ba188 209 if (read_memory_integer (pc + 2, 2) < 0)
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210 return 4;
211 }
862ba188 212 else if (IS_MOVW_EXT (w))
f0bdd87d 213 {
862ba188 214 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
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215 {
216 LONGEST disp = read_memory_integer (pc + 4, 4);
217
218 /* ... and d:24 is negative. */
219 if (disp < 0 && disp > 0xffffff)
220 return 8;
221 }
222 }
862ba188 223 else if (IS_MOVL_PRE (w))
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224 {
225 int w2 = read_memory_integer (pc + 2, 2);
226
862ba188 227 if (IS_MOVL_Rn16_SP (w2)
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228 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
229 {
f0bdd87d 230 /* ... and d:16 is negative. */
862ba188 231 if (read_memory_integer (pc + 4, 2) < 0)
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232 return 6;
233 }
862ba188 234 else if (IS_MOVL_EXT (w2))
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235 {
236 int w3 = read_memory_integer (pc + 4, 2);
237
862ba188 238 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2)))
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239 {
240 LONGEST disp = read_memory_integer (pc + 6, 4);
241
242 /* ... and d:24 is negative. */
243 if (disp < 0 && disp > 0xffffff)
244 return 10;
245 }
246 }
247 }
248
249 return 0;
250}
251
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252/* Do a full analysis of the prologue at PC and update CACHE
253 accordingly. Bail out early if CURRENT_PC is reached. Return the
254 address where the analysis stopped.
255
256 We handle all cases that can be generated by gcc.
257
258 For allocating a stack frame:
259
260 mov.w r6,@-sp
261 mov.w sp,r6
262 mov.w #-n,rN
263 add.w rN,sp
264
265 mov.w r6,@-sp
266 mov.w sp,r6
267 subs #2,sp
268 (repeat)
269
270 mov.l er6,@-sp
271 mov.l sp,er6
272 add.l #-n,sp
273
274 mov.w r6,@-sp
275 mov.w sp,r6
276 subs #4,sp
277 (repeat)
278
279 For saving registers:
280
281 mov.w rN,@-sp
282 mov.l erN,@-sp
283 stm.l reglist,@-sp
284
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285 */
286
287static CORE_ADDR
288h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
289 struct h8300_frame_cache *cache)
290{
291 unsigned int op;
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292 int regno, i, spill_size;
293
294 cache->sp_offset = 0;
f0bdd87d 295
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296 if (pc >= current_pc)
297 return current_pc;
298
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299 op = read_memory_unsigned_integer (pc, 4);
300
301 if (IS_PUSHFP_MOVESPFP (op))
302 {
303 cache->saved_regs[E_FP_REGNUM] = 0;
304 cache->uses_fp = 1;
305 pc += 4;
306 }
307 else if (IS_PUSH_FP (op))
308 {
309 cache->saved_regs[E_FP_REGNUM] = 0;
310 pc += 4;
311 if (pc >= current_pc)
312 return current_pc;
313 op = read_memory_unsigned_integer (pc, 2);
314 if (IS_MOV_SP_FP (op))
315 {
316 cache->uses_fp = 1;
317 pc += 2;
318 }
319 }
320
321 while (pc < current_pc)
322 {
323 op = read_memory_unsigned_integer (pc, 2);
324 if (IS_SUB2_SP (op))
325 {
326 cache->sp_offset += 2;
327 pc += 2;
328 }
329 else if (IS_SUB4_SP (op))
330 {
331 cache->sp_offset += 4;
332 pc += 2;
333 }
334 else if (IS_ADD_IMM_SP (op))
335 {
336 cache->sp_offset += -read_memory_integer (pc + 2, 2);
337 pc += 4;
338 }
339 else if (IS_SUB_IMM_SP (op))
340 {
341 cache->sp_offset += read_memory_integer (pc + 2, 2);
342 pc += 4;
343 }
344 else if (IS_SUBL4_SP (op))
345 {
346 cache->sp_offset += 4;
347 pc += 2;
348 }
349 else if (IS_MOV_IMM_Rn (op))
350 {
351 int offset = read_memory_integer (pc + 2, 2);
352 regno = op & 0x000f;
353 op = read_memory_unsigned_integer (pc + 4, 2);
354 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
355 {
356 cache->sp_offset -= offset;
357 pc += 6;
358 }
359 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
360 {
361 cache->sp_offset += offset;
362 pc += 6;
363 }
364 else
365 break;
366 }
367 else if (IS_PUSH (op))
368 {
369 regno = op & 0x000f;
370 cache->sp_offset += 2;
371 cache->saved_regs[regno] = cache->sp_offset;
372 pc += 2;
373 }
374 else if (op == 0x0100)
375 {
376 op = read_memory_unsigned_integer (pc + 2, 2);
377 if (IS_PUSH (op))
378 {
379 regno = op & 0x000f;
380 cache->sp_offset += 4;
381 cache->saved_regs[regno] = cache->sp_offset;
382 pc += 4;
383 }
384 else
385 break;
386 }
387 else if ((op & 0xffcf) == 0x0100)
388 {
389 int op1;
390 op1 = read_memory_unsigned_integer (pc + 2, 2);
391 if (IS_PUSH (op1))
392 {
393 /* Since the prefix is 0x01x0, this is not a simple pushm but a
394 stm.l reglist,@-sp */
395 i = ((op & 0x0030) >> 4) + 1;
396 regno = op1 & 0x000f;
397 for (; i > 0; regno++, --i)
398 {
399 cache->sp_offset += 4;
400 cache->saved_regs[regno] = cache->sp_offset;
401 }
402 pc += 4;
403 }
404 else
405 break;
406 }
407 else
408 break;
409 }
410
411 /* Check for spilling an argument register to the stack frame.
412 This could also be an initializing store from non-prologue code,
413 but I don't think there's any harm in skipping that. */
414 while ((spill_size = h8300_is_argument_spill (pc)) > 0
415 && pc + spill_size <= current_pc)
416 pc += spill_size;
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417
418 return pc;
419}
420
421static struct h8300_frame_cache *
422h8300_frame_cache (struct frame_info *next_frame, void **this_cache)
423{
424 struct h8300_frame_cache *cache;
425 char buf[4];
426 int i;
862ba188 427 CORE_ADDR current_pc;
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428
429 if (*this_cache)
430 return *this_cache;
431
862ba188
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432 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
433 h8300_init_frame_cache (cache);
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434 *this_cache = cache;
435
436 /* In principle, for normal frames, %fp holds the frame pointer,
437 which holds the base address for the current stack frame.
438 However, for functions that don't need it, the frame pointer is
439 optional. For these "frameless" functions the frame pointer is
862ba188 440 actually the frame pointer of the calling frame. */
f0bdd87d 441
862ba188 442 cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM);
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443 if (cache->base == 0)
444 return cache;
445
862ba188 446 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
f0bdd87d 447
93d42b30 448 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
862ba188 449 current_pc = frame_pc_unwind (next_frame);
f0bdd87d 450 if (cache->pc != 0)
862ba188 451 h8300_analyze_prologue (cache->pc, current_pc, cache);
f0bdd87d 452
862ba188 453 if (!cache->uses_fp)
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454 {
455 /* We didn't find a valid frame, which means that CACHE->base
456 currently holds the frame pointer for our calling frame. If
457 we're at the start of a function, or somewhere half-way its
458 prologue, the function's frame probably hasn't been fully
459 setup yet. Try to reconstruct the base address for the stack
460 frame by looking at the stack pointer. For truly "frameless"
461 functions this might work too. */
462
862ba188
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463 cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM)
464 + cache->sp_offset;
465 cache->saved_sp = cache->base + BINWORD;
466 cache->saved_regs[E_PC_REGNUM] = 0;
467 }
468 else
469 {
470 cache->saved_sp = cache->base + 2 * BINWORD;
471 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
f0bdd87d 472 }
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473
474 /* Adjust all the saved registers such that they contain addresses
475 instead of offsets. */
ea78bae4 476 for (i = 0; i < gdbarch_num_regs (get_frame_arch (next_frame)); i++)
f0bdd87d 477 if (cache->saved_regs[i] != -1)
862ba188 478 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
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479
480 return cache;
481}
482
483static void
484h8300_frame_this_id (struct frame_info *next_frame, void **this_cache,
485 struct frame_id *this_id)
486{
487 struct h8300_frame_cache *cache =
488 h8300_frame_cache (next_frame, this_cache);
489
490 /* This marks the outermost frame. */
491 if (cache->base == 0)
492 return;
493
862ba188 494 *this_id = frame_id_build (cache->saved_sp, cache->pc);
f0bdd87d
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495}
496
497static void
498h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache,
499 int regnum, int *optimizedp,
500 enum lval_type *lvalp, CORE_ADDR *addrp,
5d0d05b6 501 int *realnump, gdb_byte *valuep)
f0bdd87d 502{
ea78bae4 503 struct gdbarch *gdbarch = get_frame_arch (next_frame);
f0bdd87d
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504 struct h8300_frame_cache *cache =
505 h8300_frame_cache (next_frame, this_cache);
506
507 gdb_assert (regnum >= 0);
508
509 if (regnum == E_SP_REGNUM && cache->saved_sp)
510 {
511 *optimizedp = 0;
512 *lvalp = not_lval;
513 *addrp = 0;
514 *realnump = -1;
515 if (valuep)
862ba188 516 store_unsigned_integer (valuep, BINWORD, cache->saved_sp);
f0bdd87d
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517 return;
518 }
519
ea78bae4 520 if (regnum < gdbarch_num_regs (gdbarch)
f57d151a 521 && cache->saved_regs[regnum] != -1)
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522 {
523 *optimizedp = 0;
524 *lvalp = lval_memory;
525 *addrp = cache->saved_regs[regnum];
526 *realnump = -1;
527 if (valuep)
ea78bae4 528 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
f0bdd87d
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529 return;
530 }
531
5efde112
DJ
532 *optimizedp = 0;
533 *lvalp = lval_register;
534 *addrp = 0;
535 *realnump = regnum;
536 if (valuep)
537 frame_unwind_register (next_frame, *realnump, valuep);
f0bdd87d
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538}
539
540static const struct frame_unwind h8300_frame_unwind = {
541 NORMAL_FRAME,
542 h8300_frame_this_id,
543 h8300_frame_prev_register
544};
545
546static const struct frame_unwind *
547h8300_frame_sniffer (struct frame_info *next_frame)
548{
549 return &h8300_frame_unwind;
550}
551
862ba188
CV
552static CORE_ADDR
553h8300_frame_base_address (struct frame_info *next_frame, void **this_cache)
554{
555 struct h8300_frame_cache *cache = h8300_frame_cache (next_frame, this_cache);
556 return cache->base;
557}
558
559static const struct frame_base h8300_frame_base = {
560 &h8300_frame_unwind,
561 h8300_frame_base_address,
562 h8300_frame_base_address,
563 h8300_frame_base_address
564};
565
566static CORE_ADDR
567h8300_skip_prologue (CORE_ADDR pc)
568{
569 CORE_ADDR func_addr = 0 , func_end = 0;
570
571 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
572 {
573 struct symtab_and_line sal;
574 struct h8300_frame_cache cache;
575
576 /* Found a function. */
577 sal = find_pc_line (func_addr, 0);
578 if (sal.end && sal.end < func_end)
579 /* Found a line number, use it as end of prologue. */
580 return sal.end;
581
582 /* No useable line symbol. Use prologue parsing method. */
583 h8300_init_frame_cache (&cache);
584 return h8300_analyze_prologue (func_addr, func_end, &cache);
585 }
586
587 /* No function symbol -- just return the PC. */
588 return (CORE_ADDR) pc;
589}
590
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591/* Function: push_dummy_call
592 Setup the function arguments for calling a function in the inferior.
593 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
594 on the H8/300H.
595
596 There are actually two ABI's here: -mquickcall (the default) and
597 -mno-quickcall. With -mno-quickcall, all arguments are passed on
598 the stack after the return address, word-aligned. With
599 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
600 GCC doesn't indicate in the object file which ABI was used to
601 compile it, GDB only supports the default --- -mquickcall.
602
603 Here are the rules for -mquickcall, in detail:
604
605 Each argument, whether scalar or aggregate, is padded to occupy a
606 whole number of words. Arguments smaller than a word are padded at
607 the most significant end; those larger than a word are padded at
608 the least significant end.
609
610 The initial arguments are passed in r0 -- r2. Earlier arguments go in
611 lower-numbered registers. Multi-word arguments are passed in
612 consecutive registers, with the most significant end in the
613 lower-numbered register.
614
615 If an argument doesn't fit entirely in the remaining registers, it
616 is passed entirely on the stack. Stack arguments begin just after
617 the return address. Once an argument has overflowed onto the stack
618 this way, all subsequent arguments are passed on the stack.
619
620 The above rule has odd consequences. For example, on the h8/300s,
621 if a function takes two longs and an int as arguments:
622 - the first long will be passed in r0/r1,
623 - the second long will be passed entirely on the stack, since it
624 doesn't fit in r2,
625 - and the int will be passed on the stack, even though it could fit
626 in r2.
627
628 A weird exception: if an argument is larger than a word, but not a
629 whole number of words in length (before padding), it is passed on
630 the stack following the rules for stack arguments above, even if
631 there are sufficient registers available to hold it. Stranger
632 still, the argument registers are still `used up' --- even though
633 there's nothing in them.
634
635 So, for example, on the h8/300s, if a function expects a three-byte
636 structure and an int, the structure will go on the stack, and the
637 int will go in r2, not r0.
638
639 If the function returns an aggregate type (struct, union, or class)
640 by value, the caller must allocate space to hold the return value,
641 and pass the callee a pointer to this space as an invisible first
642 argument, in R0.
643
644 For varargs functions, the last fixed argument and all the variable
645 arguments are always passed on the stack. This means that calls to
646 varargs functions don't work properly unless there is a prototype
647 in scope.
648
649 Basically, this ABI is not good, for the following reasons:
650 - You can't call vararg functions properly unless a prototype is in scope.
651 - Structure passing is inconsistent, to no purpose I can see.
652 - It often wastes argument registers, of which there are only three
653 to begin with. */
654
655static CORE_ADDR
656h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
657 struct regcache *regcache, CORE_ADDR bp_addr,
658 int nargs, struct value **args, CORE_ADDR sp,
659 int struct_return, CORE_ADDR struct_addr)
660{
661 int stack_alloc = 0, stack_offset = 0;
662 int wordsize = BINWORD;
663 int reg = E_ARG0_REGNUM;
664 int argument;
665
666 /* First, make sure the stack is properly aligned. */
667 sp = align_down (sp, wordsize);
668
669 /* Now make sure there's space on the stack for the arguments. We
670 may over-allocate a little here, but that won't hurt anything. */
671 for (argument = 0; argument < nargs; argument++)
672 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
673 wordsize);
674 sp -= stack_alloc;
675
676 /* Now load as many arguments as possible into registers, and push
677 the rest onto the stack.
678 If we're returning a structure by value, then we must pass a
679 pointer to the buffer for the return value as an invisible first
680 argument. */
681 if (struct_return)
682 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
683
684 for (argument = 0; argument < nargs; argument++)
685 {
686 struct type *type = value_type (args[argument]);
687 int len = TYPE_LENGTH (type);
688 char *contents = (char *) value_contents (args[argument]);
689
690 /* Pad the argument appropriately. */
691 int padded_len = align_up (len, wordsize);
5d0d05b6 692 gdb_byte *padded = alloca (padded_len);
f0bdd87d
YS
693
694 memset (padded, 0, padded_len);
695 memcpy (len < wordsize ? padded + padded_len - len : padded,
696 contents, len);
697
698 /* Could the argument fit in the remaining registers? */
699 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
700 {
701 /* Are we going to pass it on the stack anyway, for no good
702 reason? */
703 if (len > wordsize && len % wordsize)
704 {
705 /* I feel so unclean. */
706 write_memory (sp + stack_offset, padded, padded_len);
707 stack_offset += padded_len;
708
709 /* That's right --- even though we passed the argument
710 on the stack, we consume the registers anyway! Love
711 me, love my dog. */
712 reg += padded_len / wordsize;
713 }
714 else
715 {
716 /* Heavens to Betsy --- it's really going in registers!
717 It would be nice if we could use write_register_bytes
718 here, but on the h8/300s, there are gaps between
719 the registers in the register file. */
720 int offset;
721
722 for (offset = 0; offset < padded_len; offset += wordsize)
723 {
724 ULONGEST word = extract_unsigned_integer (padded + offset,
725 wordsize);
726 regcache_cooked_write_unsigned (regcache, reg++, word);
727 }
728 }
729 }
730 else
731 {
732 /* It doesn't fit in registers! Onto the stack it goes. */
733 write_memory (sp + stack_offset, padded, padded_len);
734 stack_offset += padded_len;
735
736 /* Once one argument has spilled onto the stack, all
737 subsequent arguments go on the stack. */
738 reg = E_ARGLAST_REGNUM + 1;
739 }
740 }
741
742 /* Store return address. */
743 sp -= wordsize;
744 write_memory_unsigned_integer (sp, wordsize, bp_addr);
745
746 /* Update stack pointer. */
747 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
748
862ba188
CV
749 /* Return the new stack pointer minus the return address slot since
750 that's what DWARF2/GCC uses as the frame's CFA. */
751 return sp + wordsize;
f0bdd87d
YS
752}
753
754/* Function: extract_return_value
755 Figure out where in REGBUF the called function has left its return value.
756 Copy that into VALBUF. Be sure to account for CPU type. */
757
758static void
759h8300_extract_return_value (struct type *type, struct regcache *regcache,
760 void *valbuf)
761{
762 int len = TYPE_LENGTH (type);
763 ULONGEST c, addr;
764
765 switch (len)
766 {
767 case 1:
768 case 2:
769 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
770 store_unsigned_integer (valbuf, len, c);
771 break;
772 case 4: /* Needs two registers on plain H8/300 */
773 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
774 store_unsigned_integer (valbuf, 2, c);
775 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
776 store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
777 break;
778 case 8: /* long long is now 8 bytes. */
779 if (TYPE_CODE (type) == TYPE_CODE_INT)
780 {
781 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
782 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
783 store_unsigned_integer (valbuf, len, c);
784 }
785 else
786 {
787 error ("I don't know how this 8 byte value is returned.");
788 }
789 break;
790 }
791}
792
793static void
794h8300h_extract_return_value (struct type *type, struct regcache *regcache,
795 void *valbuf)
796{
797 int len = TYPE_LENGTH (type);
798 ULONGEST c, addr;
799
800 switch (len)
801 {
802 case 1:
803 case 2:
804 case 4:
805 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
806 store_unsigned_integer (valbuf, len, c);
807 break;
808 case 8: /* long long is now 8 bytes. */
809 if (TYPE_CODE (type) == TYPE_CODE_INT)
810 {
862ba188
CV
811 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
812 store_unsigned_integer (valbuf, 4, c);
813 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
814 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c);
f0bdd87d
YS
815 }
816 else
817 {
818 error ("I don't know how this 8 byte value is returned.");
819 }
820 break;
821 }
822}
823
862ba188
CV
824int
825h8300_use_struct_convention (struct type *value_type)
826{
827 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
828 stack. */
829
830 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
831 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
832 return 1;
833 return !(TYPE_LENGTH (value_type) == 1
834 || TYPE_LENGTH (value_type) == 2
835 || TYPE_LENGTH (value_type) == 4);
836}
837
838int
839h8300h_use_struct_convention (struct type *value_type)
840{
841 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
842 returned in R0/R1, everything else on the stack. */
843 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
844 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
845 return 1;
846 return !(TYPE_LENGTH (value_type) == 1
847 || TYPE_LENGTH (value_type) == 2
848 || TYPE_LENGTH (value_type) == 4
849 || (TYPE_LENGTH (value_type) == 8
850 && TYPE_CODE (value_type) == TYPE_CODE_INT));
851}
f0bdd87d
YS
852
853/* Function: store_return_value
854 Place the appropriate value in the appropriate registers.
855 Primarily used by the RETURN command. */
856
857static void
858h8300_store_return_value (struct type *type, struct regcache *regcache,
859 const void *valbuf)
860{
861 int len = TYPE_LENGTH (type);
862 ULONGEST val;
863
864 switch (len)
865 {
866 case 1:
867 case 2: /* short... */
868 val = extract_unsigned_integer (valbuf, len);
869 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
870 break;
871 case 4: /* long, float */
872 val = extract_unsigned_integer (valbuf, len);
873 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
874 (val >> 16) & 0xffff);
875 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
876 break;
877 case 8: /* long long, double and long double are all defined
878 as 4 byte types so far so this shouldn't happen. */
879 error ("I don't know how to return an 8 byte value.");
880 break;
881 }
882}
883
884static void
885h8300h_store_return_value (struct type *type, struct regcache *regcache,
886 const void *valbuf)
887{
888 int len = TYPE_LENGTH (type);
889 ULONGEST val;
890
891 switch (len)
892 {
893 case 1:
894 case 2:
895 case 4: /* long, float */
896 val = extract_unsigned_integer (valbuf, len);
897 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
898 break;
862ba188
CV
899 case 8:
900 val = extract_unsigned_integer (valbuf, len);
901 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
902 (val >> 32) & 0xffffffff);
903 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
904 val & 0xffffffff);
f0bdd87d
YS
905 break;
906 }
907}
908
862ba188
CV
909static enum return_value_convention
910h8300_return_value (struct gdbarch *gdbarch, struct type *type,
911 struct regcache *regcache,
5d0d05b6 912 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
913{
914 if (h8300_use_struct_convention (type))
915 return RETURN_VALUE_STRUCT_CONVENTION;
916 if (writebuf)
917 h8300_store_return_value (type, regcache, writebuf);
918 else if (readbuf)
919 h8300_extract_return_value (type, regcache, readbuf);
920 return RETURN_VALUE_REGISTER_CONVENTION;
921}
922
923static enum return_value_convention
924h8300h_return_value (struct gdbarch *gdbarch, struct type *type,
925 struct regcache *regcache,
5d0d05b6 926 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
927{
928 if (h8300h_use_struct_convention (type))
929 {
930 if (readbuf)
931 {
932 ULONGEST addr;
933
934 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
935 read_memory (addr, readbuf, TYPE_LENGTH (type));
936 }
937
938 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
939 }
940 if (writebuf)
941 h8300h_store_return_value (type, regcache, writebuf);
942 else if (readbuf)
943 h8300h_extract_return_value (type, regcache, readbuf);
944 return RETURN_VALUE_REGISTER_CONVENTION;
945}
946
f0bdd87d
YS
947static struct cmd_list_element *setmachinelist;
948
949static const char *
d93859e2 950h8300_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
951{
952 /* The register names change depending on which h8300 processor
953 type is selected. */
954 static char *register_names[] = {
955 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
956 "sp", "", "pc", "cycles", "tick", "inst",
957 "ccr", /* pseudo register */
958 };
959 if (regno < 0
960 || regno >= (sizeof (register_names) / sizeof (*register_names)))
961 internal_error (__FILE__, __LINE__,
962 "h8300_register_name: illegal register number %d", regno);
963 else
964 return register_names[regno];
965}
966
967static const char *
d93859e2 968h8300s_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
969{
970 static char *register_names[] = {
971 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
972 "sp", "", "pc", "cycles", "", "tick", "inst",
973 "mach", "macl",
974 "ccr", "exr" /* pseudo registers */
975 };
976 if (regno < 0
977 || regno >= (sizeof (register_names) / sizeof (*register_names)))
978 internal_error (__FILE__, __LINE__,
979 "h8300s_register_name: illegal register number %d",
980 regno);
981 else
982 return register_names[regno];
983}
984
985static const char *
d93859e2 986h8300sx_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
987{
988 static char *register_names[] = {
989 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
990 "sp", "", "pc", "cycles", "", "tick", "inst",
991 "mach", "macl", "sbr", "vbr",
992 "ccr", "exr" /* pseudo registers */
993 };
994 if (regno < 0
995 || regno >= (sizeof (register_names) / sizeof (*register_names)))
996 internal_error (__FILE__, __LINE__,
997 "h8300sx_register_name: illegal register number %d",
998 regno);
999 else
1000 return register_names[regno];
1001}
1002
1003static void
1004h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1005 struct frame_info *frame, int regno)
1006{
1007 LONGEST rval;
1008 const char *name = gdbarch_register_name (gdbarch, regno);
1009
1010 if (!name || !*name)
1011 return;
1012
1013 rval = get_frame_register_signed (frame, regno);
1014
1015 fprintf_filtered (file, "%-14s ", name);
1016 if ((regno == E_PSEUDO_CCR_REGNUM) || \
ea78bae4 1017 (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (gdbarch)))
f0bdd87d
YS
1018 {
1019 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1020 print_longest (file, 'u', 1, rval);
1021 }
1022 else
1023 {
1024 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, BINWORD));
1025 print_longest (file, 'd', 1, rval);
1026 }
1027 if (regno == E_PSEUDO_CCR_REGNUM)
1028 {
1029 /* CCR register */
1030 int C, Z, N, V;
1031 unsigned char l = rval & 0xff;
1032 fprintf_filtered (file, "\t");
1033 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1034 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1035 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1036 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1037 N = (l & 0x8) != 0;
1038 Z = (l & 0x4) != 0;
1039 V = (l & 0x2) != 0;
1040 C = (l & 0x1) != 0;
1041 fprintf_filtered (file, "N-%d ", N);
1042 fprintf_filtered (file, "Z-%d ", Z);
1043 fprintf_filtered (file, "V-%d ", V);
1044 fprintf_filtered (file, "C-%d ", C);
1045 if ((C | Z) == 0)
1046 fprintf_filtered (file, "u> ");
1047 if ((C | Z) == 1)
1048 fprintf_filtered (file, "u<= ");
1049 if ((C == 0))
1050 fprintf_filtered (file, "u>= ");
1051 if (C == 1)
1052 fprintf_filtered (file, "u< ");
1053 if (Z == 0)
1054 fprintf_filtered (file, "!= ");
1055 if (Z == 1)
1056 fprintf_filtered (file, "== ");
1057 if ((N ^ V) == 0)
1058 fprintf_filtered (file, ">= ");
1059 if ((N ^ V) == 1)
1060 fprintf_filtered (file, "< ");
1061 if ((Z | (N ^ V)) == 0)
1062 fprintf_filtered (file, "> ");
1063 if ((Z | (N ^ V)) == 1)
1064 fprintf_filtered (file, "<= ");
1065 }
ea78bae4 1066 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (gdbarch))
f0bdd87d
YS
1067 {
1068 /* EXR register */
1069 unsigned char l = rval & 0xff;
1070 fprintf_filtered (file, "\t");
1071 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1072 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1073 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1074 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1075 }
1076 fprintf_filtered (file, "\n");
1077}
1078
1079static void
1080h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1081 struct frame_info *frame, int regno, int cpregs)
1082{
1083 if (regno < 0)
1084 {
1085 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1086 h8300_print_register (gdbarch, file, frame, regno);
1087 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1088 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
ea78bae4 1089 if (is_h8300smode (gdbarch))
f0bdd87d
YS
1090 {
1091 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
ea78bae4 1092 if (is_h8300sxmode (gdbarch))
f0bdd87d
YS
1093 {
1094 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1095 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1096 }
1097 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1098 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1099 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1100 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1101 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1102 }
1103 else
1104 {
1105 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1106 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1107 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1108 }
1109 }
1110 else
1111 {
1112 if (regno == E_CCR_REGNUM)
1113 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1114 else if (regno == E_PSEUDO_EXR_REGNUM
ea78bae4 1115 && is_h8300smode (gdbarch))
f0bdd87d
YS
1116 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1117 else
1118 h8300_print_register (gdbarch, file, frame, regno);
1119 }
1120}
1121
1122static struct type *
1123h8300_register_type (struct gdbarch *gdbarch, int regno)
1124{
ea78bae4
UW
1125 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)
1126 + gdbarch_num_pseudo_regs (gdbarch))
f0bdd87d
YS
1127 internal_error (__FILE__, __LINE__,
1128 "h8300_register_type: illegal register number %d", regno);
1129 else
1130 {
1131 switch (regno)
1132 {
1133 case E_PC_REGNUM:
1134 return builtin_type_void_func_ptr;
1135 case E_SP_REGNUM:
1136 case E_FP_REGNUM:
1137 return builtin_type_void_data_ptr;
1138 default:
1139 if (regno == E_PSEUDO_CCR_REGNUM)
1140 return builtin_type_uint8;
1141 else if (regno == E_PSEUDO_EXR_REGNUM)
1142 return builtin_type_uint8;
ea78bae4 1143 else if (is_h8300hmode (gdbarch))
f0bdd87d
YS
1144 return builtin_type_int32;
1145 else
1146 return builtin_type_int16;
1147 }
1148 }
1149}
1150
1151static void
1152h8300_pseudo_register_read (struct gdbarch *gdbarch,
5d0d05b6
CV
1153 struct regcache *regcache, int regno,
1154 gdb_byte *buf)
f0bdd87d
YS
1155{
1156 if (regno == E_PSEUDO_CCR_REGNUM)
1157 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1158 else if (regno == E_PSEUDO_EXR_REGNUM)
1159 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1160 else
1161 regcache_raw_read (regcache, regno, buf);
1162}
1163
1164static void
1165h8300_pseudo_register_write (struct gdbarch *gdbarch,
1166 struct regcache *regcache, int regno,
5d0d05b6 1167 const gdb_byte *buf)
f0bdd87d
YS
1168{
1169 if (regno == E_PSEUDO_CCR_REGNUM)
1170 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1171 else if (regno == E_PSEUDO_EXR_REGNUM)
1172 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1173 else
1174 regcache_raw_write (regcache, regno, buf);
1175}
1176
1177static int
d3f73121 1178h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1179{
1180 if (regno == E_CCR_REGNUM)
1181 return E_PSEUDO_CCR_REGNUM;
1182 return regno;
1183}
1184
1185static int
d3f73121 1186h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1187{
1188 if (regno == E_CCR_REGNUM)
1189 return E_PSEUDO_CCR_REGNUM;
1190 if (regno == E_EXR_REGNUM)
1191 return E_PSEUDO_EXR_REGNUM;
1192 return regno;
1193}
1194
f0bdd87d 1195const static unsigned char *
67d57894
MD
1196h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
1197 int *lenptr)
f0bdd87d
YS
1198{
1199 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1200 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1201
1202 *lenptr = sizeof (breakpoint);
1203 return breakpoint;
1204}
1205
f0bdd87d
YS
1206static void
1207h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1208 struct frame_info *frame, const char *args)
1209{
1210 fprintf_filtered (file, "\
1211No floating-point info available for this processor.\n");
1212}
1213
1214static struct gdbarch *
1215h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1216{
1217 struct gdbarch_tdep *tdep = NULL;
1218 struct gdbarch *gdbarch;
1219
1220 arches = gdbarch_list_lookup_by_info (arches, &info);
1221 if (arches != NULL)
1222 return arches->gdbarch;
1223
1224#if 0
1225 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1226#endif
1227
1228 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1229 return NULL;
1230
1231 gdbarch = gdbarch_alloc (&info, 0);
1232
1233 switch (info.bfd_arch_info->mach)
1234 {
1235 case bfd_mach_h8300:
1236 set_gdbarch_num_regs (gdbarch, 13);
1237 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1238 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1239 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1240 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1241 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1242 set_gdbarch_register_name (gdbarch, h8300_register_name);
1243 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1244 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
862ba188 1245 set_gdbarch_return_value (gdbarch, h8300_return_value);
f0bdd87d
YS
1246 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1247 break;
1248 case bfd_mach_h8300h:
1249 case bfd_mach_h8300hn:
1250 set_gdbarch_num_regs (gdbarch, 13);
1251 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1252 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1253 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1254 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1255 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1256 set_gdbarch_register_name (gdbarch, h8300_register_name);
1257 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1258 {
1259 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1260 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1261 }
1262 else
1263 {
1264 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1265 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1266 }
862ba188 1267 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1268 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1269 break;
1270 case bfd_mach_h8300s:
1271 case bfd_mach_h8300sn:
1272 set_gdbarch_num_regs (gdbarch, 16);
1273 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1274 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1275 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1276 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1277 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1278 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1279 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1280 {
1281 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1282 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1283 }
1284 else
1285 {
1286 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1287 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1288 }
862ba188 1289 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1290 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1291 break;
1292 case bfd_mach_h8300sx:
1293 case bfd_mach_h8300sxn:
1294 set_gdbarch_num_regs (gdbarch, 18);
1295 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1296 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1297 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1298 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1299 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1300 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1301 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1302 {
1303 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1304 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1305 }
1306 else
1307 {
1308 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1309 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1310 }
862ba188 1311 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1312 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1313 break;
1314 }
1315
1316 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1317 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1318
1319 /*
1320 * Basic register fields and methods.
1321 */
1322
1323 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
f0bdd87d
YS
1324 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1325 set_gdbarch_register_type (gdbarch, h8300_register_type);
1326 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1327 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1328
1329 /*
1330 * Frame Info
1331 */
1332 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1333
1334 /* Frame unwinder. */
f0bdd87d 1335 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
862ba188
CV
1336 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
1337 set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id);
1338 frame_base_set_default (gdbarch, &h8300_frame_base);
f0bdd87d
YS
1339
1340 /*
1341 * Miscelany
1342 */
1343 /* Stack grows up. */
1344 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1345
f0bdd87d 1346 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
f0bdd87d
YS
1347 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1348
862ba188 1349 set_gdbarch_char_signed (gdbarch, 0);
f0bdd87d
YS
1350 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1351 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1352 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1353 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1354 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1355
1356 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1357
862ba188
CV
1358 /* Hook in the DWARF CFI frame unwinder. */
1359 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
f0bdd87d
YS
1360 frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer);
1361
1362 return gdbarch;
1363
1364}
1365
1366extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1367
1368void
1369_initialize_h8300_tdep (void)
1370{
1371 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1372}
1373
1374static int
1375is_h8300hmode (struct gdbarch *gdbarch)
1376{
1377 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1378 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1379 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1381 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1382 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1383}
1384
1385static int
1386is_h8300smode (struct gdbarch *gdbarch)
1387{
1388 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1389 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1390 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1391 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1392}
1393
1394static int
1395is_h8300sxmode (struct gdbarch *gdbarch)
1396{
1397 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1398 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1399}
1400
1401static int
1402is_h8300_normal_mode (struct gdbarch *gdbarch)
1403{
1404 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1405 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1406 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1407}
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