* defs.h (extract_signed_integer, extract_unsigned_integer,
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
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1/* Target-machine dependent code for Renesas H8/300, for GDB.
2
6aba47ca 3 Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999,
0fb0cc75
JB
4 2000, 2001, 2002, 2003, 2005, 2007, 2008, 2009
5 Free Software Foundation, Inc.
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6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
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12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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21
22/*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27#include "defs.h"
28#include "value.h"
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29#include "arch-utils.h"
30#include "regcache.h"
31#include "gdbcore.h"
32#include "objfiles.h"
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33#include "gdb_assert.h"
34#include "dis-asm.h"
35#include "dwarf2-frame.h"
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36#include "frame-base.h"
37#include "frame-unwind.h"
38
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39enum gdb_regnum
40{
41 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
42 E_RET0_REGNUM = E_R0_REGNUM,
43 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
44 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
45 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
46 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
47 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
48 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
49 E_SP_REGNUM,
50 E_CCR_REGNUM,
51 E_PC_REGNUM,
52 E_CYCLES_REGNUM,
53 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
54 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
55 E_INSTS_REGNUM,
56 E_MACH_REGNUM,
57 E_MACL_REGNUM,
58 E_SBR_REGNUM,
59 E_VBR_REGNUM
60};
61
62#define H8300_MAX_NUM_REGS 18
63
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MD
64#define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
65#define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
f0bdd87d 66
862ba188
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67struct h8300_frame_cache
68{
69 /* Base address. */
70 CORE_ADDR base;
71 CORE_ADDR sp_offset;
72 CORE_ADDR pc;
73
74 /* Flag showing that a frame has been created in the prologue code. */
75 int uses_fp;
f0bdd87d 76
862ba188
CV
77 /* Saved registers. */
78 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
79 CORE_ADDR saved_sp;
80};
81
82enum
83{
84 h8300_reg_size = 2,
85 h8300h_reg_size = 4,
86 h8300_max_reg_size = 4,
87};
88
89static int is_h8300hmode (struct gdbarch *gdbarch);
90static int is_h8300smode (struct gdbarch *gdbarch);
91static int is_h8300sxmode (struct gdbarch *gdbarch);
92static int is_h8300_normal_mode (struct gdbarch *gdbarch);
93
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94#define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
95 && !is_h8300_normal_mode (gdbarch)) \
862ba188
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96 ? h8300h_reg_size : h8300_reg_size)
97
98static CORE_ADDR
99h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
100{
101 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
102}
103
104static CORE_ADDR
105h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
106{
107 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
108}
109
110static struct frame_id
94afd7a6 111h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
862ba188 112{
94afd7a6
UW
113 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
114 return frame_id_build (sp, get_frame_pc (this_frame));
862ba188
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115}
116
117/* Normal frames. */
118
119/* Allocate and initialize a frame cache. */
120
121static void
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122h8300_init_frame_cache (struct gdbarch *gdbarch,
123 struct h8300_frame_cache *cache)
862ba188
CV
124{
125 int i;
126
127 /* Base address. */
128 cache->base = 0;
129 cache->sp_offset = 0;
130 cache->pc = 0;
131
132 /* Frameless until proven otherwise. */
133 cache->uses_fp = 0;
134
135 /* Saved registers. We initialize these to -1 since zero is a valid
136 offset (that's where %fp is supposed to be stored). */
be8626e0 137 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
862ba188
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138 cache->saved_regs[i] = -1;
139}
140
141#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
142#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
143#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
144#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
145#define IS_MOVB_EXT(x) ((x) == 0x7860)
146#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
147#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
148#define IS_MOVW_EXT(x) ((x) == 0x78e0)
149#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
150/* Same instructions as mov.w, just prefixed with 0x0100 */
151#define IS_MOVL_PRE(x) ((x) == 0x0100)
152#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
153#define IS_MOVL_EXT(x) ((x) == 0x78e0)
154#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
155
156#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
157#define IS_PUSH_FP(x) ((x) == 0x01006df6)
158#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
159#define IS_SUB2_SP(x) ((x) == 0x1b87)
160#define IS_SUB4_SP(x) ((x) == 0x1b97)
161#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
162#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
163#define IS_SUBL4_SP(x) ((x) == 0x1acf)
164#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
165#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
166#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
167#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
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168
169/* If the instruction at PC is an argument register spill, return its
170 length. Otherwise, return zero.
171
172 An argument register spill is an instruction that moves an argument
173 from the register in which it was passed to the stack slot in which
174 it really lives. It is a byte, word, or longword move from an
175 argument register to a negative offset from the frame pointer.
176
177 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
178 is used, it could be a byte, word or long move to registers r3-r5. */
179
180static int
e17a4113 181h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)
f0bdd87d 182{
e17a4113
UW
183 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
184 int w = read_memory_unsigned_integer (pc, 2, byte_order);
f0bdd87d 185
862ba188 186 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
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187 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
188 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
189 return 2;
190
862ba188 191 if (IS_MOVB_Rn16_SP (w)
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192 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
193 {
e17a4113
UW
194 /* ... and d:16 is negative. */
195 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
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196 return 4;
197 }
862ba188 198 else if (IS_MOVB_EXT (w))
f0bdd87d 199 {
e17a4113
UW
200 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2,
201 2, byte_order)))
f0bdd87d 202 {
e17a4113 203 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
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204
205 /* ... and d:24 is negative. */
206 if (disp < 0 && disp > 0xffffff)
207 return 8;
208 }
209 }
862ba188 210 else if (IS_MOVW_Rn16_SP (w)
f0bdd87d
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211 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
212 {
f0bdd87d 213 /* ... and d:16 is negative. */
e17a4113 214 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
f0bdd87d
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215 return 4;
216 }
862ba188 217 else if (IS_MOVW_EXT (w))
f0bdd87d 218 {
e17a4113
UW
219 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2,
220 2, byte_order)))
f0bdd87d 221 {
e17a4113 222 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
f0bdd87d
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223
224 /* ... and d:24 is negative. */
225 if (disp < 0 && disp > 0xffffff)
226 return 8;
227 }
228 }
862ba188 229 else if (IS_MOVL_PRE (w))
f0bdd87d 230 {
e17a4113 231 int w2 = read_memory_integer (pc + 2, 2, byte_order);
f0bdd87d 232
862ba188 233 if (IS_MOVL_Rn16_SP (w2)
f0bdd87d
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234 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
235 {
f0bdd87d 236 /* ... and d:16 is negative. */
e17a4113 237 if (read_memory_integer (pc + 4, 2, byte_order) < 0)
f0bdd87d
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238 return 6;
239 }
862ba188 240 else if (IS_MOVL_EXT (w2))
f0bdd87d 241 {
e17a4113 242 int w3 = read_memory_integer (pc + 4, 2, byte_order);
f0bdd87d 243
e17a4113 244 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order)))
f0bdd87d 245 {
e17a4113 246 LONGEST disp = read_memory_integer (pc + 6, 4, byte_order);
f0bdd87d
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247
248 /* ... and d:24 is negative. */
249 if (disp < 0 && disp > 0xffffff)
250 return 10;
251 }
252 }
253 }
254
255 return 0;
256}
257
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258/* Do a full analysis of the prologue at PC and update CACHE
259 accordingly. Bail out early if CURRENT_PC is reached. Return the
260 address where the analysis stopped.
261
262 We handle all cases that can be generated by gcc.
263
264 For allocating a stack frame:
265
266 mov.w r6,@-sp
267 mov.w sp,r6
268 mov.w #-n,rN
269 add.w rN,sp
270
271 mov.w r6,@-sp
272 mov.w sp,r6
273 subs #2,sp
274 (repeat)
275
276 mov.l er6,@-sp
277 mov.l sp,er6
278 add.l #-n,sp
279
280 mov.w r6,@-sp
281 mov.w sp,r6
282 subs #4,sp
283 (repeat)
284
285 For saving registers:
286
287 mov.w rN,@-sp
288 mov.l erN,@-sp
289 stm.l reglist,@-sp
290
f0bdd87d
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291 */
292
293static CORE_ADDR
e17a4113
UW
294h8300_analyze_prologue (struct gdbarch *gdbarch,
295 CORE_ADDR pc, CORE_ADDR current_pc,
f0bdd87d
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296 struct h8300_frame_cache *cache)
297{
e17a4113 298 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d 299 unsigned int op;
862ba188
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300 int regno, i, spill_size;
301
302 cache->sp_offset = 0;
f0bdd87d 303
f0bdd87d
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304 if (pc >= current_pc)
305 return current_pc;
306
e17a4113 307 op = read_memory_unsigned_integer (pc, 4, byte_order);
862ba188
CV
308
309 if (IS_PUSHFP_MOVESPFP (op))
310 {
311 cache->saved_regs[E_FP_REGNUM] = 0;
312 cache->uses_fp = 1;
313 pc += 4;
314 }
315 else if (IS_PUSH_FP (op))
316 {
317 cache->saved_regs[E_FP_REGNUM] = 0;
318 pc += 4;
319 if (pc >= current_pc)
320 return current_pc;
e17a4113 321 op = read_memory_unsigned_integer (pc, 2, byte_order);
862ba188
CV
322 if (IS_MOV_SP_FP (op))
323 {
324 cache->uses_fp = 1;
325 pc += 2;
326 }
327 }
328
329 while (pc < current_pc)
330 {
e17a4113 331 op = read_memory_unsigned_integer (pc, 2, byte_order);
862ba188
CV
332 if (IS_SUB2_SP (op))
333 {
334 cache->sp_offset += 2;
335 pc += 2;
336 }
337 else if (IS_SUB4_SP (op))
338 {
339 cache->sp_offset += 4;
340 pc += 2;
341 }
342 else if (IS_ADD_IMM_SP (op))
343 {
e17a4113 344 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order);
862ba188
CV
345 pc += 4;
346 }
347 else if (IS_SUB_IMM_SP (op))
348 {
e17a4113 349 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order);
862ba188
CV
350 pc += 4;
351 }
352 else if (IS_SUBL4_SP (op))
353 {
354 cache->sp_offset += 4;
355 pc += 2;
356 }
357 else if (IS_MOV_IMM_Rn (op))
358 {
e17a4113 359 int offset = read_memory_integer (pc + 2, 2, byte_order);
862ba188 360 regno = op & 0x000f;
e17a4113 361 op = read_memory_unsigned_integer (pc + 4, 2, byte_order);
862ba188
CV
362 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
363 {
364 cache->sp_offset -= offset;
365 pc += 6;
366 }
367 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
368 {
369 cache->sp_offset += offset;
370 pc += 6;
371 }
372 else
373 break;
374 }
375 else if (IS_PUSH (op))
376 {
377 regno = op & 0x000f;
378 cache->sp_offset += 2;
379 cache->saved_regs[regno] = cache->sp_offset;
380 pc += 2;
381 }
382 else if (op == 0x0100)
383 {
e17a4113 384 op = read_memory_unsigned_integer (pc + 2, 2, byte_order);
862ba188
CV
385 if (IS_PUSH (op))
386 {
387 regno = op & 0x000f;
388 cache->sp_offset += 4;
389 cache->saved_regs[regno] = cache->sp_offset;
390 pc += 4;
391 }
392 else
393 break;
394 }
395 else if ((op & 0xffcf) == 0x0100)
396 {
397 int op1;
e17a4113 398 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order);
862ba188
CV
399 if (IS_PUSH (op1))
400 {
401 /* Since the prefix is 0x01x0, this is not a simple pushm but a
402 stm.l reglist,@-sp */
403 i = ((op & 0x0030) >> 4) + 1;
404 regno = op1 & 0x000f;
405 for (; i > 0; regno++, --i)
406 {
407 cache->sp_offset += 4;
408 cache->saved_regs[regno] = cache->sp_offset;
409 }
410 pc += 4;
411 }
412 else
413 break;
414 }
415 else
416 break;
417 }
418
419 /* Check for spilling an argument register to the stack frame.
420 This could also be an initializing store from non-prologue code,
421 but I don't think there's any harm in skipping that. */
e17a4113 422 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0
862ba188
CV
423 && pc + spill_size <= current_pc)
424 pc += spill_size;
f0bdd87d
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425
426 return pc;
427}
428
429static struct h8300_frame_cache *
94afd7a6 430h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
f0bdd87d 431{
94afd7a6 432 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d
YS
433 struct h8300_frame_cache *cache;
434 char buf[4];
435 int i;
862ba188 436 CORE_ADDR current_pc;
f0bdd87d
YS
437
438 if (*this_cache)
439 return *this_cache;
440
862ba188 441 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
be8626e0 442 h8300_init_frame_cache (gdbarch, cache);
f0bdd87d
YS
443 *this_cache = cache;
444
445 /* In principle, for normal frames, %fp holds the frame pointer,
446 which holds the base address for the current stack frame.
447 However, for functions that don't need it, the frame pointer is
448 optional. For these "frameless" functions the frame pointer is
862ba188 449 actually the frame pointer of the calling frame. */
f0bdd87d 450
94afd7a6 451 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
f0bdd87d
YS
452 if (cache->base == 0)
453 return cache;
454
be8626e0 455 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 456
94afd7a6
UW
457 cache->pc = get_frame_func (this_frame);
458 current_pc = get_frame_pc (this_frame);
f0bdd87d 459 if (cache->pc != 0)
e17a4113 460 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache);
f0bdd87d 461
862ba188 462 if (!cache->uses_fp)
f0bdd87d
YS
463 {
464 /* We didn't find a valid frame, which means that CACHE->base
465 currently holds the frame pointer for our calling frame. If
466 we're at the start of a function, or somewhere half-way its
467 prologue, the function's frame probably hasn't been fully
468 setup yet. Try to reconstruct the base address for the stack
469 frame by looking at the stack pointer. For truly "frameless"
470 functions this might work too. */
471
94afd7a6 472 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
862ba188 473 + cache->sp_offset;
be8626e0 474 cache->saved_sp = cache->base + BINWORD (gdbarch);
862ba188
CV
475 cache->saved_regs[E_PC_REGNUM] = 0;
476 }
477 else
478 {
be8626e0
MD
479 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
480 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
f0bdd87d 481 }
f0bdd87d
YS
482
483 /* Adjust all the saved registers such that they contain addresses
484 instead of offsets. */
be8626e0 485 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
f0bdd87d 486 if (cache->saved_regs[i] != -1)
862ba188 487 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
f0bdd87d
YS
488
489 return cache;
490}
491
492static void
94afd7a6 493h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
f0bdd87d
YS
494 struct frame_id *this_id)
495{
496 struct h8300_frame_cache *cache =
94afd7a6 497 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
498
499 /* This marks the outermost frame. */
500 if (cache->base == 0)
501 return;
502
862ba188 503 *this_id = frame_id_build (cache->saved_sp, cache->pc);
f0bdd87d
YS
504}
505
94afd7a6
UW
506static struct value *
507h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
508 int regnum)
f0bdd87d 509{
94afd7a6 510 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f0bdd87d 511 struct h8300_frame_cache *cache =
94afd7a6 512 h8300_frame_cache (this_frame, this_cache);
f0bdd87d
YS
513
514 gdb_assert (regnum >= 0);
515
516 if (regnum == E_SP_REGNUM && cache->saved_sp)
94afd7a6 517 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
f0bdd87d 518
ea78bae4 519 if (regnum < gdbarch_num_regs (gdbarch)
f57d151a 520 && cache->saved_regs[regnum] != -1)
94afd7a6
UW
521 return frame_unwind_got_memory (this_frame, regnum,
522 cache->saved_regs[regnum]);
f0bdd87d 523
94afd7a6 524 return frame_unwind_got_register (this_frame, regnum, regnum);
f0bdd87d
YS
525}
526
527static const struct frame_unwind h8300_frame_unwind = {
528 NORMAL_FRAME,
529 h8300_frame_this_id,
94afd7a6
UW
530 h8300_frame_prev_register,
531 NULL,
532 default_frame_sniffer
f0bdd87d
YS
533};
534
862ba188 535static CORE_ADDR
94afd7a6 536h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
862ba188 537{
94afd7a6 538 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
862ba188
CV
539 return cache->base;
540}
541
542static const struct frame_base h8300_frame_base = {
543 &h8300_frame_unwind,
544 h8300_frame_base_address,
545 h8300_frame_base_address,
546 h8300_frame_base_address
547};
548
549static CORE_ADDR
6093d2eb 550h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
862ba188
CV
551{
552 CORE_ADDR func_addr = 0 , func_end = 0;
553
554 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
555 {
556 struct symtab_and_line sal;
557 struct h8300_frame_cache cache;
558
559 /* Found a function. */
560 sal = find_pc_line (func_addr, 0);
561 if (sal.end && sal.end < func_end)
562 /* Found a line number, use it as end of prologue. */
563 return sal.end;
564
565 /* No useable line symbol. Use prologue parsing method. */
be8626e0 566 h8300_init_frame_cache (gdbarch, &cache);
e17a4113 567 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache);
862ba188
CV
568 }
569
570 /* No function symbol -- just return the PC. */
571 return (CORE_ADDR) pc;
572}
573
f0bdd87d
YS
574/* Function: push_dummy_call
575 Setup the function arguments for calling a function in the inferior.
576 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
577 on the H8/300H.
578
579 There are actually two ABI's here: -mquickcall (the default) and
580 -mno-quickcall. With -mno-quickcall, all arguments are passed on
581 the stack after the return address, word-aligned. With
582 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
583 GCC doesn't indicate in the object file which ABI was used to
584 compile it, GDB only supports the default --- -mquickcall.
585
586 Here are the rules for -mquickcall, in detail:
587
588 Each argument, whether scalar or aggregate, is padded to occupy a
589 whole number of words. Arguments smaller than a word are padded at
590 the most significant end; those larger than a word are padded at
591 the least significant end.
592
593 The initial arguments are passed in r0 -- r2. Earlier arguments go in
594 lower-numbered registers. Multi-word arguments are passed in
595 consecutive registers, with the most significant end in the
596 lower-numbered register.
597
598 If an argument doesn't fit entirely in the remaining registers, it
599 is passed entirely on the stack. Stack arguments begin just after
600 the return address. Once an argument has overflowed onto the stack
601 this way, all subsequent arguments are passed on the stack.
602
603 The above rule has odd consequences. For example, on the h8/300s,
604 if a function takes two longs and an int as arguments:
605 - the first long will be passed in r0/r1,
606 - the second long will be passed entirely on the stack, since it
607 doesn't fit in r2,
608 - and the int will be passed on the stack, even though it could fit
609 in r2.
610
611 A weird exception: if an argument is larger than a word, but not a
612 whole number of words in length (before padding), it is passed on
613 the stack following the rules for stack arguments above, even if
614 there are sufficient registers available to hold it. Stranger
615 still, the argument registers are still `used up' --- even though
616 there's nothing in them.
617
618 So, for example, on the h8/300s, if a function expects a three-byte
619 structure and an int, the structure will go on the stack, and the
620 int will go in r2, not r0.
621
622 If the function returns an aggregate type (struct, union, or class)
623 by value, the caller must allocate space to hold the return value,
624 and pass the callee a pointer to this space as an invisible first
625 argument, in R0.
626
627 For varargs functions, the last fixed argument and all the variable
628 arguments are always passed on the stack. This means that calls to
629 varargs functions don't work properly unless there is a prototype
630 in scope.
631
632 Basically, this ABI is not good, for the following reasons:
633 - You can't call vararg functions properly unless a prototype is in scope.
634 - Structure passing is inconsistent, to no purpose I can see.
635 - It often wastes argument registers, of which there are only three
636 to begin with. */
637
638static CORE_ADDR
639h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
640 struct regcache *regcache, CORE_ADDR bp_addr,
641 int nargs, struct value **args, CORE_ADDR sp,
642 int struct_return, CORE_ADDR struct_addr)
643{
e17a4113 644 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d 645 int stack_alloc = 0, stack_offset = 0;
be8626e0 646 int wordsize = BINWORD (gdbarch);
f0bdd87d
YS
647 int reg = E_ARG0_REGNUM;
648 int argument;
649
650 /* First, make sure the stack is properly aligned. */
651 sp = align_down (sp, wordsize);
652
653 /* Now make sure there's space on the stack for the arguments. We
654 may over-allocate a little here, but that won't hurt anything. */
655 for (argument = 0; argument < nargs; argument++)
656 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
657 wordsize);
658 sp -= stack_alloc;
659
660 /* Now load as many arguments as possible into registers, and push
661 the rest onto the stack.
662 If we're returning a structure by value, then we must pass a
663 pointer to the buffer for the return value as an invisible first
664 argument. */
665 if (struct_return)
666 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
667
668 for (argument = 0; argument < nargs; argument++)
669 {
670 struct type *type = value_type (args[argument]);
671 int len = TYPE_LENGTH (type);
672 char *contents = (char *) value_contents (args[argument]);
673
674 /* Pad the argument appropriately. */
675 int padded_len = align_up (len, wordsize);
5d0d05b6 676 gdb_byte *padded = alloca (padded_len);
f0bdd87d
YS
677
678 memset (padded, 0, padded_len);
679 memcpy (len < wordsize ? padded + padded_len - len : padded,
680 contents, len);
681
682 /* Could the argument fit in the remaining registers? */
683 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
684 {
685 /* Are we going to pass it on the stack anyway, for no good
686 reason? */
687 if (len > wordsize && len % wordsize)
688 {
689 /* I feel so unclean. */
690 write_memory (sp + stack_offset, padded, padded_len);
691 stack_offset += padded_len;
692
693 /* That's right --- even though we passed the argument
694 on the stack, we consume the registers anyway! Love
695 me, love my dog. */
696 reg += padded_len / wordsize;
697 }
698 else
699 {
700 /* Heavens to Betsy --- it's really going in registers!
701 It would be nice if we could use write_register_bytes
702 here, but on the h8/300s, there are gaps between
703 the registers in the register file. */
704 int offset;
705
706 for (offset = 0; offset < padded_len; offset += wordsize)
707 {
e17a4113
UW
708 ULONGEST word
709 = extract_unsigned_integer (padded + offset,
710 wordsize, byte_order);
f0bdd87d
YS
711 regcache_cooked_write_unsigned (regcache, reg++, word);
712 }
713 }
714 }
715 else
716 {
717 /* It doesn't fit in registers! Onto the stack it goes. */
718 write_memory (sp + stack_offset, padded, padded_len);
719 stack_offset += padded_len;
720
721 /* Once one argument has spilled onto the stack, all
722 subsequent arguments go on the stack. */
723 reg = E_ARGLAST_REGNUM + 1;
724 }
725 }
726
727 /* Store return address. */
728 sp -= wordsize;
e17a4113 729 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr);
f0bdd87d
YS
730
731 /* Update stack pointer. */
732 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
733
862ba188
CV
734 /* Return the new stack pointer minus the return address slot since
735 that's what DWARF2/GCC uses as the frame's CFA. */
736 return sp + wordsize;
f0bdd87d
YS
737}
738
739/* Function: extract_return_value
740 Figure out where in REGBUF the called function has left its return value.
741 Copy that into VALBUF. Be sure to account for CPU type. */
742
743static void
744h8300_extract_return_value (struct type *type, struct regcache *regcache,
745 void *valbuf)
746{
e17a4113
UW
747 struct gdbarch *gdbarch = get_regcache_arch (regcache);
748 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d
YS
749 int len = TYPE_LENGTH (type);
750 ULONGEST c, addr;
751
752 switch (len)
753 {
754 case 1:
755 case 2:
756 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
e17a4113 757 store_unsigned_integer (valbuf, len, byte_order, c);
f0bdd87d
YS
758 break;
759 case 4: /* Needs two registers on plain H8/300 */
760 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
e17a4113 761 store_unsigned_integer (valbuf, 2, byte_order, c);
f0bdd87d 762 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
e17a4113 763 store_unsigned_integer ((void *)((char *) valbuf + 2), 2, byte_order, c);
f0bdd87d
YS
764 break;
765 case 8: /* long long is now 8 bytes. */
766 if (TYPE_CODE (type) == TYPE_CODE_INT)
767 {
768 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
e17a4113
UW
769 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order);
770 store_unsigned_integer (valbuf, len, byte_order, c);
f0bdd87d
YS
771 }
772 else
773 {
774 error ("I don't know how this 8 byte value is returned.");
775 }
776 break;
777 }
778}
779
780static void
781h8300h_extract_return_value (struct type *type, struct regcache *regcache,
782 void *valbuf)
783{
e17a4113
UW
784 struct gdbarch *gdbarch = get_regcache_arch (regcache);
785 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d
YS
786 int len = TYPE_LENGTH (type);
787 ULONGEST c, addr;
788
789 switch (len)
790 {
791 case 1:
792 case 2:
793 case 4:
794 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
e17a4113 795 store_unsigned_integer (valbuf, len, byte_order, c);
f0bdd87d
YS
796 break;
797 case 8: /* long long is now 8 bytes. */
798 if (TYPE_CODE (type) == TYPE_CODE_INT)
799 {
862ba188 800 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
e17a4113 801 store_unsigned_integer (valbuf, 4, byte_order, c);
862ba188 802 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
e17a4113
UW
803 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4,
804 byte_order, c);
f0bdd87d
YS
805 }
806 else
807 {
808 error ("I don't know how this 8 byte value is returned.");
809 }
810 break;
811 }
812}
813
63807e1d 814static int
862ba188
CV
815h8300_use_struct_convention (struct type *value_type)
816{
817 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
818 stack. */
819
820 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
821 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
822 return 1;
823 return !(TYPE_LENGTH (value_type) == 1
824 || TYPE_LENGTH (value_type) == 2
825 || TYPE_LENGTH (value_type) == 4);
826}
827
63807e1d 828static int
862ba188
CV
829h8300h_use_struct_convention (struct type *value_type)
830{
831 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
832 returned in R0/R1, everything else on the stack. */
833 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
834 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
835 return 1;
836 return !(TYPE_LENGTH (value_type) == 1
837 || TYPE_LENGTH (value_type) == 2
838 || TYPE_LENGTH (value_type) == 4
839 || (TYPE_LENGTH (value_type) == 8
840 && TYPE_CODE (value_type) == TYPE_CODE_INT));
841}
f0bdd87d
YS
842
843/* Function: store_return_value
844 Place the appropriate value in the appropriate registers.
845 Primarily used by the RETURN command. */
846
847static void
848h8300_store_return_value (struct type *type, struct regcache *regcache,
849 const void *valbuf)
850{
e17a4113
UW
851 struct gdbarch *gdbarch = get_regcache_arch (regcache);
852 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d
YS
853 int len = TYPE_LENGTH (type);
854 ULONGEST val;
855
856 switch (len)
857 {
858 case 1:
859 case 2: /* short... */
e17a4113 860 val = extract_unsigned_integer (valbuf, len, byte_order);
f0bdd87d
YS
861 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
862 break;
863 case 4: /* long, float */
e17a4113 864 val = extract_unsigned_integer (valbuf, len, byte_order);
f0bdd87d
YS
865 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
866 (val >> 16) & 0xffff);
867 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
868 break;
869 case 8: /* long long, double and long double are all defined
870 as 4 byte types so far so this shouldn't happen. */
871 error ("I don't know how to return an 8 byte value.");
872 break;
873 }
874}
875
876static void
877h8300h_store_return_value (struct type *type, struct regcache *regcache,
878 const void *valbuf)
879{
e17a4113
UW
880 struct gdbarch *gdbarch = get_regcache_arch (regcache);
881 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
f0bdd87d
YS
882 int len = TYPE_LENGTH (type);
883 ULONGEST val;
884
885 switch (len)
886 {
887 case 1:
888 case 2:
889 case 4: /* long, float */
e17a4113 890 val = extract_unsigned_integer (valbuf, len, byte_order);
f0bdd87d
YS
891 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
892 break;
862ba188 893 case 8:
e17a4113 894 val = extract_unsigned_integer (valbuf, len, byte_order);
862ba188
CV
895 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
896 (val >> 32) & 0xffffffff);
897 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
898 val & 0xffffffff);
f0bdd87d
YS
899 break;
900 }
901}
902
862ba188 903static enum return_value_convention
c055b101
CV
904h8300_return_value (struct gdbarch *gdbarch, struct type *func_type,
905 struct type *type, struct regcache *regcache,
5d0d05b6 906 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
907{
908 if (h8300_use_struct_convention (type))
909 return RETURN_VALUE_STRUCT_CONVENTION;
910 if (writebuf)
911 h8300_store_return_value (type, regcache, writebuf);
912 else if (readbuf)
913 h8300_extract_return_value (type, regcache, readbuf);
914 return RETURN_VALUE_REGISTER_CONVENTION;
915}
916
917static enum return_value_convention
c055b101
CV
918h8300h_return_value (struct gdbarch *gdbarch, struct type *func_type,
919 struct type *type, struct regcache *regcache,
5d0d05b6 920 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
921{
922 if (h8300h_use_struct_convention (type))
923 {
924 if (readbuf)
925 {
926 ULONGEST addr;
927
928 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
929 read_memory (addr, readbuf, TYPE_LENGTH (type));
930 }
931
932 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
933 }
934 if (writebuf)
935 h8300h_store_return_value (type, regcache, writebuf);
936 else if (readbuf)
937 h8300h_extract_return_value (type, regcache, readbuf);
938 return RETURN_VALUE_REGISTER_CONVENTION;
939}
940
f0bdd87d
YS
941static struct cmd_list_element *setmachinelist;
942
943static const char *
d93859e2 944h8300_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
945{
946 /* The register names change depending on which h8300 processor
947 type is selected. */
948 static char *register_names[] = {
949 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
950 "sp", "", "pc", "cycles", "tick", "inst",
951 "ccr", /* pseudo register */
952 };
953 if (regno < 0
954 || regno >= (sizeof (register_names) / sizeof (*register_names)))
955 internal_error (__FILE__, __LINE__,
956 "h8300_register_name: illegal register number %d", regno);
957 else
958 return register_names[regno];
959}
960
961static const char *
d93859e2 962h8300s_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
963{
964 static char *register_names[] = {
965 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
966 "sp", "", "pc", "cycles", "", "tick", "inst",
967 "mach", "macl",
968 "ccr", "exr" /* pseudo registers */
969 };
970 if (regno < 0
971 || regno >= (sizeof (register_names) / sizeof (*register_names)))
972 internal_error (__FILE__, __LINE__,
973 "h8300s_register_name: illegal register number %d",
974 regno);
975 else
976 return register_names[regno];
977}
978
979static const char *
d93859e2 980h8300sx_register_name (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
981{
982 static char *register_names[] = {
983 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
984 "sp", "", "pc", "cycles", "", "tick", "inst",
985 "mach", "macl", "sbr", "vbr",
986 "ccr", "exr" /* pseudo registers */
987 };
988 if (regno < 0
989 || regno >= (sizeof (register_names) / sizeof (*register_names)))
990 internal_error (__FILE__, __LINE__,
991 "h8300sx_register_name: illegal register number %d",
992 regno);
993 else
994 return register_names[regno];
995}
996
997static void
998h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
999 struct frame_info *frame, int regno)
1000{
1001 LONGEST rval;
1002 const char *name = gdbarch_register_name (gdbarch, regno);
1003
1004 if (!name || !*name)
1005 return;
1006
1007 rval = get_frame_register_signed (frame, regno);
1008
1009 fprintf_filtered (file, "%-14s ", name);
be8626e0
MD
1010 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
1011 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
f0bdd87d
YS
1012 {
1013 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1014 print_longest (file, 'u', 1, rval);
1015 }
1016 else
1017 {
be8626e0
MD
1018 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval,
1019 BINWORD (gdbarch)));
f0bdd87d
YS
1020 print_longest (file, 'd', 1, rval);
1021 }
be8626e0 1022 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d
YS
1023 {
1024 /* CCR register */
1025 int C, Z, N, V;
1026 unsigned char l = rval & 0xff;
1027 fprintf_filtered (file, "\t");
1028 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1029 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1030 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1031 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1032 N = (l & 0x8) != 0;
1033 Z = (l & 0x4) != 0;
1034 V = (l & 0x2) != 0;
1035 C = (l & 0x1) != 0;
1036 fprintf_filtered (file, "N-%d ", N);
1037 fprintf_filtered (file, "Z-%d ", Z);
1038 fprintf_filtered (file, "V-%d ", V);
1039 fprintf_filtered (file, "C-%d ", C);
1040 if ((C | Z) == 0)
1041 fprintf_filtered (file, "u> ");
1042 if ((C | Z) == 1)
1043 fprintf_filtered (file, "u<= ");
1044 if ((C == 0))
1045 fprintf_filtered (file, "u>= ");
1046 if (C == 1)
1047 fprintf_filtered (file, "u< ");
1048 if (Z == 0)
1049 fprintf_filtered (file, "!= ");
1050 if (Z == 1)
1051 fprintf_filtered (file, "== ");
1052 if ((N ^ V) == 0)
1053 fprintf_filtered (file, ">= ");
1054 if ((N ^ V) == 1)
1055 fprintf_filtered (file, "< ");
1056 if ((Z | (N ^ V)) == 0)
1057 fprintf_filtered (file, "> ");
1058 if ((Z | (N ^ V)) == 1)
1059 fprintf_filtered (file, "<= ");
1060 }
be8626e0 1061 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
f0bdd87d
YS
1062 {
1063 /* EXR register */
1064 unsigned char l = rval & 0xff;
1065 fprintf_filtered (file, "\t");
1066 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1067 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1068 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1069 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1070 }
1071 fprintf_filtered (file, "\n");
1072}
1073
1074static void
1075h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1076 struct frame_info *frame, int regno, int cpregs)
1077{
1078 if (regno < 0)
1079 {
1080 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1081 h8300_print_register (gdbarch, file, frame, regno);
be8626e0
MD
1082 h8300_print_register (gdbarch, file, frame,
1083 E_PSEUDO_CCR_REGNUM (gdbarch));
f0bdd87d 1084 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
ea78bae4 1085 if (is_h8300smode (gdbarch))
f0bdd87d 1086 {
be8626e0
MD
1087 h8300_print_register (gdbarch, file, frame,
1088 E_PSEUDO_EXR_REGNUM (gdbarch));
ea78bae4 1089 if (is_h8300sxmode (gdbarch))
f0bdd87d
YS
1090 {
1091 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1092 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1093 }
1094 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1095 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1096 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1097 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1098 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1099 }
1100 else
1101 {
1102 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1103 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1104 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1105 }
1106 }
1107 else
1108 {
1109 if (regno == E_CCR_REGNUM)
be8626e0
MD
1110 h8300_print_register (gdbarch, file, frame,
1111 E_PSEUDO_CCR_REGNUM (gdbarch));
1112 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
ea78bae4 1113 && is_h8300smode (gdbarch))
be8626e0
MD
1114 h8300_print_register (gdbarch, file, frame,
1115 E_PSEUDO_EXR_REGNUM (gdbarch));
f0bdd87d
YS
1116 else
1117 h8300_print_register (gdbarch, file, frame, regno);
1118 }
1119}
1120
1121static struct type *
1122h8300_register_type (struct gdbarch *gdbarch, int regno)
1123{
ea78bae4
UW
1124 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)
1125 + gdbarch_num_pseudo_regs (gdbarch))
f0bdd87d
YS
1126 internal_error (__FILE__, __LINE__,
1127 "h8300_register_type: illegal register number %d", regno);
1128 else
1129 {
1130 switch (regno)
1131 {
1132 case E_PC_REGNUM:
0dfff4cb 1133 return builtin_type (gdbarch)->builtin_func_ptr;
f0bdd87d
YS
1134 case E_SP_REGNUM:
1135 case E_FP_REGNUM:
0dfff4cb 1136 return builtin_type (gdbarch)->builtin_data_ptr;
f0bdd87d 1137 default:
be8626e0 1138 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
df4df182 1139 return builtin_type (gdbarch)->builtin_uint8;
be8626e0 1140 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
df4df182 1141 return builtin_type (gdbarch)->builtin_uint8;
ea78bae4 1142 else if (is_h8300hmode (gdbarch))
df4df182 1143 return builtin_type (gdbarch)->builtin_int32;
f0bdd87d 1144 else
df4df182 1145 return builtin_type (gdbarch)->builtin_int16;
f0bdd87d
YS
1146 }
1147 }
1148}
1149
1150static void
1151h8300_pseudo_register_read (struct gdbarch *gdbarch,
5d0d05b6
CV
1152 struct regcache *regcache, int regno,
1153 gdb_byte *buf)
f0bdd87d 1154{
be8626e0 1155 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1156 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
be8626e0 1157 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d
YS
1158 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1159 else
1160 regcache_raw_read (regcache, regno, buf);
1161}
1162
1163static void
1164h8300_pseudo_register_write (struct gdbarch *gdbarch,
1165 struct regcache *regcache, int regno,
5d0d05b6 1166 const gdb_byte *buf)
f0bdd87d 1167{
be8626e0 1168 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
f0bdd87d 1169 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
be8626e0 1170 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
f0bdd87d
YS
1171 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1172 else
1173 regcache_raw_write (regcache, regno, buf);
1174}
1175
1176static int
d3f73121 1177h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1178{
1179 if (regno == E_CCR_REGNUM)
be8626e0 1180 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d
YS
1181 return regno;
1182}
1183
1184static int
d3f73121 1185h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
f0bdd87d
YS
1186{
1187 if (regno == E_CCR_REGNUM)
be8626e0 1188 return E_PSEUDO_CCR_REGNUM (gdbarch);
f0bdd87d 1189 if (regno == E_EXR_REGNUM)
be8626e0 1190 return E_PSEUDO_EXR_REGNUM (gdbarch);
f0bdd87d
YS
1191 return regno;
1192}
1193
f0bdd87d 1194const static unsigned char *
67d57894
MD
1195h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
1196 int *lenptr)
f0bdd87d
YS
1197{
1198 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1199 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1200
1201 *lenptr = sizeof (breakpoint);
1202 return breakpoint;
1203}
1204
f0bdd87d
YS
1205static void
1206h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1207 struct frame_info *frame, const char *args)
1208{
1209 fprintf_filtered (file, "\
1210No floating-point info available for this processor.\n");
1211}
1212
1213static struct gdbarch *
1214h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1215{
1216 struct gdbarch_tdep *tdep = NULL;
1217 struct gdbarch *gdbarch;
1218
1219 arches = gdbarch_list_lookup_by_info (arches, &info);
1220 if (arches != NULL)
1221 return arches->gdbarch;
1222
1223#if 0
1224 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1225#endif
1226
1227 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1228 return NULL;
1229
1230 gdbarch = gdbarch_alloc (&info, 0);
1231
1232 switch (info.bfd_arch_info->mach)
1233 {
1234 case bfd_mach_h8300:
1235 set_gdbarch_num_regs (gdbarch, 13);
1236 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1237 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1238 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1239 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1240 set_gdbarch_register_name (gdbarch, h8300_register_name);
1241 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1242 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
862ba188 1243 set_gdbarch_return_value (gdbarch, h8300_return_value);
f0bdd87d
YS
1244 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1245 break;
1246 case bfd_mach_h8300h:
1247 case bfd_mach_h8300hn:
1248 set_gdbarch_num_regs (gdbarch, 13);
1249 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1250 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
f0bdd87d
YS
1251 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1252 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1253 set_gdbarch_register_name (gdbarch, h8300_register_name);
1254 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1255 {
1256 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1257 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1258 }
1259 else
1260 {
1261 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1262 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1263 }
862ba188 1264 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1265 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1266 break;
1267 case bfd_mach_h8300s:
1268 case bfd_mach_h8300sn:
1269 set_gdbarch_num_regs (gdbarch, 16);
1270 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1271 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1272 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1273 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1274 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1275 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1276 {
1277 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1278 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1279 }
1280 else
1281 {
1282 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1283 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1284 }
862ba188 1285 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1286 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1287 break;
1288 case bfd_mach_h8300sx:
1289 case bfd_mach_h8300sxn:
1290 set_gdbarch_num_regs (gdbarch, 18);
1291 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1292 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
f0bdd87d
YS
1293 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1294 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1295 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1296 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1297 {
1298 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1299 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1300 }
1301 else
1302 {
1303 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1304 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1305 }
862ba188 1306 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1307 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1308 break;
1309 }
1310
1311 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1312 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1313
1314 /*
1315 * Basic register fields and methods.
1316 */
1317
1318 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
f0bdd87d
YS
1319 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1320 set_gdbarch_register_type (gdbarch, h8300_register_type);
1321 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1322 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1323
1324 /*
1325 * Frame Info
1326 */
1327 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1328
1329 /* Frame unwinder. */
f0bdd87d 1330 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
862ba188 1331 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
94afd7a6 1332 set_gdbarch_dummy_id (gdbarch, h8300_dummy_id);
862ba188 1333 frame_base_set_default (gdbarch, &h8300_frame_base);
f0bdd87d
YS
1334
1335 /*
1336 * Miscelany
1337 */
1338 /* Stack grows up. */
1339 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1340
f0bdd87d 1341 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
f0bdd87d
YS
1342 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1343
862ba188 1344 set_gdbarch_char_signed (gdbarch, 0);
f0bdd87d
YS
1345 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1346 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1347 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1348 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1349 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1350
1351 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1352
862ba188 1353 /* Hook in the DWARF CFI frame unwinder. */
94afd7a6
UW
1354 dwarf2_append_unwinders (gdbarch);
1355 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
f0bdd87d
YS
1356
1357 return gdbarch;
1358
1359}
1360
1361extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1362
1363void
1364_initialize_h8300_tdep (void)
1365{
1366 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1367}
1368
1369static int
1370is_h8300hmode (struct gdbarch *gdbarch)
1371{
1372 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1373 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1374 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1375 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1376 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1377 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1378}
1379
1380static int
1381is_h8300smode (struct gdbarch *gdbarch)
1382{
1383 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1384 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1385 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1386 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1387}
1388
1389static int
1390is_h8300sxmode (struct gdbarch *gdbarch)
1391{
1392 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1393 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1394}
1395
1396static int
1397is_h8300_normal_mode (struct gdbarch *gdbarch)
1398{
1399 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1400 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1401 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1402}
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