2007-05-31 Markus Deuling <deuling@de.ibm.com>
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
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1/* Target-machine dependent code for Renesas H8/300, for GDB.
2
6aba47ca
DJ
3 Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999,
4 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
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5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
197e01b6
EZ
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
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22
23/*
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
26 */
27
28#include "defs.h"
29#include "value.h"
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30#include "arch-utils.h"
31#include "regcache.h"
32#include "gdbcore.h"
33#include "objfiles.h"
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34#include "gdb_assert.h"
35#include "dis-asm.h"
36#include "dwarf2-frame.h"
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37#include "frame-base.h"
38#include "frame-unwind.h"
39
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40enum gdb_regnum
41{
42 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
43 E_RET0_REGNUM = E_R0_REGNUM,
44 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
45 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
46 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
47 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
48 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
49 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
50 E_SP_REGNUM,
51 E_CCR_REGNUM,
52 E_PC_REGNUM,
53 E_CYCLES_REGNUM,
54 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
55 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
56 E_INSTS_REGNUM,
57 E_MACH_REGNUM,
58 E_MACL_REGNUM,
59 E_SBR_REGNUM,
60 E_VBR_REGNUM
61};
62
63#define H8300_MAX_NUM_REGS 18
64
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65#define E_PSEUDO_CCR_REGNUM (gdbarch_num_regs (current_gdbarch))
66#define E_PSEUDO_EXR_REGNUM (gdbarch_num_regs (current_gdbarch)+1)
f0bdd87d 67
862ba188
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68struct h8300_frame_cache
69{
70 /* Base address. */
71 CORE_ADDR base;
72 CORE_ADDR sp_offset;
73 CORE_ADDR pc;
74
75 /* Flag showing that a frame has been created in the prologue code. */
76 int uses_fp;
f0bdd87d 77
862ba188
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78 /* Saved registers. */
79 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
80 CORE_ADDR saved_sp;
81};
82
83enum
84{
85 h8300_reg_size = 2,
86 h8300h_reg_size = 4,
87 h8300_max_reg_size = 4,
88};
89
90static int is_h8300hmode (struct gdbarch *gdbarch);
91static int is_h8300smode (struct gdbarch *gdbarch);
92static int is_h8300sxmode (struct gdbarch *gdbarch);
93static int is_h8300_normal_mode (struct gdbarch *gdbarch);
94
95#define BINWORD ((is_h8300hmode (current_gdbarch) \
96 && !is_h8300_normal_mode (current_gdbarch)) \
97 ? h8300h_reg_size : h8300_reg_size)
98
99static CORE_ADDR
100h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
101{
102 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
103}
104
105static CORE_ADDR
106h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
107{
108 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
109}
110
111static struct frame_id
112h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
113{
114 return frame_id_build (h8300_unwind_sp (gdbarch, next_frame),
115 frame_pc_unwind (next_frame));
116}
117
118/* Normal frames. */
119
120/* Allocate and initialize a frame cache. */
121
122static void
123h8300_init_frame_cache (struct h8300_frame_cache *cache)
124{
125 int i;
126
127 /* Base address. */
128 cache->base = 0;
129 cache->sp_offset = 0;
130 cache->pc = 0;
131
132 /* Frameless until proven otherwise. */
133 cache->uses_fp = 0;
134
135 /* Saved registers. We initialize these to -1 since zero is a valid
136 offset (that's where %fp is supposed to be stored). */
f57d151a 137 for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
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138 cache->saved_regs[i] = -1;
139}
140
141#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
142#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
143#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
144#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
145#define IS_MOVB_EXT(x) ((x) == 0x7860)
146#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
147#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
148#define IS_MOVW_EXT(x) ((x) == 0x78e0)
149#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
150/* Same instructions as mov.w, just prefixed with 0x0100 */
151#define IS_MOVL_PRE(x) ((x) == 0x0100)
152#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
153#define IS_MOVL_EXT(x) ((x) == 0x78e0)
154#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
155
156#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
157#define IS_PUSH_FP(x) ((x) == 0x01006df6)
158#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
159#define IS_SUB2_SP(x) ((x) == 0x1b87)
160#define IS_SUB4_SP(x) ((x) == 0x1b97)
161#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
162#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
163#define IS_SUBL4_SP(x) ((x) == 0x1acf)
164#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
165#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
166#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
167#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
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168
169/* If the instruction at PC is an argument register spill, return its
170 length. Otherwise, return zero.
171
172 An argument register spill is an instruction that moves an argument
173 from the register in which it was passed to the stack slot in which
174 it really lives. It is a byte, word, or longword move from an
175 argument register to a negative offset from the frame pointer.
176
177 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
178 is used, it could be a byte, word or long move to registers r3-r5. */
179
180static int
181h8300_is_argument_spill (CORE_ADDR pc)
182{
183 int w = read_memory_unsigned_integer (pc, 2);
184
862ba188 185 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
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186 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
187 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
188 return 2;
189
862ba188 190 if (IS_MOVB_Rn16_SP (w)
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191 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
192 {
862ba188 193 if (read_memory_integer (pc + 2, 2) < 0) /* ... and d:16 is negative. */
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194 return 4;
195 }
862ba188 196 else if (IS_MOVB_EXT (w))
f0bdd87d 197 {
862ba188 198 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
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199 {
200 LONGEST disp = read_memory_integer (pc + 4, 4);
201
202 /* ... and d:24 is negative. */
203 if (disp < 0 && disp > 0xffffff)
204 return 8;
205 }
206 }
862ba188 207 else if (IS_MOVW_Rn16_SP (w)
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208 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
209 {
f0bdd87d 210 /* ... and d:16 is negative. */
862ba188 211 if (read_memory_integer (pc + 2, 2) < 0)
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212 return 4;
213 }
862ba188 214 else if (IS_MOVW_EXT (w))
f0bdd87d 215 {
862ba188 216 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
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217 {
218 LONGEST disp = read_memory_integer (pc + 4, 4);
219
220 /* ... and d:24 is negative. */
221 if (disp < 0 && disp > 0xffffff)
222 return 8;
223 }
224 }
862ba188 225 else if (IS_MOVL_PRE (w))
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226 {
227 int w2 = read_memory_integer (pc + 2, 2);
228
862ba188 229 if (IS_MOVL_Rn16_SP (w2)
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230 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
231 {
f0bdd87d 232 /* ... and d:16 is negative. */
862ba188 233 if (read_memory_integer (pc + 4, 2) < 0)
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234 return 6;
235 }
862ba188 236 else if (IS_MOVL_EXT (w2))
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237 {
238 int w3 = read_memory_integer (pc + 4, 2);
239
862ba188 240 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2)))
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241 {
242 LONGEST disp = read_memory_integer (pc + 6, 4);
243
244 /* ... and d:24 is negative. */
245 if (disp < 0 && disp > 0xffffff)
246 return 10;
247 }
248 }
249 }
250
251 return 0;
252}
253
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254/* Do a full analysis of the prologue at PC and update CACHE
255 accordingly. Bail out early if CURRENT_PC is reached. Return the
256 address where the analysis stopped.
257
258 We handle all cases that can be generated by gcc.
259
260 For allocating a stack frame:
261
262 mov.w r6,@-sp
263 mov.w sp,r6
264 mov.w #-n,rN
265 add.w rN,sp
266
267 mov.w r6,@-sp
268 mov.w sp,r6
269 subs #2,sp
270 (repeat)
271
272 mov.l er6,@-sp
273 mov.l sp,er6
274 add.l #-n,sp
275
276 mov.w r6,@-sp
277 mov.w sp,r6
278 subs #4,sp
279 (repeat)
280
281 For saving registers:
282
283 mov.w rN,@-sp
284 mov.l erN,@-sp
285 stm.l reglist,@-sp
286
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287 */
288
289static CORE_ADDR
290h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
291 struct h8300_frame_cache *cache)
292{
293 unsigned int op;
862ba188
CV
294 int regno, i, spill_size;
295
296 cache->sp_offset = 0;
f0bdd87d 297
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298 if (pc >= current_pc)
299 return current_pc;
300
862ba188
CV
301 op = read_memory_unsigned_integer (pc, 4);
302
303 if (IS_PUSHFP_MOVESPFP (op))
304 {
305 cache->saved_regs[E_FP_REGNUM] = 0;
306 cache->uses_fp = 1;
307 pc += 4;
308 }
309 else if (IS_PUSH_FP (op))
310 {
311 cache->saved_regs[E_FP_REGNUM] = 0;
312 pc += 4;
313 if (pc >= current_pc)
314 return current_pc;
315 op = read_memory_unsigned_integer (pc, 2);
316 if (IS_MOV_SP_FP (op))
317 {
318 cache->uses_fp = 1;
319 pc += 2;
320 }
321 }
322
323 while (pc < current_pc)
324 {
325 op = read_memory_unsigned_integer (pc, 2);
326 if (IS_SUB2_SP (op))
327 {
328 cache->sp_offset += 2;
329 pc += 2;
330 }
331 else if (IS_SUB4_SP (op))
332 {
333 cache->sp_offset += 4;
334 pc += 2;
335 }
336 else if (IS_ADD_IMM_SP (op))
337 {
338 cache->sp_offset += -read_memory_integer (pc + 2, 2);
339 pc += 4;
340 }
341 else if (IS_SUB_IMM_SP (op))
342 {
343 cache->sp_offset += read_memory_integer (pc + 2, 2);
344 pc += 4;
345 }
346 else if (IS_SUBL4_SP (op))
347 {
348 cache->sp_offset += 4;
349 pc += 2;
350 }
351 else if (IS_MOV_IMM_Rn (op))
352 {
353 int offset = read_memory_integer (pc + 2, 2);
354 regno = op & 0x000f;
355 op = read_memory_unsigned_integer (pc + 4, 2);
356 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
357 {
358 cache->sp_offset -= offset;
359 pc += 6;
360 }
361 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
362 {
363 cache->sp_offset += offset;
364 pc += 6;
365 }
366 else
367 break;
368 }
369 else if (IS_PUSH (op))
370 {
371 regno = op & 0x000f;
372 cache->sp_offset += 2;
373 cache->saved_regs[regno] = cache->sp_offset;
374 pc += 2;
375 }
376 else if (op == 0x0100)
377 {
378 op = read_memory_unsigned_integer (pc + 2, 2);
379 if (IS_PUSH (op))
380 {
381 regno = op & 0x000f;
382 cache->sp_offset += 4;
383 cache->saved_regs[regno] = cache->sp_offset;
384 pc += 4;
385 }
386 else
387 break;
388 }
389 else if ((op & 0xffcf) == 0x0100)
390 {
391 int op1;
392 op1 = read_memory_unsigned_integer (pc + 2, 2);
393 if (IS_PUSH (op1))
394 {
395 /* Since the prefix is 0x01x0, this is not a simple pushm but a
396 stm.l reglist,@-sp */
397 i = ((op & 0x0030) >> 4) + 1;
398 regno = op1 & 0x000f;
399 for (; i > 0; regno++, --i)
400 {
401 cache->sp_offset += 4;
402 cache->saved_regs[regno] = cache->sp_offset;
403 }
404 pc += 4;
405 }
406 else
407 break;
408 }
409 else
410 break;
411 }
412
413 /* Check for spilling an argument register to the stack frame.
414 This could also be an initializing store from non-prologue code,
415 but I don't think there's any harm in skipping that. */
416 while ((spill_size = h8300_is_argument_spill (pc)) > 0
417 && pc + spill_size <= current_pc)
418 pc += spill_size;
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419
420 return pc;
421}
422
423static struct h8300_frame_cache *
424h8300_frame_cache (struct frame_info *next_frame, void **this_cache)
425{
426 struct h8300_frame_cache *cache;
427 char buf[4];
428 int i;
862ba188 429 CORE_ADDR current_pc;
f0bdd87d
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430
431 if (*this_cache)
432 return *this_cache;
433
862ba188
CV
434 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
435 h8300_init_frame_cache (cache);
f0bdd87d
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436 *this_cache = cache;
437
438 /* In principle, for normal frames, %fp holds the frame pointer,
439 which holds the base address for the current stack frame.
440 However, for functions that don't need it, the frame pointer is
441 optional. For these "frameless" functions the frame pointer is
862ba188 442 actually the frame pointer of the calling frame. */
f0bdd87d 443
862ba188 444 cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM);
f0bdd87d
YS
445 if (cache->base == 0)
446 return cache;
447
862ba188 448 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
f0bdd87d 449
93d42b30 450 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
862ba188 451 current_pc = frame_pc_unwind (next_frame);
f0bdd87d 452 if (cache->pc != 0)
862ba188 453 h8300_analyze_prologue (cache->pc, current_pc, cache);
f0bdd87d 454
862ba188 455 if (!cache->uses_fp)
f0bdd87d
YS
456 {
457 /* We didn't find a valid frame, which means that CACHE->base
458 currently holds the frame pointer for our calling frame. If
459 we're at the start of a function, or somewhere half-way its
460 prologue, the function's frame probably hasn't been fully
461 setup yet. Try to reconstruct the base address for the stack
462 frame by looking at the stack pointer. For truly "frameless"
463 functions this might work too. */
464
862ba188
CV
465 cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM)
466 + cache->sp_offset;
467 cache->saved_sp = cache->base + BINWORD;
468 cache->saved_regs[E_PC_REGNUM] = 0;
469 }
470 else
471 {
472 cache->saved_sp = cache->base + 2 * BINWORD;
473 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
f0bdd87d 474 }
f0bdd87d
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475
476 /* Adjust all the saved registers such that they contain addresses
477 instead of offsets. */
f57d151a 478 for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
f0bdd87d 479 if (cache->saved_regs[i] != -1)
862ba188 480 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
f0bdd87d
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481
482 return cache;
483}
484
485static void
486h8300_frame_this_id (struct frame_info *next_frame, void **this_cache,
487 struct frame_id *this_id)
488{
489 struct h8300_frame_cache *cache =
490 h8300_frame_cache (next_frame, this_cache);
491
492 /* This marks the outermost frame. */
493 if (cache->base == 0)
494 return;
495
862ba188 496 *this_id = frame_id_build (cache->saved_sp, cache->pc);
f0bdd87d
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497}
498
499static void
500h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache,
501 int regnum, int *optimizedp,
502 enum lval_type *lvalp, CORE_ADDR *addrp,
5d0d05b6 503 int *realnump, gdb_byte *valuep)
f0bdd87d
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504{
505 struct h8300_frame_cache *cache =
506 h8300_frame_cache (next_frame, this_cache);
507
508 gdb_assert (regnum >= 0);
509
510 if (regnum == E_SP_REGNUM && cache->saved_sp)
511 {
512 *optimizedp = 0;
513 *lvalp = not_lval;
514 *addrp = 0;
515 *realnump = -1;
516 if (valuep)
862ba188 517 store_unsigned_integer (valuep, BINWORD, cache->saved_sp);
f0bdd87d
YS
518 return;
519 }
520
f57d151a
UW
521 if (regnum < gdbarch_num_regs (current_gdbarch)
522 && cache->saved_regs[regnum] != -1)
f0bdd87d
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523 {
524 *optimizedp = 0;
525 *lvalp = lval_memory;
526 *addrp = cache->saved_regs[regnum];
527 *realnump = -1;
528 if (valuep)
862ba188 529 read_memory (*addrp, valuep, register_size (current_gdbarch, regnum));
f0bdd87d
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530 return;
531 }
532
5efde112
DJ
533 *optimizedp = 0;
534 *lvalp = lval_register;
535 *addrp = 0;
536 *realnump = regnum;
537 if (valuep)
538 frame_unwind_register (next_frame, *realnump, valuep);
f0bdd87d
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539}
540
541static const struct frame_unwind h8300_frame_unwind = {
542 NORMAL_FRAME,
543 h8300_frame_this_id,
544 h8300_frame_prev_register
545};
546
547static const struct frame_unwind *
548h8300_frame_sniffer (struct frame_info *next_frame)
549{
550 return &h8300_frame_unwind;
551}
552
862ba188
CV
553static CORE_ADDR
554h8300_frame_base_address (struct frame_info *next_frame, void **this_cache)
555{
556 struct h8300_frame_cache *cache = h8300_frame_cache (next_frame, this_cache);
557 return cache->base;
558}
559
560static const struct frame_base h8300_frame_base = {
561 &h8300_frame_unwind,
562 h8300_frame_base_address,
563 h8300_frame_base_address,
564 h8300_frame_base_address
565};
566
567static CORE_ADDR
568h8300_skip_prologue (CORE_ADDR pc)
569{
570 CORE_ADDR func_addr = 0 , func_end = 0;
571
572 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
573 {
574 struct symtab_and_line sal;
575 struct h8300_frame_cache cache;
576
577 /* Found a function. */
578 sal = find_pc_line (func_addr, 0);
579 if (sal.end && sal.end < func_end)
580 /* Found a line number, use it as end of prologue. */
581 return sal.end;
582
583 /* No useable line symbol. Use prologue parsing method. */
584 h8300_init_frame_cache (&cache);
585 return h8300_analyze_prologue (func_addr, func_end, &cache);
586 }
587
588 /* No function symbol -- just return the PC. */
589 return (CORE_ADDR) pc;
590}
591
f0bdd87d
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592/* Function: push_dummy_call
593 Setup the function arguments for calling a function in the inferior.
594 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
595 on the H8/300H.
596
597 There are actually two ABI's here: -mquickcall (the default) and
598 -mno-quickcall. With -mno-quickcall, all arguments are passed on
599 the stack after the return address, word-aligned. With
600 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
601 GCC doesn't indicate in the object file which ABI was used to
602 compile it, GDB only supports the default --- -mquickcall.
603
604 Here are the rules for -mquickcall, in detail:
605
606 Each argument, whether scalar or aggregate, is padded to occupy a
607 whole number of words. Arguments smaller than a word are padded at
608 the most significant end; those larger than a word are padded at
609 the least significant end.
610
611 The initial arguments are passed in r0 -- r2. Earlier arguments go in
612 lower-numbered registers. Multi-word arguments are passed in
613 consecutive registers, with the most significant end in the
614 lower-numbered register.
615
616 If an argument doesn't fit entirely in the remaining registers, it
617 is passed entirely on the stack. Stack arguments begin just after
618 the return address. Once an argument has overflowed onto the stack
619 this way, all subsequent arguments are passed on the stack.
620
621 The above rule has odd consequences. For example, on the h8/300s,
622 if a function takes two longs and an int as arguments:
623 - the first long will be passed in r0/r1,
624 - the second long will be passed entirely on the stack, since it
625 doesn't fit in r2,
626 - and the int will be passed on the stack, even though it could fit
627 in r2.
628
629 A weird exception: if an argument is larger than a word, but not a
630 whole number of words in length (before padding), it is passed on
631 the stack following the rules for stack arguments above, even if
632 there are sufficient registers available to hold it. Stranger
633 still, the argument registers are still `used up' --- even though
634 there's nothing in them.
635
636 So, for example, on the h8/300s, if a function expects a three-byte
637 structure and an int, the structure will go on the stack, and the
638 int will go in r2, not r0.
639
640 If the function returns an aggregate type (struct, union, or class)
641 by value, the caller must allocate space to hold the return value,
642 and pass the callee a pointer to this space as an invisible first
643 argument, in R0.
644
645 For varargs functions, the last fixed argument and all the variable
646 arguments are always passed on the stack. This means that calls to
647 varargs functions don't work properly unless there is a prototype
648 in scope.
649
650 Basically, this ABI is not good, for the following reasons:
651 - You can't call vararg functions properly unless a prototype is in scope.
652 - Structure passing is inconsistent, to no purpose I can see.
653 - It often wastes argument registers, of which there are only three
654 to begin with. */
655
656static CORE_ADDR
657h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
658 struct regcache *regcache, CORE_ADDR bp_addr,
659 int nargs, struct value **args, CORE_ADDR sp,
660 int struct_return, CORE_ADDR struct_addr)
661{
662 int stack_alloc = 0, stack_offset = 0;
663 int wordsize = BINWORD;
664 int reg = E_ARG0_REGNUM;
665 int argument;
666
667 /* First, make sure the stack is properly aligned. */
668 sp = align_down (sp, wordsize);
669
670 /* Now make sure there's space on the stack for the arguments. We
671 may over-allocate a little here, but that won't hurt anything. */
672 for (argument = 0; argument < nargs; argument++)
673 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
674 wordsize);
675 sp -= stack_alloc;
676
677 /* Now load as many arguments as possible into registers, and push
678 the rest onto the stack.
679 If we're returning a structure by value, then we must pass a
680 pointer to the buffer for the return value as an invisible first
681 argument. */
682 if (struct_return)
683 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
684
685 for (argument = 0; argument < nargs; argument++)
686 {
687 struct type *type = value_type (args[argument]);
688 int len = TYPE_LENGTH (type);
689 char *contents = (char *) value_contents (args[argument]);
690
691 /* Pad the argument appropriately. */
692 int padded_len = align_up (len, wordsize);
5d0d05b6 693 gdb_byte *padded = alloca (padded_len);
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YS
694
695 memset (padded, 0, padded_len);
696 memcpy (len < wordsize ? padded + padded_len - len : padded,
697 contents, len);
698
699 /* Could the argument fit in the remaining registers? */
700 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
701 {
702 /* Are we going to pass it on the stack anyway, for no good
703 reason? */
704 if (len > wordsize && len % wordsize)
705 {
706 /* I feel so unclean. */
707 write_memory (sp + stack_offset, padded, padded_len);
708 stack_offset += padded_len;
709
710 /* That's right --- even though we passed the argument
711 on the stack, we consume the registers anyway! Love
712 me, love my dog. */
713 reg += padded_len / wordsize;
714 }
715 else
716 {
717 /* Heavens to Betsy --- it's really going in registers!
718 It would be nice if we could use write_register_bytes
719 here, but on the h8/300s, there are gaps between
720 the registers in the register file. */
721 int offset;
722
723 for (offset = 0; offset < padded_len; offset += wordsize)
724 {
725 ULONGEST word = extract_unsigned_integer (padded + offset,
726 wordsize);
727 regcache_cooked_write_unsigned (regcache, reg++, word);
728 }
729 }
730 }
731 else
732 {
733 /* It doesn't fit in registers! Onto the stack it goes. */
734 write_memory (sp + stack_offset, padded, padded_len);
735 stack_offset += padded_len;
736
737 /* Once one argument has spilled onto the stack, all
738 subsequent arguments go on the stack. */
739 reg = E_ARGLAST_REGNUM + 1;
740 }
741 }
742
743 /* Store return address. */
744 sp -= wordsize;
745 write_memory_unsigned_integer (sp, wordsize, bp_addr);
746
747 /* Update stack pointer. */
748 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
749
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750 /* Return the new stack pointer minus the return address slot since
751 that's what DWARF2/GCC uses as the frame's CFA. */
752 return sp + wordsize;
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YS
753}
754
755/* Function: extract_return_value
756 Figure out where in REGBUF the called function has left its return value.
757 Copy that into VALBUF. Be sure to account for CPU type. */
758
759static void
760h8300_extract_return_value (struct type *type, struct regcache *regcache,
761 void *valbuf)
762{
763 int len = TYPE_LENGTH (type);
764 ULONGEST c, addr;
765
766 switch (len)
767 {
768 case 1:
769 case 2:
770 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
771 store_unsigned_integer (valbuf, len, c);
772 break;
773 case 4: /* Needs two registers on plain H8/300 */
774 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
775 store_unsigned_integer (valbuf, 2, c);
776 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
777 store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
778 break;
779 case 8: /* long long is now 8 bytes. */
780 if (TYPE_CODE (type) == TYPE_CODE_INT)
781 {
782 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
783 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
784 store_unsigned_integer (valbuf, len, c);
785 }
786 else
787 {
788 error ("I don't know how this 8 byte value is returned.");
789 }
790 break;
791 }
792}
793
794static void
795h8300h_extract_return_value (struct type *type, struct regcache *regcache,
796 void *valbuf)
797{
798 int len = TYPE_LENGTH (type);
799 ULONGEST c, addr;
800
801 switch (len)
802 {
803 case 1:
804 case 2:
805 case 4:
806 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
807 store_unsigned_integer (valbuf, len, c);
808 break;
809 case 8: /* long long is now 8 bytes. */
810 if (TYPE_CODE (type) == TYPE_CODE_INT)
811 {
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812 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
813 store_unsigned_integer (valbuf, 4, c);
814 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
815 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c);
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816 }
817 else
818 {
819 error ("I don't know how this 8 byte value is returned.");
820 }
821 break;
822 }
823}
824
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825int
826h8300_use_struct_convention (struct type *value_type)
827{
828 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
829 stack. */
830
831 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
832 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
833 return 1;
834 return !(TYPE_LENGTH (value_type) == 1
835 || TYPE_LENGTH (value_type) == 2
836 || TYPE_LENGTH (value_type) == 4);
837}
838
839int
840h8300h_use_struct_convention (struct type *value_type)
841{
842 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
843 returned in R0/R1, everything else on the stack. */
844 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
845 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
846 return 1;
847 return !(TYPE_LENGTH (value_type) == 1
848 || TYPE_LENGTH (value_type) == 2
849 || TYPE_LENGTH (value_type) == 4
850 || (TYPE_LENGTH (value_type) == 8
851 && TYPE_CODE (value_type) == TYPE_CODE_INT));
852}
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YS
853
854/* Function: store_return_value
855 Place the appropriate value in the appropriate registers.
856 Primarily used by the RETURN command. */
857
858static void
859h8300_store_return_value (struct type *type, struct regcache *regcache,
860 const void *valbuf)
861{
862 int len = TYPE_LENGTH (type);
863 ULONGEST val;
864
865 switch (len)
866 {
867 case 1:
868 case 2: /* short... */
869 val = extract_unsigned_integer (valbuf, len);
870 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
871 break;
872 case 4: /* long, float */
873 val = extract_unsigned_integer (valbuf, len);
874 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
875 (val >> 16) & 0xffff);
876 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
877 break;
878 case 8: /* long long, double and long double are all defined
879 as 4 byte types so far so this shouldn't happen. */
880 error ("I don't know how to return an 8 byte value.");
881 break;
882 }
883}
884
885static void
886h8300h_store_return_value (struct type *type, struct regcache *regcache,
887 const void *valbuf)
888{
889 int len = TYPE_LENGTH (type);
890 ULONGEST val;
891
892 switch (len)
893 {
894 case 1:
895 case 2:
896 case 4: /* long, float */
897 val = extract_unsigned_integer (valbuf, len);
898 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
899 break;
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900 case 8:
901 val = extract_unsigned_integer (valbuf, len);
902 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
903 (val >> 32) & 0xffffffff);
904 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
905 val & 0xffffffff);
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YS
906 break;
907 }
908}
909
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CV
910static enum return_value_convention
911h8300_return_value (struct gdbarch *gdbarch, struct type *type,
912 struct regcache *regcache,
5d0d05b6 913 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
914{
915 if (h8300_use_struct_convention (type))
916 return RETURN_VALUE_STRUCT_CONVENTION;
917 if (writebuf)
918 h8300_store_return_value (type, regcache, writebuf);
919 else if (readbuf)
920 h8300_extract_return_value (type, regcache, readbuf);
921 return RETURN_VALUE_REGISTER_CONVENTION;
922}
923
924static enum return_value_convention
925h8300h_return_value (struct gdbarch *gdbarch, struct type *type,
926 struct regcache *regcache,
5d0d05b6 927 gdb_byte *readbuf, const gdb_byte *writebuf)
862ba188
CV
928{
929 if (h8300h_use_struct_convention (type))
930 {
931 if (readbuf)
932 {
933 ULONGEST addr;
934
935 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
936 read_memory (addr, readbuf, TYPE_LENGTH (type));
937 }
938
939 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
940 }
941 if (writebuf)
942 h8300h_store_return_value (type, regcache, writebuf);
943 else if (readbuf)
944 h8300h_extract_return_value (type, regcache, readbuf);
945 return RETURN_VALUE_REGISTER_CONVENTION;
946}
947
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YS
948static struct cmd_list_element *setmachinelist;
949
950static const char *
951h8300_register_name (int regno)
952{
953 /* The register names change depending on which h8300 processor
954 type is selected. */
955 static char *register_names[] = {
956 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
957 "sp", "", "pc", "cycles", "tick", "inst",
958 "ccr", /* pseudo register */
959 };
960 if (regno < 0
961 || regno >= (sizeof (register_names) / sizeof (*register_names)))
962 internal_error (__FILE__, __LINE__,
963 "h8300_register_name: illegal register number %d", regno);
964 else
965 return register_names[regno];
966}
967
968static const char *
969h8300s_register_name (int regno)
970{
971 static char *register_names[] = {
972 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
973 "sp", "", "pc", "cycles", "", "tick", "inst",
974 "mach", "macl",
975 "ccr", "exr" /* pseudo registers */
976 };
977 if (regno < 0
978 || regno >= (sizeof (register_names) / sizeof (*register_names)))
979 internal_error (__FILE__, __LINE__,
980 "h8300s_register_name: illegal register number %d",
981 regno);
982 else
983 return register_names[regno];
984}
985
986static const char *
987h8300sx_register_name (int regno)
988{
989 static char *register_names[] = {
990 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
991 "sp", "", "pc", "cycles", "", "tick", "inst",
992 "mach", "macl", "sbr", "vbr",
993 "ccr", "exr" /* pseudo registers */
994 };
995 if (regno < 0
996 || regno >= (sizeof (register_names) / sizeof (*register_names)))
997 internal_error (__FILE__, __LINE__,
998 "h8300sx_register_name: illegal register number %d",
999 regno);
1000 else
1001 return register_names[regno];
1002}
1003
1004static void
1005h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1006 struct frame_info *frame, int regno)
1007{
1008 LONGEST rval;
1009 const char *name = gdbarch_register_name (gdbarch, regno);
1010
1011 if (!name || !*name)
1012 return;
1013
1014 rval = get_frame_register_signed (frame, regno);
1015
1016 fprintf_filtered (file, "%-14s ", name);
1017 if ((regno == E_PSEUDO_CCR_REGNUM) || \
1018 (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)))
1019 {
1020 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1021 print_longest (file, 'u', 1, rval);
1022 }
1023 else
1024 {
1025 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, BINWORD));
1026 print_longest (file, 'd', 1, rval);
1027 }
1028 if (regno == E_PSEUDO_CCR_REGNUM)
1029 {
1030 /* CCR register */
1031 int C, Z, N, V;
1032 unsigned char l = rval & 0xff;
1033 fprintf_filtered (file, "\t");
1034 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1035 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1036 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1037 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1038 N = (l & 0x8) != 0;
1039 Z = (l & 0x4) != 0;
1040 V = (l & 0x2) != 0;
1041 C = (l & 0x1) != 0;
1042 fprintf_filtered (file, "N-%d ", N);
1043 fprintf_filtered (file, "Z-%d ", Z);
1044 fprintf_filtered (file, "V-%d ", V);
1045 fprintf_filtered (file, "C-%d ", C);
1046 if ((C | Z) == 0)
1047 fprintf_filtered (file, "u> ");
1048 if ((C | Z) == 1)
1049 fprintf_filtered (file, "u<= ");
1050 if ((C == 0))
1051 fprintf_filtered (file, "u>= ");
1052 if (C == 1)
1053 fprintf_filtered (file, "u< ");
1054 if (Z == 0)
1055 fprintf_filtered (file, "!= ");
1056 if (Z == 1)
1057 fprintf_filtered (file, "== ");
1058 if ((N ^ V) == 0)
1059 fprintf_filtered (file, ">= ");
1060 if ((N ^ V) == 1)
1061 fprintf_filtered (file, "< ");
1062 if ((Z | (N ^ V)) == 0)
1063 fprintf_filtered (file, "> ");
1064 if ((Z | (N ^ V)) == 1)
1065 fprintf_filtered (file, "<= ");
1066 }
1067 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
1068 {
1069 /* EXR register */
1070 unsigned char l = rval & 0xff;
1071 fprintf_filtered (file, "\t");
1072 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1073 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1074 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1075 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1076 }
1077 fprintf_filtered (file, "\n");
1078}
1079
1080static void
1081h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1082 struct frame_info *frame, int regno, int cpregs)
1083{
1084 if (regno < 0)
1085 {
1086 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1087 h8300_print_register (gdbarch, file, frame, regno);
1088 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1089 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1090 if (is_h8300smode (current_gdbarch))
1091 {
1092 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1093 if (is_h8300sxmode (current_gdbarch))
1094 {
1095 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1096 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1097 }
1098 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1099 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1100 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1101 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1102 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1103 }
1104 else
1105 {
1106 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1107 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1108 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1109 }
1110 }
1111 else
1112 {
1113 if (regno == E_CCR_REGNUM)
1114 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1115 else if (regno == E_PSEUDO_EXR_REGNUM
1116 && is_h8300smode (current_gdbarch))
1117 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1118 else
1119 h8300_print_register (gdbarch, file, frame, regno);
1120 }
1121}
1122
1123static struct type *
1124h8300_register_type (struct gdbarch *gdbarch, int regno)
1125{
f57d151a
UW
1126 if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch)
1127 + gdbarch_num_pseudo_regs (current_gdbarch))
f0bdd87d
YS
1128 internal_error (__FILE__, __LINE__,
1129 "h8300_register_type: illegal register number %d", regno);
1130 else
1131 {
1132 switch (regno)
1133 {
1134 case E_PC_REGNUM:
1135 return builtin_type_void_func_ptr;
1136 case E_SP_REGNUM:
1137 case E_FP_REGNUM:
1138 return builtin_type_void_data_ptr;
1139 default:
1140 if (regno == E_PSEUDO_CCR_REGNUM)
1141 return builtin_type_uint8;
1142 else if (regno == E_PSEUDO_EXR_REGNUM)
1143 return builtin_type_uint8;
1144 else if (is_h8300hmode (current_gdbarch))
1145 return builtin_type_int32;
1146 else
1147 return builtin_type_int16;
1148 }
1149 }
1150}
1151
1152static void
1153h8300_pseudo_register_read (struct gdbarch *gdbarch,
5d0d05b6
CV
1154 struct regcache *regcache, int regno,
1155 gdb_byte *buf)
f0bdd87d
YS
1156{
1157 if (regno == E_PSEUDO_CCR_REGNUM)
1158 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1159 else if (regno == E_PSEUDO_EXR_REGNUM)
1160 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1161 else
1162 regcache_raw_read (regcache, regno, buf);
1163}
1164
1165static void
1166h8300_pseudo_register_write (struct gdbarch *gdbarch,
1167 struct regcache *regcache, int regno,
5d0d05b6 1168 const gdb_byte *buf)
f0bdd87d
YS
1169{
1170 if (regno == E_PSEUDO_CCR_REGNUM)
1171 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1172 else if (regno == E_PSEUDO_EXR_REGNUM)
1173 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1174 else
1175 regcache_raw_write (regcache, regno, buf);
1176}
1177
1178static int
1179h8300_dbg_reg_to_regnum (int regno)
1180{
1181 if (regno == E_CCR_REGNUM)
1182 return E_PSEUDO_CCR_REGNUM;
1183 return regno;
1184}
1185
1186static int
1187h8300s_dbg_reg_to_regnum (int regno)
1188{
1189 if (regno == E_CCR_REGNUM)
1190 return E_PSEUDO_CCR_REGNUM;
1191 if (regno == E_EXR_REGNUM)
1192 return E_PSEUDO_EXR_REGNUM;
1193 return regno;
1194}
1195
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YS
1196const static unsigned char *
1197h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1198{
1199 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1200 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1201
1202 *lenptr = sizeof (breakpoint);
1203 return breakpoint;
1204}
1205
f0bdd87d
YS
1206static void
1207h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1208 struct frame_info *frame, const char *args)
1209{
1210 fprintf_filtered (file, "\
1211No floating-point info available for this processor.\n");
1212}
1213
1214static struct gdbarch *
1215h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1216{
1217 struct gdbarch_tdep *tdep = NULL;
1218 struct gdbarch *gdbarch;
1219
1220 arches = gdbarch_list_lookup_by_info (arches, &info);
1221 if (arches != NULL)
1222 return arches->gdbarch;
1223
1224#if 0
1225 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1226#endif
1227
1228 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1229 return NULL;
1230
1231 gdbarch = gdbarch_alloc (&info, 0);
1232
1233 switch (info.bfd_arch_info->mach)
1234 {
1235 case bfd_mach_h8300:
1236 set_gdbarch_num_regs (gdbarch, 13);
1237 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1238 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1239 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1240 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1241 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1242 set_gdbarch_register_name (gdbarch, h8300_register_name);
1243 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1244 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
862ba188 1245 set_gdbarch_return_value (gdbarch, h8300_return_value);
f0bdd87d
YS
1246 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1247 break;
1248 case bfd_mach_h8300h:
1249 case bfd_mach_h8300hn:
1250 set_gdbarch_num_regs (gdbarch, 13);
1251 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1252 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1253 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1254 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1255 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1256 set_gdbarch_register_name (gdbarch, h8300_register_name);
1257 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1258 {
1259 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1260 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1261 }
1262 else
1263 {
1264 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1265 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1266 }
862ba188 1267 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1268 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1269 break;
1270 case bfd_mach_h8300s:
1271 case bfd_mach_h8300sn:
1272 set_gdbarch_num_regs (gdbarch, 16);
1273 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1274 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1275 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1276 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1277 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1278 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1279 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1280 {
1281 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1282 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1283 }
1284 else
1285 {
1286 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1287 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1288 }
862ba188 1289 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1290 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1291 break;
1292 case bfd_mach_h8300sx:
1293 case bfd_mach_h8300sxn:
1294 set_gdbarch_num_regs (gdbarch, 18);
1295 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1296 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1297 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1298 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1299 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1300 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1301 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1302 {
1303 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1304 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1305 }
1306 else
1307 {
1308 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1309 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1310 }
862ba188 1311 set_gdbarch_return_value (gdbarch, h8300h_return_value);
f0bdd87d
YS
1312 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1313 break;
1314 }
1315
1316 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1317 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1318
1319 /*
1320 * Basic register fields and methods.
1321 */
1322
1323 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
f0bdd87d
YS
1324 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1325 set_gdbarch_register_type (gdbarch, h8300_register_type);
1326 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1327 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1328
1329 /*
1330 * Frame Info
1331 */
1332 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1333
1334 /* Frame unwinder. */
f0bdd87d 1335 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
862ba188
CV
1336 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
1337 set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id);
1338 frame_base_set_default (gdbarch, &h8300_frame_base);
f0bdd87d
YS
1339
1340 /*
1341 * Miscelany
1342 */
1343 /* Stack grows up. */
1344 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1345
f0bdd87d 1346 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
f0bdd87d
YS
1347 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1348
862ba188 1349 set_gdbarch_char_signed (gdbarch, 0);
f0bdd87d
YS
1350 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1351 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1352 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1353 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1354 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1355
1356 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1357
862ba188
CV
1358 /* Hook in the DWARF CFI frame unwinder. */
1359 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
f0bdd87d
YS
1360 frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer);
1361
1362 return gdbarch;
1363
1364}
1365
1366extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1367
1368void
1369_initialize_h8300_tdep (void)
1370{
1371 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1372}
1373
1374static int
1375is_h8300hmode (struct gdbarch *gdbarch)
1376{
1377 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1378 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1379 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1381 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1382 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1383}
1384
1385static int
1386is_h8300smode (struct gdbarch *gdbarch)
1387{
1388 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1389 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1390 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1391 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1392}
1393
1394static int
1395is_h8300sxmode (struct gdbarch *gdbarch)
1396{
1397 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1398 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1399}
1400
1401static int
1402is_h8300_normal_mode (struct gdbarch *gdbarch)
1403{
1404 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1405 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1406 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1407}
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