gold/
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
28e7fd62 3 Copyright (C) 1986-2013 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
a7ff40e7 29#include "gdb_assert.h"
343af405 30#include "arch-utils.h"
1777feb0 31/* For argument passing to the inferior. */
c906108c 32#include "symtab.h"
fde2cceb 33#include "dis-asm.h"
26d08f08
AC
34#include "trad-frame.h"
35#include "frame-unwind.h"
36#include "frame-base.h"
c906108c 37
c906108c
SS
38#include "gdbcore.h"
39#include "gdbcmd.h"
e6bb342a 40#include "gdbtypes.h"
c906108c 41#include "objfiles.h"
3ff7cf9e 42#include "hppa-tdep.h"
c906108c 43
369aa520
RC
44static int hppa_debug = 0;
45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
7c46b9fb
RC
50/* hppa-specific object data -- unwind and solib info.
51 TODO/maybe: think about splitting this into two parts; the unwind data is
52 common to all hppa targets, but is only used in this file; we can register
53 that separately and make this static. The solib data is probably hpux-
54 specific, so we can create a separate extern objfile_data that is registered
55 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
56const struct objfile_data *hppa_objfile_priv_data = NULL;
57
1777feb0 58/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
59#define MASK_5 0x1f
60#define MASK_11 0x7ff
61#define MASK_14 0x3fff
62#define MASK_21 0x1fffff
63
e2ac8128
JB
64/* Sizes (in bytes) of the native unwind entries. */
65#define UNWIND_ENTRY_SIZE 16
66#define STUB_UNWIND_ENTRY_SIZE 8
67
c906108c 68/* Routines to extract various sized constants out of hppa
1777feb0 69 instructions. */
c906108c
SS
70
71/* This assumes that no garbage lies outside of the lower bits of
1777feb0 72 value. */
c906108c 73
63807e1d 74static int
abc485a1 75hppa_sign_extend (unsigned val, unsigned bits)
c906108c 76{
c5aa993b 77 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
78}
79
1777feb0 80/* For many immediate values the sign bit is the low bit! */
c906108c 81
63807e1d 82static int
abc485a1 83hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 84{
c5aa993b 85 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
86}
87
e2ac8128 88/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 89 (MSB = 0). */
e2ac8128 90
abc485a1
RC
91int
92hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
93{
94 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
95}
96
1777feb0 97/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 98
abc485a1
RC
99int
100hppa_extract_5_load (unsigned word)
c906108c 101{
abc485a1 102 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
103}
104
1777feb0 105/* Extract the immediate field from a break instruction. */
c906108c 106
abc485a1
RC
107unsigned
108hppa_extract_5r_store (unsigned word)
c906108c
SS
109{
110 return (word & MASK_5);
111}
112
1777feb0 113/* Extract the immediate field from a {sr}sm instruction. */
c906108c 114
abc485a1
RC
115unsigned
116hppa_extract_5R_store (unsigned word)
c906108c
SS
117{
118 return (word >> 16 & MASK_5);
119}
120
1777feb0 121/* Extract a 14 bit immediate field. */
c906108c 122
abc485a1
RC
123int
124hppa_extract_14 (unsigned word)
c906108c 125{
abc485a1 126 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
127}
128
1777feb0 129/* Extract a 21 bit constant. */
c906108c 130
abc485a1
RC
131int
132hppa_extract_21 (unsigned word)
c906108c
SS
133{
134 int val;
135
136 word &= MASK_21;
137 word <<= 11;
abc485a1 138 val = hppa_get_field (word, 20, 20);
c906108c 139 val <<= 11;
abc485a1 140 val |= hppa_get_field (word, 9, 19);
c906108c 141 val <<= 2;
abc485a1 142 val |= hppa_get_field (word, 5, 6);
c906108c 143 val <<= 5;
abc485a1 144 val |= hppa_get_field (word, 0, 4);
c906108c 145 val <<= 2;
abc485a1
RC
146 val |= hppa_get_field (word, 7, 8);
147 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
148}
149
c906108c 150/* extract a 17 bit constant from branch instructions, returning the
1777feb0 151 19 bit signed value. */
c906108c 152
abc485a1
RC
153int
154hppa_extract_17 (unsigned word)
c906108c 155{
abc485a1
RC
156 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
157 hppa_get_field (word, 29, 29) << 10 |
158 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
159 (word & 0x1) << 16, 17) << 2;
160}
3388d7ff
RC
161
162CORE_ADDR
163hppa_symbol_address(const char *sym)
164{
165 struct minimal_symbol *minsym;
166
167 minsym = lookup_minimal_symbol (sym, NULL, NULL);
168 if (minsym)
169 return SYMBOL_VALUE_ADDRESS (minsym);
170 else
171 return (CORE_ADDR)-1;
172}
77d18ded
RC
173
174struct hppa_objfile_private *
175hppa_init_objfile_priv_data (struct objfile *objfile)
176{
177 struct hppa_objfile_private *priv;
178
179 priv = (struct hppa_objfile_private *)
180 obstack_alloc (&objfile->objfile_obstack,
181 sizeof (struct hppa_objfile_private));
182 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
183 memset (priv, 0, sizeof (*priv));
184
185 return priv;
186}
c906108c
SS
187\f
188
189/* Compare the start address for two unwind entries returning 1 if
190 the first address is larger than the second, -1 if the second is
191 larger than the first, and zero if they are equal. */
192
193static int
fba45db2 194compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
195{
196 const struct unwind_table_entry *a = arg1;
197 const struct unwind_table_entry *b = arg2;
198
199 if (a->region_start > b->region_start)
200 return 1;
201 else if (a->region_start < b->region_start)
202 return -1;
203 else
204 return 0;
205}
206
53a5351d 207static void
fdd72f95 208record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 209{
fdd72f95 210 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 211 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
212 {
213 bfd_vma value = section->vma - section->filepos;
214 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
215
216 if (value < *low_text_segment_address)
217 *low_text_segment_address = value;
218 }
53a5351d
JM
219}
220
c906108c 221static void
fba45db2 222internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0
MS
223 asection *section, unsigned int entries,
224 unsigned int size, CORE_ADDR text_offset)
c906108c
SS
225{
226 /* We will read the unwind entries into temporary memory, then
227 fill in the actual unwind table. */
fdd72f95 228
c906108c
SS
229 if (size > 0)
230 {
5db8bbe5 231 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
232 unsigned long tmp;
233 unsigned i;
234 char *buf = alloca (size);
fdd72f95 235 CORE_ADDR low_text_segment_address;
c906108c 236
fdd72f95 237 /* For ELF targets, then unwinds are supposed to
1777feb0 238 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
239
240 Note that when loading a shared library (text_offset != 0) the
241 unwinds are already relative to the text_offset that will be
242 passed in. */
5db8bbe5 243 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 244 {
fdd72f95
RC
245 low_text_segment_address = -1;
246
53a5351d 247 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
248 record_text_segment_lowaddr,
249 &low_text_segment_address);
53a5351d 250
fdd72f95 251 text_offset = low_text_segment_address;
53a5351d 252 }
5db8bbe5 253 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 254 {
5db8bbe5 255 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 256 }
53a5351d 257
c906108c
SS
258 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
259
260 /* Now internalize the information being careful to handle host/target
c5aa993b 261 endian issues. */
c906108c
SS
262 for (i = 0; i < entries; i++)
263 {
264 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 265 (bfd_byte *) buf);
c906108c
SS
266 table[i].region_start += text_offset;
267 buf += 4;
c5aa993b 268 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
269 table[i].region_end += text_offset;
270 buf += 4;
c5aa993b 271 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
272 buf += 4;
273 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
274 table[i].Millicode = (tmp >> 30) & 0x1;
275 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
276 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 277 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
278 table[i].Entry_SR = (tmp >> 25) & 0x1;
279 table[i].Entry_FR = (tmp >> 21) & 0xf;
280 table[i].Entry_GR = (tmp >> 16) & 0x1f;
281 table[i].Args_stored = (tmp >> 15) & 0x1;
282 table[i].Variable_Frame = (tmp >> 14) & 0x1;
283 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
284 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
285 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
286 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 287 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
288 table[i].cxx_info = (tmp >> 8) & 0x1;
289 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
290 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 291 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
292 table[i].Save_SP = (tmp >> 4) & 0x1;
293 table[i].Save_RP = (tmp >> 3) & 0x1;
294 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 295 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 296 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 297 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
298 buf += 4;
299 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
300 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
301 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
302 table[i].alloca_frame = (tmp >> 28) & 0x1;
303 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
304 table[i].Total_frame_size = tmp & 0x7ffffff;
305
1777feb0 306 /* Stub unwinds are handled elsewhere. */
c906108c
SS
307 table[i].stub_unwind.stub_type = 0;
308 table[i].stub_unwind.padding = 0;
309 }
310 }
311}
312
313/* Read in the backtrace information stored in the `$UNWIND_START$' section of
314 the object file. This info is used mainly by find_unwind_entry() to find
315 out the stack frame size and frame pointer used by procedures. We put
316 everything on the psymbol obstack in the objfile so that it automatically
317 gets freed when the objfile is destroyed. */
318
319static void
fba45db2 320read_unwind_info (struct objfile *objfile)
c906108c 321{
d4f3574e
SS
322 asection *unwind_sec, *stub_unwind_sec;
323 unsigned unwind_size, stub_unwind_size, total_size;
324 unsigned index, unwind_entries;
c906108c
SS
325 unsigned stub_entries, total_entries;
326 CORE_ADDR text_offset;
7c46b9fb
RC
327 struct hppa_unwind_info *ui;
328 struct hppa_objfile_private *obj_private;
c906108c 329
a99dad3d 330 text_offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
7c46b9fb
RC
331 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
332 sizeof (struct hppa_unwind_info));
c906108c
SS
333
334 ui->table = NULL;
335 ui->cache = NULL;
336 ui->last = -1;
337
d4f3574e
SS
338 /* For reasons unknown the HP PA64 tools generate multiple unwinder
339 sections in a single executable. So we just iterate over every
340 section in the BFD looking for unwinder sections intead of trying
1777feb0 341 to do a lookup with bfd_get_section_by_name.
c906108c 342
d4f3574e
SS
343 First determine the total size of the unwind tables so that we
344 can allocate memory in a nice big hunk. */
345 total_entries = 0;
346 for (unwind_sec = objfile->obfd->sections;
347 unwind_sec;
348 unwind_sec = unwind_sec->next)
c906108c 349 {
d4f3574e
SS
350 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
351 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
352 {
353 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
354 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 355
d4f3574e
SS
356 total_entries += unwind_entries;
357 }
c906108c
SS
358 }
359
d4f3574e 360 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 361 use stub unwinds at the current time. */
d4f3574e
SS
362 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
363
c906108c
SS
364 if (stub_unwind_sec)
365 {
366 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
367 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
368 }
369 else
370 {
371 stub_unwind_size = 0;
372 stub_entries = 0;
373 }
374
375 /* Compute total number of unwind entries and their total size. */
d4f3574e 376 total_entries += stub_entries;
c906108c
SS
377 total_size = total_entries * sizeof (struct unwind_table_entry);
378
379 /* Allocate memory for the unwind table. */
380 ui->table = (struct unwind_table_entry *)
8b92e4d5 381 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 382 ui->last = total_entries - 1;
c906108c 383
d4f3574e
SS
384 /* Now read in each unwind section and internalize the standard unwind
385 entries. */
c906108c 386 index = 0;
d4f3574e
SS
387 for (unwind_sec = objfile->obfd->sections;
388 unwind_sec;
389 unwind_sec = unwind_sec->next)
390 {
391 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
392 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
393 {
394 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
395 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
396
397 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
398 unwind_entries, unwind_size, text_offset);
399 index += unwind_entries;
400 }
401 }
402
403 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
404 if (stub_unwind_size > 0)
405 {
406 unsigned int i;
407 char *buf = alloca (stub_unwind_size);
408
409 /* Read in the stub unwind entries. */
410 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
411 0, stub_unwind_size);
412
413 /* Now convert them into regular unwind entries. */
414 for (i = 0; i < stub_entries; i++, index++)
415 {
416 /* Clear out the next unwind entry. */
417 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
418
1777feb0 419 /* Convert offset & size into region_start and region_end.
c906108c
SS
420 Stuff away the stub type into "reserved" fields. */
421 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
422 (bfd_byte *) buf);
423 ui->table[index].region_start += text_offset;
424 buf += 4;
425 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 426 (bfd_byte *) buf);
c906108c
SS
427 buf += 2;
428 ui->table[index].region_end
c5aa993b
JM
429 = ui->table[index].region_start + 4 *
430 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
431 buf += 2;
432 }
433
434 }
435
436 /* Unwind table needs to be kept sorted. */
437 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
438 compare_unwind_entries);
439
440 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
441 obj_private = (struct hppa_objfile_private *)
442 objfile_data (objfile, hppa_objfile_priv_data);
443 if (obj_private == NULL)
77d18ded
RC
444 obj_private = hppa_init_objfile_priv_data (objfile);
445
c906108c
SS
446 obj_private->unwind_info = ui;
447}
448
449/* Lookup the unwind (stack backtrace) info for the given PC. We search all
450 of the objfiles seeking the unwind table entry for this PC. Each objfile
451 contains a sorted list of struct unwind_table_entry. Since we do a binary
452 search of the unwind tables, we depend upon them to be sorted. */
453
454struct unwind_table_entry *
fba45db2 455find_unwind_entry (CORE_ADDR pc)
c906108c
SS
456{
457 int first, middle, last;
458 struct objfile *objfile;
7c46b9fb 459 struct hppa_objfile_private *priv;
c906108c 460
369aa520 461 if (hppa_debug)
5af949e3
UW
462 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
463 hex_string (pc));
369aa520 464
1777feb0 465 /* A function at address 0? Not in HP-UX! */
c906108c 466 if (pc == (CORE_ADDR) 0)
369aa520
RC
467 {
468 if (hppa_debug)
469 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
470 return NULL;
471 }
c906108c
SS
472
473 ALL_OBJFILES (objfile)
c5aa993b 474 {
7c46b9fb 475 struct hppa_unwind_info *ui;
c5aa993b 476 ui = NULL;
7c46b9fb
RC
477 priv = objfile_data (objfile, hppa_objfile_priv_data);
478 if (priv)
479 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 480
c5aa993b
JM
481 if (!ui)
482 {
483 read_unwind_info (objfile);
7c46b9fb
RC
484 priv = objfile_data (objfile, hppa_objfile_priv_data);
485 if (priv == NULL)
8a3fe4f8 486 error (_("Internal error reading unwind information."));
7c46b9fb 487 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 488 }
c906108c 489
1777feb0 490 /* First, check the cache. */
c906108c 491
c5aa993b
JM
492 if (ui->cache
493 && pc >= ui->cache->region_start
494 && pc <= ui->cache->region_end)
369aa520
RC
495 {
496 if (hppa_debug)
5af949e3
UW
497 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
498 hex_string ((uintptr_t) ui->cache));
369aa520
RC
499 return ui->cache;
500 }
c906108c 501
1777feb0 502 /* Not in the cache, do a binary search. */
c906108c 503
c5aa993b
JM
504 first = 0;
505 last = ui->last;
c906108c 506
c5aa993b
JM
507 while (first <= last)
508 {
509 middle = (first + last) / 2;
510 if (pc >= ui->table[middle].region_start
511 && pc <= ui->table[middle].region_end)
512 {
513 ui->cache = &ui->table[middle];
369aa520 514 if (hppa_debug)
5af949e3
UW
515 fprintf_unfiltered (gdb_stdlog, "%s }\n",
516 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
517 return &ui->table[middle];
518 }
c906108c 519
c5aa993b
JM
520 if (pc < ui->table[middle].region_start)
521 last = middle - 1;
522 else
523 first = middle + 1;
524 }
525 } /* ALL_OBJFILES() */
369aa520
RC
526
527 if (hppa_debug)
528 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
529
c906108c
SS
530 return NULL;
531}
532
1fb24930 533/* The epilogue is defined here as the area either on the `bv' instruction
1777feb0 534 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
535
536 We do not assume that the epilogue is at the end of a function as we can
537 also have return sequences in the middle of a function. */
538static int
539hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
540{
e17a4113 541 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
542 unsigned long status;
543 unsigned int inst;
e362b510 544 gdb_byte buf[4];
1fb24930 545
8defab1a 546 status = target_read_memory (pc, buf, 4);
1fb24930
RC
547 if (status != 0)
548 return 0;
549
e17a4113 550 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
551
552 /* The most common way to perform a stack adjustment ldo X(sp),sp
553 We are destroying a stack frame if the offset is negative. */
554 if ((inst & 0xffffc000) == 0x37de0000
555 && hppa_extract_14 (inst) < 0)
556 return 1;
557
558 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
559 if (((inst & 0x0fc010e0) == 0x0fc010e0
560 || (inst & 0x0fc010e0) == 0x0fc010e0)
561 && hppa_extract_14 (inst) < 0)
562 return 1;
563
564 /* bv %r0(%rp) or bv,n %r0(%rp) */
565 if (inst == 0xe840c000 || inst == 0xe840c002)
566 return 1;
567
568 return 0;
569}
570
85f4f2d8 571static const unsigned char *
67d57894 572hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 573{
56132691 574 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
575 (*len) = sizeof (breakpoint);
576 return breakpoint;
577}
578
e23457df
AC
579/* Return the name of a register. */
580
4a302917 581static const char *
d93859e2 582hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
583{
584 static char *names[] = {
585 "flags", "r1", "rp", "r3",
586 "r4", "r5", "r6", "r7",
587 "r8", "r9", "r10", "r11",
588 "r12", "r13", "r14", "r15",
589 "r16", "r17", "r18", "r19",
590 "r20", "r21", "r22", "r23",
591 "r24", "r25", "r26", "dp",
592 "ret0", "ret1", "sp", "r31",
593 "sar", "pcoqh", "pcsqh", "pcoqt",
594 "pcsqt", "eiem", "iir", "isr",
595 "ior", "ipsw", "goto", "sr4",
596 "sr0", "sr1", "sr2", "sr3",
597 "sr5", "sr6", "sr7", "cr0",
598 "cr8", "cr9", "ccr", "cr12",
599 "cr13", "cr24", "cr25", "cr26",
600 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
601 "fpsr", "fpe1", "fpe2", "fpe3",
602 "fpe4", "fpe5", "fpe6", "fpe7",
603 "fr4", "fr4R", "fr5", "fr5R",
604 "fr6", "fr6R", "fr7", "fr7R",
605 "fr8", "fr8R", "fr9", "fr9R",
606 "fr10", "fr10R", "fr11", "fr11R",
607 "fr12", "fr12R", "fr13", "fr13R",
608 "fr14", "fr14R", "fr15", "fr15R",
609 "fr16", "fr16R", "fr17", "fr17R",
610 "fr18", "fr18R", "fr19", "fr19R",
611 "fr20", "fr20R", "fr21", "fr21R",
612 "fr22", "fr22R", "fr23", "fr23R",
613 "fr24", "fr24R", "fr25", "fr25R",
614 "fr26", "fr26R", "fr27", "fr27R",
615 "fr28", "fr28R", "fr29", "fr29R",
616 "fr30", "fr30R", "fr31", "fr31R"
617 };
618 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
619 return NULL;
620 else
621 return names[i];
622}
623
4a302917 624static const char *
d93859e2 625hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
626{
627 static char *names[] = {
628 "flags", "r1", "rp", "r3",
629 "r4", "r5", "r6", "r7",
630 "r8", "r9", "r10", "r11",
631 "r12", "r13", "r14", "r15",
632 "r16", "r17", "r18", "r19",
633 "r20", "r21", "r22", "r23",
634 "r24", "r25", "r26", "dp",
635 "ret0", "ret1", "sp", "r31",
636 "sar", "pcoqh", "pcsqh", "pcoqt",
637 "pcsqt", "eiem", "iir", "isr",
638 "ior", "ipsw", "goto", "sr4",
639 "sr0", "sr1", "sr2", "sr3",
640 "sr5", "sr6", "sr7", "cr0",
641 "cr8", "cr9", "ccr", "cr12",
642 "cr13", "cr24", "cr25", "cr26",
643 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
644 "fpsr", "fpe1", "fpe2", "fpe3",
645 "fr4", "fr5", "fr6", "fr7",
646 "fr8", "fr9", "fr10", "fr11",
647 "fr12", "fr13", "fr14", "fr15",
648 "fr16", "fr17", "fr18", "fr19",
649 "fr20", "fr21", "fr22", "fr23",
650 "fr24", "fr25", "fr26", "fr27",
651 "fr28", "fr29", "fr30", "fr31"
652 };
653 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
654 return NULL;
655 else
656 return names[i];
657}
658
85c83e99 659/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 660static int
d3f73121 661hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 662{
85c83e99 663 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
664 if (reg <= 32)
665 return reg;
666
667 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 668 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
669 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
670
85c83e99 671 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
672 return -1;
673}
674
79508e1e
AC
675/* This function pushes a stack frame with arguments as part of the
676 inferior function calling mechanism.
677
678 This is the version of the function for the 32-bit PA machines, in
679 which later arguments appear at lower addresses. (The stack always
680 grows towards higher addresses.)
681
682 We simply allocate the appropriate amount of stack space and put
683 arguments into their proper slots. */
684
4a302917 685static CORE_ADDR
7d9b040b 686hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
687 struct regcache *regcache, CORE_ADDR bp_addr,
688 int nargs, struct value **args, CORE_ADDR sp,
689 int struct_return, CORE_ADDR struct_addr)
690{
e17a4113
UW
691 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
692
79508e1e
AC
693 /* Stack base address at which any pass-by-reference parameters are
694 stored. */
695 CORE_ADDR struct_end = 0;
696 /* Stack base address at which the first parameter is stored. */
697 CORE_ADDR param_end = 0;
698
699 /* The inner most end of the stack after all the parameters have
700 been pushed. */
701 CORE_ADDR new_sp = 0;
702
703 /* Two passes. First pass computes the location of everything,
704 second pass writes the bytes out. */
705 int write_pass;
d49771ef
RC
706
707 /* Global pointer (r19) of the function we are trying to call. */
708 CORE_ADDR gp;
709
710 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
711
79508e1e
AC
712 for (write_pass = 0; write_pass < 2; write_pass++)
713 {
1797a8f6 714 CORE_ADDR struct_ptr = 0;
1777feb0 715 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
716 struct_ptr is adjusted for each argument below, so the first
717 argument will end up at sp-36. */
718 CORE_ADDR param_ptr = 32;
79508e1e 719 int i;
2a6228ef
RC
720 int small_struct = 0;
721
79508e1e
AC
722 for (i = 0; i < nargs; i++)
723 {
724 struct value *arg = args[i];
4991999e 725 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
726 /* The corresponding parameter that is pushed onto the
727 stack, and [possibly] passed in a register. */
948f8e3d 728 gdb_byte param_val[8];
79508e1e
AC
729 int param_len;
730 memset (param_val, 0, sizeof param_val);
731 if (TYPE_LENGTH (type) > 8)
732 {
733 /* Large parameter, pass by reference. Store the value
734 in "struct" area and then pass its address. */
735 param_len = 4;
1797a8f6 736 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 737 if (write_pass)
0fd88904 738 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 739 TYPE_LENGTH (type));
e17a4113
UW
740 store_unsigned_integer (param_val, 4, byte_order,
741 struct_end - struct_ptr);
79508e1e
AC
742 }
743 else if (TYPE_CODE (type) == TYPE_CODE_INT
744 || TYPE_CODE (type) == TYPE_CODE_ENUM)
745 {
746 /* Integer value store, right aligned. "unpack_long"
747 takes care of any sign-extension problems. */
748 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 749 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 750 unpack_long (type,
0fd88904 751 value_contents (arg)));
79508e1e 752 }
2a6228ef
RC
753 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
754 {
755 /* Floating point value store, right aligned. */
756 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 757 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 758 }
79508e1e
AC
759 else
760 {
79508e1e 761 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
762
763 /* Small struct value are stored right-aligned. */
79508e1e 764 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 765 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
766
767 /* Structures of size 5, 6 and 7 bytes are special in that
768 the higher-ordered word is stored in the lower-ordered
769 argument, and even though it is a 8-byte quantity the
770 registers need not be 8-byte aligned. */
1b07b470 771 if (param_len > 4 && param_len < 8)
2a6228ef 772 small_struct = 1;
79508e1e 773 }
2a6228ef 774
1797a8f6 775 param_ptr += param_len;
2a6228ef
RC
776 if (param_len == 8 && !small_struct)
777 param_ptr = align_up (param_ptr, 8);
778
779 /* First 4 non-FP arguments are passed in gr26-gr23.
780 First 4 32-bit FP arguments are passed in fr4L-fr7L.
781 First 2 64-bit FP arguments are passed in fr5 and fr7.
782
783 The rest go on the stack, starting at sp-36, towards lower
784 addresses. 8-byte arguments must be aligned to a 8-byte
785 stack boundary. */
79508e1e
AC
786 if (write_pass)
787 {
1797a8f6 788 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
789
790 /* There are some cases when we don't know the type
791 expected by the callee (e.g. for variadic functions), so
792 pass the parameters in both general and fp regs. */
793 if (param_ptr <= 48)
79508e1e 794 {
2a6228ef
RC
795 int grreg = 26 - (param_ptr - 36) / 4;
796 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
797 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
798
799 regcache_cooked_write (regcache, grreg, param_val);
800 regcache_cooked_write (regcache, fpLreg, param_val);
801
79508e1e 802 if (param_len > 4)
2a6228ef
RC
803 {
804 regcache_cooked_write (regcache, grreg + 1,
805 param_val + 4);
806
807 regcache_cooked_write (regcache, fpreg, param_val);
808 regcache_cooked_write (regcache, fpreg + 1,
809 param_val + 4);
810 }
79508e1e
AC
811 }
812 }
813 }
814
815 /* Update the various stack pointers. */
816 if (!write_pass)
817 {
2a6228ef 818 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
819 /* PARAM_PTR already accounts for all the arguments passed
820 by the user. However, the ABI mandates minimum stack
821 space allocations for outgoing arguments. The ABI also
822 mandates minimum stack alignments which we must
823 preserve. */
2a6228ef 824 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
825 }
826 }
827
828 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 829 address. */
79508e1e 830 if (struct_return)
9c9acae0 831 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 832
e38c262f 833 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
834
835 if (gp != 0)
9c9acae0 836 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 837
79508e1e 838 /* Set the return address. */
77d18ded
RC
839 if (!gdbarch_push_dummy_code_p (gdbarch))
840 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 841
c4557624 842 /* Update the Stack Pointer. */
34f75cc1 843 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 844
2a6228ef 845 return param_end;
79508e1e
AC
846}
847
38ca4e0c
MK
848/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
849 Runtime Architecture for PA-RISC 2.0", which is distributed as part
850 as of the HP-UX Software Transition Kit (STK). This implementation
851 is based on version 3.3, dated October 6, 1997. */
2f690297 852
38ca4e0c 853/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 854
38ca4e0c
MK
855static int
856hppa64_integral_or_pointer_p (const struct type *type)
857{
858 switch (TYPE_CODE (type))
859 {
860 case TYPE_CODE_INT:
861 case TYPE_CODE_BOOL:
862 case TYPE_CODE_CHAR:
863 case TYPE_CODE_ENUM:
864 case TYPE_CODE_RANGE:
865 {
866 int len = TYPE_LENGTH (type);
867 return (len == 1 || len == 2 || len == 4 || len == 8);
868 }
869 case TYPE_CODE_PTR:
870 case TYPE_CODE_REF:
871 return (TYPE_LENGTH (type) == 8);
872 default:
873 break;
874 }
875
876 return 0;
877}
878
879/* Check whether TYPE is a "Floating Scalar Type". */
880
881static int
882hppa64_floating_p (const struct type *type)
883{
884 switch (TYPE_CODE (type))
885 {
886 case TYPE_CODE_FLT:
887 {
888 int len = TYPE_LENGTH (type);
889 return (len == 4 || len == 8 || len == 16);
890 }
891 default:
892 break;
893 }
894
895 return 0;
896}
2f690297 897
1218e655
RC
898/* If CODE points to a function entry address, try to look up the corresponding
899 function descriptor and return its address instead. If CODE is not a
900 function entry address, then just return it unchanged. */
901static CORE_ADDR
e17a4113 902hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 903{
e17a4113 904 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
905 struct obj_section *sec, *opd;
906
907 sec = find_pc_section (code);
908
909 if (!sec)
910 return code;
911
912 /* If CODE is in a data section, assume it's already a fptr. */
913 if (!(sec->the_bfd_section->flags & SEC_CODE))
914 return code;
915
916 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
917 {
918 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 919 break;
1218e655
RC
920 }
921
922 if (opd < sec->objfile->sections_end)
923 {
924 CORE_ADDR addr;
925
aded6f54
PA
926 for (addr = obj_section_addr (opd);
927 addr < obj_section_endaddr (opd);
928 addr += 2 * 8)
929 {
1218e655 930 ULONGEST opdaddr;
948f8e3d 931 gdb_byte tmp[8];
1218e655
RC
932
933 if (target_read_memory (addr, tmp, sizeof (tmp)))
934 break;
e17a4113 935 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 936
aded6f54 937 if (opdaddr == code)
1218e655
RC
938 return addr - 16;
939 }
940 }
941
942 return code;
943}
944
4a302917 945static CORE_ADDR
7d9b040b 946hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
947 struct regcache *regcache, CORE_ADDR bp_addr,
948 int nargs, struct value **args, CORE_ADDR sp,
949 int struct_return, CORE_ADDR struct_addr)
950{
38ca4e0c 951 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 952 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
953 int i, offset = 0;
954 CORE_ADDR gp;
2f690297 955
38ca4e0c
MK
956 /* "The outgoing parameter area [...] must be aligned at a 16-byte
957 boundary." */
958 sp = align_up (sp, 16);
2f690297 959
38ca4e0c
MK
960 for (i = 0; i < nargs; i++)
961 {
962 struct value *arg = args[i];
963 struct type *type = value_type (arg);
964 int len = TYPE_LENGTH (type);
0fd88904 965 const bfd_byte *valbuf;
1218e655 966 bfd_byte fptrbuf[8];
38ca4e0c 967 int regnum;
2f690297 968
38ca4e0c
MK
969 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
970 offset = align_up (offset, 8);
77d18ded 971
38ca4e0c 972 if (hppa64_integral_or_pointer_p (type))
2f690297 973 {
38ca4e0c
MK
974 /* "Integral scalar parameters smaller than 64 bits are
975 padded on the left (i.e., the value is in the
976 least-significant bits of the 64-bit storage unit, and
977 the high-order bits are undefined)." Therefore we can
978 safely sign-extend them. */
979 if (len < 8)
449e1137 980 {
df4df182 981 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
982 len = 8;
983 }
984 }
985 else if (hppa64_floating_p (type))
986 {
987 if (len > 8)
988 {
989 /* "Quad-precision (128-bit) floating-point scalar
990 parameters are aligned on a 16-byte boundary." */
991 offset = align_up (offset, 16);
992
993 /* "Double-extended- and quad-precision floating-point
994 parameters within the first 64 bytes of the parameter
995 list are always passed in general registers." */
449e1137
AC
996 }
997 else
998 {
38ca4e0c 999 if (len == 4)
449e1137 1000 {
38ca4e0c
MK
1001 /* "Single-precision (32-bit) floating-point scalar
1002 parameters are padded on the left with 32 bits of
1003 garbage (i.e., the floating-point value is in the
1004 least-significant 32 bits of a 64-bit storage
1005 unit)." */
1006 offset += 4;
449e1137 1007 }
38ca4e0c
MK
1008
1009 /* "Single- and double-precision floating-point
1010 parameters in this area are passed according to the
1011 available formal parameter information in a function
1012 prototype. [...] If no prototype is in scope,
1013 floating-point parameters must be passed both in the
1014 corresponding general registers and in the
1015 corresponding floating-point registers." */
1016 regnum = HPPA64_FP4_REGNUM + offset / 8;
1017
1018 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1019 {
38ca4e0c
MK
1020 /* "Single-precision floating-point parameters, when
1021 passed in floating-point registers, are passed in
1022 the right halves of the floating point registers;
1023 the left halves are unused." */
1024 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1025 len, value_contents (arg));
449e1137
AC
1026 }
1027 }
2f690297 1028 }
38ca4e0c 1029 else
2f690297 1030 {
38ca4e0c
MK
1031 if (len > 8)
1032 {
1033 /* "Aggregates larger than 8 bytes are aligned on a
1034 16-byte boundary, possibly leaving an unused argument
1777feb0 1035 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1036 they are padded on the right (with garbage), to a
1037 multiple of 8 bytes." */
1038 offset = align_up (offset, 16);
1039 }
1040 }
1041
1218e655
RC
1042 /* If we are passing a function pointer, make sure we pass a function
1043 descriptor instead of the function entry address. */
1044 if (TYPE_CODE (type) == TYPE_CODE_PTR
1045 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1046 {
1047 ULONGEST codeptr, fptr;
1048
1049 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1050 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1051 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1052 fptr);
1218e655
RC
1053 valbuf = fptrbuf;
1054 }
1055 else
1056 {
1057 valbuf = value_contents (arg);
1058 }
1059
38ca4e0c 1060 /* Always store the argument in memory. */
1218e655 1061 write_memory (sp + offset, valbuf, len);
38ca4e0c 1062
38ca4e0c
MK
1063 regnum = HPPA_ARG0_REGNUM - offset / 8;
1064 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1065 {
1066 regcache_cooked_write_part (regcache, regnum,
1067 offset % 8, min (len, 8), valbuf);
1068 offset += min (len, 8);
1069 valbuf += min (len, 8);
1070 len -= min (len, 8);
1071 regnum--;
2f690297 1072 }
38ca4e0c
MK
1073
1074 offset += len;
2f690297
AC
1075 }
1076
38ca4e0c
MK
1077 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1078 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1079
1080 /* Allocate the outgoing parameter area. Make sure the outgoing
1081 parameter area is multiple of 16 bytes in length. */
1082 sp += max (align_up (offset, 16), 64);
1083
1084 /* Allocate 32-bytes of scratch space. The documentation doesn't
1085 mention this, but it seems to be needed. */
1086 sp += 32;
1087
1088 /* Allocate the frame marker area. */
1089 sp += 16;
1090
1091 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1092 its address. */
2f690297 1093 if (struct_return)
38ca4e0c 1094 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1095
38ca4e0c 1096 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1097 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1098 if (gp != 0)
38ca4e0c 1099 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1100
38ca4e0c 1101 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1102 if (!gdbarch_push_dummy_code_p (gdbarch))
1103 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1104
38ca4e0c
MK
1105 /* Set up GR30 to hold the stack pointer (sp). */
1106 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1107
38ca4e0c 1108 return sp;
2f690297 1109}
38ca4e0c 1110\f
2f690297 1111
08a27113
MK
1112/* Handle 32/64-bit struct return conventions. */
1113
1114static enum return_value_convention
6a3a010b 1115hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1116 struct type *type, struct regcache *regcache,
e127f0db 1117 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1118{
1119 if (TYPE_LENGTH (type) <= 2 * 4)
1120 {
1121 /* The value always lives in the right hand end of the register
1122 (or register pair)? */
1123 int b;
1124 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1125 int part = TYPE_LENGTH (type) % 4;
1126 /* The left hand register contains only part of the value,
1127 transfer that first so that the rest can be xfered as entire
1128 4-byte registers. */
1129 if (part > 0)
1130 {
1131 if (readbuf != NULL)
1132 regcache_cooked_read_part (regcache, reg, 4 - part,
1133 part, readbuf);
1134 if (writebuf != NULL)
1135 regcache_cooked_write_part (regcache, reg, 4 - part,
1136 part, writebuf);
1137 reg++;
1138 }
1139 /* Now transfer the remaining register values. */
1140 for (b = part; b < TYPE_LENGTH (type); b += 4)
1141 {
1142 if (readbuf != NULL)
e127f0db 1143 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1144 if (writebuf != NULL)
e127f0db 1145 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1146 reg++;
1147 }
1148 return RETURN_VALUE_REGISTER_CONVENTION;
1149 }
1150 else
1151 return RETURN_VALUE_STRUCT_CONVENTION;
1152}
1153
1154static enum return_value_convention
6a3a010b 1155hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1156 struct type *type, struct regcache *regcache,
e127f0db 1157 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1158{
1159 int len = TYPE_LENGTH (type);
1160 int regnum, offset;
1161
bad43aa5 1162 if (len > 16)
08a27113
MK
1163 {
1164 /* All return values larget than 128 bits must be aggregate
1165 return values. */
9738b034
MK
1166 gdb_assert (!hppa64_integral_or_pointer_p (type));
1167 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1168
1169 /* "Aggregate return values larger than 128 bits are returned in
1170 a buffer allocated by the caller. The address of the buffer
1171 must be passed in GR 28." */
1172 return RETURN_VALUE_STRUCT_CONVENTION;
1173 }
1174
1175 if (hppa64_integral_or_pointer_p (type))
1176 {
1177 /* "Integral return values are returned in GR 28. Values
1178 smaller than 64 bits are padded on the left (with garbage)." */
1179 regnum = HPPA_RET0_REGNUM;
1180 offset = 8 - len;
1181 }
1182 else if (hppa64_floating_p (type))
1183 {
1184 if (len > 8)
1185 {
1186 /* "Double-extended- and quad-precision floating-point
1187 values are returned in GRs 28 and 29. The sign,
1188 exponent, and most-significant bits of the mantissa are
1189 returned in GR 28; the least-significant bits of the
1190 mantissa are passed in GR 29. For double-extended
1191 precision values, GR 29 is padded on the right with 48
1192 bits of garbage." */
1193 regnum = HPPA_RET0_REGNUM;
1194 offset = 0;
1195 }
1196 else
1197 {
1198 /* "Single-precision and double-precision floating-point
1199 return values are returned in FR 4R (single precision) or
1200 FR 4 (double-precision)." */
1201 regnum = HPPA64_FP4_REGNUM;
1202 offset = 8 - len;
1203 }
1204 }
1205 else
1206 {
1207 /* "Aggregate return values up to 64 bits in size are returned
1208 in GR 28. Aggregates smaller than 64 bits are left aligned
1209 in the register; the pad bits on the right are undefined."
1210
1211 "Aggregate return values between 65 and 128 bits are returned
1212 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1213 the remaining bits are placed, left aligned, in GR 29. The
1214 pad bits on the right of GR 29 (if any) are undefined." */
1215 regnum = HPPA_RET0_REGNUM;
1216 offset = 0;
1217 }
1218
1219 if (readbuf)
1220 {
08a27113
MK
1221 while (len > 0)
1222 {
1223 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1224 min (len, 8), readbuf);
1225 readbuf += min (len, 8);
08a27113
MK
1226 len -= min (len, 8);
1227 regnum++;
1228 }
1229 }
1230
1231 if (writebuf)
1232 {
08a27113
MK
1233 while (len > 0)
1234 {
1235 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1236 min (len, 8), writebuf);
1237 writebuf += min (len, 8);
08a27113
MK
1238 len -= min (len, 8);
1239 regnum++;
1240 }
1241 }
1242
1243 return RETURN_VALUE_REGISTER_CONVENTION;
1244}
1245\f
1246
d49771ef 1247static CORE_ADDR
a7aad9aa 1248hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1249 struct target_ops *targ)
1250{
1251 if (addr & 2)
1252 {
0dfff4cb 1253 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1254 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1255 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1256 }
1257
1258 return addr;
1259}
1260
1797a8f6
AC
1261static CORE_ADDR
1262hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1263{
1264 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1265 and not _bit_)! */
1266 return align_up (addr, 64);
1267}
1268
2f690297
AC
1269/* Force all frames to 16-byte alignment. Better safe than sorry. */
1270
1271static CORE_ADDR
1797a8f6 1272hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1273{
1274 /* Just always 16-byte align. */
1275 return align_up (addr, 16);
1276}
1277
cc72850f 1278CORE_ADDR
61a1198a 1279hppa_read_pc (struct regcache *regcache)
c906108c 1280{
cc72850f 1281 ULONGEST ipsw;
61a1198a 1282 ULONGEST pc;
c906108c 1283
61a1198a
UW
1284 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1285 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1286
1287 /* If the current instruction is nullified, then we are effectively
1288 still executing the previous instruction. Pretend we are still
cc72850f
MK
1289 there. This is needed when single stepping; if the nullified
1290 instruction is on a different line, we don't want GDB to think
1291 we've stepped onto that line. */
fe46cd3a
RC
1292 if (ipsw & 0x00200000)
1293 pc -= 4;
1294
cc72850f 1295 return pc & ~0x3;
c906108c
SS
1296}
1297
cc72850f 1298void
61a1198a 1299hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1300{
61a1198a
UW
1301 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1302 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1303}
1304
c906108c 1305/* For the given instruction (INST), return any adjustment it makes
1777feb0 1306 to the stack pointer or zero for no adjustment.
c906108c
SS
1307
1308 This only handles instructions commonly found in prologues. */
1309
1310static int
fba45db2 1311prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1312{
1313 /* This must persist across calls. */
1314 static int save_high21;
1315
1316 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1317 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1318 return hppa_extract_14 (inst);
c906108c
SS
1319
1320 /* stwm X,D(sp) */
1321 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1322 return hppa_extract_14 (inst);
c906108c 1323
104c1213
JM
1324 /* std,ma X,D(sp) */
1325 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1326 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1327
e22b26cb 1328 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1329 save high bits in save_high21 for later use. */
e22b26cb 1330 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1331 {
abc485a1 1332 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1333 return 0;
1334 }
1335
1336 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1337 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1338
1339 /* fstws as used by the HP compilers. */
1340 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1341 return hppa_extract_5_load (inst);
c906108c
SS
1342
1343 /* No adjustment. */
1344 return 0;
1345}
1346
1347/* Return nonzero if INST is a branch of some kind, else return zero. */
1348
1349static int
fba45db2 1350is_branch (unsigned long inst)
c906108c
SS
1351{
1352 switch (inst >> 26)
1353 {
1354 case 0x20:
1355 case 0x21:
1356 case 0x22:
1357 case 0x23:
7be570e7 1358 case 0x27:
c906108c
SS
1359 case 0x28:
1360 case 0x29:
1361 case 0x2a:
1362 case 0x2b:
7be570e7 1363 case 0x2f:
c906108c
SS
1364 case 0x30:
1365 case 0x31:
1366 case 0x32:
1367 case 0x33:
1368 case 0x38:
1369 case 0x39:
1370 case 0x3a:
7be570e7 1371 case 0x3b:
c906108c
SS
1372 return 1;
1373
1374 default:
1375 return 0;
1376 }
1377}
1378
1379/* Return the register number for a GR which is saved by INST or
1380 zero it INST does not save a GR. */
1381
1382static int
fba45db2 1383inst_saves_gr (unsigned long inst)
c906108c
SS
1384{
1385 /* Does it look like a stw? */
7be570e7
JM
1386 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1387 || (inst >> 26) == 0x1f
1388 || ((inst >> 26) == 0x1f
1389 && ((inst >> 6) == 0xa)))
abc485a1 1390 return hppa_extract_5R_store (inst);
7be570e7
JM
1391
1392 /* Does it look like a std? */
1393 if ((inst >> 26) == 0x1c
1394 || ((inst >> 26) == 0x03
1395 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1396 return hppa_extract_5R_store (inst);
c906108c 1397
1777feb0 1398 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
c906108c 1399 if ((inst >> 26) == 0x1b)
abc485a1 1400 return hppa_extract_5R_store (inst);
c906108c
SS
1401
1402 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1403 too. */
7be570e7
JM
1404 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1405 || ((inst >> 26) == 0x3
1406 && (((inst >> 6) & 0xf) == 0x8
1407 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1408 return hppa_extract_5R_store (inst);
c5aa993b 1409
c906108c
SS
1410 return 0;
1411}
1412
1413/* Return the register number for a FR which is saved by INST or
1414 zero it INST does not save a FR.
1415
1416 Note we only care about full 64bit register stores (that's the only
1417 kind of stores the prologue will use).
1418
1419 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1420
1421static int
fba45db2 1422inst_saves_fr (unsigned long inst)
c906108c 1423{
1777feb0 1424 /* Is this an FSTD? */
c906108c 1425 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1426 return hppa_extract_5r_store (inst);
7be570e7 1427 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1428 return hppa_extract_5R_store (inst);
1777feb0 1429 /* Is this an FSTW? */
c906108c 1430 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1431 return hppa_extract_5r_store (inst);
7be570e7 1432 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1433 return hppa_extract_5R_store (inst);
c906108c
SS
1434 return 0;
1435}
1436
1437/* Advance PC across any function entry prologue instructions
1777feb0 1438 to reach some "real" code.
c906108c
SS
1439
1440 Use information in the unwind table to determine what exactly should
1441 be in the prologue. */
1442
1443
a71f8c30 1444static CORE_ADDR
be8626e0
MD
1445skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1446 int stop_before_branch)
c906108c 1447{
e17a4113 1448 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1449 gdb_byte buf[4];
c906108c
SS
1450 CORE_ADDR orig_pc = pc;
1451 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1452 unsigned long args_stored, status, i, restart_gr, restart_fr;
1453 struct unwind_table_entry *u;
a71f8c30 1454 int final_iteration;
c906108c
SS
1455
1456 restart_gr = 0;
1457 restart_fr = 0;
1458
1459restart:
1460 u = find_unwind_entry (pc);
1461 if (!u)
1462 return pc;
1463
1777feb0 1464 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1465 if ((pc & ~0x3) != u->region_start)
1466 return pc;
1467
1468 /* This is how much of a frame adjustment we need to account for. */
1469 stack_remaining = u->Total_frame_size << 3;
1470
1471 /* Magic register saves we want to know about. */
1472 save_rp = u->Save_RP;
1473 save_sp = u->Save_SP;
1474
1475 /* An indication that args may be stored into the stack. Unfortunately
1476 the HPUX compilers tend to set this in cases where no args were
1477 stored too!. */
1478 args_stored = 1;
1479
1480 /* Turn the Entry_GR field into a bitmask. */
1481 save_gr = 0;
1482 for (i = 3; i < u->Entry_GR + 3; i++)
1483 {
1484 /* Frame pointer gets saved into a special location. */
eded0a31 1485 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1486 continue;
1487
1488 save_gr |= (1 << i);
1489 }
1490 save_gr &= ~restart_gr;
1491
1492 /* Turn the Entry_FR field into a bitmask too. */
1493 save_fr = 0;
1494 for (i = 12; i < u->Entry_FR + 12; i++)
1495 save_fr |= (1 << i);
1496 save_fr &= ~restart_fr;
1497
a71f8c30
RC
1498 final_iteration = 0;
1499
c906108c
SS
1500 /* Loop until we find everything of interest or hit a branch.
1501
1502 For unoptimized GCC code and for any HP CC code this will never ever
1503 examine any user instructions.
1504
1505 For optimzied GCC code we're faced with problems. GCC will schedule
1506 its prologue and make prologue instructions available for delay slot
1507 filling. The end result is user code gets mixed in with the prologue
1508 and a prologue instruction may be in the delay slot of the first branch
1509 or call.
1510
1511 Some unexpected things are expected with debugging optimized code, so
1512 we allow this routine to walk past user instructions in optimized
1513 GCC code. */
1514 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1515 || args_stored)
1516 {
1517 unsigned int reg_num;
1518 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1519 unsigned long old_save_rp, old_save_sp, next_inst;
1520
1521 /* Save copies of all the triggers so we can compare them later
c5aa993b 1522 (only for HPC). */
c906108c
SS
1523 old_save_gr = save_gr;
1524 old_save_fr = save_fr;
1525 old_save_rp = save_rp;
1526 old_save_sp = save_sp;
1527 old_stack_remaining = stack_remaining;
1528
8defab1a 1529 status = target_read_memory (pc, buf, 4);
e17a4113 1530 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1531
c906108c
SS
1532 /* Yow! */
1533 if (status != 0)
1534 return pc;
1535
1536 /* Note the interesting effects of this instruction. */
1537 stack_remaining -= prologue_inst_adjust_sp (inst);
1538
7be570e7
JM
1539 /* There are limited ways to store the return pointer into the
1540 stack. */
c4c79048 1541 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1542 save_rp = 0;
1543
104c1213 1544 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1545 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1546 if ((inst & 0xffffc000) == 0x6fc10000
1547 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1548 save_sp = 0;
1549
6426a772
JM
1550 /* Are we loading some register with an offset from the argument
1551 pointer? */
1552 if ((inst & 0xffe00000) == 0x37a00000
1553 || (inst & 0xffffffe0) == 0x081d0240)
1554 {
1555 pc += 4;
1556 continue;
1557 }
1558
c906108c
SS
1559 /* Account for general and floating-point register saves. */
1560 reg_num = inst_saves_gr (inst);
1561 save_gr &= ~(1 << reg_num);
1562
1563 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1564 Unfortunately args_stored only tells us that some arguments
1565 where stored into the stack. Not how many or what kind!
c906108c 1566
c5aa993b
JM
1567 This is a kludge as on the HP compiler sets this bit and it
1568 never does prologue scheduling. So once we see one, skip past
1569 all of them. We have similar code for the fp arg stores below.
c906108c 1570
c5aa993b
JM
1571 FIXME. Can still die if we have a mix of GR and FR argument
1572 stores! */
be8626e0 1573 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1574 && reg_num <= 26)
c906108c 1575 {
be8626e0 1576 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1577 && reg_num <= 26)
c906108c
SS
1578 {
1579 pc += 4;
8defab1a 1580 status = target_read_memory (pc, buf, 4);
e17a4113 1581 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1582 if (status != 0)
1583 return pc;
1584 reg_num = inst_saves_gr (inst);
1585 }
1586 args_stored = 0;
1587 continue;
1588 }
1589
1590 reg_num = inst_saves_fr (inst);
1591 save_fr &= ~(1 << reg_num);
1592
8defab1a 1593 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1594 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1595
c906108c
SS
1596 /* Yow! */
1597 if (status != 0)
1598 return pc;
1599
1600 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1601 save. */
c906108c
SS
1602 if ((inst & 0xfc000000) == 0x34000000
1603 && inst_saves_fr (next_inst) >= 4
819844ad 1604 && inst_saves_fr (next_inst)
be8626e0 1605 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1606 {
1607 /* So we drop into the code below in a reasonable state. */
1608 reg_num = inst_saves_fr (next_inst);
1609 pc -= 4;
1610 }
1611
1612 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1613 This is a kludge as on the HP compiler sets this bit and it
1614 never does prologue scheduling. So once we see one, skip past
1615 all of them. */
819844ad 1616 if (reg_num >= 4
be8626e0 1617 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1618 {
819844ad
UW
1619 while (reg_num >= 4
1620 && reg_num
be8626e0 1621 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1622 {
1623 pc += 8;
8defab1a 1624 status = target_read_memory (pc, buf, 4);
e17a4113 1625 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1626 if (status != 0)
1627 return pc;
1628 if ((inst & 0xfc000000) != 0x34000000)
1629 break;
8defab1a 1630 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1631 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1632 if (status != 0)
1633 return pc;
1634 reg_num = inst_saves_fr (next_inst);
1635 }
1636 args_stored = 0;
1637 continue;
1638 }
1639
1640 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1641 instruction is in the delay slot of the first call/branch. */
a71f8c30 1642 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1643 break;
1644
1645 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1646 arguments were stored into the stack (boo hiss). This could
1647 cause this code to then skip a bunch of user insns (up to the
1648 first branch).
1649
1650 To combat this we try to identify when args_stored was bogusly
1651 set and clear it. We only do this when args_stored is nonzero,
1652 all other resources are accounted for, and nothing changed on
1653 this pass. */
c906108c 1654 if (args_stored
c5aa993b 1655 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1656 && old_save_gr == save_gr && old_save_fr == save_fr
1657 && old_save_rp == save_rp && old_save_sp == save_sp
1658 && old_stack_remaining == stack_remaining)
1659 break;
c5aa993b 1660
c906108c
SS
1661 /* Bump the PC. */
1662 pc += 4;
a71f8c30
RC
1663
1664 /* !stop_before_branch, so also look at the insn in the delay slot
1665 of the branch. */
1666 if (final_iteration)
1667 break;
1668 if (is_branch (inst))
1669 final_iteration = 1;
c906108c
SS
1670 }
1671
1672 /* We've got a tenative location for the end of the prologue. However
1673 because of limitations in the unwind descriptor mechanism we may
1674 have went too far into user code looking for the save of a register
1675 that does not exist. So, if there registers we expected to be saved
1676 but never were, mask them out and restart.
1677
1678 This should only happen in optimized code, and should be very rare. */
c5aa993b 1679 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1680 {
1681 pc = orig_pc;
1682 restart_gr = save_gr;
1683 restart_fr = save_fr;
1684 goto restart;
1685 }
1686
1687 return pc;
1688}
1689
1690
7be570e7
JM
1691/* Return the address of the PC after the last prologue instruction if
1692 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1693
1694static CORE_ADDR
fba45db2 1695after_prologue (CORE_ADDR pc)
c906108c
SS
1696{
1697 struct symtab_and_line sal;
1698 CORE_ADDR func_addr, func_end;
c906108c 1699
7be570e7
JM
1700 /* If we can not find the symbol in the partial symbol table, then
1701 there is no hope we can determine the function's start address
1702 with this code. */
c906108c 1703 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1704 return 0;
c906108c 1705
7be570e7 1706 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1707 sal = find_pc_line (func_addr, 0);
1708
7be570e7
JM
1709 /* There are only two cases to consider. First, the end of the source line
1710 is within the function bounds. In that case we return the end of the
1711 source line. Second is the end of the source line extends beyond the
1712 bounds of the current function. We need to use the slow code to
1777feb0 1713 examine instructions in that case.
c906108c 1714
7be570e7
JM
1715 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1716 the wrong thing to do. In fact, it should be entirely possible for this
1717 function to always return zero since the slow instruction scanning code
1718 is supposed to *always* work. If it does not, then it is a bug. */
1719 if (sal.end < func_end)
1720 return sal.end;
c5aa993b 1721 else
7be570e7 1722 return 0;
c906108c
SS
1723}
1724
1725/* To skip prologues, I use this predicate. Returns either PC itself
1726 if the code at PC does not look like a function prologue; otherwise
1777feb0 1727 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1728
1729 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1730 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1731 we might not want to skip all the insns because a prologue insn may
1732 appear in the delay slot of the first branch, and we don't want to
1733 skip over the branch in that case. */
c906108c 1734
8d153463 1735static CORE_ADDR
6093d2eb 1736hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1737{
c5aa993b 1738 CORE_ADDR post_prologue_pc;
c906108c 1739
c5aa993b
JM
1740 /* See if we can determine the end of the prologue via the symbol table.
1741 If so, then return either PC, or the PC after the prologue, whichever
1742 is greater. */
c906108c 1743
c5aa993b 1744 post_prologue_pc = after_prologue (pc);
c906108c 1745
7be570e7
JM
1746 /* If after_prologue returned a useful address, then use it. Else
1747 fall back on the instruction skipping code.
1748
1749 Some folks have claimed this causes problems because the breakpoint
1750 may be the first instruction of the prologue. If that happens, then
1751 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1752 if (post_prologue_pc != 0)
1753 return max (pc, post_prologue_pc);
c5aa993b 1754 else
be8626e0 1755 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1756}
1757
29d375ac 1758/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1759
29d375ac 1760static struct unwind_table_entry *
227e86ad 1761hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1762{
227e86ad 1763 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1764
1765 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1766 result of get_frame_address_in_block implies a problem.
93d42b30 1767 The bits should have been removed earlier, before the return
c7ce8faa 1768 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1769 if it isn't, it should be fixed. Then this call can be
1770 removed. */
227e86ad 1771 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1772 return find_unwind_entry (pc);
1773}
1774
26d08f08
AC
1775struct hppa_frame_cache
1776{
1777 CORE_ADDR base;
1778 struct trad_frame_saved_reg *saved_regs;
1779};
1780
1781static struct hppa_frame_cache *
227e86ad 1782hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1783{
227e86ad 1784 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1785 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1786 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1787 struct hppa_frame_cache *cache;
1788 long saved_gr_mask;
1789 long saved_fr_mask;
26d08f08
AC
1790 long frame_size;
1791 struct unwind_table_entry *u;
9f7194c3 1792 CORE_ADDR prologue_end;
50b2f48a 1793 int fp_in_r1 = 0;
26d08f08
AC
1794 int i;
1795
369aa520
RC
1796 if (hppa_debug)
1797 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1798 frame_relative_level(this_frame));
369aa520 1799
26d08f08 1800 if ((*this_cache) != NULL)
369aa520
RC
1801 {
1802 if (hppa_debug)
5af949e3
UW
1803 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1804 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
369aa520
RC
1805 return (*this_cache);
1806 }
26d08f08
AC
1807 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1808 (*this_cache) = cache;
227e86ad 1809 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1810
1811 /* Yow! */
227e86ad 1812 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1813 if (!u)
369aa520
RC
1814 {
1815 if (hppa_debug)
1816 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1817 return (*this_cache);
1818 }
26d08f08
AC
1819
1820 /* Turn the Entry_GR field into a bitmask. */
1821 saved_gr_mask = 0;
1822 for (i = 3; i < u->Entry_GR + 3; i++)
1823 {
1824 /* Frame pointer gets saved into a special location. */
eded0a31 1825 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1826 continue;
1827
1828 saved_gr_mask |= (1 << i);
1829 }
1830
1831 /* Turn the Entry_FR field into a bitmask too. */
1832 saved_fr_mask = 0;
1833 for (i = 12; i < u->Entry_FR + 12; i++)
1834 saved_fr_mask |= (1 << i);
1835
1836 /* Loop until we find everything of interest or hit a branch.
1837
1838 For unoptimized GCC code and for any HP CC code this will never ever
1839 examine any user instructions.
1840
1841 For optimized GCC code we're faced with problems. GCC will schedule
1842 its prologue and make prologue instructions available for delay slot
1843 filling. The end result is user code gets mixed in with the prologue
1844 and a prologue instruction may be in the delay slot of the first branch
1845 or call.
1846
1847 Some unexpected things are expected with debugging optimized code, so
1848 we allow this routine to walk past user instructions in optimized
1849 GCC code. */
1850 {
1851 int final_iteration = 0;
46acf081 1852 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1853 int looking_for_sp = u->Save_SP;
1854 int looking_for_rp = u->Save_RP;
1855 int fp_loc = -1;
9f7194c3 1856
a71f8c30 1857 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1858 skip_prologue_using_sal, in case we stepped into a function without
1859 symbol information. hppa_skip_prologue also bounds the returned
1860 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1861 function.
a71f8c30
RC
1862
1863 We used to call hppa_skip_prologue to find the end of the prologue,
1864 but if some non-prologue instructions get scheduled into the prologue,
1865 and the program is compiled with debug information, the "easy" way
1866 in hppa_skip_prologue will return a prologue end that is too early
1867 for us to notice any potential frame adjustments. */
d5c27f81 1868
ef02daa9
DJ
1869 /* We used to use get_frame_func to locate the beginning of the
1870 function to pass to skip_prologue. However, when objects are
1871 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1872 function (or 0). We can do better than that by using unwind records.
46acf081 1873 This only works if the Region_description of the unwind record
1777feb0 1874 indicates that it includes the entry point of the function.
46acf081
RC
1875 HP compilers sometimes generate unwind records for regions that
1876 do not include the entry or exit point of a function. GNU tools
1877 do not do this. */
1878
1879 if ((u->Region_description & 0x2) == 0)
1880 start_pc = u->region_start;
1881 else
227e86ad 1882 start_pc = get_frame_func (this_frame);
d5c27f81 1883
be8626e0 1884 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1885 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1886
1887 if (prologue_end != 0 && end_pc > prologue_end)
1888 end_pc = prologue_end;
1889
26d08f08 1890 frame_size = 0;
9f7194c3 1891
46acf081 1892 for (pc = start_pc;
26d08f08
AC
1893 ((saved_gr_mask || saved_fr_mask
1894 || looking_for_sp || looking_for_rp
1895 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1896 && pc < end_pc);
26d08f08
AC
1897 pc += 4)
1898 {
1899 int reg;
e362b510 1900 gdb_byte buf4[4];
4a302917
RC
1901 long inst;
1902
227e86ad 1903 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1904 {
5af949e3
UW
1905 error (_("Cannot read instruction at %s."),
1906 paddress (gdbarch, pc));
4a302917
RC
1907 return (*this_cache);
1908 }
1909
e17a4113 1910 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1911
26d08f08
AC
1912 /* Note the interesting effects of this instruction. */
1913 frame_size += prologue_inst_adjust_sp (inst);
1914
1915 /* There are limited ways to store the return pointer into the
1916 stack. */
1917 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1918 {
1919 looking_for_rp = 0;
34f75cc1 1920 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1921 }
dfaf8edb
MK
1922 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1923 {
1924 looking_for_rp = 0;
1925 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1926 }
c4c79048
RC
1927 else if (inst == 0x0fc212c1
1928 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1929 {
1930 looking_for_rp = 0;
34f75cc1 1931 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1932 }
1933
1934 /* Check to see if we saved SP into the stack. This also
1935 happens to indicate the location of the saved frame
1936 pointer. */
1937 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1938 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1939 {
1940 looking_for_sp = 0;
eded0a31 1941 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 1942 }
50b2f48a
RC
1943 else if (inst == 0x08030241) /* copy %r3, %r1 */
1944 {
1945 fp_in_r1 = 1;
1946 }
26d08f08
AC
1947
1948 /* Account for general and floating-point register saves. */
1949 reg = inst_saves_gr (inst);
1950 if (reg >= 3 && reg <= 18
eded0a31 1951 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1952 {
1953 saved_gr_mask &= ~(1 << reg);
abc485a1 1954 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1955 /* stwm with a positive displacement is a _post_
1956 _modify_. */
1957 cache->saved_regs[reg].addr = 0;
1958 else if ((inst & 0xfc00000c) == 0x70000008)
1959 /* A std has explicit post_modify forms. */
1960 cache->saved_regs[reg].addr = 0;
1961 else
1962 {
1963 CORE_ADDR offset;
1964
1965 if ((inst >> 26) == 0x1c)
1777feb0
MS
1966 offset = (inst & 0x1 ? -1 << 13 : 0)
1967 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 1968 else if ((inst >> 26) == 0x03)
abc485a1 1969 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1970 else
abc485a1 1971 offset = hppa_extract_14 (inst);
26d08f08
AC
1972
1973 /* Handle code with and without frame pointers. */
1974 if (u->Save_SP)
1975 cache->saved_regs[reg].addr = offset;
1976 else
1777feb0
MS
1977 cache->saved_regs[reg].addr
1978 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
1979 }
1980 }
1981
1982 /* GCC handles callee saved FP regs a little differently.
1983
1984 It emits an instruction to put the value of the start of
1985 the FP store area into %r1. It then uses fstds,ma with a
1986 basereg of %r1 for the stores.
1987
1988 HP CC emits them at the current stack pointer modifying the
1989 stack pointer as it stores each register. */
1990
1991 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1992 if ((inst & 0xffffc000) == 0x34610000
1993 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 1994 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
1995
1996 reg = inst_saves_fr (inst);
1997 if (reg >= 12 && reg <= 21)
1998 {
1999 /* Note +4 braindamage below is necessary because the FP
2000 status registers are internally 8 registers rather than
2001 the expected 4 registers. */
2002 saved_fr_mask &= ~(1 << reg);
2003 if (fp_loc == -1)
2004 {
2005 /* 1st HP CC FP register store. After this
2006 instruction we've set enough state that the GCC and
2007 HPCC code are both handled in the same manner. */
34f75cc1 2008 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2009 fp_loc = 8;
2010 }
2011 else
2012 {
eded0a31 2013 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2014 fp_loc += 8;
2015 }
2016 }
2017
1777feb0 2018 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2019 if (final_iteration)
2020 break;
2021 /* We want to look precisely one instruction beyond the branch
2022 if we have not found everything yet. */
2023 if (is_branch (inst))
2024 final_iteration = 1;
2025 }
2026 }
2027
2028 {
2029 /* The frame base always represents the value of %sp at entry to
2030 the current function (and is thus equivalent to the "saved"
2031 stack pointer. */
227e86ad
JB
2032 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2033 HPPA_SP_REGNUM);
ed70ba00 2034 CORE_ADDR fp;
9f7194c3
RC
2035
2036 if (hppa_debug)
5af949e3
UW
2037 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2038 "prologue_end=%s) ",
2039 paddress (gdbarch, this_sp),
2040 paddress (gdbarch, get_frame_pc (this_frame)),
2041 paddress (gdbarch, prologue_end));
9f7194c3 2042
ed70ba00
RC
2043 /* Check to see if a frame pointer is available, and use it for
2044 frame unwinding if it is.
2045
2046 There are some situations where we need to rely on the frame
2047 pointer to do stack unwinding. For example, if a function calls
2048 alloca (), the stack pointer can get adjusted inside the body of
2049 the function. In this case, the ABI requires that the compiler
2050 maintain a frame pointer for the function.
2051
2052 The unwind record has a flag (alloca_frame) that indicates that
2053 a function has a variable frame; unfortunately, gcc/binutils
2054 does not set this flag. Instead, whenever a frame pointer is used
2055 and saved on the stack, the Save_SP flag is set. We use this to
2056 decide whether to use the frame pointer for unwinding.
2057
ed70ba00
RC
2058 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2059 instead of Save_SP. */
2060
227e86ad 2061 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2062
6fcecea0 2063 if (u->alloca_frame)
46acf081 2064 fp -= u->Total_frame_size << 3;
ed70ba00 2065
227e86ad 2066 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2067 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2068 {
2069 cache->base = fp;
2070
2071 if (hppa_debug)
5af949e3
UW
2072 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2073 paddress (gdbarch, cache->base));
ed70ba00 2074 }
1658da49
RC
2075 else if (u->Save_SP
2076 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2077 {
9f7194c3
RC
2078 /* Both we're expecting the SP to be saved and the SP has been
2079 saved. The entry SP value is saved at this frame's SP
2080 address. */
e17a4113 2081 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2082
2083 if (hppa_debug)
5af949e3
UW
2084 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2085 paddress (gdbarch, cache->base));
9f7194c3 2086 }
26d08f08 2087 else
9f7194c3 2088 {
1658da49
RC
2089 /* The prologue has been slowly allocating stack space. Adjust
2090 the SP back. */
2091 cache->base = this_sp - frame_size;
9f7194c3 2092 if (hppa_debug)
5af949e3
UW
2093 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2094 paddress (gdbarch, cache->base));
9f7194c3
RC
2095
2096 }
eded0a31 2097 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2098 }
2099
412275d5
AC
2100 /* The PC is found in the "return register", "Millicode" uses "r31"
2101 as the return register while normal code uses "rp". */
26d08f08 2102 if (u->Millicode)
9f7194c3 2103 {
5859efe5 2104 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2105 {
2106 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2107 if (hppa_debug)
2108 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2109 }
9f7194c3
RC
2110 else
2111 {
227e86ad 2112 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2113 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2114 if (hppa_debug)
2115 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2116 }
2117 }
26d08f08 2118 else
9f7194c3 2119 {
34f75cc1 2120 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2121 {
2122 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2123 cache->saved_regs[HPPA_RP_REGNUM];
2124 if (hppa_debug)
2125 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2126 }
9f7194c3
RC
2127 else
2128 {
227e86ad
JB
2129 ULONGEST rp = get_frame_register_unsigned (this_frame,
2130 HPPA_RP_REGNUM);
34f75cc1 2131 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2132 if (hppa_debug)
2133 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2134 }
2135 }
26d08f08 2136
50b2f48a
RC
2137 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2138 frame. However, there is a one-insn window where we haven't saved it
2139 yet, but we've already clobbered it. Detect this case and fix it up.
2140
2141 The prologue sequence for frame-pointer functions is:
2142 0: stw %rp, -20(%sp)
2143 4: copy %r3, %r1
2144 8: copy %sp, %r3
2145 c: stw,ma %r1, XX(%sp)
2146
2147 So if we are at offset c, the r3 value that we want is not yet saved
2148 on the stack, but it's been overwritten. The prologue analyzer will
2149 set fp_in_r1 when it sees the copy insn so we know to get the value
2150 from r1 instead. */
2151 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2152 && fp_in_r1)
2153 {
227e86ad 2154 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2155 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2156 }
1658da49 2157
26d08f08
AC
2158 {
2159 /* Convert all the offsets into addresses. */
2160 int reg;
65c5db89 2161 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2162 {
2163 if (trad_frame_addr_p (cache->saved_regs, reg))
2164 cache->saved_regs[reg].addr += cache->base;
2165 }
2166 }
2167
f77a2124 2168 {
f77a2124
RC
2169 struct gdbarch_tdep *tdep;
2170
f77a2124
RC
2171 tdep = gdbarch_tdep (gdbarch);
2172
2173 if (tdep->unwind_adjust_stub)
227e86ad 2174 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2175 }
2176
369aa520 2177 if (hppa_debug)
5af949e3
UW
2178 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2179 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2180 return (*this_cache);
2181}
2182
2183static void
227e86ad
JB
2184hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2185 struct frame_id *this_id)
26d08f08 2186{
d5c27f81 2187 struct hppa_frame_cache *info;
227e86ad 2188 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2189 struct unwind_table_entry *u;
2190
227e86ad
JB
2191 info = hppa_frame_cache (this_frame, this_cache);
2192 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2193
2194 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2195}
2196
227e86ad
JB
2197static struct value *
2198hppa_frame_prev_register (struct frame_info *this_frame,
2199 void **this_cache, int regnum)
26d08f08 2200{
227e86ad
JB
2201 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2202
1777feb0
MS
2203 return hppa_frame_prev_register_helper (this_frame,
2204 info->saved_regs, regnum);
227e86ad
JB
2205}
2206
2207static int
2208hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2209 struct frame_info *this_frame, void **this_cache)
2210{
2211 if (hppa_find_unwind_entry_in_block (this_frame))
2212 return 1;
2213
2214 return 0;
0da28f8a
RC
2215}
2216
2217static const struct frame_unwind hppa_frame_unwind =
2218{
2219 NORMAL_FRAME,
8fbca658 2220 default_frame_unwind_stop_reason,
0da28f8a 2221 hppa_frame_this_id,
227e86ad
JB
2222 hppa_frame_prev_register,
2223 NULL,
2224 hppa_frame_unwind_sniffer
0da28f8a
RC
2225};
2226
0da28f8a
RC
2227/* This is a generic fallback frame unwinder that kicks in if we fail all
2228 the other ones. Normally we would expect the stub and regular unwinder
2229 to work, but in some cases we might hit a function that just doesn't
2230 have any unwind information available. In this case we try to do
2231 unwinding solely based on code reading. This is obviously going to be
2232 slow, so only use this as a last resort. Currently this will only
2233 identify the stack and pc for the frame. */
2234
2235static struct hppa_frame_cache *
227e86ad 2236hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2237{
e17a4113
UW
2238 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2239 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2240 struct hppa_frame_cache *cache;
4ba6a975
MK
2241 unsigned int frame_size = 0;
2242 int found_rp = 0;
2243 CORE_ADDR start_pc;
0da28f8a 2244
d5c27f81 2245 if (hppa_debug)
4ba6a975
MK
2246 fprintf_unfiltered (gdb_stdlog,
2247 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2248 frame_relative_level (this_frame));
d5c27f81 2249
0da28f8a
RC
2250 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2251 (*this_cache) = cache;
227e86ad 2252 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2253
227e86ad 2254 start_pc = get_frame_func (this_frame);
4ba6a975 2255 if (start_pc)
0da28f8a 2256 {
227e86ad 2257 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2258 CORE_ADDR pc;
0da28f8a 2259
4ba6a975
MK
2260 for (pc = start_pc; pc < cur_pc; pc += 4)
2261 {
2262 unsigned int insn;
0da28f8a 2263
e17a4113 2264 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2265 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2266
4ba6a975
MK
2267 /* There are limited ways to store the return pointer into the
2268 stack. */
2269 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2270 {
2271 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2272 found_rp = 1;
2273 }
c4c79048
RC
2274 else if (insn == 0x0fc212c1
2275 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2276 {
2277 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2278 found_rp = 1;
2279 }
2280 }
412275d5 2281 }
0da28f8a 2282
d5c27f81 2283 if (hppa_debug)
4ba6a975
MK
2284 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2285 frame_size, found_rp);
d5c27f81 2286
227e86ad 2287 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2288 cache->base -= frame_size;
6d1be3f1 2289 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2290
2291 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2292 {
2293 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2294 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2295 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2296 }
412275d5
AC
2297 else
2298 {
4ba6a975 2299 ULONGEST rp;
227e86ad 2300 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2301 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2302 }
0da28f8a
RC
2303
2304 return cache;
26d08f08
AC
2305}
2306
0da28f8a 2307static void
227e86ad 2308hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2309 struct frame_id *this_id)
2310{
2311 struct hppa_frame_cache *info =
227e86ad
JB
2312 hppa_fallback_frame_cache (this_frame, this_cache);
2313
2314 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2315}
2316
227e86ad
JB
2317static struct value *
2318hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2319 void **this_cache, int regnum)
0da28f8a 2320{
1777feb0
MS
2321 struct hppa_frame_cache *info
2322 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2323
1777feb0
MS
2324 return hppa_frame_prev_register_helper (this_frame,
2325 info->saved_regs, regnum);
0da28f8a
RC
2326}
2327
2328static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2329{
2330 NORMAL_FRAME,
8fbca658 2331 default_frame_unwind_stop_reason,
0da28f8a 2332 hppa_fallback_frame_this_id,
227e86ad
JB
2333 hppa_fallback_frame_prev_register,
2334 NULL,
2335 default_frame_sniffer
26d08f08
AC
2336};
2337
7f07c5b6
RC
2338/* Stub frames, used for all kinds of call stubs. */
2339struct hppa_stub_unwind_cache
2340{
2341 CORE_ADDR base;
2342 struct trad_frame_saved_reg *saved_regs;
2343};
2344
2345static struct hppa_stub_unwind_cache *
227e86ad 2346hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2347 void **this_cache)
2348{
227e86ad 2349 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2350 struct hppa_stub_unwind_cache *info;
22b0923d 2351 struct unwind_table_entry *u;
7f07c5b6
RC
2352
2353 if (*this_cache)
2354 return *this_cache;
2355
2356 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2357 *this_cache = info;
227e86ad 2358 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2359
227e86ad 2360 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2361
090ccbb7 2362 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2363 {
2364 /* HPUX uses export stubs in function calls; the export stub clobbers
2365 the return value of the caller, and, later restores it from the
2366 stack. */
227e86ad 2367 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2368
2369 if (u && u->stub_unwind.stub_type == EXPORT)
2370 {
2371 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2372
2373 return info;
2374 }
2375 }
2376
2377 /* By default we assume that stubs do not change the rp. */
2378 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2379
7f07c5b6
RC
2380 return info;
2381}
2382
2383static void
227e86ad 2384hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2385 void **this_prologue_cache,
2386 struct frame_id *this_id)
2387{
2388 struct hppa_stub_unwind_cache *info
227e86ad 2389 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2390
2391 if (info)
227e86ad 2392 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2393}
2394
227e86ad
JB
2395static struct value *
2396hppa_stub_frame_prev_register (struct frame_info *this_frame,
2397 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2398{
2399 struct hppa_stub_unwind_cache *info
227e86ad 2400 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2401
227e86ad 2402 if (info == NULL)
8a3fe4f8 2403 error (_("Requesting registers from null frame."));
7f07c5b6 2404
1777feb0
MS
2405 return hppa_frame_prev_register_helper (this_frame,
2406 info->saved_regs, regnum);
227e86ad 2407}
7f07c5b6 2408
227e86ad
JB
2409static int
2410hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2411 struct frame_info *this_frame,
2412 void **this_cache)
7f07c5b6 2413{
227e86ad
JB
2414 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2415 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2416 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2417
6d1be3f1 2418 if (pc == 0
84674fe1 2419 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2420 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2421 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2422 return 1;
2423 return 0;
7f07c5b6
RC
2424}
2425
227e86ad
JB
2426static const struct frame_unwind hppa_stub_frame_unwind = {
2427 NORMAL_FRAME,
8fbca658 2428 default_frame_unwind_stop_reason,
227e86ad
JB
2429 hppa_stub_frame_this_id,
2430 hppa_stub_frame_prev_register,
2431 NULL,
2432 hppa_stub_unwind_sniffer
2433};
2434
26d08f08 2435static struct frame_id
227e86ad 2436hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2437{
227e86ad
JB
2438 return frame_id_build (get_frame_register_unsigned (this_frame,
2439 HPPA_SP_REGNUM),
2440 get_frame_pc (this_frame));
26d08f08
AC
2441}
2442
cc72850f 2443CORE_ADDR
26d08f08
AC
2444hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2445{
fe46cd3a
RC
2446 ULONGEST ipsw;
2447 CORE_ADDR pc;
2448
cc72850f
MK
2449 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2450 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2451
2452 /* If the current instruction is nullified, then we are effectively
2453 still executing the previous instruction. Pretend we are still
cc72850f
MK
2454 there. This is needed when single stepping; if the nullified
2455 instruction is on a different line, we don't want GDB to think
2456 we've stepped onto that line. */
fe46cd3a
RC
2457 if (ipsw & 0x00200000)
2458 pc -= 4;
2459
cc72850f 2460 return pc & ~0x3;
26d08f08
AC
2461}
2462
ff644745
JB
2463/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2464 Return NULL if no such symbol was found. */
2465
2466struct minimal_symbol *
2467hppa_lookup_stub_minimal_symbol (const char *name,
2468 enum unwind_stub_types stub_type)
2469{
2470 struct objfile *objfile;
2471 struct minimal_symbol *msym;
2472
2473 ALL_MSYMBOLS (objfile, msym)
2474 {
2475 if (strcmp (SYMBOL_LINKAGE_NAME (msym), name) == 0)
2476 {
2477 struct unwind_table_entry *u;
2478
2479 u = find_unwind_entry (SYMBOL_VALUE (msym));
2480 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2481 return msym;
2482 }
2483 }
2484
2485 return NULL;
2486}
2487
c906108c 2488static void
fba45db2 2489unwind_command (char *exp, int from_tty)
c906108c
SS
2490{
2491 CORE_ADDR address;
2492 struct unwind_table_entry *u;
2493
2494 /* If we have an expression, evaluate it and use it as the address. */
2495
2496 if (exp != 0 && *exp != 0)
2497 address = parse_and_eval_address (exp);
2498 else
2499 return;
2500
2501 u = find_unwind_entry (address);
2502
2503 if (!u)
2504 {
2505 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2506 return;
2507 }
2508
3329c4b5 2509 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2510
5af949e3 2511 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2512 gdb_flush (gdb_stdout);
c906108c 2513
5af949e3 2514 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2515 gdb_flush (gdb_stdout);
c906108c 2516
c906108c 2517#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2518
2519 printf_unfiltered ("\n\tflags =");
2520 pif (Cannot_unwind);
2521 pif (Millicode);
2522 pif (Millicode_save_sr0);
2523 pif (Entry_SR);
2524 pif (Args_stored);
2525 pif (Variable_Frame);
2526 pif (Separate_Package_Body);
2527 pif (Frame_Extension_Millicode);
2528 pif (Stack_Overflow_Check);
2529 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2530 pif (sr4export);
2531 pif (cxx_info);
2532 pif (cxx_try_catch);
2533 pif (sched_entry_seq);
c906108c
SS
2534 pif (Save_SP);
2535 pif (Save_RP);
2536 pif (Save_MRP_in_frame);
6fcecea0 2537 pif (save_r19);
c906108c
SS
2538 pif (Cleanup_defined);
2539 pif (MPE_XL_interrupt_marker);
2540 pif (HP_UX_interrupt_marker);
2541 pif (Large_frame);
6fcecea0 2542 pif (alloca_frame);
c906108c
SS
2543
2544 putchar_unfiltered ('\n');
2545
c906108c 2546#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2547
2548 pin (Region_description);
2549 pin (Entry_FR);
2550 pin (Entry_GR);
2551 pin (Total_frame_size);
57dac9e1
RC
2552
2553 if (u->stub_unwind.stub_type)
2554 {
2555 printf_unfiltered ("\tstub type = ");
2556 switch (u->stub_unwind.stub_type)
2557 {
2558 case LONG_BRANCH:
2559 printf_unfiltered ("long branch\n");
2560 break;
2561 case PARAMETER_RELOCATION:
2562 printf_unfiltered ("parameter relocation\n");
2563 break;
2564 case EXPORT:
2565 printf_unfiltered ("export\n");
2566 break;
2567 case IMPORT:
2568 printf_unfiltered ("import\n");
2569 break;
2570 case IMPORT_SHLIB:
2571 printf_unfiltered ("import shlib\n");
2572 break;
2573 default:
2574 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2575 }
2576 }
c906108c 2577}
c906108c 2578
38ca4e0c
MK
2579/* Return the GDB type object for the "standard" data type of data in
2580 register REGNUM. */
d709c020 2581
eded0a31 2582static struct type *
38ca4e0c 2583hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2584{
38ca4e0c 2585 if (regnum < HPPA_FP4_REGNUM)
df4df182 2586 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2587 else
27067745 2588 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2589}
2590
eded0a31 2591static struct type *
38ca4e0c 2592hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2593{
38ca4e0c 2594 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2595 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2596 else
27067745 2597 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2598}
2599
38ca4e0c
MK
2600/* Return non-zero if REGNUM is not a register available to the user
2601 through ptrace/ttrace. */
d709c020 2602
8d153463 2603static int
64a3914f 2604hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2605{
2606 return (regnum == 0
34f75cc1
RC
2607 || regnum == HPPA_PCSQ_HEAD_REGNUM
2608 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2609 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2610}
d709c020 2611
d037d088 2612static int
64a3914f 2613hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2614{
2615 /* cr26 and cr27 are readable (but not writable) from userspace. */
2616 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2617 return 0;
2618 else
64a3914f 2619 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2620}
2621
38ca4e0c 2622static int
64a3914f 2623hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2624{
2625 return (regnum == 0
2626 || regnum == HPPA_PCSQ_HEAD_REGNUM
2627 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2628 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2629}
2630
d037d088 2631static int
64a3914f 2632hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2633{
2634 /* cr26 and cr27 are readable (but not writable) from userspace. */
2635 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2636 return 0;
2637 else
64a3914f 2638 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2639}
2640
8d153463 2641static CORE_ADDR
85ddcc70 2642hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2643{
2644 /* The low two bits of the PC on the PA contain the privilege level.
2645 Some genius implementing a (non-GCC) compiler apparently decided
2646 this means that "addresses" in a text section therefore include a
2647 privilege level, and thus symbol tables should contain these bits.
2648 This seems like a bonehead thing to do--anyway, it seems to work
2649 for our purposes to just ignore those bits. */
2650
2651 return (addr &= ~0x3);
2652}
2653
e127f0db
MK
2654/* Get the ARGIth function argument for the current function. */
2655
4a302917 2656static CORE_ADDR
143985b7
AF
2657hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2658 struct type *type)
2659{
e127f0db 2660 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2661}
2662
05d1431c 2663static enum register_status
0f8d9d59 2664hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2665 int regnum, gdb_byte *buf)
0f8d9d59 2666{
05d1431c
PA
2667 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2668 ULONGEST tmp;
2669 enum register_status status;
0f8d9d59 2670
05d1431c
PA
2671 status = regcache_raw_read_unsigned (regcache, regnum, &tmp);
2672 if (status == REG_VALID)
2673 {
2674 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2675 tmp &= ~0x3;
2676 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2677 }
2678 return status;
0f8d9d59
RC
2679}
2680
d49771ef 2681static CORE_ADDR
e38c262f 2682hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2683{
2684 return 0;
2685}
2686
227e86ad
JB
2687struct value *
2688hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2689 struct trad_frame_saved_reg saved_regs[],
227e86ad 2690 int regnum)
0da28f8a 2691{
227e86ad 2692 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2693 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2694
8693c419
MK
2695 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2696 {
227e86ad
JB
2697 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2698 CORE_ADDR pc;
2699 struct value *pcoq_val =
2700 trad_frame_get_prev_register (this_frame, saved_regs,
2701 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2702
e17a4113
UW
2703 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2704 size, byte_order);
227e86ad 2705 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2706 }
0da28f8a 2707
cc72850f
MK
2708 /* Make sure the "flags" register is zero in all unwound frames.
2709 The "flags" registers is a HP-UX specific wart, and only the code
2710 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2711 with it here. This shouldn't affect other systems since those
2712 should provide zero for the "flags" register anyway. */
2713 if (regnum == HPPA_FLAGS_REGNUM)
227e86ad 2714 return frame_unwind_got_constant (this_frame, regnum, 0);
cc72850f 2715
227e86ad 2716 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2717}
8693c419 2718\f
0da28f8a 2719
34f55018
MK
2720/* An instruction to match. */
2721struct insn_pattern
2722{
2723 unsigned int data; /* See if it matches this.... */
2724 unsigned int mask; /* ... with this mask. */
2725};
2726
2727/* See bfd/elf32-hppa.c */
2728static struct insn_pattern hppa_long_branch_stub[] = {
2729 /* ldil LR'xxx,%r1 */
2730 { 0x20200000, 0xffe00000 },
2731 /* be,n RR'xxx(%sr4,%r1) */
2732 { 0xe0202002, 0xffe02002 },
2733 { 0, 0 }
2734};
2735
2736static struct insn_pattern hppa_long_branch_pic_stub[] = {
2737 /* b,l .+8, %r1 */
2738 { 0xe8200000, 0xffe00000 },
2739 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2740 { 0x28200000, 0xffe00000 },
2741 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2742 { 0xe0202002, 0xffe02002 },
2743 { 0, 0 }
2744};
2745
2746static struct insn_pattern hppa_import_stub[] = {
2747 /* addil LR'xxx, %dp */
2748 { 0x2b600000, 0xffe00000 },
2749 /* ldw RR'xxx(%r1), %r21 */
2750 { 0x48350000, 0xffffb000 },
2751 /* bv %r0(%r21) */
2752 { 0xeaa0c000, 0xffffffff },
2753 /* ldw RR'xxx+4(%r1), %r19 */
2754 { 0x48330000, 0xffffb000 },
2755 { 0, 0 }
2756};
2757
2758static struct insn_pattern hppa_import_pic_stub[] = {
2759 /* addil LR'xxx,%r19 */
2760 { 0x2a600000, 0xffe00000 },
2761 /* ldw RR'xxx(%r1),%r21 */
2762 { 0x48350000, 0xffffb000 },
2763 /* bv %r0(%r21) */
2764 { 0xeaa0c000, 0xffffffff },
2765 /* ldw RR'xxx+4(%r1),%r19 */
2766 { 0x48330000, 0xffffb000 },
2767 { 0, 0 },
2768};
2769
2770static struct insn_pattern hppa_plt_stub[] = {
2771 /* b,l 1b, %r20 - 1b is 3 insns before here */
2772 { 0xea9f1fdd, 0xffffffff },
2773 /* depi 0,31,2,%r20 */
2774 { 0xd6801c1e, 0xffffffff },
2775 { 0, 0 }
2776};
2777
2778static struct insn_pattern hppa_sigtramp[] = {
2779 /* ldi 0, %r25 or ldi 1, %r25 */
2780 { 0x34190000, 0xfffffffd },
2781 /* ldi __NR_rt_sigreturn, %r20 */
2782 { 0x3414015a, 0xffffffff },
2783 /* be,l 0x100(%sr2, %r0), %sr0, %r31 */
2784 { 0xe4008200, 0xffffffff },
2785 /* nop */
2786 { 0x08000240, 0xffffffff },
2787 { 0, 0 }
2788};
2789
2790/* Maximum number of instructions on the patterns above. */
2791#define HPPA_MAX_INSN_PATTERN_LEN 4
2792
2793/* Return non-zero if the instructions at PC match the series
2794 described in PATTERN, or zero otherwise. PATTERN is an array of
2795 'struct insn_pattern' objects, terminated by an entry whose mask is
2796 zero.
2797
2798 When the match is successful, fill INSN[i] with what PATTERN[i]
2799 matched. */
2800
2801static int
e17a4113
UW
2802hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2803 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2804{
e17a4113 2805 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2806 CORE_ADDR npc = pc;
2807 int i;
2808
2809 for (i = 0; pattern[i].mask; i++)
2810 {
2811 gdb_byte buf[HPPA_INSN_SIZE];
2812
8defab1a 2813 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2814 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2815 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2816 npc += 4;
2817 else
2818 return 0;
2819 }
2820
2821 return 1;
2822}
2823
2824/* This relaxed version of the insstruction matcher allows us to match
2825 from somewhere inside the pattern, by looking backwards in the
2826 instruction scheme. */
2827
2828static int
e17a4113
UW
2829hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2830 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2831{
2832 int offset, len = 0;
2833
2834 while (pattern[len].mask)
2835 len++;
2836
2837 for (offset = 0; offset < len; offset++)
e17a4113
UW
2838 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2839 pattern, insn))
34f55018
MK
2840 return 1;
2841
2842 return 0;
2843}
2844
2845static int
2846hppa_in_dyncall (CORE_ADDR pc)
2847{
2848 struct unwind_table_entry *u;
2849
2850 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2851 if (!u)
2852 return 0;
2853
2854 return (pc >= u->region_start && pc <= u->region_end);
2855}
2856
2857int
3e5d3a5a 2858hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2859{
2860 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2861 struct unwind_table_entry *u;
2862
3e5d3a5a 2863 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2864 return 1;
2865
2866 /* The GNU toolchain produces linker stubs without unwind
2867 information. Since the pattern matching for linker stubs can be
2868 quite slow, so bail out if we do have an unwind entry. */
2869
2870 u = find_unwind_entry (pc);
806e23c0 2871 if (u != NULL)
34f55018
MK
2872 return 0;
2873
e17a4113
UW
2874 return
2875 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2876 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2877 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2878 || hppa_match_insns_relaxed (gdbarch, pc,
2879 hppa_long_branch_pic_stub, insn));
34f55018
MK
2880}
2881
2882/* This code skips several kind of "trampolines" used on PA-RISC
2883 systems: $$dyncall, import stubs and PLT stubs. */
2884
2885CORE_ADDR
52f729a7 2886hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2887{
0dfff4cb
UW
2888 struct gdbarch *gdbarch = get_frame_arch (frame);
2889 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2890
34f55018
MK
2891 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2892 int dp_rel;
2893
2894 /* $$dyncall handles both PLABELs and direct addresses. */
2895 if (hppa_in_dyncall (pc))
2896 {
52f729a7 2897 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2898
2899 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2900 if (pc & 0x2)
0dfff4cb 2901 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2902
2903 return pc;
2904 }
2905
e17a4113
UW
2906 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2907 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2908 {
2909 /* Extract the target address from the addil/ldw sequence. */
2910 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2911
2912 if (dp_rel)
52f729a7 2913 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2914 else
52f729a7 2915 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2916
2917 /* fallthrough */
2918 }
2919
3e5d3a5a 2920 if (in_plt_section (pc))
34f55018 2921 {
0dfff4cb 2922 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2923
2924 /* If the PLT slot has not yet been resolved, the target will be
2925 the PLT stub. */
3e5d3a5a 2926 if (in_plt_section (pc))
34f55018
MK
2927 {
2928 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 2929 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2930 {
5af949e3
UW
2931 warning (_("Cannot resolve PLT stub at %s."),
2932 paddress (gdbarch, pc));
34f55018
MK
2933 return 0;
2934 }
2935
2936 /* This should point to the fixup routine. */
0dfff4cb 2937 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2938 }
2939 }
2940
2941 return pc;
2942}
2943\f
2944
8e8b2dba
MC
2945/* Here is a table of C type sizes on hppa with various compiles
2946 and options. I measured this on PA 9000/800 with HP-UX 11.11
2947 and these compilers:
2948
2949 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2950 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2951 /opt/aCC/bin/aCC B3910B A.03.45
2952 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2953
2954 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2955 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2956 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2957 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2958 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2959 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2960 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2961 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2962
2963 Each line is:
2964
2965 compiler and options
2966 char, short, int, long, long long
2967 float, double, long double
2968 char *, void (*)()
2969
2970 So all these compilers use either ILP32 or LP64 model.
2971 TODO: gcc has more options so it needs more investigation.
2972
a2379359
MC
2973 For floating point types, see:
2974
2975 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2976 HP-UX floating-point guide, hpux 11.00
2977
8e8b2dba
MC
2978 -- chastain 2003-12-18 */
2979
e6e68f1f
JB
2980static struct gdbarch *
2981hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2982{
3ff7cf9e 2983 struct gdbarch_tdep *tdep;
e6e68f1f 2984 struct gdbarch *gdbarch;
59623e27
JB
2985
2986 /* Try to determine the ABI of the object we are loading. */
4be87837 2987 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2988 {
4be87837
DJ
2989 /* If it's a SOM file, assume it's HP/UX SOM. */
2990 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2991 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 2992 }
e6e68f1f
JB
2993
2994 /* find a candidate among the list of pre-declared architectures. */
2995 arches = gdbarch_list_lookup_by_info (arches, &info);
2996 if (arches != NULL)
2997 return (arches->gdbarch);
2998
2999 /* If none found, then allocate and initialize one. */
fdd72f95 3000 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
3001 gdbarch = gdbarch_alloc (&info, tdep);
3002
3003 /* Determine from the bfd_arch_info structure if we are dealing with
3004 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3005 then default to a 32bit machine. */
3006 if (info.bfd_arch_info != NULL)
3007 tdep->bytes_per_address =
3008 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3009 else
3010 tdep->bytes_per_address = 4;
3011
d49771ef
RC
3012 tdep->find_global_pointer = hppa_find_global_pointer;
3013
3ff7cf9e
JB
3014 /* Some parts of the gdbarch vector depend on whether we are running
3015 on a 32 bits or 64 bits target. */
3016 switch (tdep->bytes_per_address)
3017 {
3018 case 4:
3019 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3020 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3021 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3022 set_gdbarch_cannot_store_register (gdbarch,
3023 hppa32_cannot_store_register);
3024 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3025 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3026 break;
3027 case 8:
3028 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3029 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3030 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3031 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3032 set_gdbarch_cannot_store_register (gdbarch,
3033 hppa64_cannot_store_register);
3034 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3035 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3036 break;
3037 default:
e2e0b3e5 3038 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3039 tdep->bytes_per_address);
3040 }
3041
3ff7cf9e 3042 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3043 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3044
8e8b2dba
MC
3045 /* The following gdbarch vector elements are the same in both ILP32
3046 and LP64, but might show differences some day. */
3047 set_gdbarch_long_long_bit (gdbarch, 64);
3048 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3049 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3050
3ff7cf9e
JB
3051 /* The following gdbarch vector elements do not depend on the address
3052 size, or in any other gdbarch element previously set. */
60383d10 3053 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3054 set_gdbarch_in_function_epilogue_p (gdbarch,
3055 hppa_in_function_epilogue_p);
a2a84a72 3056 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3057 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3058 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3059 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3060 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3061 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3062 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3063
143985b7
AF
3064 /* Helper for function argument information. */
3065 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3066
36482093
AC
3067 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3068
3a3bc038
AC
3069 /* When a hardware watchpoint triggers, we'll move the inferior past
3070 it by removing all eventpoints; stepping past the instruction
3071 that caused the trigger; reinserting eventpoints; and checking
3072 whether any watched location changed. */
3073 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3074
5979bc46 3075 /* Inferior function call methods. */
fca7aa43 3076 switch (tdep->bytes_per_address)
5979bc46 3077 {
fca7aa43
AC
3078 case 4:
3079 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3080 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3081 set_gdbarch_convert_from_func_ptr_addr
3082 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3083 break;
3084 case 8:
782eae8b
AC
3085 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3086 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3087 break;
782eae8b 3088 default:
e2e0b3e5 3089 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3090 }
3091
3092 /* Struct return methods. */
fca7aa43 3093 switch (tdep->bytes_per_address)
fad850b2 3094 {
fca7aa43
AC
3095 case 4:
3096 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3097 break;
3098 case 8:
782eae8b 3099 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3100 break;
fca7aa43 3101 default:
e2e0b3e5 3102 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3103 }
7f07c5b6 3104
85f4f2d8 3105 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3106 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3107
5979bc46 3108 /* Frame unwind methods. */
227e86ad 3109 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3110 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3111
50306a9d
RC
3112 /* Hook in ABI-specific overrides, if they have been registered. */
3113 gdbarch_init_osabi (info, gdbarch);
3114
7f07c5b6 3115 /* Hook in the default unwinders. */
227e86ad
JB
3116 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3117 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3118 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3119
e6e68f1f
JB
3120 return gdbarch;
3121}
3122
3123static void
464963c9 3124hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3125{
464963c9 3126 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3127
3128 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3129 tdep->bytes_per_address);
3130 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3131}
3132
72753510
PA
3133/* Provide a prototype to silence -Wmissing-prototypes. */
3134extern initialize_file_ftype _initialize_hppa_tdep;
3135
4facf7e8
JB
3136void
3137_initialize_hppa_tdep (void)
3138{
3139 struct cmd_list_element *c;
4facf7e8 3140
e6e68f1f 3141 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3142
7c46b9fb
RC
3143 hppa_objfile_priv_data = register_objfile_data ();
3144
4facf7e8 3145 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3146 _("Print unwind table entry at given address."),
4facf7e8
JB
3147 &maintenanceprintlist);
3148
1777feb0 3149 /* Debug this files internals. */
7915a72c
AC
3150 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3151Set whether hppa target specific debugging information should be displayed."),
3152 _("\
3153Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3154This flag controls whether hppa target specific debugging information is\n\
3155displayed. This information is particularly useful for debugging frame\n\
7915a72c 3156unwinding problems."),
2c5b56ce 3157 NULL,
7915a72c 3158 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3159 &setdebuglist, &showdebuglist);
4facf7e8 3160}
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