merge from gcc
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
0b302171
JB
3 Copyright (C) 1986-1987, 1989-1996, 1998-2005, 2007-2012 Free
4 Software Foundation, Inc.
c906108c
SS
5
6 Contributed by the Center for Software Science at the
7 University of Utah (pa-gdb-bugs@cs.utah.edu).
8
c5aa993b 9 This file is part of GDB.
c906108c 10
c5aa993b
JM
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
a9762ec7 13 the Free Software Foundation; either version 3 of the License, or
c5aa993b 14 (at your option) any later version.
c906108c 15
c5aa993b
JM
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
c906108c 20
c5aa993b 21 You should have received a copy of the GNU General Public License
a9762ec7 22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
23
24#include "defs.h"
c906108c
SS
25#include "bfd.h"
26#include "inferior.h"
4e052eda 27#include "regcache.h"
e5d66720 28#include "completer.h"
59623e27 29#include "osabi.h"
a7ff40e7 30#include "gdb_assert.h"
343af405 31#include "arch-utils.h"
1777feb0 32/* For argument passing to the inferior. */
c906108c 33#include "symtab.h"
fde2cceb 34#include "dis-asm.h"
26d08f08
AC
35#include "trad-frame.h"
36#include "frame-unwind.h"
37#include "frame-base.h"
c906108c 38
c906108c
SS
39#include "gdbcore.h"
40#include "gdbcmd.h"
e6bb342a 41#include "gdbtypes.h"
c906108c 42#include "objfiles.h"
3ff7cf9e 43#include "hppa-tdep.h"
c906108c 44
369aa520
RC
45static int hppa_debug = 0;
46
60383d10 47/* Some local constants. */
3ff7cf9e
JB
48static const int hppa32_num_regs = 128;
49static const int hppa64_num_regs = 96;
50
7c46b9fb
RC
51/* hppa-specific object data -- unwind and solib info.
52 TODO/maybe: think about splitting this into two parts; the unwind data is
53 common to all hppa targets, but is only used in this file; we can register
54 that separately and make this static. The solib data is probably hpux-
55 specific, so we can create a separate extern objfile_data that is registered
56 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
57const struct objfile_data *hppa_objfile_priv_data = NULL;
58
1777feb0 59/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
60#define MASK_5 0x1f
61#define MASK_11 0x7ff
62#define MASK_14 0x3fff
63#define MASK_21 0x1fffff
64
e2ac8128
JB
65/* Sizes (in bytes) of the native unwind entries. */
66#define UNWIND_ENTRY_SIZE 16
67#define STUB_UNWIND_ENTRY_SIZE 8
68
c906108c 69/* Routines to extract various sized constants out of hppa
1777feb0 70 instructions. */
c906108c
SS
71
72/* This assumes that no garbage lies outside of the lower bits of
1777feb0 73 value. */
c906108c 74
63807e1d 75static int
abc485a1 76hppa_sign_extend (unsigned val, unsigned bits)
c906108c 77{
c5aa993b 78 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
79}
80
1777feb0 81/* For many immediate values the sign bit is the low bit! */
c906108c 82
63807e1d 83static int
abc485a1 84hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 85{
c5aa993b 86 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
87}
88
e2ac8128 89/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 90 (MSB = 0). */
e2ac8128 91
abc485a1
RC
92int
93hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
94{
95 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
96}
97
1777feb0 98/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 99
abc485a1
RC
100int
101hppa_extract_5_load (unsigned word)
c906108c 102{
abc485a1 103 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
104}
105
1777feb0 106/* Extract the immediate field from a break instruction. */
c906108c 107
abc485a1
RC
108unsigned
109hppa_extract_5r_store (unsigned word)
c906108c
SS
110{
111 return (word & MASK_5);
112}
113
1777feb0 114/* Extract the immediate field from a {sr}sm instruction. */
c906108c 115
abc485a1
RC
116unsigned
117hppa_extract_5R_store (unsigned word)
c906108c
SS
118{
119 return (word >> 16 & MASK_5);
120}
121
1777feb0 122/* Extract a 14 bit immediate field. */
c906108c 123
abc485a1
RC
124int
125hppa_extract_14 (unsigned word)
c906108c 126{
abc485a1 127 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
128}
129
1777feb0 130/* Extract a 21 bit constant. */
c906108c 131
abc485a1
RC
132int
133hppa_extract_21 (unsigned word)
c906108c
SS
134{
135 int val;
136
137 word &= MASK_21;
138 word <<= 11;
abc485a1 139 val = hppa_get_field (word, 20, 20);
c906108c 140 val <<= 11;
abc485a1 141 val |= hppa_get_field (word, 9, 19);
c906108c 142 val <<= 2;
abc485a1 143 val |= hppa_get_field (word, 5, 6);
c906108c 144 val <<= 5;
abc485a1 145 val |= hppa_get_field (word, 0, 4);
c906108c 146 val <<= 2;
abc485a1
RC
147 val |= hppa_get_field (word, 7, 8);
148 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
149}
150
c906108c 151/* extract a 17 bit constant from branch instructions, returning the
1777feb0 152 19 bit signed value. */
c906108c 153
abc485a1
RC
154int
155hppa_extract_17 (unsigned word)
c906108c 156{
abc485a1
RC
157 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
158 hppa_get_field (word, 29, 29) << 10 |
159 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
160 (word & 0x1) << 16, 17) << 2;
161}
3388d7ff
RC
162
163CORE_ADDR
164hppa_symbol_address(const char *sym)
165{
166 struct minimal_symbol *minsym;
167
168 minsym = lookup_minimal_symbol (sym, NULL, NULL);
169 if (minsym)
170 return SYMBOL_VALUE_ADDRESS (minsym);
171 else
172 return (CORE_ADDR)-1;
173}
77d18ded
RC
174
175struct hppa_objfile_private *
176hppa_init_objfile_priv_data (struct objfile *objfile)
177{
178 struct hppa_objfile_private *priv;
179
180 priv = (struct hppa_objfile_private *)
181 obstack_alloc (&objfile->objfile_obstack,
182 sizeof (struct hppa_objfile_private));
183 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
184 memset (priv, 0, sizeof (*priv));
185
186 return priv;
187}
c906108c
SS
188\f
189
190/* Compare the start address for two unwind entries returning 1 if
191 the first address is larger than the second, -1 if the second is
192 larger than the first, and zero if they are equal. */
193
194static int
fba45db2 195compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
196{
197 const struct unwind_table_entry *a = arg1;
198 const struct unwind_table_entry *b = arg2;
199
200 if (a->region_start > b->region_start)
201 return 1;
202 else if (a->region_start < b->region_start)
203 return -1;
204 else
205 return 0;
206}
207
53a5351d 208static void
fdd72f95 209record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 210{
fdd72f95 211 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 212 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
213 {
214 bfd_vma value = section->vma - section->filepos;
215 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
216
217 if (value < *low_text_segment_address)
218 *low_text_segment_address = value;
219 }
53a5351d
JM
220}
221
c906108c 222static void
fba45db2 223internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0
MS
224 asection *section, unsigned int entries,
225 unsigned int size, CORE_ADDR text_offset)
c906108c
SS
226{
227 /* We will read the unwind entries into temporary memory, then
228 fill in the actual unwind table. */
fdd72f95 229
c906108c
SS
230 if (size > 0)
231 {
5db8bbe5 232 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
233 unsigned long tmp;
234 unsigned i;
235 char *buf = alloca (size);
fdd72f95 236 CORE_ADDR low_text_segment_address;
c906108c 237
fdd72f95 238 /* For ELF targets, then unwinds are supposed to
1777feb0 239 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
240
241 Note that when loading a shared library (text_offset != 0) the
242 unwinds are already relative to the text_offset that will be
243 passed in. */
5db8bbe5 244 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 245 {
fdd72f95
RC
246 low_text_segment_address = -1;
247
53a5351d 248 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
249 record_text_segment_lowaddr,
250 &low_text_segment_address);
53a5351d 251
fdd72f95 252 text_offset = low_text_segment_address;
53a5351d 253 }
5db8bbe5 254 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 255 {
5db8bbe5 256 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 257 }
53a5351d 258
c906108c
SS
259 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
260
261 /* Now internalize the information being careful to handle host/target
c5aa993b 262 endian issues. */
c906108c
SS
263 for (i = 0; i < entries; i++)
264 {
265 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 266 (bfd_byte *) buf);
c906108c
SS
267 table[i].region_start += text_offset;
268 buf += 4;
c5aa993b 269 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
270 table[i].region_end += text_offset;
271 buf += 4;
c5aa993b 272 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
273 buf += 4;
274 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
275 table[i].Millicode = (tmp >> 30) & 0x1;
276 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
277 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 278 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
279 table[i].Entry_SR = (tmp >> 25) & 0x1;
280 table[i].Entry_FR = (tmp >> 21) & 0xf;
281 table[i].Entry_GR = (tmp >> 16) & 0x1f;
282 table[i].Args_stored = (tmp >> 15) & 0x1;
283 table[i].Variable_Frame = (tmp >> 14) & 0x1;
284 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
285 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
286 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
287 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 288 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
289 table[i].cxx_info = (tmp >> 8) & 0x1;
290 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
291 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 292 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
293 table[i].Save_SP = (tmp >> 4) & 0x1;
294 table[i].Save_RP = (tmp >> 3) & 0x1;
295 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 296 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 297 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 298 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
299 buf += 4;
300 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
301 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
302 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
303 table[i].alloca_frame = (tmp >> 28) & 0x1;
304 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
305 table[i].Total_frame_size = tmp & 0x7ffffff;
306
1777feb0 307 /* Stub unwinds are handled elsewhere. */
c906108c
SS
308 table[i].stub_unwind.stub_type = 0;
309 table[i].stub_unwind.padding = 0;
310 }
311 }
312}
313
314/* Read in the backtrace information stored in the `$UNWIND_START$' section of
315 the object file. This info is used mainly by find_unwind_entry() to find
316 out the stack frame size and frame pointer used by procedures. We put
317 everything on the psymbol obstack in the objfile so that it automatically
318 gets freed when the objfile is destroyed. */
319
320static void
fba45db2 321read_unwind_info (struct objfile *objfile)
c906108c 322{
d4f3574e
SS
323 asection *unwind_sec, *stub_unwind_sec;
324 unsigned unwind_size, stub_unwind_size, total_size;
325 unsigned index, unwind_entries;
c906108c
SS
326 unsigned stub_entries, total_entries;
327 CORE_ADDR text_offset;
7c46b9fb
RC
328 struct hppa_unwind_info *ui;
329 struct hppa_objfile_private *obj_private;
c906108c
SS
330
331 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
332 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
333 sizeof (struct hppa_unwind_info));
c906108c
SS
334
335 ui->table = NULL;
336 ui->cache = NULL;
337 ui->last = -1;
338
d4f3574e
SS
339 /* For reasons unknown the HP PA64 tools generate multiple unwinder
340 sections in a single executable. So we just iterate over every
341 section in the BFD looking for unwinder sections intead of trying
1777feb0 342 to do a lookup with bfd_get_section_by_name.
c906108c 343
d4f3574e
SS
344 First determine the total size of the unwind tables so that we
345 can allocate memory in a nice big hunk. */
346 total_entries = 0;
347 for (unwind_sec = objfile->obfd->sections;
348 unwind_sec;
349 unwind_sec = unwind_sec->next)
c906108c 350 {
d4f3574e
SS
351 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
352 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
353 {
354 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
355 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 356
d4f3574e
SS
357 total_entries += unwind_entries;
358 }
c906108c
SS
359 }
360
d4f3574e 361 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 362 use stub unwinds at the current time. */
d4f3574e
SS
363 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
364
c906108c
SS
365 if (stub_unwind_sec)
366 {
367 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
368 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
369 }
370 else
371 {
372 stub_unwind_size = 0;
373 stub_entries = 0;
374 }
375
376 /* Compute total number of unwind entries and their total size. */
d4f3574e 377 total_entries += stub_entries;
c906108c
SS
378 total_size = total_entries * sizeof (struct unwind_table_entry);
379
380 /* Allocate memory for the unwind table. */
381 ui->table = (struct unwind_table_entry *)
8b92e4d5 382 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 383 ui->last = total_entries - 1;
c906108c 384
d4f3574e
SS
385 /* Now read in each unwind section and internalize the standard unwind
386 entries. */
c906108c 387 index = 0;
d4f3574e
SS
388 for (unwind_sec = objfile->obfd->sections;
389 unwind_sec;
390 unwind_sec = unwind_sec->next)
391 {
392 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
393 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
394 {
395 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
396 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
397
398 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
399 unwind_entries, unwind_size, text_offset);
400 index += unwind_entries;
401 }
402 }
403
404 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
405 if (stub_unwind_size > 0)
406 {
407 unsigned int i;
408 char *buf = alloca (stub_unwind_size);
409
410 /* Read in the stub unwind entries. */
411 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
412 0, stub_unwind_size);
413
414 /* Now convert them into regular unwind entries. */
415 for (i = 0; i < stub_entries; i++, index++)
416 {
417 /* Clear out the next unwind entry. */
418 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
419
1777feb0 420 /* Convert offset & size into region_start and region_end.
c906108c
SS
421 Stuff away the stub type into "reserved" fields. */
422 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
423 (bfd_byte *) buf);
424 ui->table[index].region_start += text_offset;
425 buf += 4;
426 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 427 (bfd_byte *) buf);
c906108c
SS
428 buf += 2;
429 ui->table[index].region_end
c5aa993b
JM
430 = ui->table[index].region_start + 4 *
431 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
432 buf += 2;
433 }
434
435 }
436
437 /* Unwind table needs to be kept sorted. */
438 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
439 compare_unwind_entries);
440
441 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
442 obj_private = (struct hppa_objfile_private *)
443 objfile_data (objfile, hppa_objfile_priv_data);
444 if (obj_private == NULL)
77d18ded
RC
445 obj_private = hppa_init_objfile_priv_data (objfile);
446
c906108c
SS
447 obj_private->unwind_info = ui;
448}
449
450/* Lookup the unwind (stack backtrace) info for the given PC. We search all
451 of the objfiles seeking the unwind table entry for this PC. Each objfile
452 contains a sorted list of struct unwind_table_entry. Since we do a binary
453 search of the unwind tables, we depend upon them to be sorted. */
454
455struct unwind_table_entry *
fba45db2 456find_unwind_entry (CORE_ADDR pc)
c906108c
SS
457{
458 int first, middle, last;
459 struct objfile *objfile;
7c46b9fb 460 struct hppa_objfile_private *priv;
c906108c 461
369aa520 462 if (hppa_debug)
5af949e3
UW
463 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
464 hex_string (pc));
369aa520 465
1777feb0 466 /* A function at address 0? Not in HP-UX! */
c906108c 467 if (pc == (CORE_ADDR) 0)
369aa520
RC
468 {
469 if (hppa_debug)
470 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
471 return NULL;
472 }
c906108c
SS
473
474 ALL_OBJFILES (objfile)
c5aa993b 475 {
7c46b9fb 476 struct hppa_unwind_info *ui;
c5aa993b 477 ui = NULL;
7c46b9fb
RC
478 priv = objfile_data (objfile, hppa_objfile_priv_data);
479 if (priv)
480 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 481
c5aa993b
JM
482 if (!ui)
483 {
484 read_unwind_info (objfile);
7c46b9fb
RC
485 priv = objfile_data (objfile, hppa_objfile_priv_data);
486 if (priv == NULL)
8a3fe4f8 487 error (_("Internal error reading unwind information."));
7c46b9fb 488 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 489 }
c906108c 490
1777feb0 491 /* First, check the cache. */
c906108c 492
c5aa993b
JM
493 if (ui->cache
494 && pc >= ui->cache->region_start
495 && pc <= ui->cache->region_end)
369aa520
RC
496 {
497 if (hppa_debug)
5af949e3
UW
498 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
499 hex_string ((uintptr_t) ui->cache));
369aa520
RC
500 return ui->cache;
501 }
c906108c 502
1777feb0 503 /* Not in the cache, do a binary search. */
c906108c 504
c5aa993b
JM
505 first = 0;
506 last = ui->last;
c906108c 507
c5aa993b
JM
508 while (first <= last)
509 {
510 middle = (first + last) / 2;
511 if (pc >= ui->table[middle].region_start
512 && pc <= ui->table[middle].region_end)
513 {
514 ui->cache = &ui->table[middle];
369aa520 515 if (hppa_debug)
5af949e3
UW
516 fprintf_unfiltered (gdb_stdlog, "%s }\n",
517 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
518 return &ui->table[middle];
519 }
c906108c 520
c5aa993b
JM
521 if (pc < ui->table[middle].region_start)
522 last = middle - 1;
523 else
524 first = middle + 1;
525 }
526 } /* ALL_OBJFILES() */
369aa520
RC
527
528 if (hppa_debug)
529 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
530
c906108c
SS
531 return NULL;
532}
533
1fb24930 534/* The epilogue is defined here as the area either on the `bv' instruction
1777feb0 535 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
536
537 We do not assume that the epilogue is at the end of a function as we can
538 also have return sequences in the middle of a function. */
539static int
540hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
541{
e17a4113 542 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
543 unsigned long status;
544 unsigned int inst;
545 char buf[4];
546 int off;
547
8defab1a 548 status = target_read_memory (pc, buf, 4);
1fb24930
RC
549 if (status != 0)
550 return 0;
551
e17a4113 552 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
553
554 /* The most common way to perform a stack adjustment ldo X(sp),sp
555 We are destroying a stack frame if the offset is negative. */
556 if ((inst & 0xffffc000) == 0x37de0000
557 && hppa_extract_14 (inst) < 0)
558 return 1;
559
560 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
561 if (((inst & 0x0fc010e0) == 0x0fc010e0
562 || (inst & 0x0fc010e0) == 0x0fc010e0)
563 && hppa_extract_14 (inst) < 0)
564 return 1;
565
566 /* bv %r0(%rp) or bv,n %r0(%rp) */
567 if (inst == 0xe840c000 || inst == 0xe840c002)
568 return 1;
569
570 return 0;
571}
572
85f4f2d8 573static const unsigned char *
67d57894 574hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 575{
56132691 576 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
577 (*len) = sizeof (breakpoint);
578 return breakpoint;
579}
580
e23457df
AC
581/* Return the name of a register. */
582
4a302917 583static const char *
d93859e2 584hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
585{
586 static char *names[] = {
587 "flags", "r1", "rp", "r3",
588 "r4", "r5", "r6", "r7",
589 "r8", "r9", "r10", "r11",
590 "r12", "r13", "r14", "r15",
591 "r16", "r17", "r18", "r19",
592 "r20", "r21", "r22", "r23",
593 "r24", "r25", "r26", "dp",
594 "ret0", "ret1", "sp", "r31",
595 "sar", "pcoqh", "pcsqh", "pcoqt",
596 "pcsqt", "eiem", "iir", "isr",
597 "ior", "ipsw", "goto", "sr4",
598 "sr0", "sr1", "sr2", "sr3",
599 "sr5", "sr6", "sr7", "cr0",
600 "cr8", "cr9", "ccr", "cr12",
601 "cr13", "cr24", "cr25", "cr26",
602 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
603 "fpsr", "fpe1", "fpe2", "fpe3",
604 "fpe4", "fpe5", "fpe6", "fpe7",
605 "fr4", "fr4R", "fr5", "fr5R",
606 "fr6", "fr6R", "fr7", "fr7R",
607 "fr8", "fr8R", "fr9", "fr9R",
608 "fr10", "fr10R", "fr11", "fr11R",
609 "fr12", "fr12R", "fr13", "fr13R",
610 "fr14", "fr14R", "fr15", "fr15R",
611 "fr16", "fr16R", "fr17", "fr17R",
612 "fr18", "fr18R", "fr19", "fr19R",
613 "fr20", "fr20R", "fr21", "fr21R",
614 "fr22", "fr22R", "fr23", "fr23R",
615 "fr24", "fr24R", "fr25", "fr25R",
616 "fr26", "fr26R", "fr27", "fr27R",
617 "fr28", "fr28R", "fr29", "fr29R",
618 "fr30", "fr30R", "fr31", "fr31R"
619 };
620 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
621 return NULL;
622 else
623 return names[i];
624}
625
4a302917 626static const char *
d93859e2 627hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
628{
629 static char *names[] = {
630 "flags", "r1", "rp", "r3",
631 "r4", "r5", "r6", "r7",
632 "r8", "r9", "r10", "r11",
633 "r12", "r13", "r14", "r15",
634 "r16", "r17", "r18", "r19",
635 "r20", "r21", "r22", "r23",
636 "r24", "r25", "r26", "dp",
637 "ret0", "ret1", "sp", "r31",
638 "sar", "pcoqh", "pcsqh", "pcoqt",
639 "pcsqt", "eiem", "iir", "isr",
640 "ior", "ipsw", "goto", "sr4",
641 "sr0", "sr1", "sr2", "sr3",
642 "sr5", "sr6", "sr7", "cr0",
643 "cr8", "cr9", "ccr", "cr12",
644 "cr13", "cr24", "cr25", "cr26",
645 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
646 "fpsr", "fpe1", "fpe2", "fpe3",
647 "fr4", "fr5", "fr6", "fr7",
648 "fr8", "fr9", "fr10", "fr11",
649 "fr12", "fr13", "fr14", "fr15",
650 "fr16", "fr17", "fr18", "fr19",
651 "fr20", "fr21", "fr22", "fr23",
652 "fr24", "fr25", "fr26", "fr27",
653 "fr28", "fr29", "fr30", "fr31"
654 };
655 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
656 return NULL;
657 else
658 return names[i];
659}
660
85c83e99 661/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 662static int
d3f73121 663hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 664{
85c83e99 665 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
666 if (reg <= 32)
667 return reg;
668
669 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 670 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
671 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
672
85c83e99 673 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
674 return -1;
675}
676
79508e1e
AC
677/* This function pushes a stack frame with arguments as part of the
678 inferior function calling mechanism.
679
680 This is the version of the function for the 32-bit PA machines, in
681 which later arguments appear at lower addresses. (The stack always
682 grows towards higher addresses.)
683
684 We simply allocate the appropriate amount of stack space and put
685 arguments into their proper slots. */
686
4a302917 687static CORE_ADDR
7d9b040b 688hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
689 struct regcache *regcache, CORE_ADDR bp_addr,
690 int nargs, struct value **args, CORE_ADDR sp,
691 int struct_return, CORE_ADDR struct_addr)
692{
e17a4113
UW
693 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
694
79508e1e
AC
695 /* Stack base address at which any pass-by-reference parameters are
696 stored. */
697 CORE_ADDR struct_end = 0;
698 /* Stack base address at which the first parameter is stored. */
699 CORE_ADDR param_end = 0;
700
701 /* The inner most end of the stack after all the parameters have
702 been pushed. */
703 CORE_ADDR new_sp = 0;
704
705 /* Two passes. First pass computes the location of everything,
706 second pass writes the bytes out. */
707 int write_pass;
d49771ef
RC
708
709 /* Global pointer (r19) of the function we are trying to call. */
710 CORE_ADDR gp;
711
712 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
713
79508e1e
AC
714 for (write_pass = 0; write_pass < 2; write_pass++)
715 {
1797a8f6 716 CORE_ADDR struct_ptr = 0;
1777feb0 717 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
718 struct_ptr is adjusted for each argument below, so the first
719 argument will end up at sp-36. */
720 CORE_ADDR param_ptr = 32;
79508e1e 721 int i;
2a6228ef
RC
722 int small_struct = 0;
723
79508e1e
AC
724 for (i = 0; i < nargs; i++)
725 {
726 struct value *arg = args[i];
4991999e 727 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
728 /* The corresponding parameter that is pushed onto the
729 stack, and [possibly] passed in a register. */
730 char param_val[8];
731 int param_len;
732 memset (param_val, 0, sizeof param_val);
733 if (TYPE_LENGTH (type) > 8)
734 {
735 /* Large parameter, pass by reference. Store the value
736 in "struct" area and then pass its address. */
737 param_len = 4;
1797a8f6 738 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 739 if (write_pass)
0fd88904 740 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 741 TYPE_LENGTH (type));
e17a4113
UW
742 store_unsigned_integer (param_val, 4, byte_order,
743 struct_end - struct_ptr);
79508e1e
AC
744 }
745 else if (TYPE_CODE (type) == TYPE_CODE_INT
746 || TYPE_CODE (type) == TYPE_CODE_ENUM)
747 {
748 /* Integer value store, right aligned. "unpack_long"
749 takes care of any sign-extension problems. */
750 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 751 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 752 unpack_long (type,
0fd88904 753 value_contents (arg)));
79508e1e 754 }
2a6228ef
RC
755 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
756 {
757 /* Floating point value store, right aligned. */
758 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 759 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 760 }
79508e1e
AC
761 else
762 {
79508e1e 763 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
764
765 /* Small struct value are stored right-aligned. */
79508e1e 766 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 767 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
768
769 /* Structures of size 5, 6 and 7 bytes are special in that
770 the higher-ordered word is stored in the lower-ordered
771 argument, and even though it is a 8-byte quantity the
772 registers need not be 8-byte aligned. */
1b07b470 773 if (param_len > 4 && param_len < 8)
2a6228ef 774 small_struct = 1;
79508e1e 775 }
2a6228ef 776
1797a8f6 777 param_ptr += param_len;
2a6228ef
RC
778 if (param_len == 8 && !small_struct)
779 param_ptr = align_up (param_ptr, 8);
780
781 /* First 4 non-FP arguments are passed in gr26-gr23.
782 First 4 32-bit FP arguments are passed in fr4L-fr7L.
783 First 2 64-bit FP arguments are passed in fr5 and fr7.
784
785 The rest go on the stack, starting at sp-36, towards lower
786 addresses. 8-byte arguments must be aligned to a 8-byte
787 stack boundary. */
79508e1e
AC
788 if (write_pass)
789 {
1797a8f6 790 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
791
792 /* There are some cases when we don't know the type
793 expected by the callee (e.g. for variadic functions), so
794 pass the parameters in both general and fp regs. */
795 if (param_ptr <= 48)
79508e1e 796 {
2a6228ef
RC
797 int grreg = 26 - (param_ptr - 36) / 4;
798 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
799 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
800
801 regcache_cooked_write (regcache, grreg, param_val);
802 regcache_cooked_write (regcache, fpLreg, param_val);
803
79508e1e 804 if (param_len > 4)
2a6228ef
RC
805 {
806 regcache_cooked_write (regcache, grreg + 1,
807 param_val + 4);
808
809 regcache_cooked_write (regcache, fpreg, param_val);
810 regcache_cooked_write (regcache, fpreg + 1,
811 param_val + 4);
812 }
79508e1e
AC
813 }
814 }
815 }
816
817 /* Update the various stack pointers. */
818 if (!write_pass)
819 {
2a6228ef 820 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
821 /* PARAM_PTR already accounts for all the arguments passed
822 by the user. However, the ABI mandates minimum stack
823 space allocations for outgoing arguments. The ABI also
824 mandates minimum stack alignments which we must
825 preserve. */
2a6228ef 826 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
827 }
828 }
829
830 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 831 address. */
79508e1e 832 if (struct_return)
9c9acae0 833 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 834
e38c262f 835 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
836
837 if (gp != 0)
9c9acae0 838 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 839
79508e1e 840 /* Set the return address. */
77d18ded
RC
841 if (!gdbarch_push_dummy_code_p (gdbarch))
842 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 843
c4557624 844 /* Update the Stack Pointer. */
34f75cc1 845 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 846
2a6228ef 847 return param_end;
79508e1e
AC
848}
849
38ca4e0c
MK
850/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
851 Runtime Architecture for PA-RISC 2.0", which is distributed as part
852 as of the HP-UX Software Transition Kit (STK). This implementation
853 is based on version 3.3, dated October 6, 1997. */
2f690297 854
38ca4e0c 855/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 856
38ca4e0c
MK
857static int
858hppa64_integral_or_pointer_p (const struct type *type)
859{
860 switch (TYPE_CODE (type))
861 {
862 case TYPE_CODE_INT:
863 case TYPE_CODE_BOOL:
864 case TYPE_CODE_CHAR:
865 case TYPE_CODE_ENUM:
866 case TYPE_CODE_RANGE:
867 {
868 int len = TYPE_LENGTH (type);
869 return (len == 1 || len == 2 || len == 4 || len == 8);
870 }
871 case TYPE_CODE_PTR:
872 case TYPE_CODE_REF:
873 return (TYPE_LENGTH (type) == 8);
874 default:
875 break;
876 }
877
878 return 0;
879}
880
881/* Check whether TYPE is a "Floating Scalar Type". */
882
883static int
884hppa64_floating_p (const struct type *type)
885{
886 switch (TYPE_CODE (type))
887 {
888 case TYPE_CODE_FLT:
889 {
890 int len = TYPE_LENGTH (type);
891 return (len == 4 || len == 8 || len == 16);
892 }
893 default:
894 break;
895 }
896
897 return 0;
898}
2f690297 899
1218e655
RC
900/* If CODE points to a function entry address, try to look up the corresponding
901 function descriptor and return its address instead. If CODE is not a
902 function entry address, then just return it unchanged. */
903static CORE_ADDR
e17a4113 904hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 905{
e17a4113 906 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
907 struct obj_section *sec, *opd;
908
909 sec = find_pc_section (code);
910
911 if (!sec)
912 return code;
913
914 /* If CODE is in a data section, assume it's already a fptr. */
915 if (!(sec->the_bfd_section->flags & SEC_CODE))
916 return code;
917
918 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
919 {
920 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 921 break;
1218e655
RC
922 }
923
924 if (opd < sec->objfile->sections_end)
925 {
926 CORE_ADDR addr;
927
aded6f54
PA
928 for (addr = obj_section_addr (opd);
929 addr < obj_section_endaddr (opd);
930 addr += 2 * 8)
931 {
1218e655
RC
932 ULONGEST opdaddr;
933 char tmp[8];
934
935 if (target_read_memory (addr, tmp, sizeof (tmp)))
936 break;
e17a4113 937 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 938
aded6f54 939 if (opdaddr == code)
1218e655
RC
940 return addr - 16;
941 }
942 }
943
944 return code;
945}
946
4a302917 947static CORE_ADDR
7d9b040b 948hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
949 struct regcache *regcache, CORE_ADDR bp_addr,
950 int nargs, struct value **args, CORE_ADDR sp,
951 int struct_return, CORE_ADDR struct_addr)
952{
38ca4e0c 953 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 954 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
955 int i, offset = 0;
956 CORE_ADDR gp;
2f690297 957
38ca4e0c
MK
958 /* "The outgoing parameter area [...] must be aligned at a 16-byte
959 boundary." */
960 sp = align_up (sp, 16);
2f690297 961
38ca4e0c
MK
962 for (i = 0; i < nargs; i++)
963 {
964 struct value *arg = args[i];
965 struct type *type = value_type (arg);
966 int len = TYPE_LENGTH (type);
0fd88904 967 const bfd_byte *valbuf;
1218e655 968 bfd_byte fptrbuf[8];
38ca4e0c 969 int regnum;
2f690297 970
38ca4e0c
MK
971 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
972 offset = align_up (offset, 8);
77d18ded 973
38ca4e0c 974 if (hppa64_integral_or_pointer_p (type))
2f690297 975 {
38ca4e0c
MK
976 /* "Integral scalar parameters smaller than 64 bits are
977 padded on the left (i.e., the value is in the
978 least-significant bits of the 64-bit storage unit, and
979 the high-order bits are undefined)." Therefore we can
980 safely sign-extend them. */
981 if (len < 8)
449e1137 982 {
df4df182 983 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
984 len = 8;
985 }
986 }
987 else if (hppa64_floating_p (type))
988 {
989 if (len > 8)
990 {
991 /* "Quad-precision (128-bit) floating-point scalar
992 parameters are aligned on a 16-byte boundary." */
993 offset = align_up (offset, 16);
994
995 /* "Double-extended- and quad-precision floating-point
996 parameters within the first 64 bytes of the parameter
997 list are always passed in general registers." */
449e1137
AC
998 }
999 else
1000 {
38ca4e0c 1001 if (len == 4)
449e1137 1002 {
38ca4e0c
MK
1003 /* "Single-precision (32-bit) floating-point scalar
1004 parameters are padded on the left with 32 bits of
1005 garbage (i.e., the floating-point value is in the
1006 least-significant 32 bits of a 64-bit storage
1007 unit)." */
1008 offset += 4;
449e1137 1009 }
38ca4e0c
MK
1010
1011 /* "Single- and double-precision floating-point
1012 parameters in this area are passed according to the
1013 available formal parameter information in a function
1014 prototype. [...] If no prototype is in scope,
1015 floating-point parameters must be passed both in the
1016 corresponding general registers and in the
1017 corresponding floating-point registers." */
1018 regnum = HPPA64_FP4_REGNUM + offset / 8;
1019
1020 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1021 {
38ca4e0c
MK
1022 /* "Single-precision floating-point parameters, when
1023 passed in floating-point registers, are passed in
1024 the right halves of the floating point registers;
1025 the left halves are unused." */
1026 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1027 len, value_contents (arg));
449e1137
AC
1028 }
1029 }
2f690297 1030 }
38ca4e0c 1031 else
2f690297 1032 {
38ca4e0c
MK
1033 if (len > 8)
1034 {
1035 /* "Aggregates larger than 8 bytes are aligned on a
1036 16-byte boundary, possibly leaving an unused argument
1777feb0 1037 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1038 they are padded on the right (with garbage), to a
1039 multiple of 8 bytes." */
1040 offset = align_up (offset, 16);
1041 }
1042 }
1043
1218e655
RC
1044 /* If we are passing a function pointer, make sure we pass a function
1045 descriptor instead of the function entry address. */
1046 if (TYPE_CODE (type) == TYPE_CODE_PTR
1047 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1048 {
1049 ULONGEST codeptr, fptr;
1050
1051 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1052 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1053 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1054 fptr);
1218e655
RC
1055 valbuf = fptrbuf;
1056 }
1057 else
1058 {
1059 valbuf = value_contents (arg);
1060 }
1061
38ca4e0c 1062 /* Always store the argument in memory. */
1218e655 1063 write_memory (sp + offset, valbuf, len);
38ca4e0c 1064
38ca4e0c
MK
1065 regnum = HPPA_ARG0_REGNUM - offset / 8;
1066 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1067 {
1068 regcache_cooked_write_part (regcache, regnum,
1069 offset % 8, min (len, 8), valbuf);
1070 offset += min (len, 8);
1071 valbuf += min (len, 8);
1072 len -= min (len, 8);
1073 regnum--;
2f690297 1074 }
38ca4e0c
MK
1075
1076 offset += len;
2f690297
AC
1077 }
1078
38ca4e0c
MK
1079 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1080 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1081
1082 /* Allocate the outgoing parameter area. Make sure the outgoing
1083 parameter area is multiple of 16 bytes in length. */
1084 sp += max (align_up (offset, 16), 64);
1085
1086 /* Allocate 32-bytes of scratch space. The documentation doesn't
1087 mention this, but it seems to be needed. */
1088 sp += 32;
1089
1090 /* Allocate the frame marker area. */
1091 sp += 16;
1092
1093 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1094 its address. */
2f690297 1095 if (struct_return)
38ca4e0c 1096 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1097
38ca4e0c 1098 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1099 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1100 if (gp != 0)
38ca4e0c 1101 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1102
38ca4e0c 1103 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1104 if (!gdbarch_push_dummy_code_p (gdbarch))
1105 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1106
38ca4e0c
MK
1107 /* Set up GR30 to hold the stack pointer (sp). */
1108 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1109
38ca4e0c 1110 return sp;
2f690297 1111}
38ca4e0c 1112\f
2f690297 1113
08a27113
MK
1114/* Handle 32/64-bit struct return conventions. */
1115
1116static enum return_value_convention
c055b101 1117hppa32_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1118 struct type *type, struct regcache *regcache,
e127f0db 1119 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1120{
1121 if (TYPE_LENGTH (type) <= 2 * 4)
1122 {
1123 /* The value always lives in the right hand end of the register
1124 (or register pair)? */
1125 int b;
1126 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1127 int part = TYPE_LENGTH (type) % 4;
1128 /* The left hand register contains only part of the value,
1129 transfer that first so that the rest can be xfered as entire
1130 4-byte registers. */
1131 if (part > 0)
1132 {
1133 if (readbuf != NULL)
1134 regcache_cooked_read_part (regcache, reg, 4 - part,
1135 part, readbuf);
1136 if (writebuf != NULL)
1137 regcache_cooked_write_part (regcache, reg, 4 - part,
1138 part, writebuf);
1139 reg++;
1140 }
1141 /* Now transfer the remaining register values. */
1142 for (b = part; b < TYPE_LENGTH (type); b += 4)
1143 {
1144 if (readbuf != NULL)
e127f0db 1145 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1146 if (writebuf != NULL)
e127f0db 1147 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1148 reg++;
1149 }
1150 return RETURN_VALUE_REGISTER_CONVENTION;
1151 }
1152 else
1153 return RETURN_VALUE_STRUCT_CONVENTION;
1154}
1155
1156static enum return_value_convention
c055b101 1157hppa64_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1158 struct type *type, struct regcache *regcache,
e127f0db 1159 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1160{
1161 int len = TYPE_LENGTH (type);
1162 int regnum, offset;
1163
1164 if (len > 16)
1165 {
1166 /* All return values larget than 128 bits must be aggregate
1167 return values. */
9738b034
MK
1168 gdb_assert (!hppa64_integral_or_pointer_p (type));
1169 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1170
1171 /* "Aggregate return values larger than 128 bits are returned in
1172 a buffer allocated by the caller. The address of the buffer
1173 must be passed in GR 28." */
1174 return RETURN_VALUE_STRUCT_CONVENTION;
1175 }
1176
1177 if (hppa64_integral_or_pointer_p (type))
1178 {
1179 /* "Integral return values are returned in GR 28. Values
1180 smaller than 64 bits are padded on the left (with garbage)." */
1181 regnum = HPPA_RET0_REGNUM;
1182 offset = 8 - len;
1183 }
1184 else if (hppa64_floating_p (type))
1185 {
1186 if (len > 8)
1187 {
1188 /* "Double-extended- and quad-precision floating-point
1189 values are returned in GRs 28 and 29. The sign,
1190 exponent, and most-significant bits of the mantissa are
1191 returned in GR 28; the least-significant bits of the
1192 mantissa are passed in GR 29. For double-extended
1193 precision values, GR 29 is padded on the right with 48
1194 bits of garbage." */
1195 regnum = HPPA_RET0_REGNUM;
1196 offset = 0;
1197 }
1198 else
1199 {
1200 /* "Single-precision and double-precision floating-point
1201 return values are returned in FR 4R (single precision) or
1202 FR 4 (double-precision)." */
1203 regnum = HPPA64_FP4_REGNUM;
1204 offset = 8 - len;
1205 }
1206 }
1207 else
1208 {
1209 /* "Aggregate return values up to 64 bits in size are returned
1210 in GR 28. Aggregates smaller than 64 bits are left aligned
1211 in the register; the pad bits on the right are undefined."
1212
1213 "Aggregate return values between 65 and 128 bits are returned
1214 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1215 the remaining bits are placed, left aligned, in GR 29. The
1216 pad bits on the right of GR 29 (if any) are undefined." */
1217 regnum = HPPA_RET0_REGNUM;
1218 offset = 0;
1219 }
1220
1221 if (readbuf)
1222 {
08a27113
MK
1223 while (len > 0)
1224 {
1225 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1226 min (len, 8), readbuf);
1227 readbuf += min (len, 8);
08a27113
MK
1228 len -= min (len, 8);
1229 regnum++;
1230 }
1231 }
1232
1233 if (writebuf)
1234 {
08a27113
MK
1235 while (len > 0)
1236 {
1237 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1238 min (len, 8), writebuf);
1239 writebuf += min (len, 8);
08a27113
MK
1240 len -= min (len, 8);
1241 regnum++;
1242 }
1243 }
1244
1245 return RETURN_VALUE_REGISTER_CONVENTION;
1246}
1247\f
1248
d49771ef 1249static CORE_ADDR
a7aad9aa 1250hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1251 struct target_ops *targ)
1252{
1253 if (addr & 2)
1254 {
0dfff4cb 1255 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1256 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1257 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1258 }
1259
1260 return addr;
1261}
1262
1797a8f6
AC
1263static CORE_ADDR
1264hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1265{
1266 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1267 and not _bit_)! */
1268 return align_up (addr, 64);
1269}
1270
2f690297
AC
1271/* Force all frames to 16-byte alignment. Better safe than sorry. */
1272
1273static CORE_ADDR
1797a8f6 1274hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1275{
1276 /* Just always 16-byte align. */
1277 return align_up (addr, 16);
1278}
1279
cc72850f 1280CORE_ADDR
61a1198a 1281hppa_read_pc (struct regcache *regcache)
c906108c 1282{
cc72850f 1283 ULONGEST ipsw;
61a1198a 1284 ULONGEST pc;
c906108c 1285
61a1198a
UW
1286 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1287 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1288
1289 /* If the current instruction is nullified, then we are effectively
1290 still executing the previous instruction. Pretend we are still
cc72850f
MK
1291 there. This is needed when single stepping; if the nullified
1292 instruction is on a different line, we don't want GDB to think
1293 we've stepped onto that line. */
fe46cd3a
RC
1294 if (ipsw & 0x00200000)
1295 pc -= 4;
1296
cc72850f 1297 return pc & ~0x3;
c906108c
SS
1298}
1299
cc72850f 1300void
61a1198a 1301hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1302{
61a1198a
UW
1303 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1304 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1305}
1306
c906108c 1307/* For the given instruction (INST), return any adjustment it makes
1777feb0 1308 to the stack pointer or zero for no adjustment.
c906108c
SS
1309
1310 This only handles instructions commonly found in prologues. */
1311
1312static int
fba45db2 1313prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1314{
1315 /* This must persist across calls. */
1316 static int save_high21;
1317
1318 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1319 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1320 return hppa_extract_14 (inst);
c906108c
SS
1321
1322 /* stwm X,D(sp) */
1323 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1324 return hppa_extract_14 (inst);
c906108c 1325
104c1213
JM
1326 /* std,ma X,D(sp) */
1327 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1328 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1329
e22b26cb 1330 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1331 save high bits in save_high21 for later use. */
e22b26cb 1332 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1333 {
abc485a1 1334 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1335 return 0;
1336 }
1337
1338 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1339 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1340
1341 /* fstws as used by the HP compilers. */
1342 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1343 return hppa_extract_5_load (inst);
c906108c
SS
1344
1345 /* No adjustment. */
1346 return 0;
1347}
1348
1349/* Return nonzero if INST is a branch of some kind, else return zero. */
1350
1351static int
fba45db2 1352is_branch (unsigned long inst)
c906108c
SS
1353{
1354 switch (inst >> 26)
1355 {
1356 case 0x20:
1357 case 0x21:
1358 case 0x22:
1359 case 0x23:
7be570e7 1360 case 0x27:
c906108c
SS
1361 case 0x28:
1362 case 0x29:
1363 case 0x2a:
1364 case 0x2b:
7be570e7 1365 case 0x2f:
c906108c
SS
1366 case 0x30:
1367 case 0x31:
1368 case 0x32:
1369 case 0x33:
1370 case 0x38:
1371 case 0x39:
1372 case 0x3a:
7be570e7 1373 case 0x3b:
c906108c
SS
1374 return 1;
1375
1376 default:
1377 return 0;
1378 }
1379}
1380
1381/* Return the register number for a GR which is saved by INST or
1382 zero it INST does not save a GR. */
1383
1384static int
fba45db2 1385inst_saves_gr (unsigned long inst)
c906108c
SS
1386{
1387 /* Does it look like a stw? */
7be570e7
JM
1388 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1389 || (inst >> 26) == 0x1f
1390 || ((inst >> 26) == 0x1f
1391 && ((inst >> 6) == 0xa)))
abc485a1 1392 return hppa_extract_5R_store (inst);
7be570e7
JM
1393
1394 /* Does it look like a std? */
1395 if ((inst >> 26) == 0x1c
1396 || ((inst >> 26) == 0x03
1397 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1398 return hppa_extract_5R_store (inst);
c906108c 1399
1777feb0 1400 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
c906108c 1401 if ((inst >> 26) == 0x1b)
abc485a1 1402 return hppa_extract_5R_store (inst);
c906108c
SS
1403
1404 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1405 too. */
7be570e7
JM
1406 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1407 || ((inst >> 26) == 0x3
1408 && (((inst >> 6) & 0xf) == 0x8
1409 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1410 return hppa_extract_5R_store (inst);
c5aa993b 1411
c906108c
SS
1412 return 0;
1413}
1414
1415/* Return the register number for a FR which is saved by INST or
1416 zero it INST does not save a FR.
1417
1418 Note we only care about full 64bit register stores (that's the only
1419 kind of stores the prologue will use).
1420
1421 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1422
1423static int
fba45db2 1424inst_saves_fr (unsigned long inst)
c906108c 1425{
1777feb0 1426 /* Is this an FSTD? */
c906108c 1427 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1428 return hppa_extract_5r_store (inst);
7be570e7 1429 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1430 return hppa_extract_5R_store (inst);
1777feb0 1431 /* Is this an FSTW? */
c906108c 1432 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1433 return hppa_extract_5r_store (inst);
7be570e7 1434 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1435 return hppa_extract_5R_store (inst);
c906108c
SS
1436 return 0;
1437}
1438
1439/* Advance PC across any function entry prologue instructions
1777feb0 1440 to reach some "real" code.
c906108c
SS
1441
1442 Use information in the unwind table to determine what exactly should
1443 be in the prologue. */
1444
1445
a71f8c30 1446static CORE_ADDR
be8626e0
MD
1447skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1448 int stop_before_branch)
c906108c 1449{
e17a4113 1450 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
c906108c
SS
1451 char buf[4];
1452 CORE_ADDR orig_pc = pc;
1453 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1454 unsigned long args_stored, status, i, restart_gr, restart_fr;
1455 struct unwind_table_entry *u;
a71f8c30 1456 int final_iteration;
c906108c
SS
1457
1458 restart_gr = 0;
1459 restart_fr = 0;
1460
1461restart:
1462 u = find_unwind_entry (pc);
1463 if (!u)
1464 return pc;
1465
1777feb0 1466 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1467 if ((pc & ~0x3) != u->region_start)
1468 return pc;
1469
1470 /* This is how much of a frame adjustment we need to account for. */
1471 stack_remaining = u->Total_frame_size << 3;
1472
1473 /* Magic register saves we want to know about. */
1474 save_rp = u->Save_RP;
1475 save_sp = u->Save_SP;
1476
1477 /* An indication that args may be stored into the stack. Unfortunately
1478 the HPUX compilers tend to set this in cases where no args were
1479 stored too!. */
1480 args_stored = 1;
1481
1482 /* Turn the Entry_GR field into a bitmask. */
1483 save_gr = 0;
1484 for (i = 3; i < u->Entry_GR + 3; i++)
1485 {
1486 /* Frame pointer gets saved into a special location. */
eded0a31 1487 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1488 continue;
1489
1490 save_gr |= (1 << i);
1491 }
1492 save_gr &= ~restart_gr;
1493
1494 /* Turn the Entry_FR field into a bitmask too. */
1495 save_fr = 0;
1496 for (i = 12; i < u->Entry_FR + 12; i++)
1497 save_fr |= (1 << i);
1498 save_fr &= ~restart_fr;
1499
a71f8c30
RC
1500 final_iteration = 0;
1501
c906108c
SS
1502 /* Loop until we find everything of interest or hit a branch.
1503
1504 For unoptimized GCC code and for any HP CC code this will never ever
1505 examine any user instructions.
1506
1507 For optimzied GCC code we're faced with problems. GCC will schedule
1508 its prologue and make prologue instructions available for delay slot
1509 filling. The end result is user code gets mixed in with the prologue
1510 and a prologue instruction may be in the delay slot of the first branch
1511 or call.
1512
1513 Some unexpected things are expected with debugging optimized code, so
1514 we allow this routine to walk past user instructions in optimized
1515 GCC code. */
1516 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1517 || args_stored)
1518 {
1519 unsigned int reg_num;
1520 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1521 unsigned long old_save_rp, old_save_sp, next_inst;
1522
1523 /* Save copies of all the triggers so we can compare them later
c5aa993b 1524 (only for HPC). */
c906108c
SS
1525 old_save_gr = save_gr;
1526 old_save_fr = save_fr;
1527 old_save_rp = save_rp;
1528 old_save_sp = save_sp;
1529 old_stack_remaining = stack_remaining;
1530
8defab1a 1531 status = target_read_memory (pc, buf, 4);
e17a4113 1532 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1533
c906108c
SS
1534 /* Yow! */
1535 if (status != 0)
1536 return pc;
1537
1538 /* Note the interesting effects of this instruction. */
1539 stack_remaining -= prologue_inst_adjust_sp (inst);
1540
7be570e7
JM
1541 /* There are limited ways to store the return pointer into the
1542 stack. */
c4c79048 1543 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1544 save_rp = 0;
1545
104c1213 1546 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1547 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1548 if ((inst & 0xffffc000) == 0x6fc10000
1549 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1550 save_sp = 0;
1551
6426a772
JM
1552 /* Are we loading some register with an offset from the argument
1553 pointer? */
1554 if ((inst & 0xffe00000) == 0x37a00000
1555 || (inst & 0xffffffe0) == 0x081d0240)
1556 {
1557 pc += 4;
1558 continue;
1559 }
1560
c906108c
SS
1561 /* Account for general and floating-point register saves. */
1562 reg_num = inst_saves_gr (inst);
1563 save_gr &= ~(1 << reg_num);
1564
1565 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1566 Unfortunately args_stored only tells us that some arguments
1567 where stored into the stack. Not how many or what kind!
c906108c 1568
c5aa993b
JM
1569 This is a kludge as on the HP compiler sets this bit and it
1570 never does prologue scheduling. So once we see one, skip past
1571 all of them. We have similar code for the fp arg stores below.
c906108c 1572
c5aa993b
JM
1573 FIXME. Can still die if we have a mix of GR and FR argument
1574 stores! */
be8626e0 1575 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1576 && reg_num <= 26)
c906108c 1577 {
be8626e0 1578 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1579 && reg_num <= 26)
c906108c
SS
1580 {
1581 pc += 4;
8defab1a 1582 status = target_read_memory (pc, buf, 4);
e17a4113 1583 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1584 if (status != 0)
1585 return pc;
1586 reg_num = inst_saves_gr (inst);
1587 }
1588 args_stored = 0;
1589 continue;
1590 }
1591
1592 reg_num = inst_saves_fr (inst);
1593 save_fr &= ~(1 << reg_num);
1594
8defab1a 1595 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1596 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1597
c906108c
SS
1598 /* Yow! */
1599 if (status != 0)
1600 return pc;
1601
1602 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1603 save. */
c906108c
SS
1604 if ((inst & 0xfc000000) == 0x34000000
1605 && inst_saves_fr (next_inst) >= 4
819844ad 1606 && inst_saves_fr (next_inst)
be8626e0 1607 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1608 {
1609 /* So we drop into the code below in a reasonable state. */
1610 reg_num = inst_saves_fr (next_inst);
1611 pc -= 4;
1612 }
1613
1614 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1615 This is a kludge as on the HP compiler sets this bit and it
1616 never does prologue scheduling. So once we see one, skip past
1617 all of them. */
819844ad 1618 if (reg_num >= 4
be8626e0 1619 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1620 {
819844ad
UW
1621 while (reg_num >= 4
1622 && reg_num
be8626e0 1623 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1624 {
1625 pc += 8;
8defab1a 1626 status = target_read_memory (pc, buf, 4);
e17a4113 1627 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1628 if (status != 0)
1629 return pc;
1630 if ((inst & 0xfc000000) != 0x34000000)
1631 break;
8defab1a 1632 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1633 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1634 if (status != 0)
1635 return pc;
1636 reg_num = inst_saves_fr (next_inst);
1637 }
1638 args_stored = 0;
1639 continue;
1640 }
1641
1642 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1643 instruction is in the delay slot of the first call/branch. */
a71f8c30 1644 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1645 break;
1646
1647 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1648 arguments were stored into the stack (boo hiss). This could
1649 cause this code to then skip a bunch of user insns (up to the
1650 first branch).
1651
1652 To combat this we try to identify when args_stored was bogusly
1653 set and clear it. We only do this when args_stored is nonzero,
1654 all other resources are accounted for, and nothing changed on
1655 this pass. */
c906108c 1656 if (args_stored
c5aa993b 1657 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1658 && old_save_gr == save_gr && old_save_fr == save_fr
1659 && old_save_rp == save_rp && old_save_sp == save_sp
1660 && old_stack_remaining == stack_remaining)
1661 break;
c5aa993b 1662
c906108c
SS
1663 /* Bump the PC. */
1664 pc += 4;
a71f8c30
RC
1665
1666 /* !stop_before_branch, so also look at the insn in the delay slot
1667 of the branch. */
1668 if (final_iteration)
1669 break;
1670 if (is_branch (inst))
1671 final_iteration = 1;
c906108c
SS
1672 }
1673
1674 /* We've got a tenative location for the end of the prologue. However
1675 because of limitations in the unwind descriptor mechanism we may
1676 have went too far into user code looking for the save of a register
1677 that does not exist. So, if there registers we expected to be saved
1678 but never were, mask them out and restart.
1679
1680 This should only happen in optimized code, and should be very rare. */
c5aa993b 1681 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1682 {
1683 pc = orig_pc;
1684 restart_gr = save_gr;
1685 restart_fr = save_fr;
1686 goto restart;
1687 }
1688
1689 return pc;
1690}
1691
1692
7be570e7
JM
1693/* Return the address of the PC after the last prologue instruction if
1694 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1695
1696static CORE_ADDR
fba45db2 1697after_prologue (CORE_ADDR pc)
c906108c
SS
1698{
1699 struct symtab_and_line sal;
1700 CORE_ADDR func_addr, func_end;
1701 struct symbol *f;
1702
7be570e7
JM
1703 /* If we can not find the symbol in the partial symbol table, then
1704 there is no hope we can determine the function's start address
1705 with this code. */
c906108c 1706 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1707 return 0;
c906108c 1708
7be570e7 1709 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1710 sal = find_pc_line (func_addr, 0);
1711
7be570e7
JM
1712 /* There are only two cases to consider. First, the end of the source line
1713 is within the function bounds. In that case we return the end of the
1714 source line. Second is the end of the source line extends beyond the
1715 bounds of the current function. We need to use the slow code to
1777feb0 1716 examine instructions in that case.
c906108c 1717
7be570e7
JM
1718 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1719 the wrong thing to do. In fact, it should be entirely possible for this
1720 function to always return zero since the slow instruction scanning code
1721 is supposed to *always* work. If it does not, then it is a bug. */
1722 if (sal.end < func_end)
1723 return sal.end;
c5aa993b 1724 else
7be570e7 1725 return 0;
c906108c
SS
1726}
1727
1728/* To skip prologues, I use this predicate. Returns either PC itself
1729 if the code at PC does not look like a function prologue; otherwise
1777feb0 1730 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1731
1732 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1733 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1734 we might not want to skip all the insns because a prologue insn may
1735 appear in the delay slot of the first branch, and we don't want to
1736 skip over the branch in that case. */
c906108c 1737
8d153463 1738static CORE_ADDR
6093d2eb 1739hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1740{
c5aa993b
JM
1741 unsigned long inst;
1742 int offset;
1743 CORE_ADDR post_prologue_pc;
1744 char buf[4];
c906108c 1745
c5aa993b
JM
1746 /* See if we can determine the end of the prologue via the symbol table.
1747 If so, then return either PC, or the PC after the prologue, whichever
1748 is greater. */
c906108c 1749
c5aa993b 1750 post_prologue_pc = after_prologue (pc);
c906108c 1751
7be570e7
JM
1752 /* If after_prologue returned a useful address, then use it. Else
1753 fall back on the instruction skipping code.
1754
1755 Some folks have claimed this causes problems because the breakpoint
1756 may be the first instruction of the prologue. If that happens, then
1757 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1758 if (post_prologue_pc != 0)
1759 return max (pc, post_prologue_pc);
c5aa993b 1760 else
be8626e0 1761 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1762}
1763
29d375ac 1764/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1765
29d375ac 1766static struct unwind_table_entry *
227e86ad 1767hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1768{
227e86ad 1769 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1770
1771 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1772 result of get_frame_address_in_block implies a problem.
93d42b30 1773 The bits should have been removed earlier, before the return
c7ce8faa 1774 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1775 if it isn't, it should be fixed. Then this call can be
1776 removed. */
227e86ad 1777 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1778 return find_unwind_entry (pc);
1779}
1780
26d08f08
AC
1781struct hppa_frame_cache
1782{
1783 CORE_ADDR base;
1784 struct trad_frame_saved_reg *saved_regs;
1785};
1786
1787static struct hppa_frame_cache *
227e86ad 1788hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1789{
227e86ad 1790 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1791 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1792 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1793 struct hppa_frame_cache *cache;
1794 long saved_gr_mask;
1795 long saved_fr_mask;
1796 CORE_ADDR this_sp;
1797 long frame_size;
1798 struct unwind_table_entry *u;
9f7194c3 1799 CORE_ADDR prologue_end;
50b2f48a 1800 int fp_in_r1 = 0;
26d08f08
AC
1801 int i;
1802
369aa520
RC
1803 if (hppa_debug)
1804 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1805 frame_relative_level(this_frame));
369aa520 1806
26d08f08 1807 if ((*this_cache) != NULL)
369aa520
RC
1808 {
1809 if (hppa_debug)
5af949e3
UW
1810 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1811 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
369aa520
RC
1812 return (*this_cache);
1813 }
26d08f08
AC
1814 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1815 (*this_cache) = cache;
227e86ad 1816 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1817
1818 /* Yow! */
227e86ad 1819 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1820 if (!u)
369aa520
RC
1821 {
1822 if (hppa_debug)
1823 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1824 return (*this_cache);
1825 }
26d08f08
AC
1826
1827 /* Turn the Entry_GR field into a bitmask. */
1828 saved_gr_mask = 0;
1829 for (i = 3; i < u->Entry_GR + 3; i++)
1830 {
1831 /* Frame pointer gets saved into a special location. */
eded0a31 1832 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1833 continue;
1834
1835 saved_gr_mask |= (1 << i);
1836 }
1837
1838 /* Turn the Entry_FR field into a bitmask too. */
1839 saved_fr_mask = 0;
1840 for (i = 12; i < u->Entry_FR + 12; i++)
1841 saved_fr_mask |= (1 << i);
1842
1843 /* Loop until we find everything of interest or hit a branch.
1844
1845 For unoptimized GCC code and for any HP CC code this will never ever
1846 examine any user instructions.
1847
1848 For optimized GCC code we're faced with problems. GCC will schedule
1849 its prologue and make prologue instructions available for delay slot
1850 filling. The end result is user code gets mixed in with the prologue
1851 and a prologue instruction may be in the delay slot of the first branch
1852 or call.
1853
1854 Some unexpected things are expected with debugging optimized code, so
1855 we allow this routine to walk past user instructions in optimized
1856 GCC code. */
1857 {
1858 int final_iteration = 0;
46acf081 1859 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1860 int looking_for_sp = u->Save_SP;
1861 int looking_for_rp = u->Save_RP;
1862 int fp_loc = -1;
9f7194c3 1863
a71f8c30 1864 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1865 skip_prologue_using_sal, in case we stepped into a function without
1866 symbol information. hppa_skip_prologue also bounds the returned
1867 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1868 function.
a71f8c30
RC
1869
1870 We used to call hppa_skip_prologue to find the end of the prologue,
1871 but if some non-prologue instructions get scheduled into the prologue,
1872 and the program is compiled with debug information, the "easy" way
1873 in hppa_skip_prologue will return a prologue end that is too early
1874 for us to notice any potential frame adjustments. */
d5c27f81 1875
ef02daa9
DJ
1876 /* We used to use get_frame_func to locate the beginning of the
1877 function to pass to skip_prologue. However, when objects are
1878 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1879 function (or 0). We can do better than that by using unwind records.
46acf081 1880 This only works if the Region_description of the unwind record
1777feb0 1881 indicates that it includes the entry point of the function.
46acf081
RC
1882 HP compilers sometimes generate unwind records for regions that
1883 do not include the entry or exit point of a function. GNU tools
1884 do not do this. */
1885
1886 if ((u->Region_description & 0x2) == 0)
1887 start_pc = u->region_start;
1888 else
227e86ad 1889 start_pc = get_frame_func (this_frame);
d5c27f81 1890
be8626e0 1891 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1892 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1893
1894 if (prologue_end != 0 && end_pc > prologue_end)
1895 end_pc = prologue_end;
1896
26d08f08 1897 frame_size = 0;
9f7194c3 1898
46acf081 1899 for (pc = start_pc;
26d08f08
AC
1900 ((saved_gr_mask || saved_fr_mask
1901 || looking_for_sp || looking_for_rp
1902 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1903 && pc < end_pc);
26d08f08
AC
1904 pc += 4)
1905 {
1906 int reg;
1907 char buf4[4];
4a302917
RC
1908 long inst;
1909
227e86ad 1910 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1911 {
5af949e3
UW
1912 error (_("Cannot read instruction at %s."),
1913 paddress (gdbarch, pc));
4a302917
RC
1914 return (*this_cache);
1915 }
1916
e17a4113 1917 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1918
26d08f08
AC
1919 /* Note the interesting effects of this instruction. */
1920 frame_size += prologue_inst_adjust_sp (inst);
1921
1922 /* There are limited ways to store the return pointer into the
1923 stack. */
1924 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1925 {
1926 looking_for_rp = 0;
34f75cc1 1927 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1928 }
dfaf8edb
MK
1929 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1930 {
1931 looking_for_rp = 0;
1932 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1933 }
c4c79048
RC
1934 else if (inst == 0x0fc212c1
1935 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1936 {
1937 looking_for_rp = 0;
34f75cc1 1938 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1939 }
1940
1941 /* Check to see if we saved SP into the stack. This also
1942 happens to indicate the location of the saved frame
1943 pointer. */
1944 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1945 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1946 {
1947 looking_for_sp = 0;
eded0a31 1948 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 1949 }
50b2f48a
RC
1950 else if (inst == 0x08030241) /* copy %r3, %r1 */
1951 {
1952 fp_in_r1 = 1;
1953 }
26d08f08
AC
1954
1955 /* Account for general and floating-point register saves. */
1956 reg = inst_saves_gr (inst);
1957 if (reg >= 3 && reg <= 18
eded0a31 1958 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1959 {
1960 saved_gr_mask &= ~(1 << reg);
abc485a1 1961 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1962 /* stwm with a positive displacement is a _post_
1963 _modify_. */
1964 cache->saved_regs[reg].addr = 0;
1965 else if ((inst & 0xfc00000c) == 0x70000008)
1966 /* A std has explicit post_modify forms. */
1967 cache->saved_regs[reg].addr = 0;
1968 else
1969 {
1970 CORE_ADDR offset;
1971
1972 if ((inst >> 26) == 0x1c)
1777feb0
MS
1973 offset = (inst & 0x1 ? -1 << 13 : 0)
1974 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 1975 else if ((inst >> 26) == 0x03)
abc485a1 1976 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1977 else
abc485a1 1978 offset = hppa_extract_14 (inst);
26d08f08
AC
1979
1980 /* Handle code with and without frame pointers. */
1981 if (u->Save_SP)
1982 cache->saved_regs[reg].addr = offset;
1983 else
1777feb0
MS
1984 cache->saved_regs[reg].addr
1985 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
1986 }
1987 }
1988
1989 /* GCC handles callee saved FP regs a little differently.
1990
1991 It emits an instruction to put the value of the start of
1992 the FP store area into %r1. It then uses fstds,ma with a
1993 basereg of %r1 for the stores.
1994
1995 HP CC emits them at the current stack pointer modifying the
1996 stack pointer as it stores each register. */
1997
1998 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1999 if ((inst & 0xffffc000) == 0x34610000
2000 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2001 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2002
2003 reg = inst_saves_fr (inst);
2004 if (reg >= 12 && reg <= 21)
2005 {
2006 /* Note +4 braindamage below is necessary because the FP
2007 status registers are internally 8 registers rather than
2008 the expected 4 registers. */
2009 saved_fr_mask &= ~(1 << reg);
2010 if (fp_loc == -1)
2011 {
2012 /* 1st HP CC FP register store. After this
2013 instruction we've set enough state that the GCC and
2014 HPCC code are both handled in the same manner. */
34f75cc1 2015 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2016 fp_loc = 8;
2017 }
2018 else
2019 {
eded0a31 2020 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2021 fp_loc += 8;
2022 }
2023 }
2024
1777feb0 2025 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2026 if (final_iteration)
2027 break;
2028 /* We want to look precisely one instruction beyond the branch
2029 if we have not found everything yet. */
2030 if (is_branch (inst))
2031 final_iteration = 1;
2032 }
2033 }
2034
2035 {
2036 /* The frame base always represents the value of %sp at entry to
2037 the current function (and is thus equivalent to the "saved"
2038 stack pointer. */
227e86ad
JB
2039 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2040 HPPA_SP_REGNUM);
ed70ba00 2041 CORE_ADDR fp;
9f7194c3
RC
2042
2043 if (hppa_debug)
5af949e3
UW
2044 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2045 "prologue_end=%s) ",
2046 paddress (gdbarch, this_sp),
2047 paddress (gdbarch, get_frame_pc (this_frame)),
2048 paddress (gdbarch, prologue_end));
9f7194c3 2049
ed70ba00
RC
2050 /* Check to see if a frame pointer is available, and use it for
2051 frame unwinding if it is.
2052
2053 There are some situations where we need to rely on the frame
2054 pointer to do stack unwinding. For example, if a function calls
2055 alloca (), the stack pointer can get adjusted inside the body of
2056 the function. In this case, the ABI requires that the compiler
2057 maintain a frame pointer for the function.
2058
2059 The unwind record has a flag (alloca_frame) that indicates that
2060 a function has a variable frame; unfortunately, gcc/binutils
2061 does not set this flag. Instead, whenever a frame pointer is used
2062 and saved on the stack, the Save_SP flag is set. We use this to
2063 decide whether to use the frame pointer for unwinding.
2064
ed70ba00
RC
2065 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2066 instead of Save_SP. */
2067
227e86ad 2068 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2069
6fcecea0 2070 if (u->alloca_frame)
46acf081 2071 fp -= u->Total_frame_size << 3;
ed70ba00 2072
227e86ad 2073 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2074 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2075 {
2076 cache->base = fp;
2077
2078 if (hppa_debug)
5af949e3
UW
2079 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2080 paddress (gdbarch, cache->base));
ed70ba00 2081 }
1658da49
RC
2082 else if (u->Save_SP
2083 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2084 {
9f7194c3
RC
2085 /* Both we're expecting the SP to be saved and the SP has been
2086 saved. The entry SP value is saved at this frame's SP
2087 address. */
e17a4113 2088 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2089
2090 if (hppa_debug)
5af949e3
UW
2091 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2092 paddress (gdbarch, cache->base));
9f7194c3 2093 }
26d08f08 2094 else
9f7194c3 2095 {
1658da49
RC
2096 /* The prologue has been slowly allocating stack space. Adjust
2097 the SP back. */
2098 cache->base = this_sp - frame_size;
9f7194c3 2099 if (hppa_debug)
5af949e3
UW
2100 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2101 paddress (gdbarch, cache->base));
9f7194c3
RC
2102
2103 }
eded0a31 2104 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2105 }
2106
412275d5
AC
2107 /* The PC is found in the "return register", "Millicode" uses "r31"
2108 as the return register while normal code uses "rp". */
26d08f08 2109 if (u->Millicode)
9f7194c3 2110 {
5859efe5 2111 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2112 {
2113 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2114 if (hppa_debug)
2115 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2116 }
9f7194c3
RC
2117 else
2118 {
227e86ad 2119 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2120 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2121 if (hppa_debug)
2122 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2123 }
2124 }
26d08f08 2125 else
9f7194c3 2126 {
34f75cc1 2127 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2128 {
2129 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2130 cache->saved_regs[HPPA_RP_REGNUM];
2131 if (hppa_debug)
2132 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2133 }
9f7194c3
RC
2134 else
2135 {
227e86ad
JB
2136 ULONGEST rp = get_frame_register_unsigned (this_frame,
2137 HPPA_RP_REGNUM);
34f75cc1 2138 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2139 if (hppa_debug)
2140 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2141 }
2142 }
26d08f08 2143
50b2f48a
RC
2144 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2145 frame. However, there is a one-insn window where we haven't saved it
2146 yet, but we've already clobbered it. Detect this case and fix it up.
2147
2148 The prologue sequence for frame-pointer functions is:
2149 0: stw %rp, -20(%sp)
2150 4: copy %r3, %r1
2151 8: copy %sp, %r3
2152 c: stw,ma %r1, XX(%sp)
2153
2154 So if we are at offset c, the r3 value that we want is not yet saved
2155 on the stack, but it's been overwritten. The prologue analyzer will
2156 set fp_in_r1 when it sees the copy insn so we know to get the value
2157 from r1 instead. */
2158 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2159 && fp_in_r1)
2160 {
227e86ad 2161 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2162 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2163 }
1658da49 2164
26d08f08
AC
2165 {
2166 /* Convert all the offsets into addresses. */
2167 int reg;
65c5db89 2168 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2169 {
2170 if (trad_frame_addr_p (cache->saved_regs, reg))
2171 cache->saved_regs[reg].addr += cache->base;
2172 }
2173 }
2174
f77a2124 2175 {
f77a2124
RC
2176 struct gdbarch_tdep *tdep;
2177
f77a2124
RC
2178 tdep = gdbarch_tdep (gdbarch);
2179
2180 if (tdep->unwind_adjust_stub)
227e86ad 2181 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2182 }
2183
369aa520 2184 if (hppa_debug)
5af949e3
UW
2185 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2186 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2187 return (*this_cache);
2188}
2189
2190static void
227e86ad
JB
2191hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2192 struct frame_id *this_id)
26d08f08 2193{
d5c27f81 2194 struct hppa_frame_cache *info;
227e86ad 2195 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2196 struct unwind_table_entry *u;
2197
227e86ad
JB
2198 info = hppa_frame_cache (this_frame, this_cache);
2199 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2200
2201 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2202}
2203
227e86ad
JB
2204static struct value *
2205hppa_frame_prev_register (struct frame_info *this_frame,
2206 void **this_cache, int regnum)
26d08f08 2207{
227e86ad
JB
2208 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2209
1777feb0
MS
2210 return hppa_frame_prev_register_helper (this_frame,
2211 info->saved_regs, regnum);
227e86ad
JB
2212}
2213
2214static int
2215hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2216 struct frame_info *this_frame, void **this_cache)
2217{
2218 if (hppa_find_unwind_entry_in_block (this_frame))
2219 return 1;
2220
2221 return 0;
0da28f8a
RC
2222}
2223
2224static const struct frame_unwind hppa_frame_unwind =
2225{
2226 NORMAL_FRAME,
8fbca658 2227 default_frame_unwind_stop_reason,
0da28f8a 2228 hppa_frame_this_id,
227e86ad
JB
2229 hppa_frame_prev_register,
2230 NULL,
2231 hppa_frame_unwind_sniffer
0da28f8a
RC
2232};
2233
0da28f8a
RC
2234/* This is a generic fallback frame unwinder that kicks in if we fail all
2235 the other ones. Normally we would expect the stub and regular unwinder
2236 to work, but in some cases we might hit a function that just doesn't
2237 have any unwind information available. In this case we try to do
2238 unwinding solely based on code reading. This is obviously going to be
2239 slow, so only use this as a last resort. Currently this will only
2240 identify the stack and pc for the frame. */
2241
2242static struct hppa_frame_cache *
227e86ad 2243hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2244{
e17a4113
UW
2245 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2246 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2247 struct hppa_frame_cache *cache;
4ba6a975
MK
2248 unsigned int frame_size = 0;
2249 int found_rp = 0;
2250 CORE_ADDR start_pc;
0da28f8a 2251
d5c27f81 2252 if (hppa_debug)
4ba6a975
MK
2253 fprintf_unfiltered (gdb_stdlog,
2254 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2255 frame_relative_level (this_frame));
d5c27f81 2256
0da28f8a
RC
2257 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2258 (*this_cache) = cache;
227e86ad 2259 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2260
227e86ad 2261 start_pc = get_frame_func (this_frame);
4ba6a975 2262 if (start_pc)
0da28f8a 2263 {
227e86ad 2264 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2265 CORE_ADDR pc;
0da28f8a 2266
4ba6a975
MK
2267 for (pc = start_pc; pc < cur_pc; pc += 4)
2268 {
2269 unsigned int insn;
0da28f8a 2270
e17a4113 2271 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2272 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2273
4ba6a975
MK
2274 /* There are limited ways to store the return pointer into the
2275 stack. */
2276 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2277 {
2278 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2279 found_rp = 1;
2280 }
c4c79048
RC
2281 else if (insn == 0x0fc212c1
2282 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2283 {
2284 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2285 found_rp = 1;
2286 }
2287 }
412275d5 2288 }
0da28f8a 2289
d5c27f81 2290 if (hppa_debug)
4ba6a975
MK
2291 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2292 frame_size, found_rp);
d5c27f81 2293
227e86ad 2294 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2295 cache->base -= frame_size;
6d1be3f1 2296 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2297
2298 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2299 {
2300 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2301 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2302 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2303 }
412275d5
AC
2304 else
2305 {
4ba6a975 2306 ULONGEST rp;
227e86ad 2307 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2308 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2309 }
0da28f8a
RC
2310
2311 return cache;
26d08f08
AC
2312}
2313
0da28f8a 2314static void
227e86ad 2315hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2316 struct frame_id *this_id)
2317{
2318 struct hppa_frame_cache *info =
227e86ad
JB
2319 hppa_fallback_frame_cache (this_frame, this_cache);
2320
2321 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2322}
2323
227e86ad
JB
2324static struct value *
2325hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2326 void **this_cache, int regnum)
0da28f8a 2327{
1777feb0
MS
2328 struct hppa_frame_cache *info
2329 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2330
1777feb0
MS
2331 return hppa_frame_prev_register_helper (this_frame,
2332 info->saved_regs, regnum);
0da28f8a
RC
2333}
2334
2335static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2336{
2337 NORMAL_FRAME,
8fbca658 2338 default_frame_unwind_stop_reason,
0da28f8a 2339 hppa_fallback_frame_this_id,
227e86ad
JB
2340 hppa_fallback_frame_prev_register,
2341 NULL,
2342 default_frame_sniffer
26d08f08
AC
2343};
2344
7f07c5b6
RC
2345/* Stub frames, used for all kinds of call stubs. */
2346struct hppa_stub_unwind_cache
2347{
2348 CORE_ADDR base;
2349 struct trad_frame_saved_reg *saved_regs;
2350};
2351
2352static struct hppa_stub_unwind_cache *
227e86ad 2353hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2354 void **this_cache)
2355{
227e86ad 2356 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2357 struct hppa_stub_unwind_cache *info;
22b0923d 2358 struct unwind_table_entry *u;
7f07c5b6
RC
2359
2360 if (*this_cache)
2361 return *this_cache;
2362
2363 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2364 *this_cache = info;
227e86ad 2365 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2366
227e86ad 2367 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2368
090ccbb7 2369 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2370 {
2371 /* HPUX uses export stubs in function calls; the export stub clobbers
2372 the return value of the caller, and, later restores it from the
2373 stack. */
227e86ad 2374 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2375
2376 if (u && u->stub_unwind.stub_type == EXPORT)
2377 {
2378 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2379
2380 return info;
2381 }
2382 }
2383
2384 /* By default we assume that stubs do not change the rp. */
2385 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2386
7f07c5b6
RC
2387 return info;
2388}
2389
2390static void
227e86ad 2391hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2392 void **this_prologue_cache,
2393 struct frame_id *this_id)
2394{
2395 struct hppa_stub_unwind_cache *info
227e86ad 2396 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2397
2398 if (info)
227e86ad 2399 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2400}
2401
227e86ad
JB
2402static struct value *
2403hppa_stub_frame_prev_register (struct frame_info *this_frame,
2404 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2405{
2406 struct hppa_stub_unwind_cache *info
227e86ad 2407 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2408
227e86ad 2409 if (info == NULL)
8a3fe4f8 2410 error (_("Requesting registers from null frame."));
7f07c5b6 2411
1777feb0
MS
2412 return hppa_frame_prev_register_helper (this_frame,
2413 info->saved_regs, regnum);
227e86ad 2414}
7f07c5b6 2415
227e86ad
JB
2416static int
2417hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2418 struct frame_info *this_frame,
2419 void **this_cache)
7f07c5b6 2420{
227e86ad
JB
2421 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2422 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2423 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2424
6d1be3f1 2425 if (pc == 0
84674fe1 2426 || (tdep->in_solib_call_trampoline != NULL
e17a4113 2427 && tdep->in_solib_call_trampoline (gdbarch, pc, NULL))
464963c9 2428 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2429 return 1;
2430 return 0;
7f07c5b6
RC
2431}
2432
227e86ad
JB
2433static const struct frame_unwind hppa_stub_frame_unwind = {
2434 NORMAL_FRAME,
8fbca658 2435 default_frame_unwind_stop_reason,
227e86ad
JB
2436 hppa_stub_frame_this_id,
2437 hppa_stub_frame_prev_register,
2438 NULL,
2439 hppa_stub_unwind_sniffer
2440};
2441
26d08f08 2442static struct frame_id
227e86ad 2443hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2444{
227e86ad
JB
2445 return frame_id_build (get_frame_register_unsigned (this_frame,
2446 HPPA_SP_REGNUM),
2447 get_frame_pc (this_frame));
26d08f08
AC
2448}
2449
cc72850f 2450CORE_ADDR
26d08f08
AC
2451hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2452{
fe46cd3a
RC
2453 ULONGEST ipsw;
2454 CORE_ADDR pc;
2455
cc72850f
MK
2456 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2457 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2458
2459 /* If the current instruction is nullified, then we are effectively
2460 still executing the previous instruction. Pretend we are still
cc72850f
MK
2461 there. This is needed when single stepping; if the nullified
2462 instruction is on a different line, we don't want GDB to think
2463 we've stepped onto that line. */
fe46cd3a
RC
2464 if (ipsw & 0x00200000)
2465 pc -= 4;
2466
cc72850f 2467 return pc & ~0x3;
26d08f08
AC
2468}
2469
ff644745
JB
2470/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2471 Return NULL if no such symbol was found. */
2472
2473struct minimal_symbol *
2474hppa_lookup_stub_minimal_symbol (const char *name,
2475 enum unwind_stub_types stub_type)
2476{
2477 struct objfile *objfile;
2478 struct minimal_symbol *msym;
2479
2480 ALL_MSYMBOLS (objfile, msym)
2481 {
2482 if (strcmp (SYMBOL_LINKAGE_NAME (msym), name) == 0)
2483 {
2484 struct unwind_table_entry *u;
2485
2486 u = find_unwind_entry (SYMBOL_VALUE (msym));
2487 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2488 return msym;
2489 }
2490 }
2491
2492 return NULL;
2493}
2494
c906108c 2495static void
fba45db2 2496unwind_command (char *exp, int from_tty)
c906108c
SS
2497{
2498 CORE_ADDR address;
2499 struct unwind_table_entry *u;
2500
2501 /* If we have an expression, evaluate it and use it as the address. */
2502
2503 if (exp != 0 && *exp != 0)
2504 address = parse_and_eval_address (exp);
2505 else
2506 return;
2507
2508 u = find_unwind_entry (address);
2509
2510 if (!u)
2511 {
2512 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2513 return;
2514 }
2515
3329c4b5 2516 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2517
5af949e3 2518 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2519 gdb_flush (gdb_stdout);
c906108c 2520
5af949e3 2521 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2522 gdb_flush (gdb_stdout);
c906108c 2523
c906108c 2524#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2525
2526 printf_unfiltered ("\n\tflags =");
2527 pif (Cannot_unwind);
2528 pif (Millicode);
2529 pif (Millicode_save_sr0);
2530 pif (Entry_SR);
2531 pif (Args_stored);
2532 pif (Variable_Frame);
2533 pif (Separate_Package_Body);
2534 pif (Frame_Extension_Millicode);
2535 pif (Stack_Overflow_Check);
2536 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2537 pif (sr4export);
2538 pif (cxx_info);
2539 pif (cxx_try_catch);
2540 pif (sched_entry_seq);
c906108c
SS
2541 pif (Save_SP);
2542 pif (Save_RP);
2543 pif (Save_MRP_in_frame);
6fcecea0 2544 pif (save_r19);
c906108c
SS
2545 pif (Cleanup_defined);
2546 pif (MPE_XL_interrupt_marker);
2547 pif (HP_UX_interrupt_marker);
2548 pif (Large_frame);
6fcecea0 2549 pif (alloca_frame);
c906108c
SS
2550
2551 putchar_unfiltered ('\n');
2552
c906108c 2553#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2554
2555 pin (Region_description);
2556 pin (Entry_FR);
2557 pin (Entry_GR);
2558 pin (Total_frame_size);
57dac9e1
RC
2559
2560 if (u->stub_unwind.stub_type)
2561 {
2562 printf_unfiltered ("\tstub type = ");
2563 switch (u->stub_unwind.stub_type)
2564 {
2565 case LONG_BRANCH:
2566 printf_unfiltered ("long branch\n");
2567 break;
2568 case PARAMETER_RELOCATION:
2569 printf_unfiltered ("parameter relocation\n");
2570 break;
2571 case EXPORT:
2572 printf_unfiltered ("export\n");
2573 break;
2574 case IMPORT:
2575 printf_unfiltered ("import\n");
2576 break;
2577 case IMPORT_SHLIB:
2578 printf_unfiltered ("import shlib\n");
2579 break;
2580 default:
2581 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2582 }
2583 }
c906108c 2584}
c906108c 2585
38ca4e0c
MK
2586/* Return the GDB type object for the "standard" data type of data in
2587 register REGNUM. */
d709c020 2588
eded0a31 2589static struct type *
38ca4e0c 2590hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2591{
38ca4e0c 2592 if (regnum < HPPA_FP4_REGNUM)
df4df182 2593 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2594 else
27067745 2595 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2596}
2597
eded0a31 2598static struct type *
38ca4e0c 2599hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2600{
38ca4e0c 2601 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2602 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2603 else
27067745 2604 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2605}
2606
38ca4e0c
MK
2607/* Return non-zero if REGNUM is not a register available to the user
2608 through ptrace/ttrace. */
d709c020 2609
8d153463 2610static int
64a3914f 2611hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2612{
2613 return (regnum == 0
34f75cc1
RC
2614 || regnum == HPPA_PCSQ_HEAD_REGNUM
2615 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2616 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2617}
d709c020 2618
d037d088 2619static int
64a3914f 2620hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2621{
2622 /* cr26 and cr27 are readable (but not writable) from userspace. */
2623 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2624 return 0;
2625 else
64a3914f 2626 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2627}
2628
38ca4e0c 2629static int
64a3914f 2630hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2631{
2632 return (regnum == 0
2633 || regnum == HPPA_PCSQ_HEAD_REGNUM
2634 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2635 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2636}
2637
d037d088 2638static int
64a3914f 2639hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2640{
2641 /* cr26 and cr27 are readable (but not writable) from userspace. */
2642 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2643 return 0;
2644 else
64a3914f 2645 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2646}
2647
8d153463 2648static CORE_ADDR
24568a2c 2649hppa_smash_text_address (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2650{
2651 /* The low two bits of the PC on the PA contain the privilege level.
2652 Some genius implementing a (non-GCC) compiler apparently decided
2653 this means that "addresses" in a text section therefore include a
2654 privilege level, and thus symbol tables should contain these bits.
2655 This seems like a bonehead thing to do--anyway, it seems to work
2656 for our purposes to just ignore those bits. */
2657
2658 return (addr &= ~0x3);
2659}
2660
e127f0db
MK
2661/* Get the ARGIth function argument for the current function. */
2662
4a302917 2663static CORE_ADDR
143985b7
AF
2664hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2665 struct type *type)
2666{
e127f0db 2667 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2668}
2669
05d1431c 2670static enum register_status
0f8d9d59 2671hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2672 int regnum, gdb_byte *buf)
0f8d9d59 2673{
05d1431c
PA
2674 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2675 ULONGEST tmp;
2676 enum register_status status;
0f8d9d59 2677
05d1431c
PA
2678 status = regcache_raw_read_unsigned (regcache, regnum, &tmp);
2679 if (status == REG_VALID)
2680 {
2681 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2682 tmp &= ~0x3;
2683 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2684 }
2685 return status;
0f8d9d59
RC
2686}
2687
d49771ef 2688static CORE_ADDR
e38c262f 2689hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2690{
2691 return 0;
2692}
2693
227e86ad
JB
2694struct value *
2695hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2696 struct trad_frame_saved_reg saved_regs[],
227e86ad 2697 int regnum)
0da28f8a 2698{
227e86ad 2699 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2700 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2701
8693c419
MK
2702 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2703 {
227e86ad
JB
2704 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2705 CORE_ADDR pc;
2706 struct value *pcoq_val =
2707 trad_frame_get_prev_register (this_frame, saved_regs,
2708 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2709
e17a4113
UW
2710 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2711 size, byte_order);
227e86ad 2712 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2713 }
0da28f8a 2714
cc72850f
MK
2715 /* Make sure the "flags" register is zero in all unwound frames.
2716 The "flags" registers is a HP-UX specific wart, and only the code
2717 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2718 with it here. This shouldn't affect other systems since those
2719 should provide zero for the "flags" register anyway. */
2720 if (regnum == HPPA_FLAGS_REGNUM)
227e86ad 2721 return frame_unwind_got_constant (this_frame, regnum, 0);
cc72850f 2722
227e86ad 2723 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2724}
8693c419 2725\f
0da28f8a 2726
34f55018
MK
2727/* An instruction to match. */
2728struct insn_pattern
2729{
2730 unsigned int data; /* See if it matches this.... */
2731 unsigned int mask; /* ... with this mask. */
2732};
2733
2734/* See bfd/elf32-hppa.c */
2735static struct insn_pattern hppa_long_branch_stub[] = {
2736 /* ldil LR'xxx,%r1 */
2737 { 0x20200000, 0xffe00000 },
2738 /* be,n RR'xxx(%sr4,%r1) */
2739 { 0xe0202002, 0xffe02002 },
2740 { 0, 0 }
2741};
2742
2743static struct insn_pattern hppa_long_branch_pic_stub[] = {
2744 /* b,l .+8, %r1 */
2745 { 0xe8200000, 0xffe00000 },
2746 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2747 { 0x28200000, 0xffe00000 },
2748 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2749 { 0xe0202002, 0xffe02002 },
2750 { 0, 0 }
2751};
2752
2753static struct insn_pattern hppa_import_stub[] = {
2754 /* addil LR'xxx, %dp */
2755 { 0x2b600000, 0xffe00000 },
2756 /* ldw RR'xxx(%r1), %r21 */
2757 { 0x48350000, 0xffffb000 },
2758 /* bv %r0(%r21) */
2759 { 0xeaa0c000, 0xffffffff },
2760 /* ldw RR'xxx+4(%r1), %r19 */
2761 { 0x48330000, 0xffffb000 },
2762 { 0, 0 }
2763};
2764
2765static struct insn_pattern hppa_import_pic_stub[] = {
2766 /* addil LR'xxx,%r19 */
2767 { 0x2a600000, 0xffe00000 },
2768 /* ldw RR'xxx(%r1),%r21 */
2769 { 0x48350000, 0xffffb000 },
2770 /* bv %r0(%r21) */
2771 { 0xeaa0c000, 0xffffffff },
2772 /* ldw RR'xxx+4(%r1),%r19 */
2773 { 0x48330000, 0xffffb000 },
2774 { 0, 0 },
2775};
2776
2777static struct insn_pattern hppa_plt_stub[] = {
2778 /* b,l 1b, %r20 - 1b is 3 insns before here */
2779 { 0xea9f1fdd, 0xffffffff },
2780 /* depi 0,31,2,%r20 */
2781 { 0xd6801c1e, 0xffffffff },
2782 { 0, 0 }
2783};
2784
2785static struct insn_pattern hppa_sigtramp[] = {
2786 /* ldi 0, %r25 or ldi 1, %r25 */
2787 { 0x34190000, 0xfffffffd },
2788 /* ldi __NR_rt_sigreturn, %r20 */
2789 { 0x3414015a, 0xffffffff },
2790 /* be,l 0x100(%sr2, %r0), %sr0, %r31 */
2791 { 0xe4008200, 0xffffffff },
2792 /* nop */
2793 { 0x08000240, 0xffffffff },
2794 { 0, 0 }
2795};
2796
2797/* Maximum number of instructions on the patterns above. */
2798#define HPPA_MAX_INSN_PATTERN_LEN 4
2799
2800/* Return non-zero if the instructions at PC match the series
2801 described in PATTERN, or zero otherwise. PATTERN is an array of
2802 'struct insn_pattern' objects, terminated by an entry whose mask is
2803 zero.
2804
2805 When the match is successful, fill INSN[i] with what PATTERN[i]
2806 matched. */
2807
2808static int
e17a4113
UW
2809hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2810 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2811{
e17a4113 2812 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2813 CORE_ADDR npc = pc;
2814 int i;
2815
2816 for (i = 0; pattern[i].mask; i++)
2817 {
2818 gdb_byte buf[HPPA_INSN_SIZE];
2819
8defab1a 2820 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2821 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2822 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2823 npc += 4;
2824 else
2825 return 0;
2826 }
2827
2828 return 1;
2829}
2830
2831/* This relaxed version of the insstruction matcher allows us to match
2832 from somewhere inside the pattern, by looking backwards in the
2833 instruction scheme. */
2834
2835static int
e17a4113
UW
2836hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2837 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2838{
2839 int offset, len = 0;
2840
2841 while (pattern[len].mask)
2842 len++;
2843
2844 for (offset = 0; offset < len; offset++)
e17a4113
UW
2845 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2846 pattern, insn))
34f55018
MK
2847 return 1;
2848
2849 return 0;
2850}
2851
2852static int
2853hppa_in_dyncall (CORE_ADDR pc)
2854{
2855 struct unwind_table_entry *u;
2856
2857 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2858 if (!u)
2859 return 0;
2860
2861 return (pc >= u->region_start && pc <= u->region_end);
2862}
2863
2864int
e17a4113
UW
2865hppa_in_solib_call_trampoline (struct gdbarch *gdbarch,
2866 CORE_ADDR pc, char *name)
34f55018
MK
2867{
2868 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2869 struct unwind_table_entry *u;
2870
2871 if (in_plt_section (pc, name) || hppa_in_dyncall (pc))
2872 return 1;
2873
2874 /* The GNU toolchain produces linker stubs without unwind
2875 information. Since the pattern matching for linker stubs can be
2876 quite slow, so bail out if we do have an unwind entry. */
2877
2878 u = find_unwind_entry (pc);
806e23c0 2879 if (u != NULL)
34f55018
MK
2880 return 0;
2881
e17a4113
UW
2882 return
2883 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2884 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2885 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2886 || hppa_match_insns_relaxed (gdbarch, pc,
2887 hppa_long_branch_pic_stub, insn));
34f55018
MK
2888}
2889
2890/* This code skips several kind of "trampolines" used on PA-RISC
2891 systems: $$dyncall, import stubs and PLT stubs. */
2892
2893CORE_ADDR
52f729a7 2894hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2895{
0dfff4cb
UW
2896 struct gdbarch *gdbarch = get_frame_arch (frame);
2897 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2898
34f55018
MK
2899 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2900 int dp_rel;
2901
2902 /* $$dyncall handles both PLABELs and direct addresses. */
2903 if (hppa_in_dyncall (pc))
2904 {
52f729a7 2905 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2906
2907 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2908 if (pc & 0x2)
0dfff4cb 2909 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2910
2911 return pc;
2912 }
2913
e17a4113
UW
2914 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2915 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2916 {
2917 /* Extract the target address from the addil/ldw sequence. */
2918 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2919
2920 if (dp_rel)
52f729a7 2921 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2922 else
52f729a7 2923 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2924
2925 /* fallthrough */
2926 }
2927
2928 if (in_plt_section (pc, NULL))
2929 {
0dfff4cb 2930 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2931
2932 /* If the PLT slot has not yet been resolved, the target will be
2933 the PLT stub. */
2934 if (in_plt_section (pc, NULL))
2935 {
2936 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 2937 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2938 {
5af949e3
UW
2939 warning (_("Cannot resolve PLT stub at %s."),
2940 paddress (gdbarch, pc));
34f55018
MK
2941 return 0;
2942 }
2943
2944 /* This should point to the fixup routine. */
0dfff4cb 2945 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2946 }
2947 }
2948
2949 return pc;
2950}
2951\f
2952
8e8b2dba
MC
2953/* Here is a table of C type sizes on hppa with various compiles
2954 and options. I measured this on PA 9000/800 with HP-UX 11.11
2955 and these compilers:
2956
2957 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2958 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2959 /opt/aCC/bin/aCC B3910B A.03.45
2960 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2961
2962 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2963 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2964 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2965 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2966 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2967 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2968 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2969 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2970
2971 Each line is:
2972
2973 compiler and options
2974 char, short, int, long, long long
2975 float, double, long double
2976 char *, void (*)()
2977
2978 So all these compilers use either ILP32 or LP64 model.
2979 TODO: gcc has more options so it needs more investigation.
2980
a2379359
MC
2981 For floating point types, see:
2982
2983 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2984 HP-UX floating-point guide, hpux 11.00
2985
8e8b2dba
MC
2986 -- chastain 2003-12-18 */
2987
e6e68f1f
JB
2988static struct gdbarch *
2989hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2990{
3ff7cf9e 2991 struct gdbarch_tdep *tdep;
e6e68f1f 2992 struct gdbarch *gdbarch;
59623e27
JB
2993
2994 /* Try to determine the ABI of the object we are loading. */
4be87837 2995 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2996 {
4be87837
DJ
2997 /* If it's a SOM file, assume it's HP/UX SOM. */
2998 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2999 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3000 }
e6e68f1f
JB
3001
3002 /* find a candidate among the list of pre-declared architectures. */
3003 arches = gdbarch_list_lookup_by_info (arches, &info);
3004 if (arches != NULL)
3005 return (arches->gdbarch);
3006
3007 /* If none found, then allocate and initialize one. */
fdd72f95 3008 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
3009 gdbarch = gdbarch_alloc (&info, tdep);
3010
3011 /* Determine from the bfd_arch_info structure if we are dealing with
3012 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3013 then default to a 32bit machine. */
3014 if (info.bfd_arch_info != NULL)
3015 tdep->bytes_per_address =
3016 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3017 else
3018 tdep->bytes_per_address = 4;
3019
d49771ef
RC
3020 tdep->find_global_pointer = hppa_find_global_pointer;
3021
3ff7cf9e
JB
3022 /* Some parts of the gdbarch vector depend on whether we are running
3023 on a 32 bits or 64 bits target. */
3024 switch (tdep->bytes_per_address)
3025 {
3026 case 4:
3027 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3028 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3029 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3030 set_gdbarch_cannot_store_register (gdbarch,
3031 hppa32_cannot_store_register);
3032 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3033 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3034 break;
3035 case 8:
3036 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3037 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3038 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3039 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3040 set_gdbarch_cannot_store_register (gdbarch,
3041 hppa64_cannot_store_register);
3042 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3043 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3044 break;
3045 default:
e2e0b3e5 3046 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3047 tdep->bytes_per_address);
3048 }
3049
3ff7cf9e 3050 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3051 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3052
8e8b2dba
MC
3053 /* The following gdbarch vector elements are the same in both ILP32
3054 and LP64, but might show differences some day. */
3055 set_gdbarch_long_long_bit (gdbarch, 64);
3056 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3057 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3058
3ff7cf9e
JB
3059 /* The following gdbarch vector elements do not depend on the address
3060 size, or in any other gdbarch element previously set. */
60383d10 3061 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3062 set_gdbarch_in_function_epilogue_p (gdbarch,
3063 hppa_in_function_epilogue_p);
a2a84a72 3064 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3065 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3066 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
b6fbdd1d 3067 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
3068 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
3069 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3070 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3071 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3072
143985b7
AF
3073 /* Helper for function argument information. */
3074 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3075
36482093
AC
3076 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3077
3a3bc038
AC
3078 /* When a hardware watchpoint triggers, we'll move the inferior past
3079 it by removing all eventpoints; stepping past the instruction
3080 that caused the trigger; reinserting eventpoints; and checking
3081 whether any watched location changed. */
3082 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3083
5979bc46 3084 /* Inferior function call methods. */
fca7aa43 3085 switch (tdep->bytes_per_address)
5979bc46 3086 {
fca7aa43
AC
3087 case 4:
3088 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3089 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3090 set_gdbarch_convert_from_func_ptr_addr
3091 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3092 break;
3093 case 8:
782eae8b
AC
3094 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3095 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3096 break;
782eae8b 3097 default:
e2e0b3e5 3098 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3099 }
3100
3101 /* Struct return methods. */
fca7aa43 3102 switch (tdep->bytes_per_address)
fad850b2 3103 {
fca7aa43
AC
3104 case 4:
3105 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3106 break;
3107 case 8:
782eae8b 3108 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3109 break;
fca7aa43 3110 default:
e2e0b3e5 3111 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3112 }
7f07c5b6 3113
85f4f2d8 3114 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3115 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3116
5979bc46 3117 /* Frame unwind methods. */
227e86ad 3118 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3119 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3120
50306a9d
RC
3121 /* Hook in ABI-specific overrides, if they have been registered. */
3122 gdbarch_init_osabi (info, gdbarch);
3123
7f07c5b6 3124 /* Hook in the default unwinders. */
227e86ad
JB
3125 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3126 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3127 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3128
e6e68f1f
JB
3129 return gdbarch;
3130}
3131
3132static void
464963c9 3133hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3134{
464963c9 3135 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3136
3137 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3138 tdep->bytes_per_address);
3139 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3140}
3141
72753510
PA
3142/* Provide a prototype to silence -Wmissing-prototypes. */
3143extern initialize_file_ftype _initialize_hppa_tdep;
3144
4facf7e8
JB
3145void
3146_initialize_hppa_tdep (void)
3147{
3148 struct cmd_list_element *c;
4facf7e8 3149
e6e68f1f 3150 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3151
7c46b9fb
RC
3152 hppa_objfile_priv_data = register_objfile_data ();
3153
4facf7e8 3154 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3155 _("Print unwind table entry at given address."),
4facf7e8
JB
3156 &maintenanceprintlist);
3157
1777feb0 3158 /* Debug this files internals. */
7915a72c
AC
3159 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3160Set whether hppa target specific debugging information should be displayed."),
3161 _("\
3162Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3163This flag controls whether hppa target specific debugging information is\n\
3164displayed. This information is particularly useful for debugging frame\n\
7915a72c 3165unwinding problems."),
2c5b56ce 3166 NULL,
7915a72c 3167 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3168 &setdebuglist, &showdebuglist);
4facf7e8 3169}
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