2010-10-08 Bernd Schmidt <bernds@codesourcery.com>
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
6aba47ca 3 Copyright (C) 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4c38e0a4 4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
a7aad9aa 5 Free Software Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
a9762ec7 14 the Free Software Foundation; either version 3 of the License, or
c5aa993b 15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b 22 You should have received a copy of the GNU General Public License
a9762ec7 23 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
24
25#include "defs.h"
c906108c
SS
26#include "bfd.h"
27#include "inferior.h"
4e052eda 28#include "regcache.h"
e5d66720 29#include "completer.h"
59623e27 30#include "osabi.h"
a7ff40e7 31#include "gdb_assert.h"
343af405 32#include "arch-utils.h"
c906108c
SS
33/* For argument passing to the inferior */
34#include "symtab.h"
fde2cceb 35#include "dis-asm.h"
26d08f08
AC
36#include "trad-frame.h"
37#include "frame-unwind.h"
38#include "frame-base.h"
c906108c 39
c906108c
SS
40#include "gdbcore.h"
41#include "gdbcmd.h"
e6bb342a 42#include "gdbtypes.h"
c906108c 43#include "objfiles.h"
3ff7cf9e 44#include "hppa-tdep.h"
c906108c 45
369aa520
RC
46static int hppa_debug = 0;
47
60383d10 48/* Some local constants. */
3ff7cf9e
JB
49static const int hppa32_num_regs = 128;
50static const int hppa64_num_regs = 96;
51
7c46b9fb
RC
52/* hppa-specific object data -- unwind and solib info.
53 TODO/maybe: think about splitting this into two parts; the unwind data is
54 common to all hppa targets, but is only used in this file; we can register
55 that separately and make this static. The solib data is probably hpux-
56 specific, so we can create a separate extern objfile_data that is registered
57 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
58const struct objfile_data *hppa_objfile_priv_data = NULL;
59
e2ac8128
JB
60/* Get at various relevent fields of an instruction word. */
61#define MASK_5 0x1f
62#define MASK_11 0x7ff
63#define MASK_14 0x3fff
64#define MASK_21 0x1fffff
65
e2ac8128
JB
66/* Sizes (in bytes) of the native unwind entries. */
67#define UNWIND_ENTRY_SIZE 16
68#define STUB_UNWIND_ENTRY_SIZE 8
69
c906108c
SS
70/* Routines to extract various sized constants out of hppa
71 instructions. */
72
73/* This assumes that no garbage lies outside of the lower bits of
74 value. */
75
63807e1d 76static int
abc485a1 77hppa_sign_extend (unsigned val, unsigned bits)
c906108c 78{
c5aa993b 79 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
80}
81
82/* For many immediate values the sign bit is the low bit! */
83
63807e1d 84static int
abc485a1 85hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 86{
c5aa993b 87 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
88}
89
e2ac8128
JB
90/* Extract the bits at positions between FROM and TO, using HP's numbering
91 (MSB = 0). */
92
abc485a1
RC
93int
94hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
95{
96 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
97}
98
c906108c
SS
99/* extract the immediate field from a ld{bhw}s instruction */
100
abc485a1
RC
101int
102hppa_extract_5_load (unsigned word)
c906108c 103{
abc485a1 104 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
105}
106
c906108c
SS
107/* extract the immediate field from a break instruction */
108
abc485a1
RC
109unsigned
110hppa_extract_5r_store (unsigned word)
c906108c
SS
111{
112 return (word & MASK_5);
113}
114
115/* extract the immediate field from a {sr}sm instruction */
116
abc485a1
RC
117unsigned
118hppa_extract_5R_store (unsigned word)
c906108c
SS
119{
120 return (word >> 16 & MASK_5);
121}
122
c906108c
SS
123/* extract a 14 bit immediate field */
124
abc485a1
RC
125int
126hppa_extract_14 (unsigned word)
c906108c 127{
abc485a1 128 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
129}
130
c906108c
SS
131/* extract a 21 bit constant */
132
abc485a1
RC
133int
134hppa_extract_21 (unsigned word)
c906108c
SS
135{
136 int val;
137
138 word &= MASK_21;
139 word <<= 11;
abc485a1 140 val = hppa_get_field (word, 20, 20);
c906108c 141 val <<= 11;
abc485a1 142 val |= hppa_get_field (word, 9, 19);
c906108c 143 val <<= 2;
abc485a1 144 val |= hppa_get_field (word, 5, 6);
c906108c 145 val <<= 5;
abc485a1 146 val |= hppa_get_field (word, 0, 4);
c906108c 147 val <<= 2;
abc485a1
RC
148 val |= hppa_get_field (word, 7, 8);
149 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
150}
151
c906108c
SS
152/* extract a 17 bit constant from branch instructions, returning the
153 19 bit signed value. */
154
abc485a1
RC
155int
156hppa_extract_17 (unsigned word)
c906108c 157{
abc485a1
RC
158 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
159 hppa_get_field (word, 29, 29) << 10 |
160 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
161 (word & 0x1) << 16, 17) << 2;
162}
3388d7ff
RC
163
164CORE_ADDR
165hppa_symbol_address(const char *sym)
166{
167 struct minimal_symbol *minsym;
168
169 minsym = lookup_minimal_symbol (sym, NULL, NULL);
170 if (minsym)
171 return SYMBOL_VALUE_ADDRESS (minsym);
172 else
173 return (CORE_ADDR)-1;
174}
77d18ded
RC
175
176struct hppa_objfile_private *
177hppa_init_objfile_priv_data (struct objfile *objfile)
178{
179 struct hppa_objfile_private *priv;
180
181 priv = (struct hppa_objfile_private *)
182 obstack_alloc (&objfile->objfile_obstack,
183 sizeof (struct hppa_objfile_private));
184 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
185 memset (priv, 0, sizeof (*priv));
186
187 return priv;
188}
c906108c
SS
189\f
190
191/* Compare the start address for two unwind entries returning 1 if
192 the first address is larger than the second, -1 if the second is
193 larger than the first, and zero if they are equal. */
194
195static int
fba45db2 196compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
197{
198 const struct unwind_table_entry *a = arg1;
199 const struct unwind_table_entry *b = arg2;
200
201 if (a->region_start > b->region_start)
202 return 1;
203 else if (a->region_start < b->region_start)
204 return -1;
205 else
206 return 0;
207}
208
53a5351d 209static void
fdd72f95 210record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 211{
fdd72f95 212 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 213 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
214 {
215 bfd_vma value = section->vma - section->filepos;
216 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
217
218 if (value < *low_text_segment_address)
219 *low_text_segment_address = value;
220 }
53a5351d
JM
221}
222
c906108c 223static void
fba45db2
KB
224internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
225 asection *section, unsigned int entries, unsigned int size,
226 CORE_ADDR text_offset)
c906108c
SS
227{
228 /* We will read the unwind entries into temporary memory, then
229 fill in the actual unwind table. */
fdd72f95 230
c906108c
SS
231 if (size > 0)
232 {
5db8bbe5 233 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
234 unsigned long tmp;
235 unsigned i;
236 char *buf = alloca (size);
fdd72f95 237 CORE_ADDR low_text_segment_address;
c906108c 238
fdd72f95 239 /* For ELF targets, then unwinds are supposed to
c2c6d25f
JM
240 be segment relative offsets instead of absolute addresses.
241
242 Note that when loading a shared library (text_offset != 0) the
243 unwinds are already relative to the text_offset that will be
244 passed in. */
5db8bbe5 245 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 246 {
fdd72f95
RC
247 low_text_segment_address = -1;
248
53a5351d 249 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
250 record_text_segment_lowaddr,
251 &low_text_segment_address);
53a5351d 252
fdd72f95 253 text_offset = low_text_segment_address;
53a5351d 254 }
5db8bbe5 255 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 256 {
5db8bbe5 257 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 258 }
53a5351d 259
c906108c
SS
260 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
261
262 /* Now internalize the information being careful to handle host/target
c5aa993b 263 endian issues. */
c906108c
SS
264 for (i = 0; i < entries; i++)
265 {
266 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 267 (bfd_byte *) buf);
c906108c
SS
268 table[i].region_start += text_offset;
269 buf += 4;
c5aa993b 270 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
271 table[i].region_end += text_offset;
272 buf += 4;
c5aa993b 273 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
274 buf += 4;
275 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
276 table[i].Millicode = (tmp >> 30) & 0x1;
277 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
278 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 279 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
280 table[i].Entry_SR = (tmp >> 25) & 0x1;
281 table[i].Entry_FR = (tmp >> 21) & 0xf;
282 table[i].Entry_GR = (tmp >> 16) & 0x1f;
283 table[i].Args_stored = (tmp >> 15) & 0x1;
284 table[i].Variable_Frame = (tmp >> 14) & 0x1;
285 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
286 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
287 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
288 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 289 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
290 table[i].cxx_info = (tmp >> 8) & 0x1;
291 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
292 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 293 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
294 table[i].Save_SP = (tmp >> 4) & 0x1;
295 table[i].Save_RP = (tmp >> 3) & 0x1;
296 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 297 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 298 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 299 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 buf += 4;
301 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
302 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
303 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
304 table[i].alloca_frame = (tmp >> 28) & 0x1;
305 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
306 table[i].Total_frame_size = tmp & 0x7ffffff;
307
c5aa993b 308 /* Stub unwinds are handled elsewhere. */
c906108c
SS
309 table[i].stub_unwind.stub_type = 0;
310 table[i].stub_unwind.padding = 0;
311 }
312 }
313}
314
315/* Read in the backtrace information stored in the `$UNWIND_START$' section of
316 the object file. This info is used mainly by find_unwind_entry() to find
317 out the stack frame size and frame pointer used by procedures. We put
318 everything on the psymbol obstack in the objfile so that it automatically
319 gets freed when the objfile is destroyed. */
320
321static void
fba45db2 322read_unwind_info (struct objfile *objfile)
c906108c 323{
d4f3574e
SS
324 asection *unwind_sec, *stub_unwind_sec;
325 unsigned unwind_size, stub_unwind_size, total_size;
326 unsigned index, unwind_entries;
c906108c
SS
327 unsigned stub_entries, total_entries;
328 CORE_ADDR text_offset;
7c46b9fb
RC
329 struct hppa_unwind_info *ui;
330 struct hppa_objfile_private *obj_private;
c906108c
SS
331
332 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
333 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
334 sizeof (struct hppa_unwind_info));
c906108c
SS
335
336 ui->table = NULL;
337 ui->cache = NULL;
338 ui->last = -1;
339
d4f3574e
SS
340 /* For reasons unknown the HP PA64 tools generate multiple unwinder
341 sections in a single executable. So we just iterate over every
342 section in the BFD looking for unwinder sections intead of trying
343 to do a lookup with bfd_get_section_by_name.
c906108c 344
d4f3574e
SS
345 First determine the total size of the unwind tables so that we
346 can allocate memory in a nice big hunk. */
347 total_entries = 0;
348 for (unwind_sec = objfile->obfd->sections;
349 unwind_sec;
350 unwind_sec = unwind_sec->next)
c906108c 351 {
d4f3574e
SS
352 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
353 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
354 {
355 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
356 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 357
d4f3574e
SS
358 total_entries += unwind_entries;
359 }
c906108c
SS
360 }
361
d4f3574e 362 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 363 use stub unwinds at the current time. */
d4f3574e
SS
364 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
365
c906108c
SS
366 if (stub_unwind_sec)
367 {
368 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
369 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
370 }
371 else
372 {
373 stub_unwind_size = 0;
374 stub_entries = 0;
375 }
376
377 /* Compute total number of unwind entries and their total size. */
d4f3574e 378 total_entries += stub_entries;
c906108c
SS
379 total_size = total_entries * sizeof (struct unwind_table_entry);
380
381 /* Allocate memory for the unwind table. */
382 ui->table = (struct unwind_table_entry *)
8b92e4d5 383 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 384 ui->last = total_entries - 1;
c906108c 385
d4f3574e
SS
386 /* Now read in each unwind section and internalize the standard unwind
387 entries. */
c906108c 388 index = 0;
d4f3574e
SS
389 for (unwind_sec = objfile->obfd->sections;
390 unwind_sec;
391 unwind_sec = unwind_sec->next)
392 {
393 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
394 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
395 {
396 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
397 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
398
399 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
400 unwind_entries, unwind_size, text_offset);
401 index += unwind_entries;
402 }
403 }
404
405 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
406 if (stub_unwind_size > 0)
407 {
408 unsigned int i;
409 char *buf = alloca (stub_unwind_size);
410
411 /* Read in the stub unwind entries. */
412 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
413 0, stub_unwind_size);
414
415 /* Now convert them into regular unwind entries. */
416 for (i = 0; i < stub_entries; i++, index++)
417 {
418 /* Clear out the next unwind entry. */
419 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
420
421 /* Convert offset & size into region_start and region_end.
422 Stuff away the stub type into "reserved" fields. */
423 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
424 (bfd_byte *) buf);
425 ui->table[index].region_start += text_offset;
426 buf += 4;
427 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 428 (bfd_byte *) buf);
c906108c
SS
429 buf += 2;
430 ui->table[index].region_end
c5aa993b
JM
431 = ui->table[index].region_start + 4 *
432 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
433 buf += 2;
434 }
435
436 }
437
438 /* Unwind table needs to be kept sorted. */
439 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
440 compare_unwind_entries);
441
442 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
443 obj_private = (struct hppa_objfile_private *)
444 objfile_data (objfile, hppa_objfile_priv_data);
445 if (obj_private == NULL)
77d18ded
RC
446 obj_private = hppa_init_objfile_priv_data (objfile);
447
c906108c
SS
448 obj_private->unwind_info = ui;
449}
450
451/* Lookup the unwind (stack backtrace) info for the given PC. We search all
452 of the objfiles seeking the unwind table entry for this PC. Each objfile
453 contains a sorted list of struct unwind_table_entry. Since we do a binary
454 search of the unwind tables, we depend upon them to be sorted. */
455
456struct unwind_table_entry *
fba45db2 457find_unwind_entry (CORE_ADDR pc)
c906108c
SS
458{
459 int first, middle, last;
460 struct objfile *objfile;
7c46b9fb 461 struct hppa_objfile_private *priv;
c906108c 462
369aa520 463 if (hppa_debug)
5af949e3
UW
464 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
465 hex_string (pc));
369aa520 466
c906108c
SS
467 /* A function at address 0? Not in HP-UX! */
468 if (pc == (CORE_ADDR) 0)
369aa520
RC
469 {
470 if (hppa_debug)
471 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
472 return NULL;
473 }
c906108c
SS
474
475 ALL_OBJFILES (objfile)
c5aa993b 476 {
7c46b9fb 477 struct hppa_unwind_info *ui;
c5aa993b 478 ui = NULL;
7c46b9fb
RC
479 priv = objfile_data (objfile, hppa_objfile_priv_data);
480 if (priv)
481 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 482
c5aa993b
JM
483 if (!ui)
484 {
485 read_unwind_info (objfile);
7c46b9fb
RC
486 priv = objfile_data (objfile, hppa_objfile_priv_data);
487 if (priv == NULL)
8a3fe4f8 488 error (_("Internal error reading unwind information."));
7c46b9fb 489 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 490 }
c906108c 491
c5aa993b 492 /* First, check the cache */
c906108c 493
c5aa993b
JM
494 if (ui->cache
495 && pc >= ui->cache->region_start
496 && pc <= ui->cache->region_end)
369aa520
RC
497 {
498 if (hppa_debug)
5af949e3
UW
499 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
500 hex_string ((uintptr_t) ui->cache));
369aa520
RC
501 return ui->cache;
502 }
c906108c 503
c5aa993b 504 /* Not in the cache, do a binary search */
c906108c 505
c5aa993b
JM
506 first = 0;
507 last = ui->last;
c906108c 508
c5aa993b
JM
509 while (first <= last)
510 {
511 middle = (first + last) / 2;
512 if (pc >= ui->table[middle].region_start
513 && pc <= ui->table[middle].region_end)
514 {
515 ui->cache = &ui->table[middle];
369aa520 516 if (hppa_debug)
5af949e3
UW
517 fprintf_unfiltered (gdb_stdlog, "%s }\n",
518 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
519 return &ui->table[middle];
520 }
c906108c 521
c5aa993b
JM
522 if (pc < ui->table[middle].region_start)
523 last = middle - 1;
524 else
525 first = middle + 1;
526 }
527 } /* ALL_OBJFILES() */
369aa520
RC
528
529 if (hppa_debug)
530 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
531
c906108c
SS
532 return NULL;
533}
534
1fb24930
RC
535/* The epilogue is defined here as the area either on the `bv' instruction
536 itself or an instruction which destroys the function's stack frame.
537
538 We do not assume that the epilogue is at the end of a function as we can
539 also have return sequences in the middle of a function. */
540static int
541hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
542{
e17a4113 543 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
544 unsigned long status;
545 unsigned int inst;
546 char buf[4];
547 int off;
548
8defab1a 549 status = target_read_memory (pc, buf, 4);
1fb24930
RC
550 if (status != 0)
551 return 0;
552
e17a4113 553 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
554
555 /* The most common way to perform a stack adjustment ldo X(sp),sp
556 We are destroying a stack frame if the offset is negative. */
557 if ((inst & 0xffffc000) == 0x37de0000
558 && hppa_extract_14 (inst) < 0)
559 return 1;
560
561 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
562 if (((inst & 0x0fc010e0) == 0x0fc010e0
563 || (inst & 0x0fc010e0) == 0x0fc010e0)
564 && hppa_extract_14 (inst) < 0)
565 return 1;
566
567 /* bv %r0(%rp) or bv,n %r0(%rp) */
568 if (inst == 0xe840c000 || inst == 0xe840c002)
569 return 1;
570
571 return 0;
572}
573
85f4f2d8 574static const unsigned char *
67d57894 575hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 576{
56132691 577 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
578 (*len) = sizeof (breakpoint);
579 return breakpoint;
580}
581
e23457df
AC
582/* Return the name of a register. */
583
4a302917 584static const char *
d93859e2 585hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
586{
587 static char *names[] = {
588 "flags", "r1", "rp", "r3",
589 "r4", "r5", "r6", "r7",
590 "r8", "r9", "r10", "r11",
591 "r12", "r13", "r14", "r15",
592 "r16", "r17", "r18", "r19",
593 "r20", "r21", "r22", "r23",
594 "r24", "r25", "r26", "dp",
595 "ret0", "ret1", "sp", "r31",
596 "sar", "pcoqh", "pcsqh", "pcoqt",
597 "pcsqt", "eiem", "iir", "isr",
598 "ior", "ipsw", "goto", "sr4",
599 "sr0", "sr1", "sr2", "sr3",
600 "sr5", "sr6", "sr7", "cr0",
601 "cr8", "cr9", "ccr", "cr12",
602 "cr13", "cr24", "cr25", "cr26",
603 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
604 "fpsr", "fpe1", "fpe2", "fpe3",
605 "fpe4", "fpe5", "fpe6", "fpe7",
606 "fr4", "fr4R", "fr5", "fr5R",
607 "fr6", "fr6R", "fr7", "fr7R",
608 "fr8", "fr8R", "fr9", "fr9R",
609 "fr10", "fr10R", "fr11", "fr11R",
610 "fr12", "fr12R", "fr13", "fr13R",
611 "fr14", "fr14R", "fr15", "fr15R",
612 "fr16", "fr16R", "fr17", "fr17R",
613 "fr18", "fr18R", "fr19", "fr19R",
614 "fr20", "fr20R", "fr21", "fr21R",
615 "fr22", "fr22R", "fr23", "fr23R",
616 "fr24", "fr24R", "fr25", "fr25R",
617 "fr26", "fr26R", "fr27", "fr27R",
618 "fr28", "fr28R", "fr29", "fr29R",
619 "fr30", "fr30R", "fr31", "fr31R"
620 };
621 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
622 return NULL;
623 else
624 return names[i];
625}
626
4a302917 627static const char *
d93859e2 628hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
629{
630 static char *names[] = {
631 "flags", "r1", "rp", "r3",
632 "r4", "r5", "r6", "r7",
633 "r8", "r9", "r10", "r11",
634 "r12", "r13", "r14", "r15",
635 "r16", "r17", "r18", "r19",
636 "r20", "r21", "r22", "r23",
637 "r24", "r25", "r26", "dp",
638 "ret0", "ret1", "sp", "r31",
639 "sar", "pcoqh", "pcsqh", "pcoqt",
640 "pcsqt", "eiem", "iir", "isr",
641 "ior", "ipsw", "goto", "sr4",
642 "sr0", "sr1", "sr2", "sr3",
643 "sr5", "sr6", "sr7", "cr0",
644 "cr8", "cr9", "ccr", "cr12",
645 "cr13", "cr24", "cr25", "cr26",
646 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
647 "fpsr", "fpe1", "fpe2", "fpe3",
648 "fr4", "fr5", "fr6", "fr7",
649 "fr8", "fr9", "fr10", "fr11",
650 "fr12", "fr13", "fr14", "fr15",
651 "fr16", "fr17", "fr18", "fr19",
652 "fr20", "fr21", "fr22", "fr23",
653 "fr24", "fr25", "fr26", "fr27",
654 "fr28", "fr29", "fr30", "fr31"
655 };
656 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
657 return NULL;
658 else
659 return names[i];
660}
661
85c83e99 662/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 663static int
d3f73121 664hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 665{
85c83e99 666 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
667 if (reg <= 32)
668 return reg;
669
670 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 671 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
672 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
673
85c83e99 674 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
675 return -1;
676}
677
79508e1e
AC
678/* This function pushes a stack frame with arguments as part of the
679 inferior function calling mechanism.
680
681 This is the version of the function for the 32-bit PA machines, in
682 which later arguments appear at lower addresses. (The stack always
683 grows towards higher addresses.)
684
685 We simply allocate the appropriate amount of stack space and put
686 arguments into their proper slots. */
687
4a302917 688static CORE_ADDR
7d9b040b 689hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
690 struct regcache *regcache, CORE_ADDR bp_addr,
691 int nargs, struct value **args, CORE_ADDR sp,
692 int struct_return, CORE_ADDR struct_addr)
693{
e17a4113
UW
694 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
695
79508e1e
AC
696 /* Stack base address at which any pass-by-reference parameters are
697 stored. */
698 CORE_ADDR struct_end = 0;
699 /* Stack base address at which the first parameter is stored. */
700 CORE_ADDR param_end = 0;
701
702 /* The inner most end of the stack after all the parameters have
703 been pushed. */
704 CORE_ADDR new_sp = 0;
705
706 /* Two passes. First pass computes the location of everything,
707 second pass writes the bytes out. */
708 int write_pass;
d49771ef
RC
709
710 /* Global pointer (r19) of the function we are trying to call. */
711 CORE_ADDR gp;
712
713 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
714
79508e1e
AC
715 for (write_pass = 0; write_pass < 2; write_pass++)
716 {
1797a8f6 717 CORE_ADDR struct_ptr = 0;
2a6228ef
RC
718 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
719 struct_ptr is adjusted for each argument below, so the first
720 argument will end up at sp-36. */
721 CORE_ADDR param_ptr = 32;
79508e1e 722 int i;
2a6228ef
RC
723 int small_struct = 0;
724
79508e1e
AC
725 for (i = 0; i < nargs; i++)
726 {
727 struct value *arg = args[i];
4991999e 728 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
729 /* The corresponding parameter that is pushed onto the
730 stack, and [possibly] passed in a register. */
731 char param_val[8];
732 int param_len;
733 memset (param_val, 0, sizeof param_val);
734 if (TYPE_LENGTH (type) > 8)
735 {
736 /* Large parameter, pass by reference. Store the value
737 in "struct" area and then pass its address. */
738 param_len = 4;
1797a8f6 739 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 740 if (write_pass)
0fd88904 741 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 742 TYPE_LENGTH (type));
e17a4113
UW
743 store_unsigned_integer (param_val, 4, byte_order,
744 struct_end - struct_ptr);
79508e1e
AC
745 }
746 else if (TYPE_CODE (type) == TYPE_CODE_INT
747 || TYPE_CODE (type) == TYPE_CODE_ENUM)
748 {
749 /* Integer value store, right aligned. "unpack_long"
750 takes care of any sign-extension problems. */
751 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 752 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 753 unpack_long (type,
0fd88904 754 value_contents (arg)));
79508e1e 755 }
2a6228ef
RC
756 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
757 {
758 /* Floating point value store, right aligned. */
759 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 760 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 761 }
79508e1e
AC
762 else
763 {
79508e1e 764 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
765
766 /* Small struct value are stored right-aligned. */
79508e1e 767 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 768 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
769
770 /* Structures of size 5, 6 and 7 bytes are special in that
771 the higher-ordered word is stored in the lower-ordered
772 argument, and even though it is a 8-byte quantity the
773 registers need not be 8-byte aligned. */
1b07b470 774 if (param_len > 4 && param_len < 8)
2a6228ef 775 small_struct = 1;
79508e1e 776 }
2a6228ef 777
1797a8f6 778 param_ptr += param_len;
2a6228ef
RC
779 if (param_len == 8 && !small_struct)
780 param_ptr = align_up (param_ptr, 8);
781
782 /* First 4 non-FP arguments are passed in gr26-gr23.
783 First 4 32-bit FP arguments are passed in fr4L-fr7L.
784 First 2 64-bit FP arguments are passed in fr5 and fr7.
785
786 The rest go on the stack, starting at sp-36, towards lower
787 addresses. 8-byte arguments must be aligned to a 8-byte
788 stack boundary. */
79508e1e
AC
789 if (write_pass)
790 {
1797a8f6 791 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
792
793 /* There are some cases when we don't know the type
794 expected by the callee (e.g. for variadic functions), so
795 pass the parameters in both general and fp regs. */
796 if (param_ptr <= 48)
79508e1e 797 {
2a6228ef
RC
798 int grreg = 26 - (param_ptr - 36) / 4;
799 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
800 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
801
802 regcache_cooked_write (regcache, grreg, param_val);
803 regcache_cooked_write (regcache, fpLreg, param_val);
804
79508e1e 805 if (param_len > 4)
2a6228ef
RC
806 {
807 regcache_cooked_write (regcache, grreg + 1,
808 param_val + 4);
809
810 regcache_cooked_write (regcache, fpreg, param_val);
811 regcache_cooked_write (regcache, fpreg + 1,
812 param_val + 4);
813 }
79508e1e
AC
814 }
815 }
816 }
817
818 /* Update the various stack pointers. */
819 if (!write_pass)
820 {
2a6228ef 821 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
822 /* PARAM_PTR already accounts for all the arguments passed
823 by the user. However, the ABI mandates minimum stack
824 space allocations for outgoing arguments. The ABI also
825 mandates minimum stack alignments which we must
826 preserve. */
2a6228ef 827 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
828 }
829 }
830
831 /* If a structure has to be returned, set up register 28 to hold its
832 address */
833 if (struct_return)
9c9acae0 834 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 835
e38c262f 836 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
837
838 if (gp != 0)
9c9acae0 839 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 840
79508e1e 841 /* Set the return address. */
77d18ded
RC
842 if (!gdbarch_push_dummy_code_p (gdbarch))
843 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 844
c4557624 845 /* Update the Stack Pointer. */
34f75cc1 846 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 847
2a6228ef 848 return param_end;
79508e1e
AC
849}
850
38ca4e0c
MK
851/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
852 Runtime Architecture for PA-RISC 2.0", which is distributed as part
853 as of the HP-UX Software Transition Kit (STK). This implementation
854 is based on version 3.3, dated October 6, 1997. */
2f690297 855
38ca4e0c 856/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 857
38ca4e0c
MK
858static int
859hppa64_integral_or_pointer_p (const struct type *type)
860{
861 switch (TYPE_CODE (type))
862 {
863 case TYPE_CODE_INT:
864 case TYPE_CODE_BOOL:
865 case TYPE_CODE_CHAR:
866 case TYPE_CODE_ENUM:
867 case TYPE_CODE_RANGE:
868 {
869 int len = TYPE_LENGTH (type);
870 return (len == 1 || len == 2 || len == 4 || len == 8);
871 }
872 case TYPE_CODE_PTR:
873 case TYPE_CODE_REF:
874 return (TYPE_LENGTH (type) == 8);
875 default:
876 break;
877 }
878
879 return 0;
880}
881
882/* Check whether TYPE is a "Floating Scalar Type". */
883
884static int
885hppa64_floating_p (const struct type *type)
886{
887 switch (TYPE_CODE (type))
888 {
889 case TYPE_CODE_FLT:
890 {
891 int len = TYPE_LENGTH (type);
892 return (len == 4 || len == 8 || len == 16);
893 }
894 default:
895 break;
896 }
897
898 return 0;
899}
2f690297 900
1218e655
RC
901/* If CODE points to a function entry address, try to look up the corresponding
902 function descriptor and return its address instead. If CODE is not a
903 function entry address, then just return it unchanged. */
904static CORE_ADDR
e17a4113 905hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 906{
e17a4113 907 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
908 struct obj_section *sec, *opd;
909
910 sec = find_pc_section (code);
911
912 if (!sec)
913 return code;
914
915 /* If CODE is in a data section, assume it's already a fptr. */
916 if (!(sec->the_bfd_section->flags & SEC_CODE))
917 return code;
918
919 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
920 {
921 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 922 break;
1218e655
RC
923 }
924
925 if (opd < sec->objfile->sections_end)
926 {
927 CORE_ADDR addr;
928
aded6f54
PA
929 for (addr = obj_section_addr (opd);
930 addr < obj_section_endaddr (opd);
931 addr += 2 * 8)
932 {
1218e655
RC
933 ULONGEST opdaddr;
934 char tmp[8];
935
936 if (target_read_memory (addr, tmp, sizeof (tmp)))
937 break;
e17a4113 938 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 939
aded6f54 940 if (opdaddr == code)
1218e655
RC
941 return addr - 16;
942 }
943 }
944
945 return code;
946}
947
4a302917 948static CORE_ADDR
7d9b040b 949hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
950 struct regcache *regcache, CORE_ADDR bp_addr,
951 int nargs, struct value **args, CORE_ADDR sp,
952 int struct_return, CORE_ADDR struct_addr)
953{
38ca4e0c 954 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 955 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
956 int i, offset = 0;
957 CORE_ADDR gp;
2f690297 958
38ca4e0c
MK
959 /* "The outgoing parameter area [...] must be aligned at a 16-byte
960 boundary." */
961 sp = align_up (sp, 16);
2f690297 962
38ca4e0c
MK
963 for (i = 0; i < nargs; i++)
964 {
965 struct value *arg = args[i];
966 struct type *type = value_type (arg);
967 int len = TYPE_LENGTH (type);
0fd88904 968 const bfd_byte *valbuf;
1218e655 969 bfd_byte fptrbuf[8];
38ca4e0c 970 int regnum;
2f690297 971
38ca4e0c
MK
972 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
973 offset = align_up (offset, 8);
77d18ded 974
38ca4e0c 975 if (hppa64_integral_or_pointer_p (type))
2f690297 976 {
38ca4e0c
MK
977 /* "Integral scalar parameters smaller than 64 bits are
978 padded on the left (i.e., the value is in the
979 least-significant bits of the 64-bit storage unit, and
980 the high-order bits are undefined)." Therefore we can
981 safely sign-extend them. */
982 if (len < 8)
449e1137 983 {
df4df182 984 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
985 len = 8;
986 }
987 }
988 else if (hppa64_floating_p (type))
989 {
990 if (len > 8)
991 {
992 /* "Quad-precision (128-bit) floating-point scalar
993 parameters are aligned on a 16-byte boundary." */
994 offset = align_up (offset, 16);
995
996 /* "Double-extended- and quad-precision floating-point
997 parameters within the first 64 bytes of the parameter
998 list are always passed in general registers." */
449e1137
AC
999 }
1000 else
1001 {
38ca4e0c 1002 if (len == 4)
449e1137 1003 {
38ca4e0c
MK
1004 /* "Single-precision (32-bit) floating-point scalar
1005 parameters are padded on the left with 32 bits of
1006 garbage (i.e., the floating-point value is in the
1007 least-significant 32 bits of a 64-bit storage
1008 unit)." */
1009 offset += 4;
449e1137 1010 }
38ca4e0c
MK
1011
1012 /* "Single- and double-precision floating-point
1013 parameters in this area are passed according to the
1014 available formal parameter information in a function
1015 prototype. [...] If no prototype is in scope,
1016 floating-point parameters must be passed both in the
1017 corresponding general registers and in the
1018 corresponding floating-point registers." */
1019 regnum = HPPA64_FP4_REGNUM + offset / 8;
1020
1021 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1022 {
38ca4e0c
MK
1023 /* "Single-precision floating-point parameters, when
1024 passed in floating-point registers, are passed in
1025 the right halves of the floating point registers;
1026 the left halves are unused." */
1027 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1028 len, value_contents (arg));
449e1137
AC
1029 }
1030 }
2f690297 1031 }
38ca4e0c 1032 else
2f690297 1033 {
38ca4e0c
MK
1034 if (len > 8)
1035 {
1036 /* "Aggregates larger than 8 bytes are aligned on a
1037 16-byte boundary, possibly leaving an unused argument
1038 slot, which is filled with garbage. If necessary,
1039 they are padded on the right (with garbage), to a
1040 multiple of 8 bytes." */
1041 offset = align_up (offset, 16);
1042 }
1043 }
1044
1218e655
RC
1045 /* If we are passing a function pointer, make sure we pass a function
1046 descriptor instead of the function entry address. */
1047 if (TYPE_CODE (type) == TYPE_CODE_PTR
1048 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1049 {
1050 ULONGEST codeptr, fptr;
1051
1052 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1053 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1054 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1055 fptr);
1218e655
RC
1056 valbuf = fptrbuf;
1057 }
1058 else
1059 {
1060 valbuf = value_contents (arg);
1061 }
1062
38ca4e0c 1063 /* Always store the argument in memory. */
1218e655 1064 write_memory (sp + offset, valbuf, len);
38ca4e0c 1065
38ca4e0c
MK
1066 regnum = HPPA_ARG0_REGNUM - offset / 8;
1067 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1068 {
1069 regcache_cooked_write_part (regcache, regnum,
1070 offset % 8, min (len, 8), valbuf);
1071 offset += min (len, 8);
1072 valbuf += min (len, 8);
1073 len -= min (len, 8);
1074 regnum--;
2f690297 1075 }
38ca4e0c
MK
1076
1077 offset += len;
2f690297
AC
1078 }
1079
38ca4e0c
MK
1080 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1081 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1082
1083 /* Allocate the outgoing parameter area. Make sure the outgoing
1084 parameter area is multiple of 16 bytes in length. */
1085 sp += max (align_up (offset, 16), 64);
1086
1087 /* Allocate 32-bytes of scratch space. The documentation doesn't
1088 mention this, but it seems to be needed. */
1089 sp += 32;
1090
1091 /* Allocate the frame marker area. */
1092 sp += 16;
1093
1094 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1095 its address. */
2f690297 1096 if (struct_return)
38ca4e0c 1097 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1098
38ca4e0c 1099 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1100 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1101 if (gp != 0)
38ca4e0c 1102 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1103
38ca4e0c 1104 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1105 if (!gdbarch_push_dummy_code_p (gdbarch))
1106 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1107
38ca4e0c
MK
1108 /* Set up GR30 to hold the stack pointer (sp). */
1109 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1110
38ca4e0c 1111 return sp;
2f690297 1112}
38ca4e0c 1113\f
2f690297 1114
08a27113
MK
1115/* Handle 32/64-bit struct return conventions. */
1116
1117static enum return_value_convention
c055b101 1118hppa32_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1119 struct type *type, struct regcache *regcache,
e127f0db 1120 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1121{
1122 if (TYPE_LENGTH (type) <= 2 * 4)
1123 {
1124 /* The value always lives in the right hand end of the register
1125 (or register pair)? */
1126 int b;
1127 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1128 int part = TYPE_LENGTH (type) % 4;
1129 /* The left hand register contains only part of the value,
1130 transfer that first so that the rest can be xfered as entire
1131 4-byte registers. */
1132 if (part > 0)
1133 {
1134 if (readbuf != NULL)
1135 regcache_cooked_read_part (regcache, reg, 4 - part,
1136 part, readbuf);
1137 if (writebuf != NULL)
1138 regcache_cooked_write_part (regcache, reg, 4 - part,
1139 part, writebuf);
1140 reg++;
1141 }
1142 /* Now transfer the remaining register values. */
1143 for (b = part; b < TYPE_LENGTH (type); b += 4)
1144 {
1145 if (readbuf != NULL)
e127f0db 1146 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1147 if (writebuf != NULL)
e127f0db 1148 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1149 reg++;
1150 }
1151 return RETURN_VALUE_REGISTER_CONVENTION;
1152 }
1153 else
1154 return RETURN_VALUE_STRUCT_CONVENTION;
1155}
1156
1157static enum return_value_convention
c055b101 1158hppa64_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1159 struct type *type, struct regcache *regcache,
e127f0db 1160 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1161{
1162 int len = TYPE_LENGTH (type);
1163 int regnum, offset;
1164
1165 if (len > 16)
1166 {
1167 /* All return values larget than 128 bits must be aggregate
1168 return values. */
9738b034
MK
1169 gdb_assert (!hppa64_integral_or_pointer_p (type));
1170 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1171
1172 /* "Aggregate return values larger than 128 bits are returned in
1173 a buffer allocated by the caller. The address of the buffer
1174 must be passed in GR 28." */
1175 return RETURN_VALUE_STRUCT_CONVENTION;
1176 }
1177
1178 if (hppa64_integral_or_pointer_p (type))
1179 {
1180 /* "Integral return values are returned in GR 28. Values
1181 smaller than 64 bits are padded on the left (with garbage)." */
1182 regnum = HPPA_RET0_REGNUM;
1183 offset = 8 - len;
1184 }
1185 else if (hppa64_floating_p (type))
1186 {
1187 if (len > 8)
1188 {
1189 /* "Double-extended- and quad-precision floating-point
1190 values are returned in GRs 28 and 29. The sign,
1191 exponent, and most-significant bits of the mantissa are
1192 returned in GR 28; the least-significant bits of the
1193 mantissa are passed in GR 29. For double-extended
1194 precision values, GR 29 is padded on the right with 48
1195 bits of garbage." */
1196 regnum = HPPA_RET0_REGNUM;
1197 offset = 0;
1198 }
1199 else
1200 {
1201 /* "Single-precision and double-precision floating-point
1202 return values are returned in FR 4R (single precision) or
1203 FR 4 (double-precision)." */
1204 regnum = HPPA64_FP4_REGNUM;
1205 offset = 8 - len;
1206 }
1207 }
1208 else
1209 {
1210 /* "Aggregate return values up to 64 bits in size are returned
1211 in GR 28. Aggregates smaller than 64 bits are left aligned
1212 in the register; the pad bits on the right are undefined."
1213
1214 "Aggregate return values between 65 and 128 bits are returned
1215 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1216 the remaining bits are placed, left aligned, in GR 29. The
1217 pad bits on the right of GR 29 (if any) are undefined." */
1218 regnum = HPPA_RET0_REGNUM;
1219 offset = 0;
1220 }
1221
1222 if (readbuf)
1223 {
08a27113
MK
1224 while (len > 0)
1225 {
1226 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1227 min (len, 8), readbuf);
1228 readbuf += min (len, 8);
08a27113
MK
1229 len -= min (len, 8);
1230 regnum++;
1231 }
1232 }
1233
1234 if (writebuf)
1235 {
08a27113
MK
1236 while (len > 0)
1237 {
1238 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1239 min (len, 8), writebuf);
1240 writebuf += min (len, 8);
08a27113
MK
1241 len -= min (len, 8);
1242 regnum++;
1243 }
1244 }
1245
1246 return RETURN_VALUE_REGISTER_CONVENTION;
1247}
1248\f
1249
d49771ef 1250static CORE_ADDR
a7aad9aa 1251hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1252 struct target_ops *targ)
1253{
1254 if (addr & 2)
1255 {
0dfff4cb 1256 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1257 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1258 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1259 }
1260
1261 return addr;
1262}
1263
1797a8f6
AC
1264static CORE_ADDR
1265hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1266{
1267 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1268 and not _bit_)! */
1269 return align_up (addr, 64);
1270}
1271
2f690297
AC
1272/* Force all frames to 16-byte alignment. Better safe than sorry. */
1273
1274static CORE_ADDR
1797a8f6 1275hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1276{
1277 /* Just always 16-byte align. */
1278 return align_up (addr, 16);
1279}
1280
cc72850f 1281CORE_ADDR
61a1198a 1282hppa_read_pc (struct regcache *regcache)
c906108c 1283{
cc72850f 1284 ULONGEST ipsw;
61a1198a 1285 ULONGEST pc;
c906108c 1286
61a1198a
UW
1287 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1288 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1289
1290 /* If the current instruction is nullified, then we are effectively
1291 still executing the previous instruction. Pretend we are still
cc72850f
MK
1292 there. This is needed when single stepping; if the nullified
1293 instruction is on a different line, we don't want GDB to think
1294 we've stepped onto that line. */
fe46cd3a
RC
1295 if (ipsw & 0x00200000)
1296 pc -= 4;
1297
cc72850f 1298 return pc & ~0x3;
c906108c
SS
1299}
1300
cc72850f 1301void
61a1198a 1302hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1303{
61a1198a
UW
1304 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1305 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1306}
1307
c906108c
SS
1308/* For the given instruction (INST), return any adjustment it makes
1309 to the stack pointer or zero for no adjustment.
1310
1311 This only handles instructions commonly found in prologues. */
1312
1313static int
fba45db2 1314prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1315{
1316 /* This must persist across calls. */
1317 static int save_high21;
1318
1319 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1320 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1321 return hppa_extract_14 (inst);
c906108c
SS
1322
1323 /* stwm X,D(sp) */
1324 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1325 return hppa_extract_14 (inst);
c906108c 1326
104c1213
JM
1327 /* std,ma X,D(sp) */
1328 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1329 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1330
e22b26cb 1331 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1332 save high bits in save_high21 for later use. */
e22b26cb 1333 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1334 {
abc485a1 1335 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1336 return 0;
1337 }
1338
1339 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1340 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1341
1342 /* fstws as used by the HP compilers. */
1343 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1344 return hppa_extract_5_load (inst);
c906108c
SS
1345
1346 /* No adjustment. */
1347 return 0;
1348}
1349
1350/* Return nonzero if INST is a branch of some kind, else return zero. */
1351
1352static int
fba45db2 1353is_branch (unsigned long inst)
c906108c
SS
1354{
1355 switch (inst >> 26)
1356 {
1357 case 0x20:
1358 case 0x21:
1359 case 0x22:
1360 case 0x23:
7be570e7 1361 case 0x27:
c906108c
SS
1362 case 0x28:
1363 case 0x29:
1364 case 0x2a:
1365 case 0x2b:
7be570e7 1366 case 0x2f:
c906108c
SS
1367 case 0x30:
1368 case 0x31:
1369 case 0x32:
1370 case 0x33:
1371 case 0x38:
1372 case 0x39:
1373 case 0x3a:
7be570e7 1374 case 0x3b:
c906108c
SS
1375 return 1;
1376
1377 default:
1378 return 0;
1379 }
1380}
1381
1382/* Return the register number for a GR which is saved by INST or
1383 zero it INST does not save a GR. */
1384
1385static int
fba45db2 1386inst_saves_gr (unsigned long inst)
c906108c
SS
1387{
1388 /* Does it look like a stw? */
7be570e7
JM
1389 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1390 || (inst >> 26) == 0x1f
1391 || ((inst >> 26) == 0x1f
1392 && ((inst >> 6) == 0xa)))
abc485a1 1393 return hppa_extract_5R_store (inst);
7be570e7
JM
1394
1395 /* Does it look like a std? */
1396 if ((inst >> 26) == 0x1c
1397 || ((inst >> 26) == 0x03
1398 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1399 return hppa_extract_5R_store (inst);
c906108c
SS
1400
1401 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1402 if ((inst >> 26) == 0x1b)
abc485a1 1403 return hppa_extract_5R_store (inst);
c906108c
SS
1404
1405 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1406 too. */
7be570e7
JM
1407 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1408 || ((inst >> 26) == 0x3
1409 && (((inst >> 6) & 0xf) == 0x8
1410 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1411 return hppa_extract_5R_store (inst);
c5aa993b 1412
c906108c
SS
1413 return 0;
1414}
1415
1416/* Return the register number for a FR which is saved by INST or
1417 zero it INST does not save a FR.
1418
1419 Note we only care about full 64bit register stores (that's the only
1420 kind of stores the prologue will use).
1421
1422 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1423
1424static int
fba45db2 1425inst_saves_fr (unsigned long inst)
c906108c 1426{
7be570e7 1427 /* is this an FSTD ? */
c906108c 1428 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1429 return hppa_extract_5r_store (inst);
7be570e7 1430 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1431 return hppa_extract_5R_store (inst);
7be570e7 1432 /* is this an FSTW ? */
c906108c 1433 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1434 return hppa_extract_5r_store (inst);
7be570e7 1435 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1436 return hppa_extract_5R_store (inst);
c906108c
SS
1437 return 0;
1438}
1439
1440/* Advance PC across any function entry prologue instructions
1441 to reach some "real" code.
1442
1443 Use information in the unwind table to determine what exactly should
1444 be in the prologue. */
1445
1446
a71f8c30 1447static CORE_ADDR
be8626e0
MD
1448skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1449 int stop_before_branch)
c906108c 1450{
e17a4113 1451 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
c906108c
SS
1452 char buf[4];
1453 CORE_ADDR orig_pc = pc;
1454 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1455 unsigned long args_stored, status, i, restart_gr, restart_fr;
1456 struct unwind_table_entry *u;
a71f8c30 1457 int final_iteration;
c906108c
SS
1458
1459 restart_gr = 0;
1460 restart_fr = 0;
1461
1462restart:
1463 u = find_unwind_entry (pc);
1464 if (!u)
1465 return pc;
1466
c5aa993b 1467 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1468 if ((pc & ~0x3) != u->region_start)
1469 return pc;
1470
1471 /* This is how much of a frame adjustment we need to account for. */
1472 stack_remaining = u->Total_frame_size << 3;
1473
1474 /* Magic register saves we want to know about. */
1475 save_rp = u->Save_RP;
1476 save_sp = u->Save_SP;
1477
1478 /* An indication that args may be stored into the stack. Unfortunately
1479 the HPUX compilers tend to set this in cases where no args were
1480 stored too!. */
1481 args_stored = 1;
1482
1483 /* Turn the Entry_GR field into a bitmask. */
1484 save_gr = 0;
1485 for (i = 3; i < u->Entry_GR + 3; i++)
1486 {
1487 /* Frame pointer gets saved into a special location. */
eded0a31 1488 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1489 continue;
1490
1491 save_gr |= (1 << i);
1492 }
1493 save_gr &= ~restart_gr;
1494
1495 /* Turn the Entry_FR field into a bitmask too. */
1496 save_fr = 0;
1497 for (i = 12; i < u->Entry_FR + 12; i++)
1498 save_fr |= (1 << i);
1499 save_fr &= ~restart_fr;
1500
a71f8c30
RC
1501 final_iteration = 0;
1502
c906108c
SS
1503 /* Loop until we find everything of interest or hit a branch.
1504
1505 For unoptimized GCC code and for any HP CC code this will never ever
1506 examine any user instructions.
1507
1508 For optimzied GCC code we're faced with problems. GCC will schedule
1509 its prologue and make prologue instructions available for delay slot
1510 filling. The end result is user code gets mixed in with the prologue
1511 and a prologue instruction may be in the delay slot of the first branch
1512 or call.
1513
1514 Some unexpected things are expected with debugging optimized code, so
1515 we allow this routine to walk past user instructions in optimized
1516 GCC code. */
1517 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1518 || args_stored)
1519 {
1520 unsigned int reg_num;
1521 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1522 unsigned long old_save_rp, old_save_sp, next_inst;
1523
1524 /* Save copies of all the triggers so we can compare them later
c5aa993b 1525 (only for HPC). */
c906108c
SS
1526 old_save_gr = save_gr;
1527 old_save_fr = save_fr;
1528 old_save_rp = save_rp;
1529 old_save_sp = save_sp;
1530 old_stack_remaining = stack_remaining;
1531
8defab1a 1532 status = target_read_memory (pc, buf, 4);
e17a4113 1533 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1534
c906108c
SS
1535 /* Yow! */
1536 if (status != 0)
1537 return pc;
1538
1539 /* Note the interesting effects of this instruction. */
1540 stack_remaining -= prologue_inst_adjust_sp (inst);
1541
7be570e7
JM
1542 /* There are limited ways to store the return pointer into the
1543 stack. */
c4c79048 1544 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1545 save_rp = 0;
1546
104c1213 1547 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1548 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1549 if ((inst & 0xffffc000) == 0x6fc10000
1550 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1551 save_sp = 0;
1552
6426a772
JM
1553 /* Are we loading some register with an offset from the argument
1554 pointer? */
1555 if ((inst & 0xffe00000) == 0x37a00000
1556 || (inst & 0xffffffe0) == 0x081d0240)
1557 {
1558 pc += 4;
1559 continue;
1560 }
1561
c906108c
SS
1562 /* Account for general and floating-point register saves. */
1563 reg_num = inst_saves_gr (inst);
1564 save_gr &= ~(1 << reg_num);
1565
1566 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1567 Unfortunately args_stored only tells us that some arguments
1568 where stored into the stack. Not how many or what kind!
c906108c 1569
c5aa993b
JM
1570 This is a kludge as on the HP compiler sets this bit and it
1571 never does prologue scheduling. So once we see one, skip past
1572 all of them. We have similar code for the fp arg stores below.
c906108c 1573
c5aa993b
JM
1574 FIXME. Can still die if we have a mix of GR and FR argument
1575 stores! */
be8626e0 1576 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1577 && reg_num <= 26)
c906108c 1578 {
be8626e0 1579 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1580 && reg_num <= 26)
c906108c
SS
1581 {
1582 pc += 4;
8defab1a 1583 status = target_read_memory (pc, buf, 4);
e17a4113 1584 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1585 if (status != 0)
1586 return pc;
1587 reg_num = inst_saves_gr (inst);
1588 }
1589 args_stored = 0;
1590 continue;
1591 }
1592
1593 reg_num = inst_saves_fr (inst);
1594 save_fr &= ~(1 << reg_num);
1595
8defab1a 1596 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1597 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1598
c906108c
SS
1599 /* Yow! */
1600 if (status != 0)
1601 return pc;
1602
1603 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1604 save. */
c906108c
SS
1605 if ((inst & 0xfc000000) == 0x34000000
1606 && inst_saves_fr (next_inst) >= 4
819844ad 1607 && inst_saves_fr (next_inst)
be8626e0 1608 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1609 {
1610 /* So we drop into the code below in a reasonable state. */
1611 reg_num = inst_saves_fr (next_inst);
1612 pc -= 4;
1613 }
1614
1615 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1616 This is a kludge as on the HP compiler sets this bit and it
1617 never does prologue scheduling. So once we see one, skip past
1618 all of them. */
819844ad 1619 if (reg_num >= 4
be8626e0 1620 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1621 {
819844ad
UW
1622 while (reg_num >= 4
1623 && reg_num
be8626e0 1624 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1625 {
1626 pc += 8;
8defab1a 1627 status = target_read_memory (pc, buf, 4);
e17a4113 1628 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1629 if (status != 0)
1630 return pc;
1631 if ((inst & 0xfc000000) != 0x34000000)
1632 break;
8defab1a 1633 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1634 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1635 if (status != 0)
1636 return pc;
1637 reg_num = inst_saves_fr (next_inst);
1638 }
1639 args_stored = 0;
1640 continue;
1641 }
1642
1643 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1644 instruction is in the delay slot of the first call/branch. */
a71f8c30 1645 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1646 break;
1647
1648 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1649 arguments were stored into the stack (boo hiss). This could
1650 cause this code to then skip a bunch of user insns (up to the
1651 first branch).
1652
1653 To combat this we try to identify when args_stored was bogusly
1654 set and clear it. We only do this when args_stored is nonzero,
1655 all other resources are accounted for, and nothing changed on
1656 this pass. */
c906108c 1657 if (args_stored
c5aa993b 1658 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1659 && old_save_gr == save_gr && old_save_fr == save_fr
1660 && old_save_rp == save_rp && old_save_sp == save_sp
1661 && old_stack_remaining == stack_remaining)
1662 break;
c5aa993b 1663
c906108c
SS
1664 /* Bump the PC. */
1665 pc += 4;
a71f8c30
RC
1666
1667 /* !stop_before_branch, so also look at the insn in the delay slot
1668 of the branch. */
1669 if (final_iteration)
1670 break;
1671 if (is_branch (inst))
1672 final_iteration = 1;
c906108c
SS
1673 }
1674
1675 /* We've got a tenative location for the end of the prologue. However
1676 because of limitations in the unwind descriptor mechanism we may
1677 have went too far into user code looking for the save of a register
1678 that does not exist. So, if there registers we expected to be saved
1679 but never were, mask them out and restart.
1680
1681 This should only happen in optimized code, and should be very rare. */
c5aa993b 1682 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1683 {
1684 pc = orig_pc;
1685 restart_gr = save_gr;
1686 restart_fr = save_fr;
1687 goto restart;
1688 }
1689
1690 return pc;
1691}
1692
1693
7be570e7
JM
1694/* Return the address of the PC after the last prologue instruction if
1695 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1696
1697static CORE_ADDR
fba45db2 1698after_prologue (CORE_ADDR pc)
c906108c
SS
1699{
1700 struct symtab_and_line sal;
1701 CORE_ADDR func_addr, func_end;
1702 struct symbol *f;
1703
7be570e7
JM
1704 /* If we can not find the symbol in the partial symbol table, then
1705 there is no hope we can determine the function's start address
1706 with this code. */
c906108c 1707 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1708 return 0;
c906108c 1709
7be570e7 1710 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1711 sal = find_pc_line (func_addr, 0);
1712
7be570e7
JM
1713 /* There are only two cases to consider. First, the end of the source line
1714 is within the function bounds. In that case we return the end of the
1715 source line. Second is the end of the source line extends beyond the
1716 bounds of the current function. We need to use the slow code to
1717 examine instructions in that case.
c906108c 1718
7be570e7
JM
1719 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1720 the wrong thing to do. In fact, it should be entirely possible for this
1721 function to always return zero since the slow instruction scanning code
1722 is supposed to *always* work. If it does not, then it is a bug. */
1723 if (sal.end < func_end)
1724 return sal.end;
c5aa993b 1725 else
7be570e7 1726 return 0;
c906108c
SS
1727}
1728
1729/* To skip prologues, I use this predicate. Returns either PC itself
1730 if the code at PC does not look like a function prologue; otherwise
a71f8c30
RC
1731 returns an address that (if we're lucky) follows the prologue.
1732
1733 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1734 It doesn't necessarily skips all the insns in the prologue. In fact
1735 we might not want to skip all the insns because a prologue insn may
1736 appear in the delay slot of the first branch, and we don't want to
1737 skip over the branch in that case. */
c906108c 1738
8d153463 1739static CORE_ADDR
6093d2eb 1740hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1741{
c5aa993b
JM
1742 unsigned long inst;
1743 int offset;
1744 CORE_ADDR post_prologue_pc;
1745 char buf[4];
c906108c 1746
c5aa993b
JM
1747 /* See if we can determine the end of the prologue via the symbol table.
1748 If so, then return either PC, or the PC after the prologue, whichever
1749 is greater. */
c906108c 1750
c5aa993b 1751 post_prologue_pc = after_prologue (pc);
c906108c 1752
7be570e7
JM
1753 /* If after_prologue returned a useful address, then use it. Else
1754 fall back on the instruction skipping code.
1755
1756 Some folks have claimed this causes problems because the breakpoint
1757 may be the first instruction of the prologue. If that happens, then
1758 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1759 if (post_prologue_pc != 0)
1760 return max (pc, post_prologue_pc);
c5aa993b 1761 else
be8626e0 1762 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1763}
1764
29d375ac 1765/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1766
29d375ac 1767static struct unwind_table_entry *
227e86ad 1768hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1769{
227e86ad 1770 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1771
1772 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1773 result of get_frame_address_in_block implies a problem.
93d42b30 1774 The bits should have been removed earlier, before the return
c7ce8faa 1775 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1776 if it isn't, it should be fixed. Then this call can be
1777 removed. */
227e86ad 1778 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1779 return find_unwind_entry (pc);
1780}
1781
26d08f08
AC
1782struct hppa_frame_cache
1783{
1784 CORE_ADDR base;
1785 struct trad_frame_saved_reg *saved_regs;
1786};
1787
1788static struct hppa_frame_cache *
227e86ad 1789hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1790{
227e86ad 1791 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1792 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1793 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1794 struct hppa_frame_cache *cache;
1795 long saved_gr_mask;
1796 long saved_fr_mask;
1797 CORE_ADDR this_sp;
1798 long frame_size;
1799 struct unwind_table_entry *u;
9f7194c3 1800 CORE_ADDR prologue_end;
50b2f48a 1801 int fp_in_r1 = 0;
26d08f08
AC
1802 int i;
1803
369aa520
RC
1804 if (hppa_debug)
1805 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1806 frame_relative_level(this_frame));
369aa520 1807
26d08f08 1808 if ((*this_cache) != NULL)
369aa520
RC
1809 {
1810 if (hppa_debug)
5af949e3
UW
1811 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1812 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
369aa520
RC
1813 return (*this_cache);
1814 }
26d08f08
AC
1815 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1816 (*this_cache) = cache;
227e86ad 1817 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1818
1819 /* Yow! */
227e86ad 1820 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1821 if (!u)
369aa520
RC
1822 {
1823 if (hppa_debug)
1824 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1825 return (*this_cache);
1826 }
26d08f08
AC
1827
1828 /* Turn the Entry_GR field into a bitmask. */
1829 saved_gr_mask = 0;
1830 for (i = 3; i < u->Entry_GR + 3; i++)
1831 {
1832 /* Frame pointer gets saved into a special location. */
eded0a31 1833 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1834 continue;
1835
1836 saved_gr_mask |= (1 << i);
1837 }
1838
1839 /* Turn the Entry_FR field into a bitmask too. */
1840 saved_fr_mask = 0;
1841 for (i = 12; i < u->Entry_FR + 12; i++)
1842 saved_fr_mask |= (1 << i);
1843
1844 /* Loop until we find everything of interest or hit a branch.
1845
1846 For unoptimized GCC code and for any HP CC code this will never ever
1847 examine any user instructions.
1848
1849 For optimized GCC code we're faced with problems. GCC will schedule
1850 its prologue and make prologue instructions available for delay slot
1851 filling. The end result is user code gets mixed in with the prologue
1852 and a prologue instruction may be in the delay slot of the first branch
1853 or call.
1854
1855 Some unexpected things are expected with debugging optimized code, so
1856 we allow this routine to walk past user instructions in optimized
1857 GCC code. */
1858 {
1859 int final_iteration = 0;
46acf081 1860 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1861 int looking_for_sp = u->Save_SP;
1862 int looking_for_rp = u->Save_RP;
1863 int fp_loc = -1;
9f7194c3 1864
a71f8c30 1865 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1866 skip_prologue_using_sal, in case we stepped into a function without
1867 symbol information. hppa_skip_prologue also bounds the returned
1868 pc by the passed in pc, so it will not return a pc in the next
a71f8c30
RC
1869 function.
1870
1871 We used to call hppa_skip_prologue to find the end of the prologue,
1872 but if some non-prologue instructions get scheduled into the prologue,
1873 and the program is compiled with debug information, the "easy" way
1874 in hppa_skip_prologue will return a prologue end that is too early
1875 for us to notice any potential frame adjustments. */
d5c27f81 1876
ef02daa9
DJ
1877 /* We used to use get_frame_func to locate the beginning of the
1878 function to pass to skip_prologue. However, when objects are
1879 compiled without debug symbols, get_frame_func can return the wrong
46acf081
RC
1880 function (or 0). We can do better than that by using unwind records.
1881 This only works if the Region_description of the unwind record
1882 indicates that it includes the entry point of the function.
1883 HP compilers sometimes generate unwind records for regions that
1884 do not include the entry or exit point of a function. GNU tools
1885 do not do this. */
1886
1887 if ((u->Region_description & 0x2) == 0)
1888 start_pc = u->region_start;
1889 else
227e86ad 1890 start_pc = get_frame_func (this_frame);
d5c27f81 1891
be8626e0 1892 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1893 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1894
1895 if (prologue_end != 0 && end_pc > prologue_end)
1896 end_pc = prologue_end;
1897
26d08f08 1898 frame_size = 0;
9f7194c3 1899
46acf081 1900 for (pc = start_pc;
26d08f08
AC
1901 ((saved_gr_mask || saved_fr_mask
1902 || looking_for_sp || looking_for_rp
1903 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1904 && pc < end_pc);
26d08f08
AC
1905 pc += 4)
1906 {
1907 int reg;
1908 char buf4[4];
4a302917
RC
1909 long inst;
1910
227e86ad 1911 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1912 {
5af949e3
UW
1913 error (_("Cannot read instruction at %s."),
1914 paddress (gdbarch, pc));
4a302917
RC
1915 return (*this_cache);
1916 }
1917
e17a4113 1918 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1919
26d08f08
AC
1920 /* Note the interesting effects of this instruction. */
1921 frame_size += prologue_inst_adjust_sp (inst);
1922
1923 /* There are limited ways to store the return pointer into the
1924 stack. */
1925 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1926 {
1927 looking_for_rp = 0;
34f75cc1 1928 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1929 }
dfaf8edb
MK
1930 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1931 {
1932 looking_for_rp = 0;
1933 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1934 }
c4c79048
RC
1935 else if (inst == 0x0fc212c1
1936 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1937 {
1938 looking_for_rp = 0;
34f75cc1 1939 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1940 }
1941
1942 /* Check to see if we saved SP into the stack. This also
1943 happens to indicate the location of the saved frame
1944 pointer. */
1945 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1946 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1947 {
1948 looking_for_sp = 0;
eded0a31 1949 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 1950 }
50b2f48a
RC
1951 else if (inst == 0x08030241) /* copy %r3, %r1 */
1952 {
1953 fp_in_r1 = 1;
1954 }
26d08f08
AC
1955
1956 /* Account for general and floating-point register saves. */
1957 reg = inst_saves_gr (inst);
1958 if (reg >= 3 && reg <= 18
eded0a31 1959 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1960 {
1961 saved_gr_mask &= ~(1 << reg);
abc485a1 1962 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1963 /* stwm with a positive displacement is a _post_
1964 _modify_. */
1965 cache->saved_regs[reg].addr = 0;
1966 else if ((inst & 0xfc00000c) == 0x70000008)
1967 /* A std has explicit post_modify forms. */
1968 cache->saved_regs[reg].addr = 0;
1969 else
1970 {
1971 CORE_ADDR offset;
1972
1973 if ((inst >> 26) == 0x1c)
1974 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
1975 else if ((inst >> 26) == 0x03)
abc485a1 1976 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1977 else
abc485a1 1978 offset = hppa_extract_14 (inst);
26d08f08
AC
1979
1980 /* Handle code with and without frame pointers. */
1981 if (u->Save_SP)
1982 cache->saved_regs[reg].addr = offset;
1983 else
1984 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
1985 }
1986 }
1987
1988 /* GCC handles callee saved FP regs a little differently.
1989
1990 It emits an instruction to put the value of the start of
1991 the FP store area into %r1. It then uses fstds,ma with a
1992 basereg of %r1 for the stores.
1993
1994 HP CC emits them at the current stack pointer modifying the
1995 stack pointer as it stores each register. */
1996
1997 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1998 if ((inst & 0xffffc000) == 0x34610000
1999 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2000 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2001
2002 reg = inst_saves_fr (inst);
2003 if (reg >= 12 && reg <= 21)
2004 {
2005 /* Note +4 braindamage below is necessary because the FP
2006 status registers are internally 8 registers rather than
2007 the expected 4 registers. */
2008 saved_fr_mask &= ~(1 << reg);
2009 if (fp_loc == -1)
2010 {
2011 /* 1st HP CC FP register store. After this
2012 instruction we've set enough state that the GCC and
2013 HPCC code are both handled in the same manner. */
34f75cc1 2014 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2015 fp_loc = 8;
2016 }
2017 else
2018 {
eded0a31 2019 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2020 fp_loc += 8;
2021 }
2022 }
2023
2024 /* Quit if we hit any kind of branch the previous iteration. */
2025 if (final_iteration)
2026 break;
2027 /* We want to look precisely one instruction beyond the branch
2028 if we have not found everything yet. */
2029 if (is_branch (inst))
2030 final_iteration = 1;
2031 }
2032 }
2033
2034 {
2035 /* The frame base always represents the value of %sp at entry to
2036 the current function (and is thus equivalent to the "saved"
2037 stack pointer. */
227e86ad
JB
2038 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2039 HPPA_SP_REGNUM);
ed70ba00 2040 CORE_ADDR fp;
9f7194c3
RC
2041
2042 if (hppa_debug)
5af949e3
UW
2043 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2044 "prologue_end=%s) ",
2045 paddress (gdbarch, this_sp),
2046 paddress (gdbarch, get_frame_pc (this_frame)),
2047 paddress (gdbarch, prologue_end));
9f7194c3 2048
ed70ba00
RC
2049 /* Check to see if a frame pointer is available, and use it for
2050 frame unwinding if it is.
2051
2052 There are some situations where we need to rely on the frame
2053 pointer to do stack unwinding. For example, if a function calls
2054 alloca (), the stack pointer can get adjusted inside the body of
2055 the function. In this case, the ABI requires that the compiler
2056 maintain a frame pointer for the function.
2057
2058 The unwind record has a flag (alloca_frame) that indicates that
2059 a function has a variable frame; unfortunately, gcc/binutils
2060 does not set this flag. Instead, whenever a frame pointer is used
2061 and saved on the stack, the Save_SP flag is set. We use this to
2062 decide whether to use the frame pointer for unwinding.
2063
ed70ba00
RC
2064 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2065 instead of Save_SP. */
2066
227e86ad 2067 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2068
6fcecea0 2069 if (u->alloca_frame)
46acf081 2070 fp -= u->Total_frame_size << 3;
ed70ba00 2071
227e86ad 2072 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2073 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2074 {
2075 cache->base = fp;
2076
2077 if (hppa_debug)
5af949e3
UW
2078 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2079 paddress (gdbarch, cache->base));
ed70ba00 2080 }
1658da49
RC
2081 else if (u->Save_SP
2082 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2083 {
9f7194c3
RC
2084 /* Both we're expecting the SP to be saved and the SP has been
2085 saved. The entry SP value is saved at this frame's SP
2086 address. */
e17a4113 2087 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2088
2089 if (hppa_debug)
5af949e3
UW
2090 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2091 paddress (gdbarch, cache->base));
9f7194c3 2092 }
26d08f08 2093 else
9f7194c3 2094 {
1658da49
RC
2095 /* The prologue has been slowly allocating stack space. Adjust
2096 the SP back. */
2097 cache->base = this_sp - frame_size;
9f7194c3 2098 if (hppa_debug)
5af949e3
UW
2099 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2100 paddress (gdbarch, cache->base));
9f7194c3
RC
2101
2102 }
eded0a31 2103 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2104 }
2105
412275d5
AC
2106 /* The PC is found in the "return register", "Millicode" uses "r31"
2107 as the return register while normal code uses "rp". */
26d08f08 2108 if (u->Millicode)
9f7194c3 2109 {
5859efe5 2110 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2111 {
2112 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2113 if (hppa_debug)
2114 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2115 }
9f7194c3
RC
2116 else
2117 {
227e86ad 2118 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2119 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2120 if (hppa_debug)
2121 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2122 }
2123 }
26d08f08 2124 else
9f7194c3 2125 {
34f75cc1 2126 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2127 {
2128 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2129 cache->saved_regs[HPPA_RP_REGNUM];
2130 if (hppa_debug)
2131 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2132 }
9f7194c3
RC
2133 else
2134 {
227e86ad
JB
2135 ULONGEST rp = get_frame_register_unsigned (this_frame,
2136 HPPA_RP_REGNUM);
34f75cc1 2137 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2138 if (hppa_debug)
2139 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2140 }
2141 }
26d08f08 2142
50b2f48a
RC
2143 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2144 frame. However, there is a one-insn window where we haven't saved it
2145 yet, but we've already clobbered it. Detect this case and fix it up.
2146
2147 The prologue sequence for frame-pointer functions is:
2148 0: stw %rp, -20(%sp)
2149 4: copy %r3, %r1
2150 8: copy %sp, %r3
2151 c: stw,ma %r1, XX(%sp)
2152
2153 So if we are at offset c, the r3 value that we want is not yet saved
2154 on the stack, but it's been overwritten. The prologue analyzer will
2155 set fp_in_r1 when it sees the copy insn so we know to get the value
2156 from r1 instead. */
2157 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2158 && fp_in_r1)
2159 {
227e86ad 2160 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2161 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2162 }
1658da49 2163
26d08f08
AC
2164 {
2165 /* Convert all the offsets into addresses. */
2166 int reg;
65c5db89 2167 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2168 {
2169 if (trad_frame_addr_p (cache->saved_regs, reg))
2170 cache->saved_regs[reg].addr += cache->base;
2171 }
2172 }
2173
f77a2124 2174 {
f77a2124
RC
2175 struct gdbarch_tdep *tdep;
2176
f77a2124
RC
2177 tdep = gdbarch_tdep (gdbarch);
2178
2179 if (tdep->unwind_adjust_stub)
227e86ad 2180 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2181 }
2182
369aa520 2183 if (hppa_debug)
5af949e3
UW
2184 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2185 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2186 return (*this_cache);
2187}
2188
2189static void
227e86ad
JB
2190hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2191 struct frame_id *this_id)
26d08f08 2192{
d5c27f81 2193 struct hppa_frame_cache *info;
227e86ad 2194 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2195 struct unwind_table_entry *u;
2196
227e86ad
JB
2197 info = hppa_frame_cache (this_frame, this_cache);
2198 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2199
2200 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2201}
2202
227e86ad
JB
2203static struct value *
2204hppa_frame_prev_register (struct frame_info *this_frame,
2205 void **this_cache, int regnum)
26d08f08 2206{
227e86ad
JB
2207 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2208
2209 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
2210}
2211
2212static int
2213hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2214 struct frame_info *this_frame, void **this_cache)
2215{
2216 if (hppa_find_unwind_entry_in_block (this_frame))
2217 return 1;
2218
2219 return 0;
0da28f8a
RC
2220}
2221
2222static const struct frame_unwind hppa_frame_unwind =
2223{
2224 NORMAL_FRAME,
2225 hppa_frame_this_id,
227e86ad
JB
2226 hppa_frame_prev_register,
2227 NULL,
2228 hppa_frame_unwind_sniffer
0da28f8a
RC
2229};
2230
0da28f8a
RC
2231/* This is a generic fallback frame unwinder that kicks in if we fail all
2232 the other ones. Normally we would expect the stub and regular unwinder
2233 to work, but in some cases we might hit a function that just doesn't
2234 have any unwind information available. In this case we try to do
2235 unwinding solely based on code reading. This is obviously going to be
2236 slow, so only use this as a last resort. Currently this will only
2237 identify the stack and pc for the frame. */
2238
2239static struct hppa_frame_cache *
227e86ad 2240hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2241{
e17a4113
UW
2242 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2243 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2244 struct hppa_frame_cache *cache;
4ba6a975
MK
2245 unsigned int frame_size = 0;
2246 int found_rp = 0;
2247 CORE_ADDR start_pc;
0da28f8a 2248
d5c27f81 2249 if (hppa_debug)
4ba6a975
MK
2250 fprintf_unfiltered (gdb_stdlog,
2251 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2252 frame_relative_level (this_frame));
d5c27f81 2253
0da28f8a
RC
2254 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2255 (*this_cache) = cache;
227e86ad 2256 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2257
227e86ad 2258 start_pc = get_frame_func (this_frame);
4ba6a975 2259 if (start_pc)
0da28f8a 2260 {
227e86ad 2261 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2262 CORE_ADDR pc;
0da28f8a 2263
4ba6a975
MK
2264 for (pc = start_pc; pc < cur_pc; pc += 4)
2265 {
2266 unsigned int insn;
0da28f8a 2267
e17a4113 2268 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2269 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2270
4ba6a975
MK
2271 /* There are limited ways to store the return pointer into the
2272 stack. */
2273 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2274 {
2275 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2276 found_rp = 1;
2277 }
c4c79048
RC
2278 else if (insn == 0x0fc212c1
2279 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2280 {
2281 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2282 found_rp = 1;
2283 }
2284 }
412275d5 2285 }
0da28f8a 2286
d5c27f81 2287 if (hppa_debug)
4ba6a975
MK
2288 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2289 frame_size, found_rp);
d5c27f81 2290
227e86ad 2291 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2292 cache->base -= frame_size;
6d1be3f1 2293 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2294
2295 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2296 {
2297 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2298 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2299 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2300 }
412275d5
AC
2301 else
2302 {
4ba6a975 2303 ULONGEST rp;
227e86ad 2304 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2305 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2306 }
0da28f8a
RC
2307
2308 return cache;
26d08f08
AC
2309}
2310
0da28f8a 2311static void
227e86ad 2312hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2313 struct frame_id *this_id)
2314{
2315 struct hppa_frame_cache *info =
227e86ad
JB
2316 hppa_fallback_frame_cache (this_frame, this_cache);
2317
2318 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2319}
2320
227e86ad
JB
2321static struct value *
2322hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2323 void **this_cache, int regnum)
0da28f8a
RC
2324{
2325 struct hppa_frame_cache *info =
227e86ad
JB
2326 hppa_fallback_frame_cache (this_frame, this_cache);
2327
2328 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
0da28f8a
RC
2329}
2330
2331static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2332{
2333 NORMAL_FRAME,
0da28f8a 2334 hppa_fallback_frame_this_id,
227e86ad
JB
2335 hppa_fallback_frame_prev_register,
2336 NULL,
2337 default_frame_sniffer
26d08f08
AC
2338};
2339
7f07c5b6
RC
2340/* Stub frames, used for all kinds of call stubs. */
2341struct hppa_stub_unwind_cache
2342{
2343 CORE_ADDR base;
2344 struct trad_frame_saved_reg *saved_regs;
2345};
2346
2347static struct hppa_stub_unwind_cache *
227e86ad 2348hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2349 void **this_cache)
2350{
227e86ad 2351 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2352 struct hppa_stub_unwind_cache *info;
22b0923d 2353 struct unwind_table_entry *u;
7f07c5b6
RC
2354
2355 if (*this_cache)
2356 return *this_cache;
2357
2358 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2359 *this_cache = info;
227e86ad 2360 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2361
227e86ad 2362 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2363
090ccbb7 2364 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2365 {
2366 /* HPUX uses export stubs in function calls; the export stub clobbers
2367 the return value of the caller, and, later restores it from the
2368 stack. */
227e86ad 2369 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2370
2371 if (u && u->stub_unwind.stub_type == EXPORT)
2372 {
2373 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2374
2375 return info;
2376 }
2377 }
2378
2379 /* By default we assume that stubs do not change the rp. */
2380 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2381
7f07c5b6
RC
2382 return info;
2383}
2384
2385static void
227e86ad 2386hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2387 void **this_prologue_cache,
2388 struct frame_id *this_id)
2389{
2390 struct hppa_stub_unwind_cache *info
227e86ad 2391 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2392
2393 if (info)
227e86ad 2394 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2395}
2396
227e86ad
JB
2397static struct value *
2398hppa_stub_frame_prev_register (struct frame_info *this_frame,
2399 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2400{
2401 struct hppa_stub_unwind_cache *info
227e86ad 2402 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2403
227e86ad 2404 if (info == NULL)
8a3fe4f8 2405 error (_("Requesting registers from null frame."));
7f07c5b6 2406
227e86ad
JB
2407 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
2408}
7f07c5b6 2409
227e86ad
JB
2410static int
2411hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2412 struct frame_info *this_frame,
2413 void **this_cache)
7f07c5b6 2414{
227e86ad
JB
2415 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2416 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2417 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2418
6d1be3f1 2419 if (pc == 0
84674fe1 2420 || (tdep->in_solib_call_trampoline != NULL
e17a4113 2421 && tdep->in_solib_call_trampoline (gdbarch, pc, NULL))
464963c9 2422 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2423 return 1;
2424 return 0;
7f07c5b6
RC
2425}
2426
227e86ad
JB
2427static const struct frame_unwind hppa_stub_frame_unwind = {
2428 NORMAL_FRAME,
2429 hppa_stub_frame_this_id,
2430 hppa_stub_frame_prev_register,
2431 NULL,
2432 hppa_stub_unwind_sniffer
2433};
2434
26d08f08 2435static struct frame_id
227e86ad 2436hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2437{
227e86ad
JB
2438 return frame_id_build (get_frame_register_unsigned (this_frame,
2439 HPPA_SP_REGNUM),
2440 get_frame_pc (this_frame));
26d08f08
AC
2441}
2442
cc72850f 2443CORE_ADDR
26d08f08
AC
2444hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2445{
fe46cd3a
RC
2446 ULONGEST ipsw;
2447 CORE_ADDR pc;
2448
cc72850f
MK
2449 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2450 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2451
2452 /* If the current instruction is nullified, then we are effectively
2453 still executing the previous instruction. Pretend we are still
cc72850f
MK
2454 there. This is needed when single stepping; if the nullified
2455 instruction is on a different line, we don't want GDB to think
2456 we've stepped onto that line. */
fe46cd3a
RC
2457 if (ipsw & 0x00200000)
2458 pc -= 4;
2459
cc72850f 2460 return pc & ~0x3;
26d08f08
AC
2461}
2462
ff644745
JB
2463/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2464 Return NULL if no such symbol was found. */
2465
2466struct minimal_symbol *
2467hppa_lookup_stub_minimal_symbol (const char *name,
2468 enum unwind_stub_types stub_type)
2469{
2470 struct objfile *objfile;
2471 struct minimal_symbol *msym;
2472
2473 ALL_MSYMBOLS (objfile, msym)
2474 {
2475 if (strcmp (SYMBOL_LINKAGE_NAME (msym), name) == 0)
2476 {
2477 struct unwind_table_entry *u;
2478
2479 u = find_unwind_entry (SYMBOL_VALUE (msym));
2480 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2481 return msym;
2482 }
2483 }
2484
2485 return NULL;
2486}
2487
c906108c 2488static void
fba45db2 2489unwind_command (char *exp, int from_tty)
c906108c
SS
2490{
2491 CORE_ADDR address;
2492 struct unwind_table_entry *u;
2493
2494 /* If we have an expression, evaluate it and use it as the address. */
2495
2496 if (exp != 0 && *exp != 0)
2497 address = parse_and_eval_address (exp);
2498 else
2499 return;
2500
2501 u = find_unwind_entry (address);
2502
2503 if (!u)
2504 {
2505 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2506 return;
2507 }
2508
3329c4b5 2509 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2510
5af949e3 2511 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2512 gdb_flush (gdb_stdout);
c906108c 2513
5af949e3 2514 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2515 gdb_flush (gdb_stdout);
c906108c 2516
c906108c 2517#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2518
2519 printf_unfiltered ("\n\tflags =");
2520 pif (Cannot_unwind);
2521 pif (Millicode);
2522 pif (Millicode_save_sr0);
2523 pif (Entry_SR);
2524 pif (Args_stored);
2525 pif (Variable_Frame);
2526 pif (Separate_Package_Body);
2527 pif (Frame_Extension_Millicode);
2528 pif (Stack_Overflow_Check);
2529 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2530 pif (sr4export);
2531 pif (cxx_info);
2532 pif (cxx_try_catch);
2533 pif (sched_entry_seq);
c906108c
SS
2534 pif (Save_SP);
2535 pif (Save_RP);
2536 pif (Save_MRP_in_frame);
6fcecea0 2537 pif (save_r19);
c906108c
SS
2538 pif (Cleanup_defined);
2539 pif (MPE_XL_interrupt_marker);
2540 pif (HP_UX_interrupt_marker);
2541 pif (Large_frame);
6fcecea0 2542 pif (alloca_frame);
c906108c
SS
2543
2544 putchar_unfiltered ('\n');
2545
c906108c 2546#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2547
2548 pin (Region_description);
2549 pin (Entry_FR);
2550 pin (Entry_GR);
2551 pin (Total_frame_size);
57dac9e1
RC
2552
2553 if (u->stub_unwind.stub_type)
2554 {
2555 printf_unfiltered ("\tstub type = ");
2556 switch (u->stub_unwind.stub_type)
2557 {
2558 case LONG_BRANCH:
2559 printf_unfiltered ("long branch\n");
2560 break;
2561 case PARAMETER_RELOCATION:
2562 printf_unfiltered ("parameter relocation\n");
2563 break;
2564 case EXPORT:
2565 printf_unfiltered ("export\n");
2566 break;
2567 case IMPORT:
2568 printf_unfiltered ("import\n");
2569 break;
2570 case IMPORT_SHLIB:
2571 printf_unfiltered ("import shlib\n");
2572 break;
2573 default:
2574 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2575 }
2576 }
c906108c 2577}
c906108c 2578
38ca4e0c
MK
2579/* Return the GDB type object for the "standard" data type of data in
2580 register REGNUM. */
d709c020 2581
eded0a31 2582static struct type *
38ca4e0c 2583hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2584{
38ca4e0c 2585 if (regnum < HPPA_FP4_REGNUM)
df4df182 2586 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2587 else
27067745 2588 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2589}
2590
eded0a31 2591static struct type *
38ca4e0c 2592hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2593{
38ca4e0c 2594 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2595 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2596 else
27067745 2597 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2598}
2599
38ca4e0c
MK
2600/* Return non-zero if REGNUM is not a register available to the user
2601 through ptrace/ttrace. */
d709c020 2602
8d153463 2603static int
64a3914f 2604hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2605{
2606 return (regnum == 0
34f75cc1
RC
2607 || regnum == HPPA_PCSQ_HEAD_REGNUM
2608 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2609 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2610}
d709c020 2611
d037d088 2612static int
64a3914f 2613hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2614{
2615 /* cr26 and cr27 are readable (but not writable) from userspace. */
2616 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2617 return 0;
2618 else
64a3914f 2619 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2620}
2621
38ca4e0c 2622static int
64a3914f 2623hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2624{
2625 return (regnum == 0
2626 || regnum == HPPA_PCSQ_HEAD_REGNUM
2627 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2628 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2629}
2630
d037d088 2631static int
64a3914f 2632hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2633{
2634 /* cr26 and cr27 are readable (but not writable) from userspace. */
2635 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2636 return 0;
2637 else
64a3914f 2638 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2639}
2640
8d153463 2641static CORE_ADDR
24568a2c 2642hppa_smash_text_address (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2643{
2644 /* The low two bits of the PC on the PA contain the privilege level.
2645 Some genius implementing a (non-GCC) compiler apparently decided
2646 this means that "addresses" in a text section therefore include a
2647 privilege level, and thus symbol tables should contain these bits.
2648 This seems like a bonehead thing to do--anyway, it seems to work
2649 for our purposes to just ignore those bits. */
2650
2651 return (addr &= ~0x3);
2652}
2653
e127f0db
MK
2654/* Get the ARGIth function argument for the current function. */
2655
4a302917 2656static CORE_ADDR
143985b7
AF
2657hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2658 struct type *type)
2659{
e127f0db 2660 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2661}
2662
0f8d9d59
RC
2663static void
2664hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2665 int regnum, gdb_byte *buf)
0f8d9d59 2666{
e17a4113 2667 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0f8d9d59
RC
2668 ULONGEST tmp;
2669
2670 regcache_raw_read_unsigned (regcache, regnum, &tmp);
34f75cc1 2671 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
0f8d9d59 2672 tmp &= ~0x3;
e17a4113 2673 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
0f8d9d59
RC
2674}
2675
d49771ef 2676static CORE_ADDR
e38c262f 2677hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2678{
2679 return 0;
2680}
2681
227e86ad
JB
2682struct value *
2683hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2684 struct trad_frame_saved_reg saved_regs[],
227e86ad 2685 int regnum)
0da28f8a 2686{
227e86ad 2687 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2688 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2689
8693c419
MK
2690 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2691 {
227e86ad
JB
2692 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2693 CORE_ADDR pc;
2694 struct value *pcoq_val =
2695 trad_frame_get_prev_register (this_frame, saved_regs,
2696 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2697
e17a4113
UW
2698 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2699 size, byte_order);
227e86ad 2700 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2701 }
0da28f8a 2702
cc72850f
MK
2703 /* Make sure the "flags" register is zero in all unwound frames.
2704 The "flags" registers is a HP-UX specific wart, and only the code
2705 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2706 with it here. This shouldn't affect other systems since those
2707 should provide zero for the "flags" register anyway. */
2708 if (regnum == HPPA_FLAGS_REGNUM)
227e86ad 2709 return frame_unwind_got_constant (this_frame, regnum, 0);
cc72850f 2710
227e86ad 2711 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2712}
8693c419 2713\f
0da28f8a 2714
34f55018
MK
2715/* An instruction to match. */
2716struct insn_pattern
2717{
2718 unsigned int data; /* See if it matches this.... */
2719 unsigned int mask; /* ... with this mask. */
2720};
2721
2722/* See bfd/elf32-hppa.c */
2723static struct insn_pattern hppa_long_branch_stub[] = {
2724 /* ldil LR'xxx,%r1 */
2725 { 0x20200000, 0xffe00000 },
2726 /* be,n RR'xxx(%sr4,%r1) */
2727 { 0xe0202002, 0xffe02002 },
2728 { 0, 0 }
2729};
2730
2731static struct insn_pattern hppa_long_branch_pic_stub[] = {
2732 /* b,l .+8, %r1 */
2733 { 0xe8200000, 0xffe00000 },
2734 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2735 { 0x28200000, 0xffe00000 },
2736 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2737 { 0xe0202002, 0xffe02002 },
2738 { 0, 0 }
2739};
2740
2741static struct insn_pattern hppa_import_stub[] = {
2742 /* addil LR'xxx, %dp */
2743 { 0x2b600000, 0xffe00000 },
2744 /* ldw RR'xxx(%r1), %r21 */
2745 { 0x48350000, 0xffffb000 },
2746 /* bv %r0(%r21) */
2747 { 0xeaa0c000, 0xffffffff },
2748 /* ldw RR'xxx+4(%r1), %r19 */
2749 { 0x48330000, 0xffffb000 },
2750 { 0, 0 }
2751};
2752
2753static struct insn_pattern hppa_import_pic_stub[] = {
2754 /* addil LR'xxx,%r19 */
2755 { 0x2a600000, 0xffe00000 },
2756 /* ldw RR'xxx(%r1),%r21 */
2757 { 0x48350000, 0xffffb000 },
2758 /* bv %r0(%r21) */
2759 { 0xeaa0c000, 0xffffffff },
2760 /* ldw RR'xxx+4(%r1),%r19 */
2761 { 0x48330000, 0xffffb000 },
2762 { 0, 0 },
2763};
2764
2765static struct insn_pattern hppa_plt_stub[] = {
2766 /* b,l 1b, %r20 - 1b is 3 insns before here */
2767 { 0xea9f1fdd, 0xffffffff },
2768 /* depi 0,31,2,%r20 */
2769 { 0xd6801c1e, 0xffffffff },
2770 { 0, 0 }
2771};
2772
2773static struct insn_pattern hppa_sigtramp[] = {
2774 /* ldi 0, %r25 or ldi 1, %r25 */
2775 { 0x34190000, 0xfffffffd },
2776 /* ldi __NR_rt_sigreturn, %r20 */
2777 { 0x3414015a, 0xffffffff },
2778 /* be,l 0x100(%sr2, %r0), %sr0, %r31 */
2779 { 0xe4008200, 0xffffffff },
2780 /* nop */
2781 { 0x08000240, 0xffffffff },
2782 { 0, 0 }
2783};
2784
2785/* Maximum number of instructions on the patterns above. */
2786#define HPPA_MAX_INSN_PATTERN_LEN 4
2787
2788/* Return non-zero if the instructions at PC match the series
2789 described in PATTERN, or zero otherwise. PATTERN is an array of
2790 'struct insn_pattern' objects, terminated by an entry whose mask is
2791 zero.
2792
2793 When the match is successful, fill INSN[i] with what PATTERN[i]
2794 matched. */
2795
2796static int
e17a4113
UW
2797hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2798 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2799{
e17a4113 2800 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2801 CORE_ADDR npc = pc;
2802 int i;
2803
2804 for (i = 0; pattern[i].mask; i++)
2805 {
2806 gdb_byte buf[HPPA_INSN_SIZE];
2807
8defab1a 2808 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2809 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2810 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2811 npc += 4;
2812 else
2813 return 0;
2814 }
2815
2816 return 1;
2817}
2818
2819/* This relaxed version of the insstruction matcher allows us to match
2820 from somewhere inside the pattern, by looking backwards in the
2821 instruction scheme. */
2822
2823static int
e17a4113
UW
2824hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2825 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2826{
2827 int offset, len = 0;
2828
2829 while (pattern[len].mask)
2830 len++;
2831
2832 for (offset = 0; offset < len; offset++)
e17a4113
UW
2833 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2834 pattern, insn))
34f55018
MK
2835 return 1;
2836
2837 return 0;
2838}
2839
2840static int
2841hppa_in_dyncall (CORE_ADDR pc)
2842{
2843 struct unwind_table_entry *u;
2844
2845 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2846 if (!u)
2847 return 0;
2848
2849 return (pc >= u->region_start && pc <= u->region_end);
2850}
2851
2852int
e17a4113
UW
2853hppa_in_solib_call_trampoline (struct gdbarch *gdbarch,
2854 CORE_ADDR pc, char *name)
34f55018
MK
2855{
2856 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2857 struct unwind_table_entry *u;
2858
2859 if (in_plt_section (pc, name) || hppa_in_dyncall (pc))
2860 return 1;
2861
2862 /* The GNU toolchain produces linker stubs without unwind
2863 information. Since the pattern matching for linker stubs can be
2864 quite slow, so bail out if we do have an unwind entry. */
2865
2866 u = find_unwind_entry (pc);
806e23c0 2867 if (u != NULL)
34f55018
MK
2868 return 0;
2869
e17a4113
UW
2870 return
2871 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2872 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2873 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2874 || hppa_match_insns_relaxed (gdbarch, pc,
2875 hppa_long_branch_pic_stub, insn));
34f55018
MK
2876}
2877
2878/* This code skips several kind of "trampolines" used on PA-RISC
2879 systems: $$dyncall, import stubs and PLT stubs. */
2880
2881CORE_ADDR
52f729a7 2882hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2883{
0dfff4cb
UW
2884 struct gdbarch *gdbarch = get_frame_arch (frame);
2885 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2886
34f55018
MK
2887 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2888 int dp_rel;
2889
2890 /* $$dyncall handles both PLABELs and direct addresses. */
2891 if (hppa_in_dyncall (pc))
2892 {
52f729a7 2893 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2894
2895 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2896 if (pc & 0x2)
0dfff4cb 2897 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2898
2899 return pc;
2900 }
2901
e17a4113
UW
2902 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2903 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2904 {
2905 /* Extract the target address from the addil/ldw sequence. */
2906 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2907
2908 if (dp_rel)
52f729a7 2909 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2910 else
52f729a7 2911 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2912
2913 /* fallthrough */
2914 }
2915
2916 if (in_plt_section (pc, NULL))
2917 {
0dfff4cb 2918 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2919
2920 /* If the PLT slot has not yet been resolved, the target will be
2921 the PLT stub. */
2922 if (in_plt_section (pc, NULL))
2923 {
2924 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 2925 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2926 {
5af949e3
UW
2927 warning (_("Cannot resolve PLT stub at %s."),
2928 paddress (gdbarch, pc));
34f55018
MK
2929 return 0;
2930 }
2931
2932 /* This should point to the fixup routine. */
0dfff4cb 2933 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2934 }
2935 }
2936
2937 return pc;
2938}
2939\f
2940
8e8b2dba
MC
2941/* Here is a table of C type sizes on hppa with various compiles
2942 and options. I measured this on PA 9000/800 with HP-UX 11.11
2943 and these compilers:
2944
2945 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2946 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2947 /opt/aCC/bin/aCC B3910B A.03.45
2948 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2949
2950 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2951 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2952 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2953 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2954 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2955 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2956 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2957 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2958
2959 Each line is:
2960
2961 compiler and options
2962 char, short, int, long, long long
2963 float, double, long double
2964 char *, void (*)()
2965
2966 So all these compilers use either ILP32 or LP64 model.
2967 TODO: gcc has more options so it needs more investigation.
2968
a2379359
MC
2969 For floating point types, see:
2970
2971 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2972 HP-UX floating-point guide, hpux 11.00
2973
8e8b2dba
MC
2974 -- chastain 2003-12-18 */
2975
e6e68f1f
JB
2976static struct gdbarch *
2977hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2978{
3ff7cf9e 2979 struct gdbarch_tdep *tdep;
e6e68f1f 2980 struct gdbarch *gdbarch;
59623e27
JB
2981
2982 /* Try to determine the ABI of the object we are loading. */
4be87837 2983 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2984 {
4be87837
DJ
2985 /* If it's a SOM file, assume it's HP/UX SOM. */
2986 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2987 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 2988 }
e6e68f1f
JB
2989
2990 /* find a candidate among the list of pre-declared architectures. */
2991 arches = gdbarch_list_lookup_by_info (arches, &info);
2992 if (arches != NULL)
2993 return (arches->gdbarch);
2994
2995 /* If none found, then allocate and initialize one. */
fdd72f95 2996 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
2997 gdbarch = gdbarch_alloc (&info, tdep);
2998
2999 /* Determine from the bfd_arch_info structure if we are dealing with
3000 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3001 then default to a 32bit machine. */
3002 if (info.bfd_arch_info != NULL)
3003 tdep->bytes_per_address =
3004 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3005 else
3006 tdep->bytes_per_address = 4;
3007
d49771ef
RC
3008 tdep->find_global_pointer = hppa_find_global_pointer;
3009
3ff7cf9e
JB
3010 /* Some parts of the gdbarch vector depend on whether we are running
3011 on a 32 bits or 64 bits target. */
3012 switch (tdep->bytes_per_address)
3013 {
3014 case 4:
3015 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3016 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3017 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3018 set_gdbarch_cannot_store_register (gdbarch,
3019 hppa32_cannot_store_register);
3020 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3021 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3022 break;
3023 case 8:
3024 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3025 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3026 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3027 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3028 set_gdbarch_cannot_store_register (gdbarch,
3029 hppa64_cannot_store_register);
3030 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3031 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3032 break;
3033 default:
e2e0b3e5 3034 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3035 tdep->bytes_per_address);
3036 }
3037
3ff7cf9e 3038 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3039 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3040
8e8b2dba
MC
3041 /* The following gdbarch vector elements are the same in both ILP32
3042 and LP64, but might show differences some day. */
3043 set_gdbarch_long_long_bit (gdbarch, 64);
3044 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3045 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3046
3ff7cf9e
JB
3047 /* The following gdbarch vector elements do not depend on the address
3048 size, or in any other gdbarch element previously set. */
60383d10 3049 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3050 set_gdbarch_in_function_epilogue_p (gdbarch,
3051 hppa_in_function_epilogue_p);
a2a84a72 3052 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3053 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3054 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
b6fbdd1d 3055 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
3056 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
3057 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3058 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3059 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3060
143985b7
AF
3061 /* Helper for function argument information. */
3062 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3063
36482093
AC
3064 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3065
3a3bc038
AC
3066 /* When a hardware watchpoint triggers, we'll move the inferior past
3067 it by removing all eventpoints; stepping past the instruction
3068 that caused the trigger; reinserting eventpoints; and checking
3069 whether any watched location changed. */
3070 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3071
5979bc46 3072 /* Inferior function call methods. */
fca7aa43 3073 switch (tdep->bytes_per_address)
5979bc46 3074 {
fca7aa43
AC
3075 case 4:
3076 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3077 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3078 set_gdbarch_convert_from_func_ptr_addr
3079 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3080 break;
3081 case 8:
782eae8b
AC
3082 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3083 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3084 break;
782eae8b 3085 default:
e2e0b3e5 3086 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3087 }
3088
3089 /* Struct return methods. */
fca7aa43 3090 switch (tdep->bytes_per_address)
fad850b2 3091 {
fca7aa43
AC
3092 case 4:
3093 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3094 break;
3095 case 8:
782eae8b 3096 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3097 break;
fca7aa43 3098 default:
e2e0b3e5 3099 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3100 }
7f07c5b6 3101
85f4f2d8 3102 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3103 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3104
5979bc46 3105 /* Frame unwind methods. */
227e86ad 3106 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3107 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3108
50306a9d
RC
3109 /* Hook in ABI-specific overrides, if they have been registered. */
3110 gdbarch_init_osabi (info, gdbarch);
3111
7f07c5b6 3112 /* Hook in the default unwinders. */
227e86ad
JB
3113 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3114 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3115 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3116
e6e68f1f
JB
3117 return gdbarch;
3118}
3119
3120static void
464963c9 3121hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3122{
464963c9 3123 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3124
3125 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3126 tdep->bytes_per_address);
3127 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3128}
3129
72753510
PA
3130/* Provide a prototype to silence -Wmissing-prototypes. */
3131extern initialize_file_ftype _initialize_hppa_tdep;
3132
4facf7e8
JB
3133void
3134_initialize_hppa_tdep (void)
3135{
3136 struct cmd_list_element *c;
4facf7e8 3137
e6e68f1f 3138 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3139
7c46b9fb
RC
3140 hppa_objfile_priv_data = register_objfile_data ();
3141
4facf7e8 3142 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3143 _("Print unwind table entry at given address."),
4facf7e8
JB
3144 &maintenanceprintlist);
3145
369aa520 3146 /* Debug this files internals. */
7915a72c
AC
3147 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3148Set whether hppa target specific debugging information should be displayed."),
3149 _("\
3150Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3151This flag controls whether hppa target specific debugging information is\n\
3152displayed. This information is particularly useful for debugging frame\n\
7915a72c 3153unwinding problems."),
2c5b56ce 3154 NULL,
7915a72c 3155 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3156 &setdebuglist, &showdebuglist);
4facf7e8 3157}
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