proc-service, extern "C"
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
32d0add0 3 Copyright (C) 1986-2015 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
c906108c 42
369aa520
RC
43static int hppa_debug = 0;
44
60383d10 45/* Some local constants. */
3ff7cf9e
JB
46static const int hppa32_num_regs = 128;
47static const int hppa64_num_regs = 96;
48
7c46b9fb
RC
49/* hppa-specific object data -- unwind and solib info.
50 TODO/maybe: think about splitting this into two parts; the unwind data is
51 common to all hppa targets, but is only used in this file; we can register
52 that separately and make this static. The solib data is probably hpux-
53 specific, so we can create a separate extern objfile_data that is registered
54 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
55const struct objfile_data *hppa_objfile_priv_data = NULL;
56
1777feb0 57/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
58#define MASK_5 0x1f
59#define MASK_11 0x7ff
60#define MASK_14 0x3fff
61#define MASK_21 0x1fffff
62
e2ac8128
JB
63/* Sizes (in bytes) of the native unwind entries. */
64#define UNWIND_ENTRY_SIZE 16
65#define STUB_UNWIND_ENTRY_SIZE 8
66
c906108c 67/* Routines to extract various sized constants out of hppa
1777feb0 68 instructions. */
c906108c
SS
69
70/* This assumes that no garbage lies outside of the lower bits of
1777feb0 71 value. */
c906108c 72
63807e1d 73static int
abc485a1 74hppa_sign_extend (unsigned val, unsigned bits)
c906108c 75{
c5aa993b 76 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
77}
78
1777feb0 79/* For many immediate values the sign bit is the low bit! */
c906108c 80
63807e1d 81static int
abc485a1 82hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 83{
c5aa993b 84 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
85}
86
e2ac8128 87/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 88 (MSB = 0). */
e2ac8128 89
abc485a1
RC
90int
91hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
92{
93 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
94}
95
1777feb0 96/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 97
abc485a1
RC
98int
99hppa_extract_5_load (unsigned word)
c906108c 100{
abc485a1 101 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
102}
103
1777feb0 104/* Extract the immediate field from a break instruction. */
c906108c 105
abc485a1
RC
106unsigned
107hppa_extract_5r_store (unsigned word)
c906108c
SS
108{
109 return (word & MASK_5);
110}
111
1777feb0 112/* Extract the immediate field from a {sr}sm instruction. */
c906108c 113
abc485a1
RC
114unsigned
115hppa_extract_5R_store (unsigned word)
c906108c
SS
116{
117 return (word >> 16 & MASK_5);
118}
119
1777feb0 120/* Extract a 14 bit immediate field. */
c906108c 121
abc485a1
RC
122int
123hppa_extract_14 (unsigned word)
c906108c 124{
abc485a1 125 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
126}
127
1777feb0 128/* Extract a 21 bit constant. */
c906108c 129
abc485a1
RC
130int
131hppa_extract_21 (unsigned word)
c906108c
SS
132{
133 int val;
134
135 word &= MASK_21;
136 word <<= 11;
abc485a1 137 val = hppa_get_field (word, 20, 20);
c906108c 138 val <<= 11;
abc485a1 139 val |= hppa_get_field (word, 9, 19);
c906108c 140 val <<= 2;
abc485a1 141 val |= hppa_get_field (word, 5, 6);
c906108c 142 val <<= 5;
abc485a1 143 val |= hppa_get_field (word, 0, 4);
c906108c 144 val <<= 2;
abc485a1
RC
145 val |= hppa_get_field (word, 7, 8);
146 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
147}
148
c906108c 149/* extract a 17 bit constant from branch instructions, returning the
1777feb0 150 19 bit signed value. */
c906108c 151
abc485a1
RC
152int
153hppa_extract_17 (unsigned word)
c906108c 154{
abc485a1
RC
155 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
156 hppa_get_field (word, 29, 29) << 10 |
157 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
158 (word & 0x1) << 16, 17) << 2;
159}
3388d7ff
RC
160
161CORE_ADDR
162hppa_symbol_address(const char *sym)
163{
3b7344d5 164 struct bound_minimal_symbol minsym;
3388d7ff
RC
165
166 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 167 if (minsym.minsym)
77e371c0 168 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
169 else
170 return (CORE_ADDR)-1;
171}
77d18ded
RC
172
173struct hppa_objfile_private *
174hppa_init_objfile_priv_data (struct objfile *objfile)
175{
176 struct hppa_objfile_private *priv;
177
178 priv = (struct hppa_objfile_private *)
179 obstack_alloc (&objfile->objfile_obstack,
180 sizeof (struct hppa_objfile_private));
181 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
182 memset (priv, 0, sizeof (*priv));
183
184 return priv;
185}
c906108c
SS
186\f
187
188/* Compare the start address for two unwind entries returning 1 if
189 the first address is larger than the second, -1 if the second is
190 larger than the first, and zero if they are equal. */
191
192static int
fba45db2 193compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
194{
195 const struct unwind_table_entry *a = arg1;
196 const struct unwind_table_entry *b = arg2;
197
198 if (a->region_start > b->region_start)
199 return 1;
200 else if (a->region_start < b->region_start)
201 return -1;
202 else
203 return 0;
204}
205
53a5351d 206static void
fdd72f95 207record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 208{
fdd72f95 209 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 210 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
211 {
212 bfd_vma value = section->vma - section->filepos;
213 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
214
215 if (value < *low_text_segment_address)
216 *low_text_segment_address = value;
217 }
53a5351d
JM
218}
219
c906108c 220static void
fba45db2 221internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 222 asection *section, unsigned int entries,
241fd515 223 size_t size, CORE_ADDR text_offset)
c906108c
SS
224{
225 /* We will read the unwind entries into temporary memory, then
226 fill in the actual unwind table. */
fdd72f95 227
c906108c
SS
228 if (size > 0)
229 {
5db8bbe5 230 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
231 unsigned long tmp;
232 unsigned i;
233 char *buf = alloca (size);
fdd72f95 234 CORE_ADDR low_text_segment_address;
c906108c 235
fdd72f95 236 /* For ELF targets, then unwinds are supposed to
1777feb0 237 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
238
239 Note that when loading a shared library (text_offset != 0) the
240 unwinds are already relative to the text_offset that will be
241 passed in. */
5db8bbe5 242 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 243 {
fdd72f95
RC
244 low_text_segment_address = -1;
245
53a5351d 246 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
247 record_text_segment_lowaddr,
248 &low_text_segment_address);
53a5351d 249
fdd72f95 250 text_offset = low_text_segment_address;
53a5351d 251 }
5db8bbe5 252 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 253 {
5db8bbe5 254 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 255 }
53a5351d 256
c906108c
SS
257 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
258
259 /* Now internalize the information being careful to handle host/target
c5aa993b 260 endian issues. */
c906108c
SS
261 for (i = 0; i < entries; i++)
262 {
263 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 264 (bfd_byte *) buf);
c906108c
SS
265 table[i].region_start += text_offset;
266 buf += 4;
c5aa993b 267 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
268 table[i].region_end += text_offset;
269 buf += 4;
c5aa993b 270 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
271 buf += 4;
272 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
273 table[i].Millicode = (tmp >> 30) & 0x1;
274 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
275 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 276 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
277 table[i].Entry_SR = (tmp >> 25) & 0x1;
278 table[i].Entry_FR = (tmp >> 21) & 0xf;
279 table[i].Entry_GR = (tmp >> 16) & 0x1f;
280 table[i].Args_stored = (tmp >> 15) & 0x1;
281 table[i].Variable_Frame = (tmp >> 14) & 0x1;
282 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
283 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
284 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
285 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 286 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
287 table[i].cxx_info = (tmp >> 8) & 0x1;
288 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
289 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 290 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
291 table[i].Save_SP = (tmp >> 4) & 0x1;
292 table[i].Save_RP = (tmp >> 3) & 0x1;
293 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 294 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 295 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 296 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
297 buf += 4;
298 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
299 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
300 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
301 table[i].alloca_frame = (tmp >> 28) & 0x1;
302 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
303 table[i].Total_frame_size = tmp & 0x7ffffff;
304
1777feb0 305 /* Stub unwinds are handled elsewhere. */
c906108c
SS
306 table[i].stub_unwind.stub_type = 0;
307 table[i].stub_unwind.padding = 0;
308 }
309 }
310}
311
312/* Read in the backtrace information stored in the `$UNWIND_START$' section of
313 the object file. This info is used mainly by find_unwind_entry() to find
314 out the stack frame size and frame pointer used by procedures. We put
315 everything on the psymbol obstack in the objfile so that it automatically
316 gets freed when the objfile is destroyed. */
317
318static void
fba45db2 319read_unwind_info (struct objfile *objfile)
c906108c 320{
d4f3574e 321 asection *unwind_sec, *stub_unwind_sec;
241fd515 322 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 323 unsigned index, unwind_entries;
c906108c
SS
324 unsigned stub_entries, total_entries;
325 CORE_ADDR text_offset;
7c46b9fb
RC
326 struct hppa_unwind_info *ui;
327 struct hppa_objfile_private *obj_private;
c906108c 328
a99dad3d 329 text_offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
7c46b9fb
RC
330 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
331 sizeof (struct hppa_unwind_info));
c906108c
SS
332
333 ui->table = NULL;
334 ui->cache = NULL;
335 ui->last = -1;
336
d4f3574e
SS
337 /* For reasons unknown the HP PA64 tools generate multiple unwinder
338 sections in a single executable. So we just iterate over every
339 section in the BFD looking for unwinder sections intead of trying
1777feb0 340 to do a lookup with bfd_get_section_by_name.
c906108c 341
d4f3574e
SS
342 First determine the total size of the unwind tables so that we
343 can allocate memory in a nice big hunk. */
344 total_entries = 0;
345 for (unwind_sec = objfile->obfd->sections;
346 unwind_sec;
347 unwind_sec = unwind_sec->next)
c906108c 348 {
d4f3574e
SS
349 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
350 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
351 {
352 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
353 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 354
d4f3574e
SS
355 total_entries += unwind_entries;
356 }
c906108c
SS
357 }
358
d4f3574e 359 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 360 use stub unwinds at the current time. */
d4f3574e
SS
361 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
362
c906108c
SS
363 if (stub_unwind_sec)
364 {
365 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
366 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
367 }
368 else
369 {
370 stub_unwind_size = 0;
371 stub_entries = 0;
372 }
373
374 /* Compute total number of unwind entries and their total size. */
d4f3574e 375 total_entries += stub_entries;
c906108c
SS
376 total_size = total_entries * sizeof (struct unwind_table_entry);
377
378 /* Allocate memory for the unwind table. */
379 ui->table = (struct unwind_table_entry *)
8b92e4d5 380 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 381 ui->last = total_entries - 1;
c906108c 382
d4f3574e
SS
383 /* Now read in each unwind section and internalize the standard unwind
384 entries. */
c906108c 385 index = 0;
d4f3574e
SS
386 for (unwind_sec = objfile->obfd->sections;
387 unwind_sec;
388 unwind_sec = unwind_sec->next)
389 {
390 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
391 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
392 {
393 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
394 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
395
396 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
397 unwind_entries, unwind_size, text_offset);
398 index += unwind_entries;
399 }
400 }
401
402 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
403 if (stub_unwind_size > 0)
404 {
405 unsigned int i;
406 char *buf = alloca (stub_unwind_size);
407
408 /* Read in the stub unwind entries. */
409 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
410 0, stub_unwind_size);
411
412 /* Now convert them into regular unwind entries. */
413 for (i = 0; i < stub_entries; i++, index++)
414 {
415 /* Clear out the next unwind entry. */
416 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
417
1777feb0 418 /* Convert offset & size into region_start and region_end.
c906108c
SS
419 Stuff away the stub type into "reserved" fields. */
420 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
421 (bfd_byte *) buf);
422 ui->table[index].region_start += text_offset;
423 buf += 4;
424 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 425 (bfd_byte *) buf);
c906108c
SS
426 buf += 2;
427 ui->table[index].region_end
c5aa993b
JM
428 = ui->table[index].region_start + 4 *
429 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
430 buf += 2;
431 }
432
433 }
434
435 /* Unwind table needs to be kept sorted. */
436 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
437 compare_unwind_entries);
438
439 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
440 obj_private = (struct hppa_objfile_private *)
441 objfile_data (objfile, hppa_objfile_priv_data);
442 if (obj_private == NULL)
77d18ded
RC
443 obj_private = hppa_init_objfile_priv_data (objfile);
444
c906108c
SS
445 obj_private->unwind_info = ui;
446}
447
448/* Lookup the unwind (stack backtrace) info for the given PC. We search all
449 of the objfiles seeking the unwind table entry for this PC. Each objfile
450 contains a sorted list of struct unwind_table_entry. Since we do a binary
451 search of the unwind tables, we depend upon them to be sorted. */
452
453struct unwind_table_entry *
fba45db2 454find_unwind_entry (CORE_ADDR pc)
c906108c
SS
455{
456 int first, middle, last;
457 struct objfile *objfile;
7c46b9fb 458 struct hppa_objfile_private *priv;
c906108c 459
369aa520 460 if (hppa_debug)
5af949e3
UW
461 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
462 hex_string (pc));
369aa520 463
1777feb0 464 /* A function at address 0? Not in HP-UX! */
c906108c 465 if (pc == (CORE_ADDR) 0)
369aa520
RC
466 {
467 if (hppa_debug)
468 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
469 return NULL;
470 }
c906108c
SS
471
472 ALL_OBJFILES (objfile)
c5aa993b 473 {
7c46b9fb 474 struct hppa_unwind_info *ui;
c5aa993b 475 ui = NULL;
7c46b9fb
RC
476 priv = objfile_data (objfile, hppa_objfile_priv_data);
477 if (priv)
478 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 479
c5aa993b
JM
480 if (!ui)
481 {
482 read_unwind_info (objfile);
7c46b9fb
RC
483 priv = objfile_data (objfile, hppa_objfile_priv_data);
484 if (priv == NULL)
8a3fe4f8 485 error (_("Internal error reading unwind information."));
7c46b9fb 486 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 487 }
c906108c 488
1777feb0 489 /* First, check the cache. */
c906108c 490
c5aa993b
JM
491 if (ui->cache
492 && pc >= ui->cache->region_start
493 && pc <= ui->cache->region_end)
369aa520
RC
494 {
495 if (hppa_debug)
5af949e3
UW
496 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
497 hex_string ((uintptr_t) ui->cache));
369aa520
RC
498 return ui->cache;
499 }
c906108c 500
1777feb0 501 /* Not in the cache, do a binary search. */
c906108c 502
c5aa993b
JM
503 first = 0;
504 last = ui->last;
c906108c 505
c5aa993b
JM
506 while (first <= last)
507 {
508 middle = (first + last) / 2;
509 if (pc >= ui->table[middle].region_start
510 && pc <= ui->table[middle].region_end)
511 {
512 ui->cache = &ui->table[middle];
369aa520 513 if (hppa_debug)
5af949e3
UW
514 fprintf_unfiltered (gdb_stdlog, "%s }\n",
515 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
516 return &ui->table[middle];
517 }
c906108c 518
c5aa993b
JM
519 if (pc < ui->table[middle].region_start)
520 last = middle - 1;
521 else
522 first = middle + 1;
523 }
524 } /* ALL_OBJFILES() */
369aa520
RC
525
526 if (hppa_debug)
527 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
528
c906108c
SS
529 return NULL;
530}
531
1fb24930 532/* The epilogue is defined here as the area either on the `bv' instruction
1777feb0 533 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
534
535 We do not assume that the epilogue is at the end of a function as we can
536 also have return sequences in the middle of a function. */
537static int
538hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
539{
e17a4113 540 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
541 unsigned long status;
542 unsigned int inst;
e362b510 543 gdb_byte buf[4];
1fb24930 544
8defab1a 545 status = target_read_memory (pc, buf, 4);
1fb24930
RC
546 if (status != 0)
547 return 0;
548
e17a4113 549 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
550
551 /* The most common way to perform a stack adjustment ldo X(sp),sp
552 We are destroying a stack frame if the offset is negative. */
553 if ((inst & 0xffffc000) == 0x37de0000
554 && hppa_extract_14 (inst) < 0)
555 return 1;
556
557 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
558 if (((inst & 0x0fc010e0) == 0x0fc010e0
559 || (inst & 0x0fc010e0) == 0x0fc010e0)
560 && hppa_extract_14 (inst) < 0)
561 return 1;
562
563 /* bv %r0(%rp) or bv,n %r0(%rp) */
564 if (inst == 0xe840c000 || inst == 0xe840c002)
565 return 1;
566
567 return 0;
568}
569
85f4f2d8 570static const unsigned char *
67d57894 571hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 572{
56132691 573 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
574 (*len) = sizeof (breakpoint);
575 return breakpoint;
576}
577
e23457df
AC
578/* Return the name of a register. */
579
4a302917 580static const char *
d93859e2 581hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
582{
583 static char *names[] = {
584 "flags", "r1", "rp", "r3",
585 "r4", "r5", "r6", "r7",
586 "r8", "r9", "r10", "r11",
587 "r12", "r13", "r14", "r15",
588 "r16", "r17", "r18", "r19",
589 "r20", "r21", "r22", "r23",
590 "r24", "r25", "r26", "dp",
591 "ret0", "ret1", "sp", "r31",
592 "sar", "pcoqh", "pcsqh", "pcoqt",
593 "pcsqt", "eiem", "iir", "isr",
594 "ior", "ipsw", "goto", "sr4",
595 "sr0", "sr1", "sr2", "sr3",
596 "sr5", "sr6", "sr7", "cr0",
597 "cr8", "cr9", "ccr", "cr12",
598 "cr13", "cr24", "cr25", "cr26",
599 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
600 "fpsr", "fpe1", "fpe2", "fpe3",
601 "fpe4", "fpe5", "fpe6", "fpe7",
602 "fr4", "fr4R", "fr5", "fr5R",
603 "fr6", "fr6R", "fr7", "fr7R",
604 "fr8", "fr8R", "fr9", "fr9R",
605 "fr10", "fr10R", "fr11", "fr11R",
606 "fr12", "fr12R", "fr13", "fr13R",
607 "fr14", "fr14R", "fr15", "fr15R",
608 "fr16", "fr16R", "fr17", "fr17R",
609 "fr18", "fr18R", "fr19", "fr19R",
610 "fr20", "fr20R", "fr21", "fr21R",
611 "fr22", "fr22R", "fr23", "fr23R",
612 "fr24", "fr24R", "fr25", "fr25R",
613 "fr26", "fr26R", "fr27", "fr27R",
614 "fr28", "fr28R", "fr29", "fr29R",
615 "fr30", "fr30R", "fr31", "fr31R"
616 };
617 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
618 return NULL;
619 else
620 return names[i];
621}
622
4a302917 623static const char *
d93859e2 624hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
625{
626 static char *names[] = {
627 "flags", "r1", "rp", "r3",
628 "r4", "r5", "r6", "r7",
629 "r8", "r9", "r10", "r11",
630 "r12", "r13", "r14", "r15",
631 "r16", "r17", "r18", "r19",
632 "r20", "r21", "r22", "r23",
633 "r24", "r25", "r26", "dp",
634 "ret0", "ret1", "sp", "r31",
635 "sar", "pcoqh", "pcsqh", "pcoqt",
636 "pcsqt", "eiem", "iir", "isr",
637 "ior", "ipsw", "goto", "sr4",
638 "sr0", "sr1", "sr2", "sr3",
639 "sr5", "sr6", "sr7", "cr0",
640 "cr8", "cr9", "ccr", "cr12",
641 "cr13", "cr24", "cr25", "cr26",
642 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
643 "fpsr", "fpe1", "fpe2", "fpe3",
644 "fr4", "fr5", "fr6", "fr7",
645 "fr8", "fr9", "fr10", "fr11",
646 "fr12", "fr13", "fr14", "fr15",
647 "fr16", "fr17", "fr18", "fr19",
648 "fr20", "fr21", "fr22", "fr23",
649 "fr24", "fr25", "fr26", "fr27",
650 "fr28", "fr29", "fr30", "fr31"
651 };
652 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
653 return NULL;
654 else
655 return names[i];
656}
657
85c83e99 658/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 659static int
d3f73121 660hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 661{
85c83e99 662 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
663 if (reg <= 32)
664 return reg;
665
666 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 667 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
668 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
669
85c83e99 670 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
671 return -1;
672}
673
79508e1e
AC
674/* This function pushes a stack frame with arguments as part of the
675 inferior function calling mechanism.
676
677 This is the version of the function for the 32-bit PA machines, in
678 which later arguments appear at lower addresses. (The stack always
679 grows towards higher addresses.)
680
681 We simply allocate the appropriate amount of stack space and put
682 arguments into their proper slots. */
683
4a302917 684static CORE_ADDR
7d9b040b 685hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
686 struct regcache *regcache, CORE_ADDR bp_addr,
687 int nargs, struct value **args, CORE_ADDR sp,
688 int struct_return, CORE_ADDR struct_addr)
689{
e17a4113
UW
690 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
691
79508e1e
AC
692 /* Stack base address at which any pass-by-reference parameters are
693 stored. */
694 CORE_ADDR struct_end = 0;
695 /* Stack base address at which the first parameter is stored. */
696 CORE_ADDR param_end = 0;
697
698 /* The inner most end of the stack after all the parameters have
699 been pushed. */
700 CORE_ADDR new_sp = 0;
701
702 /* Two passes. First pass computes the location of everything,
703 second pass writes the bytes out. */
704 int write_pass;
d49771ef
RC
705
706 /* Global pointer (r19) of the function we are trying to call. */
707 CORE_ADDR gp;
708
709 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
710
79508e1e
AC
711 for (write_pass = 0; write_pass < 2; write_pass++)
712 {
1797a8f6 713 CORE_ADDR struct_ptr = 0;
1777feb0 714 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
715 struct_ptr is adjusted for each argument below, so the first
716 argument will end up at sp-36. */
717 CORE_ADDR param_ptr = 32;
79508e1e 718 int i;
2a6228ef
RC
719 int small_struct = 0;
720
79508e1e
AC
721 for (i = 0; i < nargs; i++)
722 {
723 struct value *arg = args[i];
4991999e 724 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
725 /* The corresponding parameter that is pushed onto the
726 stack, and [possibly] passed in a register. */
948f8e3d 727 gdb_byte param_val[8];
79508e1e
AC
728 int param_len;
729 memset (param_val, 0, sizeof param_val);
730 if (TYPE_LENGTH (type) > 8)
731 {
732 /* Large parameter, pass by reference. Store the value
733 in "struct" area and then pass its address. */
734 param_len = 4;
1797a8f6 735 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 736 if (write_pass)
0fd88904 737 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 738 TYPE_LENGTH (type));
e17a4113
UW
739 store_unsigned_integer (param_val, 4, byte_order,
740 struct_end - struct_ptr);
79508e1e
AC
741 }
742 else if (TYPE_CODE (type) == TYPE_CODE_INT
743 || TYPE_CODE (type) == TYPE_CODE_ENUM)
744 {
745 /* Integer value store, right aligned. "unpack_long"
746 takes care of any sign-extension problems. */
747 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 748 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 749 unpack_long (type,
0fd88904 750 value_contents (arg)));
79508e1e 751 }
2a6228ef
RC
752 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
753 {
754 /* Floating point value store, right aligned. */
755 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 756 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 757 }
79508e1e
AC
758 else
759 {
79508e1e 760 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
761
762 /* Small struct value are stored right-aligned. */
79508e1e 763 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 764 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
765
766 /* Structures of size 5, 6 and 7 bytes are special in that
767 the higher-ordered word is stored in the lower-ordered
768 argument, and even though it is a 8-byte quantity the
769 registers need not be 8-byte aligned. */
1b07b470 770 if (param_len > 4 && param_len < 8)
2a6228ef 771 small_struct = 1;
79508e1e 772 }
2a6228ef 773
1797a8f6 774 param_ptr += param_len;
2a6228ef
RC
775 if (param_len == 8 && !small_struct)
776 param_ptr = align_up (param_ptr, 8);
777
778 /* First 4 non-FP arguments are passed in gr26-gr23.
779 First 4 32-bit FP arguments are passed in fr4L-fr7L.
780 First 2 64-bit FP arguments are passed in fr5 and fr7.
781
782 The rest go on the stack, starting at sp-36, towards lower
783 addresses. 8-byte arguments must be aligned to a 8-byte
784 stack boundary. */
79508e1e
AC
785 if (write_pass)
786 {
1797a8f6 787 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
788
789 /* There are some cases when we don't know the type
790 expected by the callee (e.g. for variadic functions), so
791 pass the parameters in both general and fp regs. */
792 if (param_ptr <= 48)
79508e1e 793 {
2a6228ef
RC
794 int grreg = 26 - (param_ptr - 36) / 4;
795 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
796 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
797
798 regcache_cooked_write (regcache, grreg, param_val);
799 regcache_cooked_write (regcache, fpLreg, param_val);
800
79508e1e 801 if (param_len > 4)
2a6228ef
RC
802 {
803 regcache_cooked_write (regcache, grreg + 1,
804 param_val + 4);
805
806 regcache_cooked_write (regcache, fpreg, param_val);
807 regcache_cooked_write (regcache, fpreg + 1,
808 param_val + 4);
809 }
79508e1e
AC
810 }
811 }
812 }
813
814 /* Update the various stack pointers. */
815 if (!write_pass)
816 {
2a6228ef 817 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
818 /* PARAM_PTR already accounts for all the arguments passed
819 by the user. However, the ABI mandates minimum stack
820 space allocations for outgoing arguments. The ABI also
821 mandates minimum stack alignments which we must
822 preserve. */
2a6228ef 823 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
824 }
825 }
826
827 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 828 address. */
79508e1e 829 if (struct_return)
9c9acae0 830 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 831
e38c262f 832 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
833
834 if (gp != 0)
9c9acae0 835 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 836
79508e1e 837 /* Set the return address. */
77d18ded
RC
838 if (!gdbarch_push_dummy_code_p (gdbarch))
839 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 840
c4557624 841 /* Update the Stack Pointer. */
34f75cc1 842 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 843
2a6228ef 844 return param_end;
79508e1e
AC
845}
846
38ca4e0c
MK
847/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
848 Runtime Architecture for PA-RISC 2.0", which is distributed as part
849 as of the HP-UX Software Transition Kit (STK). This implementation
850 is based on version 3.3, dated October 6, 1997. */
2f690297 851
38ca4e0c 852/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 853
38ca4e0c
MK
854static int
855hppa64_integral_or_pointer_p (const struct type *type)
856{
857 switch (TYPE_CODE (type))
858 {
859 case TYPE_CODE_INT:
860 case TYPE_CODE_BOOL:
861 case TYPE_CODE_CHAR:
862 case TYPE_CODE_ENUM:
863 case TYPE_CODE_RANGE:
864 {
865 int len = TYPE_LENGTH (type);
866 return (len == 1 || len == 2 || len == 4 || len == 8);
867 }
868 case TYPE_CODE_PTR:
869 case TYPE_CODE_REF:
870 return (TYPE_LENGTH (type) == 8);
871 default:
872 break;
873 }
874
875 return 0;
876}
877
878/* Check whether TYPE is a "Floating Scalar Type". */
879
880static int
881hppa64_floating_p (const struct type *type)
882{
883 switch (TYPE_CODE (type))
884 {
885 case TYPE_CODE_FLT:
886 {
887 int len = TYPE_LENGTH (type);
888 return (len == 4 || len == 8 || len == 16);
889 }
890 default:
891 break;
892 }
893
894 return 0;
895}
2f690297 896
1218e655
RC
897/* If CODE points to a function entry address, try to look up the corresponding
898 function descriptor and return its address instead. If CODE is not a
899 function entry address, then just return it unchanged. */
900static CORE_ADDR
e17a4113 901hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 902{
e17a4113 903 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
904 struct obj_section *sec, *opd;
905
906 sec = find_pc_section (code);
907
908 if (!sec)
909 return code;
910
911 /* If CODE is in a data section, assume it's already a fptr. */
912 if (!(sec->the_bfd_section->flags & SEC_CODE))
913 return code;
914
915 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
916 {
917 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 918 break;
1218e655
RC
919 }
920
921 if (opd < sec->objfile->sections_end)
922 {
923 CORE_ADDR addr;
924
aded6f54
PA
925 for (addr = obj_section_addr (opd);
926 addr < obj_section_endaddr (opd);
927 addr += 2 * 8)
928 {
1218e655 929 ULONGEST opdaddr;
948f8e3d 930 gdb_byte tmp[8];
1218e655
RC
931
932 if (target_read_memory (addr, tmp, sizeof (tmp)))
933 break;
e17a4113 934 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 935
aded6f54 936 if (opdaddr == code)
1218e655
RC
937 return addr - 16;
938 }
939 }
940
941 return code;
942}
943
4a302917 944static CORE_ADDR
7d9b040b 945hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
946 struct regcache *regcache, CORE_ADDR bp_addr,
947 int nargs, struct value **args, CORE_ADDR sp,
948 int struct_return, CORE_ADDR struct_addr)
949{
38ca4e0c 950 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 951 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
952 int i, offset = 0;
953 CORE_ADDR gp;
2f690297 954
38ca4e0c
MK
955 /* "The outgoing parameter area [...] must be aligned at a 16-byte
956 boundary." */
957 sp = align_up (sp, 16);
2f690297 958
38ca4e0c
MK
959 for (i = 0; i < nargs; i++)
960 {
961 struct value *arg = args[i];
962 struct type *type = value_type (arg);
963 int len = TYPE_LENGTH (type);
0fd88904 964 const bfd_byte *valbuf;
1218e655 965 bfd_byte fptrbuf[8];
38ca4e0c 966 int regnum;
2f690297 967
38ca4e0c
MK
968 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
969 offset = align_up (offset, 8);
77d18ded 970
38ca4e0c 971 if (hppa64_integral_or_pointer_p (type))
2f690297 972 {
38ca4e0c
MK
973 /* "Integral scalar parameters smaller than 64 bits are
974 padded on the left (i.e., the value is in the
975 least-significant bits of the 64-bit storage unit, and
976 the high-order bits are undefined)." Therefore we can
977 safely sign-extend them. */
978 if (len < 8)
449e1137 979 {
df4df182 980 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
981 len = 8;
982 }
983 }
984 else if (hppa64_floating_p (type))
985 {
986 if (len > 8)
987 {
988 /* "Quad-precision (128-bit) floating-point scalar
989 parameters are aligned on a 16-byte boundary." */
990 offset = align_up (offset, 16);
991
992 /* "Double-extended- and quad-precision floating-point
993 parameters within the first 64 bytes of the parameter
994 list are always passed in general registers." */
449e1137
AC
995 }
996 else
997 {
38ca4e0c 998 if (len == 4)
449e1137 999 {
38ca4e0c
MK
1000 /* "Single-precision (32-bit) floating-point scalar
1001 parameters are padded on the left with 32 bits of
1002 garbage (i.e., the floating-point value is in the
1003 least-significant 32 bits of a 64-bit storage
1004 unit)." */
1005 offset += 4;
449e1137 1006 }
38ca4e0c
MK
1007
1008 /* "Single- and double-precision floating-point
1009 parameters in this area are passed according to the
1010 available formal parameter information in a function
1011 prototype. [...] If no prototype is in scope,
1012 floating-point parameters must be passed both in the
1013 corresponding general registers and in the
1014 corresponding floating-point registers." */
1015 regnum = HPPA64_FP4_REGNUM + offset / 8;
1016
1017 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1018 {
38ca4e0c
MK
1019 /* "Single-precision floating-point parameters, when
1020 passed in floating-point registers, are passed in
1021 the right halves of the floating point registers;
1022 the left halves are unused." */
1023 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1024 len, value_contents (arg));
449e1137
AC
1025 }
1026 }
2f690297 1027 }
38ca4e0c 1028 else
2f690297 1029 {
38ca4e0c
MK
1030 if (len > 8)
1031 {
1032 /* "Aggregates larger than 8 bytes are aligned on a
1033 16-byte boundary, possibly leaving an unused argument
1777feb0 1034 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1035 they are padded on the right (with garbage), to a
1036 multiple of 8 bytes." */
1037 offset = align_up (offset, 16);
1038 }
1039 }
1040
1218e655
RC
1041 /* If we are passing a function pointer, make sure we pass a function
1042 descriptor instead of the function entry address. */
1043 if (TYPE_CODE (type) == TYPE_CODE_PTR
1044 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1045 {
1046 ULONGEST codeptr, fptr;
1047
1048 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1049 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1050 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1051 fptr);
1218e655
RC
1052 valbuf = fptrbuf;
1053 }
1054 else
1055 {
1056 valbuf = value_contents (arg);
1057 }
1058
38ca4e0c 1059 /* Always store the argument in memory. */
1218e655 1060 write_memory (sp + offset, valbuf, len);
38ca4e0c 1061
38ca4e0c
MK
1062 regnum = HPPA_ARG0_REGNUM - offset / 8;
1063 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1064 {
1065 regcache_cooked_write_part (regcache, regnum,
1066 offset % 8, min (len, 8), valbuf);
1067 offset += min (len, 8);
1068 valbuf += min (len, 8);
1069 len -= min (len, 8);
1070 regnum--;
2f690297 1071 }
38ca4e0c
MK
1072
1073 offset += len;
2f690297
AC
1074 }
1075
38ca4e0c
MK
1076 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1077 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1078
1079 /* Allocate the outgoing parameter area. Make sure the outgoing
1080 parameter area is multiple of 16 bytes in length. */
1081 sp += max (align_up (offset, 16), 64);
1082
1083 /* Allocate 32-bytes of scratch space. The documentation doesn't
1084 mention this, but it seems to be needed. */
1085 sp += 32;
1086
1087 /* Allocate the frame marker area. */
1088 sp += 16;
1089
1090 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1091 its address. */
2f690297 1092 if (struct_return)
38ca4e0c 1093 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1094
38ca4e0c 1095 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1096 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1097 if (gp != 0)
38ca4e0c 1098 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1099
38ca4e0c 1100 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1101 if (!gdbarch_push_dummy_code_p (gdbarch))
1102 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1103
38ca4e0c
MK
1104 /* Set up GR30 to hold the stack pointer (sp). */
1105 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1106
38ca4e0c 1107 return sp;
2f690297 1108}
38ca4e0c 1109\f
2f690297 1110
08a27113
MK
1111/* Handle 32/64-bit struct return conventions. */
1112
1113static enum return_value_convention
6a3a010b 1114hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1115 struct type *type, struct regcache *regcache,
e127f0db 1116 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1117{
1118 if (TYPE_LENGTH (type) <= 2 * 4)
1119 {
1120 /* The value always lives in the right hand end of the register
1121 (or register pair)? */
1122 int b;
1123 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1124 int part = TYPE_LENGTH (type) % 4;
1125 /* The left hand register contains only part of the value,
1126 transfer that first so that the rest can be xfered as entire
1127 4-byte registers. */
1128 if (part > 0)
1129 {
1130 if (readbuf != NULL)
1131 regcache_cooked_read_part (regcache, reg, 4 - part,
1132 part, readbuf);
1133 if (writebuf != NULL)
1134 regcache_cooked_write_part (regcache, reg, 4 - part,
1135 part, writebuf);
1136 reg++;
1137 }
1138 /* Now transfer the remaining register values. */
1139 for (b = part; b < TYPE_LENGTH (type); b += 4)
1140 {
1141 if (readbuf != NULL)
e127f0db 1142 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1143 if (writebuf != NULL)
e127f0db 1144 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1145 reg++;
1146 }
1147 return RETURN_VALUE_REGISTER_CONVENTION;
1148 }
1149 else
1150 return RETURN_VALUE_STRUCT_CONVENTION;
1151}
1152
1153static enum return_value_convention
6a3a010b 1154hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1155 struct type *type, struct regcache *regcache,
e127f0db 1156 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1157{
1158 int len = TYPE_LENGTH (type);
1159 int regnum, offset;
1160
bad43aa5 1161 if (len > 16)
08a27113
MK
1162 {
1163 /* All return values larget than 128 bits must be aggregate
1164 return values. */
9738b034
MK
1165 gdb_assert (!hppa64_integral_or_pointer_p (type));
1166 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1167
1168 /* "Aggregate return values larger than 128 bits are returned in
1169 a buffer allocated by the caller. The address of the buffer
1170 must be passed in GR 28." */
1171 return RETURN_VALUE_STRUCT_CONVENTION;
1172 }
1173
1174 if (hppa64_integral_or_pointer_p (type))
1175 {
1176 /* "Integral return values are returned in GR 28. Values
1177 smaller than 64 bits are padded on the left (with garbage)." */
1178 regnum = HPPA_RET0_REGNUM;
1179 offset = 8 - len;
1180 }
1181 else if (hppa64_floating_p (type))
1182 {
1183 if (len > 8)
1184 {
1185 /* "Double-extended- and quad-precision floating-point
1186 values are returned in GRs 28 and 29. The sign,
1187 exponent, and most-significant bits of the mantissa are
1188 returned in GR 28; the least-significant bits of the
1189 mantissa are passed in GR 29. For double-extended
1190 precision values, GR 29 is padded on the right with 48
1191 bits of garbage." */
1192 regnum = HPPA_RET0_REGNUM;
1193 offset = 0;
1194 }
1195 else
1196 {
1197 /* "Single-precision and double-precision floating-point
1198 return values are returned in FR 4R (single precision) or
1199 FR 4 (double-precision)." */
1200 regnum = HPPA64_FP4_REGNUM;
1201 offset = 8 - len;
1202 }
1203 }
1204 else
1205 {
1206 /* "Aggregate return values up to 64 bits in size are returned
1207 in GR 28. Aggregates smaller than 64 bits are left aligned
1208 in the register; the pad bits on the right are undefined."
1209
1210 "Aggregate return values between 65 and 128 bits are returned
1211 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1212 the remaining bits are placed, left aligned, in GR 29. The
1213 pad bits on the right of GR 29 (if any) are undefined." */
1214 regnum = HPPA_RET0_REGNUM;
1215 offset = 0;
1216 }
1217
1218 if (readbuf)
1219 {
08a27113
MK
1220 while (len > 0)
1221 {
1222 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1223 min (len, 8), readbuf);
1224 readbuf += min (len, 8);
08a27113
MK
1225 len -= min (len, 8);
1226 regnum++;
1227 }
1228 }
1229
1230 if (writebuf)
1231 {
08a27113
MK
1232 while (len > 0)
1233 {
1234 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1235 min (len, 8), writebuf);
1236 writebuf += min (len, 8);
08a27113
MK
1237 len -= min (len, 8);
1238 regnum++;
1239 }
1240 }
1241
1242 return RETURN_VALUE_REGISTER_CONVENTION;
1243}
1244\f
1245
d49771ef 1246static CORE_ADDR
a7aad9aa 1247hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1248 struct target_ops *targ)
1249{
1250 if (addr & 2)
1251 {
0dfff4cb 1252 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1253 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1254 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1255 }
1256
1257 return addr;
1258}
1259
1797a8f6
AC
1260static CORE_ADDR
1261hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1262{
1263 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1264 and not _bit_)! */
1265 return align_up (addr, 64);
1266}
1267
2f690297
AC
1268/* Force all frames to 16-byte alignment. Better safe than sorry. */
1269
1270static CORE_ADDR
1797a8f6 1271hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1272{
1273 /* Just always 16-byte align. */
1274 return align_up (addr, 16);
1275}
1276
cc72850f 1277CORE_ADDR
61a1198a 1278hppa_read_pc (struct regcache *regcache)
c906108c 1279{
cc72850f 1280 ULONGEST ipsw;
61a1198a 1281 ULONGEST pc;
c906108c 1282
61a1198a
UW
1283 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1284 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1285
1286 /* If the current instruction is nullified, then we are effectively
1287 still executing the previous instruction. Pretend we are still
cc72850f
MK
1288 there. This is needed when single stepping; if the nullified
1289 instruction is on a different line, we don't want GDB to think
1290 we've stepped onto that line. */
fe46cd3a
RC
1291 if (ipsw & 0x00200000)
1292 pc -= 4;
1293
cc72850f 1294 return pc & ~0x3;
c906108c
SS
1295}
1296
cc72850f 1297void
61a1198a 1298hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1299{
61a1198a
UW
1300 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1301 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1302}
1303
c906108c 1304/* For the given instruction (INST), return any adjustment it makes
1777feb0 1305 to the stack pointer or zero for no adjustment.
c906108c
SS
1306
1307 This only handles instructions commonly found in prologues. */
1308
1309static int
fba45db2 1310prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1311{
1312 /* This must persist across calls. */
1313 static int save_high21;
1314
1315 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1316 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1317 return hppa_extract_14 (inst);
c906108c
SS
1318
1319 /* stwm X,D(sp) */
1320 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1321 return hppa_extract_14 (inst);
c906108c 1322
104c1213
JM
1323 /* std,ma X,D(sp) */
1324 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1325 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1326
e22b26cb 1327 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1328 save high bits in save_high21 for later use. */
e22b26cb 1329 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1330 {
abc485a1 1331 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1332 return 0;
1333 }
1334
1335 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1336 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1337
1338 /* fstws as used by the HP compilers. */
1339 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1340 return hppa_extract_5_load (inst);
c906108c
SS
1341
1342 /* No adjustment. */
1343 return 0;
1344}
1345
1346/* Return nonzero if INST is a branch of some kind, else return zero. */
1347
1348static int
fba45db2 1349is_branch (unsigned long inst)
c906108c
SS
1350{
1351 switch (inst >> 26)
1352 {
1353 case 0x20:
1354 case 0x21:
1355 case 0x22:
1356 case 0x23:
7be570e7 1357 case 0x27:
c906108c
SS
1358 case 0x28:
1359 case 0x29:
1360 case 0x2a:
1361 case 0x2b:
7be570e7 1362 case 0x2f:
c906108c
SS
1363 case 0x30:
1364 case 0x31:
1365 case 0x32:
1366 case 0x33:
1367 case 0x38:
1368 case 0x39:
1369 case 0x3a:
7be570e7 1370 case 0x3b:
c906108c
SS
1371 return 1;
1372
1373 default:
1374 return 0;
1375 }
1376}
1377
1378/* Return the register number for a GR which is saved by INST or
b35018fd 1379 zero if INST does not save a GR.
c906108c 1380
b35018fd 1381 Referenced from:
7be570e7 1382
b35018fd
CG
1383 parisc 1.1:
1384 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1385
b35018fd
CG
1386 parisc 2.0:
1387 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1388
b35018fd
CG
1389 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1390 on page 106 in parisc 2.0, all instructions for storing values from
1391 the general registers are:
c5aa993b 1392
b35018fd
CG
1393 Store: stb, sth, stw, std (according to Chapter 7, they
1394 are only in both "inst >> 26" and "inst >> 6".
1395 Store Absolute: stwa, stda (according to Chapter 7, they are only
1396 in "inst >> 6".
1397 Store Bytes: stby, stdby (according to Chapter 7, they are
1398 only in "inst >> 6").
1399
1400 For (inst >> 26), according to Chapter 7:
1401
1402 The effective memory reference address is formed by the addition
1403 of an immediate displacement to a base value.
1404
1405 - stb: 0x18, store a byte from a general register.
1406
1407 - sth: 0x19, store a halfword from a general register.
1408
1409 - stw: 0x1a, store a word from a general register.
1410
1411 - stwm: 0x1b, store a word from a general register and perform base
1412 register modification (2.0 will still treate it as stw).
1413
1414 - std: 0x1c, store a doubleword from a general register (2.0 only).
1415
1416 - stw: 0x1f, store a word from a general register (2.0 only).
1417
1418 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1419
1420 The effective memory reference address is formed by the addition
1421 of an index value to a base value specified in the instruction.
1422
1423 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1424
1425 - sth: 0x09, store a halfword from a general register (1.1 calls
1426 sths).
1427
1428 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1429
1430 - std: 0x0b: store a doubleword from a general register (2.0 only)
1431
1432 Implement fast byte moves (stores) to unaligned word or doubleword
1433 destination.
1434
1435 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1436
1437 - stdby: 0x0d for unaligned doubleword (2.0 only).
1438
1439 Store a word or doubleword using an absolute memory address formed
1440 using short or long displacement or indexed
1441
1442 - stwa: 0x0e, store a word from a general register to an absolute
1443 address (1.0 calls stwas).
1444
1445 - stda: 0x0f, store a doubleword from a general register to an
1446 absolute address (2.0 only). */
1447
1448static int
1449inst_saves_gr (unsigned long inst)
1450{
1451 switch ((inst >> 26) & 0x0f)
1452 {
1453 case 0x03:
1454 switch ((inst >> 6) & 0x0f)
1455 {
1456 case 0x08:
1457 case 0x09:
1458 case 0x0a:
1459 case 0x0b:
1460 case 0x0c:
1461 case 0x0d:
1462 case 0x0e:
1463 case 0x0f:
1464 return hppa_extract_5R_store (inst);
1465 default:
1466 return 0;
1467 }
1468 case 0x18:
1469 case 0x19:
1470 case 0x1a:
1471 case 0x1b:
1472 case 0x1c:
1473 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1474 case 0x1f:
1475 return hppa_extract_5R_store (inst);
1476 default:
1477 return 0;
1478 }
c906108c
SS
1479}
1480
1481/* Return the register number for a FR which is saved by INST or
1482 zero it INST does not save a FR.
1483
1484 Note we only care about full 64bit register stores (that's the only
1485 kind of stores the prologue will use).
1486
1487 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1488
1489static int
fba45db2 1490inst_saves_fr (unsigned long inst)
c906108c 1491{
1777feb0 1492 /* Is this an FSTD? */
c906108c 1493 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1494 return hppa_extract_5r_store (inst);
7be570e7 1495 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1496 return hppa_extract_5R_store (inst);
1777feb0 1497 /* Is this an FSTW? */
c906108c 1498 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1499 return hppa_extract_5r_store (inst);
7be570e7 1500 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1501 return hppa_extract_5R_store (inst);
c906108c
SS
1502 return 0;
1503}
1504
1505/* Advance PC across any function entry prologue instructions
1777feb0 1506 to reach some "real" code.
c906108c
SS
1507
1508 Use information in the unwind table to determine what exactly should
1509 be in the prologue. */
1510
1511
a71f8c30 1512static CORE_ADDR
be8626e0
MD
1513skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1514 int stop_before_branch)
c906108c 1515{
e17a4113 1516 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1517 gdb_byte buf[4];
c906108c
SS
1518 CORE_ADDR orig_pc = pc;
1519 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1520 unsigned long args_stored, status, i, restart_gr, restart_fr;
1521 struct unwind_table_entry *u;
a71f8c30 1522 int final_iteration;
c906108c
SS
1523
1524 restart_gr = 0;
1525 restart_fr = 0;
1526
1527restart:
1528 u = find_unwind_entry (pc);
1529 if (!u)
1530 return pc;
1531
1777feb0 1532 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1533 if ((pc & ~0x3) != u->region_start)
1534 return pc;
1535
1536 /* This is how much of a frame adjustment we need to account for. */
1537 stack_remaining = u->Total_frame_size << 3;
1538
1539 /* Magic register saves we want to know about. */
1540 save_rp = u->Save_RP;
1541 save_sp = u->Save_SP;
1542
1543 /* An indication that args may be stored into the stack. Unfortunately
1544 the HPUX compilers tend to set this in cases where no args were
1545 stored too!. */
1546 args_stored = 1;
1547
1548 /* Turn the Entry_GR field into a bitmask. */
1549 save_gr = 0;
1550 for (i = 3; i < u->Entry_GR + 3; i++)
1551 {
1552 /* Frame pointer gets saved into a special location. */
eded0a31 1553 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1554 continue;
1555
1556 save_gr |= (1 << i);
1557 }
1558 save_gr &= ~restart_gr;
1559
1560 /* Turn the Entry_FR field into a bitmask too. */
1561 save_fr = 0;
1562 for (i = 12; i < u->Entry_FR + 12; i++)
1563 save_fr |= (1 << i);
1564 save_fr &= ~restart_fr;
1565
a71f8c30
RC
1566 final_iteration = 0;
1567
c906108c
SS
1568 /* Loop until we find everything of interest or hit a branch.
1569
1570 For unoptimized GCC code and for any HP CC code this will never ever
1571 examine any user instructions.
1572
1573 For optimzied GCC code we're faced with problems. GCC will schedule
1574 its prologue and make prologue instructions available for delay slot
1575 filling. The end result is user code gets mixed in with the prologue
1576 and a prologue instruction may be in the delay slot of the first branch
1577 or call.
1578
1579 Some unexpected things are expected with debugging optimized code, so
1580 we allow this routine to walk past user instructions in optimized
1581 GCC code. */
1582 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1583 || args_stored)
1584 {
1585 unsigned int reg_num;
1586 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1587 unsigned long old_save_rp, old_save_sp, next_inst;
1588
1589 /* Save copies of all the triggers so we can compare them later
c5aa993b 1590 (only for HPC). */
c906108c
SS
1591 old_save_gr = save_gr;
1592 old_save_fr = save_fr;
1593 old_save_rp = save_rp;
1594 old_save_sp = save_sp;
1595 old_stack_remaining = stack_remaining;
1596
8defab1a 1597 status = target_read_memory (pc, buf, 4);
e17a4113 1598 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1599
c906108c
SS
1600 /* Yow! */
1601 if (status != 0)
1602 return pc;
1603
1604 /* Note the interesting effects of this instruction. */
1605 stack_remaining -= prologue_inst_adjust_sp (inst);
1606
7be570e7
JM
1607 /* There are limited ways to store the return pointer into the
1608 stack. */
c4c79048 1609 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1610 save_rp = 0;
1611
104c1213 1612 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1613 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1614 if ((inst & 0xffffc000) == 0x6fc10000
1615 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1616 save_sp = 0;
1617
6426a772
JM
1618 /* Are we loading some register with an offset from the argument
1619 pointer? */
1620 if ((inst & 0xffe00000) == 0x37a00000
1621 || (inst & 0xffffffe0) == 0x081d0240)
1622 {
1623 pc += 4;
1624 continue;
1625 }
1626
c906108c
SS
1627 /* Account for general and floating-point register saves. */
1628 reg_num = inst_saves_gr (inst);
1629 save_gr &= ~(1 << reg_num);
1630
1631 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1632 Unfortunately args_stored only tells us that some arguments
1633 where stored into the stack. Not how many or what kind!
c906108c 1634
c5aa993b
JM
1635 This is a kludge as on the HP compiler sets this bit and it
1636 never does prologue scheduling. So once we see one, skip past
1637 all of them. We have similar code for the fp arg stores below.
c906108c 1638
c5aa993b
JM
1639 FIXME. Can still die if we have a mix of GR and FR argument
1640 stores! */
be8626e0 1641 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1642 && reg_num <= 26)
c906108c 1643 {
be8626e0 1644 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1645 && reg_num <= 26)
c906108c
SS
1646 {
1647 pc += 4;
8defab1a 1648 status = target_read_memory (pc, buf, 4);
e17a4113 1649 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1650 if (status != 0)
1651 return pc;
1652 reg_num = inst_saves_gr (inst);
1653 }
1654 args_stored = 0;
1655 continue;
1656 }
1657
1658 reg_num = inst_saves_fr (inst);
1659 save_fr &= ~(1 << reg_num);
1660
8defab1a 1661 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1662 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1663
c906108c
SS
1664 /* Yow! */
1665 if (status != 0)
1666 return pc;
1667
1668 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1669 save. */
c906108c
SS
1670 if ((inst & 0xfc000000) == 0x34000000
1671 && inst_saves_fr (next_inst) >= 4
819844ad 1672 && inst_saves_fr (next_inst)
be8626e0 1673 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1674 {
1675 /* So we drop into the code below in a reasonable state. */
1676 reg_num = inst_saves_fr (next_inst);
1677 pc -= 4;
1678 }
1679
1680 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1681 This is a kludge as on the HP compiler sets this bit and it
1682 never does prologue scheduling. So once we see one, skip past
1683 all of them. */
819844ad 1684 if (reg_num >= 4
be8626e0 1685 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1686 {
819844ad
UW
1687 while (reg_num >= 4
1688 && reg_num
be8626e0 1689 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1690 {
1691 pc += 8;
8defab1a 1692 status = target_read_memory (pc, buf, 4);
e17a4113 1693 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1694 if (status != 0)
1695 return pc;
1696 if ((inst & 0xfc000000) != 0x34000000)
1697 break;
8defab1a 1698 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1699 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1700 if (status != 0)
1701 return pc;
1702 reg_num = inst_saves_fr (next_inst);
1703 }
1704 args_stored = 0;
1705 continue;
1706 }
1707
1708 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1709 instruction is in the delay slot of the first call/branch. */
a71f8c30 1710 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1711 break;
1712
1713 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1714 arguments were stored into the stack (boo hiss). This could
1715 cause this code to then skip a bunch of user insns (up to the
1716 first branch).
1717
1718 To combat this we try to identify when args_stored was bogusly
1719 set and clear it. We only do this when args_stored is nonzero,
1720 all other resources are accounted for, and nothing changed on
1721 this pass. */
c906108c 1722 if (args_stored
c5aa993b 1723 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1724 && old_save_gr == save_gr && old_save_fr == save_fr
1725 && old_save_rp == save_rp && old_save_sp == save_sp
1726 && old_stack_remaining == stack_remaining)
1727 break;
c5aa993b 1728
c906108c
SS
1729 /* Bump the PC. */
1730 pc += 4;
a71f8c30
RC
1731
1732 /* !stop_before_branch, so also look at the insn in the delay slot
1733 of the branch. */
1734 if (final_iteration)
1735 break;
1736 if (is_branch (inst))
1737 final_iteration = 1;
c906108c
SS
1738 }
1739
1740 /* We've got a tenative location for the end of the prologue. However
1741 because of limitations in the unwind descriptor mechanism we may
1742 have went too far into user code looking for the save of a register
1743 that does not exist. So, if there registers we expected to be saved
1744 but never were, mask them out and restart.
1745
1746 This should only happen in optimized code, and should be very rare. */
c5aa993b 1747 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1748 {
1749 pc = orig_pc;
1750 restart_gr = save_gr;
1751 restart_fr = save_fr;
1752 goto restart;
1753 }
1754
1755 return pc;
1756}
1757
1758
7be570e7
JM
1759/* Return the address of the PC after the last prologue instruction if
1760 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1761
1762static CORE_ADDR
fba45db2 1763after_prologue (CORE_ADDR pc)
c906108c
SS
1764{
1765 struct symtab_and_line sal;
1766 CORE_ADDR func_addr, func_end;
c906108c 1767
7be570e7
JM
1768 /* If we can not find the symbol in the partial symbol table, then
1769 there is no hope we can determine the function's start address
1770 with this code. */
c906108c 1771 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1772 return 0;
c906108c 1773
7be570e7 1774 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1775 sal = find_pc_line (func_addr, 0);
1776
7be570e7
JM
1777 /* There are only two cases to consider. First, the end of the source line
1778 is within the function bounds. In that case we return the end of the
1779 source line. Second is the end of the source line extends beyond the
1780 bounds of the current function. We need to use the slow code to
1777feb0 1781 examine instructions in that case.
c906108c 1782
7be570e7
JM
1783 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1784 the wrong thing to do. In fact, it should be entirely possible for this
1785 function to always return zero since the slow instruction scanning code
1786 is supposed to *always* work. If it does not, then it is a bug. */
1787 if (sal.end < func_end)
1788 return sal.end;
c5aa993b 1789 else
7be570e7 1790 return 0;
c906108c
SS
1791}
1792
1793/* To skip prologues, I use this predicate. Returns either PC itself
1794 if the code at PC does not look like a function prologue; otherwise
1777feb0 1795 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1796
1797 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1798 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1799 we might not want to skip all the insns because a prologue insn may
1800 appear in the delay slot of the first branch, and we don't want to
1801 skip over the branch in that case. */
c906108c 1802
8d153463 1803static CORE_ADDR
6093d2eb 1804hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1805{
c5aa993b 1806 CORE_ADDR post_prologue_pc;
c906108c 1807
c5aa993b
JM
1808 /* See if we can determine the end of the prologue via the symbol table.
1809 If so, then return either PC, or the PC after the prologue, whichever
1810 is greater. */
c906108c 1811
c5aa993b 1812 post_prologue_pc = after_prologue (pc);
c906108c 1813
7be570e7
JM
1814 /* If after_prologue returned a useful address, then use it. Else
1815 fall back on the instruction skipping code.
1816
1817 Some folks have claimed this causes problems because the breakpoint
1818 may be the first instruction of the prologue. If that happens, then
1819 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1820 if (post_prologue_pc != 0)
1821 return max (pc, post_prologue_pc);
c5aa993b 1822 else
be8626e0 1823 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1824}
1825
29d375ac 1826/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1827
29d375ac 1828static struct unwind_table_entry *
227e86ad 1829hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1830{
227e86ad 1831 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1832
1833 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1834 result of get_frame_address_in_block implies a problem.
93d42b30 1835 The bits should have been removed earlier, before the return
c7ce8faa 1836 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1837 if it isn't, it should be fixed. Then this call can be
1838 removed. */
227e86ad 1839 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1840 return find_unwind_entry (pc);
1841}
1842
26d08f08
AC
1843struct hppa_frame_cache
1844{
1845 CORE_ADDR base;
1846 struct trad_frame_saved_reg *saved_regs;
1847};
1848
1849static struct hppa_frame_cache *
227e86ad 1850hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1851{
227e86ad 1852 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1853 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1854 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1855 struct hppa_frame_cache *cache;
1856 long saved_gr_mask;
1857 long saved_fr_mask;
26d08f08
AC
1858 long frame_size;
1859 struct unwind_table_entry *u;
9f7194c3 1860 CORE_ADDR prologue_end;
50b2f48a 1861 int fp_in_r1 = 0;
26d08f08
AC
1862 int i;
1863
369aa520
RC
1864 if (hppa_debug)
1865 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1866 frame_relative_level(this_frame));
369aa520 1867
26d08f08 1868 if ((*this_cache) != NULL)
369aa520
RC
1869 {
1870 if (hppa_debug)
5af949e3
UW
1871 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1872 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
369aa520
RC
1873 return (*this_cache);
1874 }
26d08f08
AC
1875 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1876 (*this_cache) = cache;
227e86ad 1877 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1878
1879 /* Yow! */
227e86ad 1880 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1881 if (!u)
369aa520
RC
1882 {
1883 if (hppa_debug)
1884 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1885 return (*this_cache);
1886 }
26d08f08
AC
1887
1888 /* Turn the Entry_GR field into a bitmask. */
1889 saved_gr_mask = 0;
1890 for (i = 3; i < u->Entry_GR + 3; i++)
1891 {
1892 /* Frame pointer gets saved into a special location. */
eded0a31 1893 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1894 continue;
1895
1896 saved_gr_mask |= (1 << i);
1897 }
1898
1899 /* Turn the Entry_FR field into a bitmask too. */
1900 saved_fr_mask = 0;
1901 for (i = 12; i < u->Entry_FR + 12; i++)
1902 saved_fr_mask |= (1 << i);
1903
1904 /* Loop until we find everything of interest or hit a branch.
1905
1906 For unoptimized GCC code and for any HP CC code this will never ever
1907 examine any user instructions.
1908
1909 For optimized GCC code we're faced with problems. GCC will schedule
1910 its prologue and make prologue instructions available for delay slot
1911 filling. The end result is user code gets mixed in with the prologue
1912 and a prologue instruction may be in the delay slot of the first branch
1913 or call.
1914
1915 Some unexpected things are expected with debugging optimized code, so
1916 we allow this routine to walk past user instructions in optimized
1917 GCC code. */
1918 {
1919 int final_iteration = 0;
46acf081 1920 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1921 int looking_for_sp = u->Save_SP;
1922 int looking_for_rp = u->Save_RP;
1923 int fp_loc = -1;
9f7194c3 1924
a71f8c30 1925 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1926 skip_prologue_using_sal, in case we stepped into a function without
1927 symbol information. hppa_skip_prologue also bounds the returned
1928 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1929 function.
a71f8c30
RC
1930
1931 We used to call hppa_skip_prologue to find the end of the prologue,
1932 but if some non-prologue instructions get scheduled into the prologue,
1933 and the program is compiled with debug information, the "easy" way
1934 in hppa_skip_prologue will return a prologue end that is too early
1935 for us to notice any potential frame adjustments. */
d5c27f81 1936
ef02daa9
DJ
1937 /* We used to use get_frame_func to locate the beginning of the
1938 function to pass to skip_prologue. However, when objects are
1939 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1940 function (or 0). We can do better than that by using unwind records.
46acf081 1941 This only works if the Region_description of the unwind record
1777feb0 1942 indicates that it includes the entry point of the function.
46acf081
RC
1943 HP compilers sometimes generate unwind records for regions that
1944 do not include the entry or exit point of a function. GNU tools
1945 do not do this. */
1946
1947 if ((u->Region_description & 0x2) == 0)
1948 start_pc = u->region_start;
1949 else
227e86ad 1950 start_pc = get_frame_func (this_frame);
d5c27f81 1951
be8626e0 1952 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1953 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1954
1955 if (prologue_end != 0 && end_pc > prologue_end)
1956 end_pc = prologue_end;
1957
26d08f08 1958 frame_size = 0;
9f7194c3 1959
46acf081 1960 for (pc = start_pc;
26d08f08
AC
1961 ((saved_gr_mask || saved_fr_mask
1962 || looking_for_sp || looking_for_rp
1963 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1964 && pc < end_pc);
26d08f08
AC
1965 pc += 4)
1966 {
1967 int reg;
e362b510 1968 gdb_byte buf4[4];
4a302917
RC
1969 long inst;
1970
227e86ad 1971 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1972 {
5af949e3
UW
1973 error (_("Cannot read instruction at %s."),
1974 paddress (gdbarch, pc));
4a302917
RC
1975 return (*this_cache);
1976 }
1977
e17a4113 1978 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1979
26d08f08
AC
1980 /* Note the interesting effects of this instruction. */
1981 frame_size += prologue_inst_adjust_sp (inst);
1982
1983 /* There are limited ways to store the return pointer into the
1984 stack. */
1985 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1986 {
1987 looking_for_rp = 0;
34f75cc1 1988 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1989 }
dfaf8edb
MK
1990 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1991 {
1992 looking_for_rp = 0;
1993 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1994 }
c4c79048
RC
1995 else if (inst == 0x0fc212c1
1996 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1997 {
1998 looking_for_rp = 0;
34f75cc1 1999 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
2000 }
2001
2002 /* Check to see if we saved SP into the stack. This also
2003 happens to indicate the location of the saved frame
2004 pointer. */
2005 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2006 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2007 {
2008 looking_for_sp = 0;
eded0a31 2009 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 2010 }
50b2f48a
RC
2011 else if (inst == 0x08030241) /* copy %r3, %r1 */
2012 {
2013 fp_in_r1 = 1;
2014 }
26d08f08
AC
2015
2016 /* Account for general and floating-point register saves. */
2017 reg = inst_saves_gr (inst);
2018 if (reg >= 3 && reg <= 18
eded0a31 2019 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2020 {
2021 saved_gr_mask &= ~(1 << reg);
abc485a1 2022 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2023 /* stwm with a positive displacement is a _post_
2024 _modify_. */
2025 cache->saved_regs[reg].addr = 0;
2026 else if ((inst & 0xfc00000c) == 0x70000008)
2027 /* A std has explicit post_modify forms. */
2028 cache->saved_regs[reg].addr = 0;
2029 else
2030 {
2031 CORE_ADDR offset;
2032
2033 if ((inst >> 26) == 0x1c)
1777feb0
MS
2034 offset = (inst & 0x1 ? -1 << 13 : 0)
2035 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2036 else if ((inst >> 26) == 0x03)
abc485a1 2037 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2038 else
abc485a1 2039 offset = hppa_extract_14 (inst);
26d08f08
AC
2040
2041 /* Handle code with and without frame pointers. */
2042 if (u->Save_SP)
2043 cache->saved_regs[reg].addr = offset;
2044 else
1777feb0
MS
2045 cache->saved_regs[reg].addr
2046 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
2047 }
2048 }
2049
2050 /* GCC handles callee saved FP regs a little differently.
2051
2052 It emits an instruction to put the value of the start of
2053 the FP store area into %r1. It then uses fstds,ma with a
2054 basereg of %r1 for the stores.
2055
2056 HP CC emits them at the current stack pointer modifying the
2057 stack pointer as it stores each register. */
2058
2059 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2060 if ((inst & 0xffffc000) == 0x34610000
2061 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2062 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2063
2064 reg = inst_saves_fr (inst);
2065 if (reg >= 12 && reg <= 21)
2066 {
2067 /* Note +4 braindamage below is necessary because the FP
2068 status registers are internally 8 registers rather than
2069 the expected 4 registers. */
2070 saved_fr_mask &= ~(1 << reg);
2071 if (fp_loc == -1)
2072 {
2073 /* 1st HP CC FP register store. After this
2074 instruction we've set enough state that the GCC and
2075 HPCC code are both handled in the same manner. */
34f75cc1 2076 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2077 fp_loc = 8;
2078 }
2079 else
2080 {
eded0a31 2081 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2082 fp_loc += 8;
2083 }
2084 }
2085
1777feb0 2086 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2087 if (final_iteration)
2088 break;
2089 /* We want to look precisely one instruction beyond the branch
2090 if we have not found everything yet. */
2091 if (is_branch (inst))
2092 final_iteration = 1;
2093 }
2094 }
2095
2096 {
2097 /* The frame base always represents the value of %sp at entry to
2098 the current function (and is thus equivalent to the "saved"
2099 stack pointer. */
227e86ad
JB
2100 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2101 HPPA_SP_REGNUM);
ed70ba00 2102 CORE_ADDR fp;
9f7194c3
RC
2103
2104 if (hppa_debug)
5af949e3
UW
2105 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2106 "prologue_end=%s) ",
2107 paddress (gdbarch, this_sp),
2108 paddress (gdbarch, get_frame_pc (this_frame)),
2109 paddress (gdbarch, prologue_end));
9f7194c3 2110
ed70ba00
RC
2111 /* Check to see if a frame pointer is available, and use it for
2112 frame unwinding if it is.
2113
2114 There are some situations where we need to rely on the frame
2115 pointer to do stack unwinding. For example, if a function calls
2116 alloca (), the stack pointer can get adjusted inside the body of
2117 the function. In this case, the ABI requires that the compiler
2118 maintain a frame pointer for the function.
2119
2120 The unwind record has a flag (alloca_frame) that indicates that
2121 a function has a variable frame; unfortunately, gcc/binutils
2122 does not set this flag. Instead, whenever a frame pointer is used
2123 and saved on the stack, the Save_SP flag is set. We use this to
2124 decide whether to use the frame pointer for unwinding.
2125
ed70ba00
RC
2126 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2127 instead of Save_SP. */
2128
227e86ad 2129 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2130
6fcecea0 2131 if (u->alloca_frame)
46acf081 2132 fp -= u->Total_frame_size << 3;
ed70ba00 2133
227e86ad 2134 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2135 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2136 {
2137 cache->base = fp;
2138
2139 if (hppa_debug)
5af949e3
UW
2140 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2141 paddress (gdbarch, cache->base));
ed70ba00 2142 }
1658da49
RC
2143 else if (u->Save_SP
2144 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2145 {
9f7194c3
RC
2146 /* Both we're expecting the SP to be saved and the SP has been
2147 saved. The entry SP value is saved at this frame's SP
2148 address. */
e17a4113 2149 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2150
2151 if (hppa_debug)
5af949e3
UW
2152 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2153 paddress (gdbarch, cache->base));
9f7194c3 2154 }
26d08f08 2155 else
9f7194c3 2156 {
1658da49
RC
2157 /* The prologue has been slowly allocating stack space. Adjust
2158 the SP back. */
2159 cache->base = this_sp - frame_size;
9f7194c3 2160 if (hppa_debug)
5af949e3
UW
2161 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2162 paddress (gdbarch, cache->base));
9f7194c3
RC
2163
2164 }
eded0a31 2165 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2166 }
2167
412275d5
AC
2168 /* The PC is found in the "return register", "Millicode" uses "r31"
2169 as the return register while normal code uses "rp". */
26d08f08 2170 if (u->Millicode)
9f7194c3 2171 {
5859efe5 2172 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2173 {
2174 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2175 if (hppa_debug)
2176 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2177 }
9f7194c3
RC
2178 else
2179 {
227e86ad 2180 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2181 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2182 if (hppa_debug)
2183 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2184 }
2185 }
26d08f08 2186 else
9f7194c3 2187 {
34f75cc1 2188 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2189 {
2190 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2191 cache->saved_regs[HPPA_RP_REGNUM];
2192 if (hppa_debug)
2193 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2194 }
9f7194c3
RC
2195 else
2196 {
227e86ad
JB
2197 ULONGEST rp = get_frame_register_unsigned (this_frame,
2198 HPPA_RP_REGNUM);
34f75cc1 2199 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2200 if (hppa_debug)
2201 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2202 }
2203 }
26d08f08 2204
50b2f48a
RC
2205 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2206 frame. However, there is a one-insn window where we haven't saved it
2207 yet, but we've already clobbered it. Detect this case and fix it up.
2208
2209 The prologue sequence for frame-pointer functions is:
2210 0: stw %rp, -20(%sp)
2211 4: copy %r3, %r1
2212 8: copy %sp, %r3
2213 c: stw,ma %r1, XX(%sp)
2214
2215 So if we are at offset c, the r3 value that we want is not yet saved
2216 on the stack, but it's been overwritten. The prologue analyzer will
2217 set fp_in_r1 when it sees the copy insn so we know to get the value
2218 from r1 instead. */
2219 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2220 && fp_in_r1)
2221 {
227e86ad 2222 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2223 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2224 }
1658da49 2225
26d08f08
AC
2226 {
2227 /* Convert all the offsets into addresses. */
2228 int reg;
65c5db89 2229 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2230 {
2231 if (trad_frame_addr_p (cache->saved_regs, reg))
2232 cache->saved_regs[reg].addr += cache->base;
2233 }
2234 }
2235
f77a2124 2236 {
f77a2124
RC
2237 struct gdbarch_tdep *tdep;
2238
f77a2124
RC
2239 tdep = gdbarch_tdep (gdbarch);
2240
2241 if (tdep->unwind_adjust_stub)
227e86ad 2242 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2243 }
2244
369aa520 2245 if (hppa_debug)
5af949e3
UW
2246 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2247 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2248 return (*this_cache);
2249}
2250
2251static void
227e86ad
JB
2252hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2253 struct frame_id *this_id)
26d08f08 2254{
d5c27f81 2255 struct hppa_frame_cache *info;
227e86ad 2256 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2257 struct unwind_table_entry *u;
2258
227e86ad
JB
2259 info = hppa_frame_cache (this_frame, this_cache);
2260 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2261
2262 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2263}
2264
227e86ad
JB
2265static struct value *
2266hppa_frame_prev_register (struct frame_info *this_frame,
2267 void **this_cache, int regnum)
26d08f08 2268{
227e86ad
JB
2269 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2270
1777feb0
MS
2271 return hppa_frame_prev_register_helper (this_frame,
2272 info->saved_regs, regnum);
227e86ad
JB
2273}
2274
2275static int
2276hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2277 struct frame_info *this_frame, void **this_cache)
2278{
2279 if (hppa_find_unwind_entry_in_block (this_frame))
2280 return 1;
2281
2282 return 0;
0da28f8a
RC
2283}
2284
2285static const struct frame_unwind hppa_frame_unwind =
2286{
2287 NORMAL_FRAME,
8fbca658 2288 default_frame_unwind_stop_reason,
0da28f8a 2289 hppa_frame_this_id,
227e86ad
JB
2290 hppa_frame_prev_register,
2291 NULL,
2292 hppa_frame_unwind_sniffer
0da28f8a
RC
2293};
2294
0da28f8a
RC
2295/* This is a generic fallback frame unwinder that kicks in if we fail all
2296 the other ones. Normally we would expect the stub and regular unwinder
2297 to work, but in some cases we might hit a function that just doesn't
2298 have any unwind information available. In this case we try to do
2299 unwinding solely based on code reading. This is obviously going to be
2300 slow, so only use this as a last resort. Currently this will only
2301 identify the stack and pc for the frame. */
2302
2303static struct hppa_frame_cache *
227e86ad 2304hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2305{
e17a4113
UW
2306 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2307 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2308 struct hppa_frame_cache *cache;
4ba6a975
MK
2309 unsigned int frame_size = 0;
2310 int found_rp = 0;
2311 CORE_ADDR start_pc;
0da28f8a 2312
d5c27f81 2313 if (hppa_debug)
4ba6a975
MK
2314 fprintf_unfiltered (gdb_stdlog,
2315 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2316 frame_relative_level (this_frame));
d5c27f81 2317
0da28f8a
RC
2318 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2319 (*this_cache) = cache;
227e86ad 2320 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2321
227e86ad 2322 start_pc = get_frame_func (this_frame);
4ba6a975 2323 if (start_pc)
0da28f8a 2324 {
227e86ad 2325 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2326 CORE_ADDR pc;
0da28f8a 2327
4ba6a975
MK
2328 for (pc = start_pc; pc < cur_pc; pc += 4)
2329 {
2330 unsigned int insn;
0da28f8a 2331
e17a4113 2332 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2333 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2334
4ba6a975
MK
2335 /* There are limited ways to store the return pointer into the
2336 stack. */
2337 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2338 {
2339 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2340 found_rp = 1;
2341 }
c4c79048
RC
2342 else if (insn == 0x0fc212c1
2343 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2344 {
2345 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2346 found_rp = 1;
2347 }
2348 }
412275d5 2349 }
0da28f8a 2350
d5c27f81 2351 if (hppa_debug)
4ba6a975
MK
2352 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2353 frame_size, found_rp);
d5c27f81 2354
227e86ad 2355 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2356 cache->base -= frame_size;
6d1be3f1 2357 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2358
2359 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2360 {
2361 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2362 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2363 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2364 }
412275d5
AC
2365 else
2366 {
4ba6a975 2367 ULONGEST rp;
227e86ad 2368 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2369 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2370 }
0da28f8a
RC
2371
2372 return cache;
26d08f08
AC
2373}
2374
0da28f8a 2375static void
227e86ad 2376hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2377 struct frame_id *this_id)
2378{
2379 struct hppa_frame_cache *info =
227e86ad
JB
2380 hppa_fallback_frame_cache (this_frame, this_cache);
2381
2382 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2383}
2384
227e86ad
JB
2385static struct value *
2386hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2387 void **this_cache, int regnum)
0da28f8a 2388{
1777feb0
MS
2389 struct hppa_frame_cache *info
2390 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2391
1777feb0
MS
2392 return hppa_frame_prev_register_helper (this_frame,
2393 info->saved_regs, regnum);
0da28f8a
RC
2394}
2395
2396static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2397{
2398 NORMAL_FRAME,
8fbca658 2399 default_frame_unwind_stop_reason,
0da28f8a 2400 hppa_fallback_frame_this_id,
227e86ad
JB
2401 hppa_fallback_frame_prev_register,
2402 NULL,
2403 default_frame_sniffer
26d08f08
AC
2404};
2405
7f07c5b6
RC
2406/* Stub frames, used for all kinds of call stubs. */
2407struct hppa_stub_unwind_cache
2408{
2409 CORE_ADDR base;
2410 struct trad_frame_saved_reg *saved_regs;
2411};
2412
2413static struct hppa_stub_unwind_cache *
227e86ad 2414hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2415 void **this_cache)
2416{
227e86ad 2417 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2418 struct hppa_stub_unwind_cache *info;
22b0923d 2419 struct unwind_table_entry *u;
7f07c5b6
RC
2420
2421 if (*this_cache)
2422 return *this_cache;
2423
2424 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2425 *this_cache = info;
227e86ad 2426 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2427
227e86ad 2428 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2429
090ccbb7 2430 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2431 {
2432 /* HPUX uses export stubs in function calls; the export stub clobbers
2433 the return value of the caller, and, later restores it from the
2434 stack. */
227e86ad 2435 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2436
2437 if (u && u->stub_unwind.stub_type == EXPORT)
2438 {
2439 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2440
2441 return info;
2442 }
2443 }
2444
2445 /* By default we assume that stubs do not change the rp. */
2446 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2447
7f07c5b6
RC
2448 return info;
2449}
2450
2451static void
227e86ad 2452hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2453 void **this_prologue_cache,
2454 struct frame_id *this_id)
2455{
2456 struct hppa_stub_unwind_cache *info
227e86ad 2457 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2458
2459 if (info)
227e86ad 2460 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2461}
2462
227e86ad
JB
2463static struct value *
2464hppa_stub_frame_prev_register (struct frame_info *this_frame,
2465 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2466{
2467 struct hppa_stub_unwind_cache *info
227e86ad 2468 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2469
227e86ad 2470 if (info == NULL)
8a3fe4f8 2471 error (_("Requesting registers from null frame."));
7f07c5b6 2472
1777feb0
MS
2473 return hppa_frame_prev_register_helper (this_frame,
2474 info->saved_regs, regnum);
227e86ad 2475}
7f07c5b6 2476
227e86ad
JB
2477static int
2478hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2479 struct frame_info *this_frame,
2480 void **this_cache)
7f07c5b6 2481{
227e86ad
JB
2482 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2483 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2484 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2485
6d1be3f1 2486 if (pc == 0
84674fe1 2487 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2488 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2489 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2490 return 1;
2491 return 0;
7f07c5b6
RC
2492}
2493
227e86ad
JB
2494static const struct frame_unwind hppa_stub_frame_unwind = {
2495 NORMAL_FRAME,
8fbca658 2496 default_frame_unwind_stop_reason,
227e86ad
JB
2497 hppa_stub_frame_this_id,
2498 hppa_stub_frame_prev_register,
2499 NULL,
2500 hppa_stub_unwind_sniffer
2501};
2502
26d08f08 2503static struct frame_id
227e86ad 2504hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2505{
227e86ad
JB
2506 return frame_id_build (get_frame_register_unsigned (this_frame,
2507 HPPA_SP_REGNUM),
2508 get_frame_pc (this_frame));
26d08f08
AC
2509}
2510
cc72850f 2511CORE_ADDR
26d08f08
AC
2512hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2513{
fe46cd3a
RC
2514 ULONGEST ipsw;
2515 CORE_ADDR pc;
2516
cc72850f
MK
2517 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2518 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2519
2520 /* If the current instruction is nullified, then we are effectively
2521 still executing the previous instruction. Pretend we are still
cc72850f
MK
2522 there. This is needed when single stepping; if the nullified
2523 instruction is on a different line, we don't want GDB to think
2524 we've stepped onto that line. */
fe46cd3a
RC
2525 if (ipsw & 0x00200000)
2526 pc -= 4;
2527
cc72850f 2528 return pc & ~0x3;
26d08f08
AC
2529}
2530
ff644745
JB
2531/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2532 Return NULL if no such symbol was found. */
2533
3b7344d5 2534struct bound_minimal_symbol
ff644745
JB
2535hppa_lookup_stub_minimal_symbol (const char *name,
2536 enum unwind_stub_types stub_type)
2537{
2538 struct objfile *objfile;
2539 struct minimal_symbol *msym;
3b7344d5 2540 struct bound_minimal_symbol result = { NULL, NULL };
ff644745
JB
2541
2542 ALL_MSYMBOLS (objfile, msym)
2543 {
efd66ac6 2544 if (strcmp (MSYMBOL_LINKAGE_NAME (msym), name) == 0)
ff644745
JB
2545 {
2546 struct unwind_table_entry *u;
2547
efd66ac6 2548 u = find_unwind_entry (MSYMBOL_VALUE (msym));
ff644745 2549 if (u != NULL && u->stub_unwind.stub_type == stub_type)
3b7344d5
TT
2550 {
2551 result.objfile = objfile;
2552 result.minsym = msym;
2553 return result;
2554 }
ff644745
JB
2555 }
2556 }
2557
3b7344d5 2558 return result;
ff644745
JB
2559}
2560
c906108c 2561static void
fba45db2 2562unwind_command (char *exp, int from_tty)
c906108c
SS
2563{
2564 CORE_ADDR address;
2565 struct unwind_table_entry *u;
2566
2567 /* If we have an expression, evaluate it and use it as the address. */
2568
2569 if (exp != 0 && *exp != 0)
2570 address = parse_and_eval_address (exp);
2571 else
2572 return;
2573
2574 u = find_unwind_entry (address);
2575
2576 if (!u)
2577 {
2578 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2579 return;
2580 }
2581
3329c4b5 2582 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2583
5af949e3 2584 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2585 gdb_flush (gdb_stdout);
c906108c 2586
5af949e3 2587 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2588 gdb_flush (gdb_stdout);
c906108c 2589
c906108c 2590#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2591
2592 printf_unfiltered ("\n\tflags =");
2593 pif (Cannot_unwind);
2594 pif (Millicode);
2595 pif (Millicode_save_sr0);
2596 pif (Entry_SR);
2597 pif (Args_stored);
2598 pif (Variable_Frame);
2599 pif (Separate_Package_Body);
2600 pif (Frame_Extension_Millicode);
2601 pif (Stack_Overflow_Check);
2602 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2603 pif (sr4export);
2604 pif (cxx_info);
2605 pif (cxx_try_catch);
2606 pif (sched_entry_seq);
c906108c
SS
2607 pif (Save_SP);
2608 pif (Save_RP);
2609 pif (Save_MRP_in_frame);
6fcecea0 2610 pif (save_r19);
c906108c
SS
2611 pif (Cleanup_defined);
2612 pif (MPE_XL_interrupt_marker);
2613 pif (HP_UX_interrupt_marker);
2614 pif (Large_frame);
6fcecea0 2615 pif (alloca_frame);
c906108c
SS
2616
2617 putchar_unfiltered ('\n');
2618
c906108c 2619#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2620
2621 pin (Region_description);
2622 pin (Entry_FR);
2623 pin (Entry_GR);
2624 pin (Total_frame_size);
57dac9e1
RC
2625
2626 if (u->stub_unwind.stub_type)
2627 {
2628 printf_unfiltered ("\tstub type = ");
2629 switch (u->stub_unwind.stub_type)
2630 {
2631 case LONG_BRANCH:
2632 printf_unfiltered ("long branch\n");
2633 break;
2634 case PARAMETER_RELOCATION:
2635 printf_unfiltered ("parameter relocation\n");
2636 break;
2637 case EXPORT:
2638 printf_unfiltered ("export\n");
2639 break;
2640 case IMPORT:
2641 printf_unfiltered ("import\n");
2642 break;
2643 case IMPORT_SHLIB:
2644 printf_unfiltered ("import shlib\n");
2645 break;
2646 default:
2647 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2648 }
2649 }
c906108c 2650}
c906108c 2651
38ca4e0c
MK
2652/* Return the GDB type object for the "standard" data type of data in
2653 register REGNUM. */
d709c020 2654
eded0a31 2655static struct type *
38ca4e0c 2656hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2657{
38ca4e0c 2658 if (regnum < HPPA_FP4_REGNUM)
df4df182 2659 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2660 else
27067745 2661 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2662}
2663
eded0a31 2664static struct type *
38ca4e0c 2665hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2666{
38ca4e0c 2667 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2668 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2669 else
27067745 2670 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2671}
2672
38ca4e0c
MK
2673/* Return non-zero if REGNUM is not a register available to the user
2674 through ptrace/ttrace. */
d709c020 2675
8d153463 2676static int
64a3914f 2677hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2678{
2679 return (regnum == 0
34f75cc1
RC
2680 || regnum == HPPA_PCSQ_HEAD_REGNUM
2681 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2682 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2683}
d709c020 2684
d037d088 2685static int
64a3914f 2686hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2687{
2688 /* cr26 and cr27 are readable (but not writable) from userspace. */
2689 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2690 return 0;
2691 else
64a3914f 2692 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2693}
2694
38ca4e0c 2695static int
64a3914f 2696hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2697{
2698 return (regnum == 0
2699 || regnum == HPPA_PCSQ_HEAD_REGNUM
2700 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2701 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2702}
2703
d037d088 2704static int
64a3914f 2705hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2706{
2707 /* cr26 and cr27 are readable (but not writable) from userspace. */
2708 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2709 return 0;
2710 else
64a3914f 2711 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2712}
2713
8d153463 2714static CORE_ADDR
85ddcc70 2715hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2716{
2717 /* The low two bits of the PC on the PA contain the privilege level.
2718 Some genius implementing a (non-GCC) compiler apparently decided
2719 this means that "addresses" in a text section therefore include a
2720 privilege level, and thus symbol tables should contain these bits.
2721 This seems like a bonehead thing to do--anyway, it seems to work
2722 for our purposes to just ignore those bits. */
2723
2724 return (addr &= ~0x3);
2725}
2726
e127f0db
MK
2727/* Get the ARGIth function argument for the current function. */
2728
4a302917 2729static CORE_ADDR
143985b7
AF
2730hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2731 struct type *type)
2732{
e127f0db 2733 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2734}
2735
05d1431c 2736static enum register_status
0f8d9d59 2737hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2738 int regnum, gdb_byte *buf)
0f8d9d59 2739{
05d1431c
PA
2740 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2741 ULONGEST tmp;
2742 enum register_status status;
0f8d9d59 2743
05d1431c
PA
2744 status = regcache_raw_read_unsigned (regcache, regnum, &tmp);
2745 if (status == REG_VALID)
2746 {
2747 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2748 tmp &= ~0x3;
2749 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2750 }
2751 return status;
0f8d9d59
RC
2752}
2753
d49771ef 2754static CORE_ADDR
e38c262f 2755hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2756{
2757 return 0;
2758}
2759
227e86ad
JB
2760struct value *
2761hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2762 struct trad_frame_saved_reg saved_regs[],
227e86ad 2763 int regnum)
0da28f8a 2764{
227e86ad 2765 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2766 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2767
8693c419
MK
2768 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2769 {
227e86ad
JB
2770 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2771 CORE_ADDR pc;
2772 struct value *pcoq_val =
2773 trad_frame_get_prev_register (this_frame, saved_regs,
2774 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2775
e17a4113
UW
2776 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2777 size, byte_order);
227e86ad 2778 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2779 }
0da28f8a 2780
cc72850f
MK
2781 /* Make sure the "flags" register is zero in all unwound frames.
2782 The "flags" registers is a HP-UX specific wart, and only the code
2783 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2784 with it here. This shouldn't affect other systems since those
2785 should provide zero for the "flags" register anyway. */
2786 if (regnum == HPPA_FLAGS_REGNUM)
227e86ad 2787 return frame_unwind_got_constant (this_frame, regnum, 0);
cc72850f 2788
227e86ad 2789 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2790}
8693c419 2791\f
0da28f8a 2792
34f55018
MK
2793/* An instruction to match. */
2794struct insn_pattern
2795{
2796 unsigned int data; /* See if it matches this.... */
2797 unsigned int mask; /* ... with this mask. */
2798};
2799
2800/* See bfd/elf32-hppa.c */
2801static struct insn_pattern hppa_long_branch_stub[] = {
2802 /* ldil LR'xxx,%r1 */
2803 { 0x20200000, 0xffe00000 },
2804 /* be,n RR'xxx(%sr4,%r1) */
2805 { 0xe0202002, 0xffe02002 },
2806 { 0, 0 }
2807};
2808
2809static struct insn_pattern hppa_long_branch_pic_stub[] = {
2810 /* b,l .+8, %r1 */
2811 { 0xe8200000, 0xffe00000 },
2812 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2813 { 0x28200000, 0xffe00000 },
2814 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2815 { 0xe0202002, 0xffe02002 },
2816 { 0, 0 }
2817};
2818
2819static struct insn_pattern hppa_import_stub[] = {
2820 /* addil LR'xxx, %dp */
2821 { 0x2b600000, 0xffe00000 },
2822 /* ldw RR'xxx(%r1), %r21 */
2823 { 0x48350000, 0xffffb000 },
2824 /* bv %r0(%r21) */
2825 { 0xeaa0c000, 0xffffffff },
2826 /* ldw RR'xxx+4(%r1), %r19 */
2827 { 0x48330000, 0xffffb000 },
2828 { 0, 0 }
2829};
2830
2831static struct insn_pattern hppa_import_pic_stub[] = {
2832 /* addil LR'xxx,%r19 */
2833 { 0x2a600000, 0xffe00000 },
2834 /* ldw RR'xxx(%r1),%r21 */
2835 { 0x48350000, 0xffffb000 },
2836 /* bv %r0(%r21) */
2837 { 0xeaa0c000, 0xffffffff },
2838 /* ldw RR'xxx+4(%r1),%r19 */
2839 { 0x48330000, 0xffffb000 },
2840 { 0, 0 },
2841};
2842
2843static struct insn_pattern hppa_plt_stub[] = {
2844 /* b,l 1b, %r20 - 1b is 3 insns before here */
2845 { 0xea9f1fdd, 0xffffffff },
2846 /* depi 0,31,2,%r20 */
2847 { 0xd6801c1e, 0xffffffff },
2848 { 0, 0 }
34f55018
MK
2849};
2850
2851/* Maximum number of instructions on the patterns above. */
2852#define HPPA_MAX_INSN_PATTERN_LEN 4
2853
2854/* Return non-zero if the instructions at PC match the series
2855 described in PATTERN, or zero otherwise. PATTERN is an array of
2856 'struct insn_pattern' objects, terminated by an entry whose mask is
2857 zero.
2858
2859 When the match is successful, fill INSN[i] with what PATTERN[i]
2860 matched. */
2861
2862static int
e17a4113
UW
2863hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2864 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2865{
e17a4113 2866 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2867 CORE_ADDR npc = pc;
2868 int i;
2869
2870 for (i = 0; pattern[i].mask; i++)
2871 {
2872 gdb_byte buf[HPPA_INSN_SIZE];
2873
8defab1a 2874 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2875 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2876 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2877 npc += 4;
2878 else
2879 return 0;
2880 }
2881
2882 return 1;
2883}
2884
2885/* This relaxed version of the insstruction matcher allows us to match
2886 from somewhere inside the pattern, by looking backwards in the
2887 instruction scheme. */
2888
2889static int
e17a4113
UW
2890hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2891 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2892{
2893 int offset, len = 0;
2894
2895 while (pattern[len].mask)
2896 len++;
2897
2898 for (offset = 0; offset < len; offset++)
e17a4113
UW
2899 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2900 pattern, insn))
34f55018
MK
2901 return 1;
2902
2903 return 0;
2904}
2905
2906static int
2907hppa_in_dyncall (CORE_ADDR pc)
2908{
2909 struct unwind_table_entry *u;
2910
2911 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2912 if (!u)
2913 return 0;
2914
2915 return (pc >= u->region_start && pc <= u->region_end);
2916}
2917
2918int
3e5d3a5a 2919hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2920{
2921 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2922 struct unwind_table_entry *u;
2923
3e5d3a5a 2924 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2925 return 1;
2926
2927 /* The GNU toolchain produces linker stubs without unwind
2928 information. Since the pattern matching for linker stubs can be
2929 quite slow, so bail out if we do have an unwind entry. */
2930
2931 u = find_unwind_entry (pc);
806e23c0 2932 if (u != NULL)
34f55018
MK
2933 return 0;
2934
e17a4113
UW
2935 return
2936 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2937 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2938 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2939 || hppa_match_insns_relaxed (gdbarch, pc,
2940 hppa_long_branch_pic_stub, insn));
34f55018
MK
2941}
2942
2943/* This code skips several kind of "trampolines" used on PA-RISC
2944 systems: $$dyncall, import stubs and PLT stubs. */
2945
2946CORE_ADDR
52f729a7 2947hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2948{
0dfff4cb
UW
2949 struct gdbarch *gdbarch = get_frame_arch (frame);
2950 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2951
34f55018
MK
2952 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2953 int dp_rel;
2954
2955 /* $$dyncall handles both PLABELs and direct addresses. */
2956 if (hppa_in_dyncall (pc))
2957 {
52f729a7 2958 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2959
2960 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2961 if (pc & 0x2)
0dfff4cb 2962 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2963
2964 return pc;
2965 }
2966
e17a4113
UW
2967 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2968 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2969 {
2970 /* Extract the target address from the addil/ldw sequence. */
2971 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2972
2973 if (dp_rel)
52f729a7 2974 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2975 else
52f729a7 2976 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2977
2978 /* fallthrough */
2979 }
2980
3e5d3a5a 2981 if (in_plt_section (pc))
34f55018 2982 {
0dfff4cb 2983 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2984
2985 /* If the PLT slot has not yet been resolved, the target will be
2986 the PLT stub. */
3e5d3a5a 2987 if (in_plt_section (pc))
34f55018
MK
2988 {
2989 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 2990 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2991 {
5af949e3
UW
2992 warning (_("Cannot resolve PLT stub at %s."),
2993 paddress (gdbarch, pc));
34f55018
MK
2994 return 0;
2995 }
2996
2997 /* This should point to the fixup routine. */
0dfff4cb 2998 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2999 }
3000 }
3001
3002 return pc;
3003}
3004\f
3005
8e8b2dba
MC
3006/* Here is a table of C type sizes on hppa with various compiles
3007 and options. I measured this on PA 9000/800 with HP-UX 11.11
3008 and these compilers:
3009
3010 /usr/ccs/bin/cc HP92453-01 A.11.01.21
3011 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3012 /opt/aCC/bin/aCC B3910B A.03.45
3013 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3014
3015 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3016 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3017 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3018 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3019 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3020 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3021 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3022 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3023
3024 Each line is:
3025
3026 compiler and options
3027 char, short, int, long, long long
3028 float, double, long double
3029 char *, void (*)()
3030
3031 So all these compilers use either ILP32 or LP64 model.
3032 TODO: gcc has more options so it needs more investigation.
3033
a2379359
MC
3034 For floating point types, see:
3035
3036 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3037 HP-UX floating-point guide, hpux 11.00
3038
8e8b2dba
MC
3039 -- chastain 2003-12-18 */
3040
e6e68f1f
JB
3041static struct gdbarch *
3042hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3043{
3ff7cf9e 3044 struct gdbarch_tdep *tdep;
e6e68f1f 3045 struct gdbarch *gdbarch;
59623e27
JB
3046
3047 /* Try to determine the ABI of the object we are loading. */
4be87837 3048 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 3049 {
4be87837
DJ
3050 /* If it's a SOM file, assume it's HP/UX SOM. */
3051 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
3052 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3053 }
e6e68f1f
JB
3054
3055 /* find a candidate among the list of pre-declared architectures. */
3056 arches = gdbarch_list_lookup_by_info (arches, &info);
3057 if (arches != NULL)
3058 return (arches->gdbarch);
3059
3060 /* If none found, then allocate and initialize one. */
41bf6aca 3061 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3062 gdbarch = gdbarch_alloc (&info, tdep);
3063
3064 /* Determine from the bfd_arch_info structure if we are dealing with
3065 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3066 then default to a 32bit machine. */
3067 if (info.bfd_arch_info != NULL)
3068 tdep->bytes_per_address =
3069 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3070 else
3071 tdep->bytes_per_address = 4;
3072
d49771ef
RC
3073 tdep->find_global_pointer = hppa_find_global_pointer;
3074
3ff7cf9e
JB
3075 /* Some parts of the gdbarch vector depend on whether we are running
3076 on a 32 bits or 64 bits target. */
3077 switch (tdep->bytes_per_address)
3078 {
3079 case 4:
3080 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3081 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3082 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3083 set_gdbarch_cannot_store_register (gdbarch,
3084 hppa32_cannot_store_register);
3085 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3086 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3087 break;
3088 case 8:
3089 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3090 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3091 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3092 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3093 set_gdbarch_cannot_store_register (gdbarch,
3094 hppa64_cannot_store_register);
3095 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3096 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3097 break;
3098 default:
e2e0b3e5 3099 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3100 tdep->bytes_per_address);
3101 }
3102
3ff7cf9e 3103 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3104 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3105
8e8b2dba
MC
3106 /* The following gdbarch vector elements are the same in both ILP32
3107 and LP64, but might show differences some day. */
3108 set_gdbarch_long_long_bit (gdbarch, 64);
3109 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3110 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3111
3ff7cf9e
JB
3112 /* The following gdbarch vector elements do not depend on the address
3113 size, or in any other gdbarch element previously set. */
60383d10 3114 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3115 set_gdbarch_in_function_epilogue_p (gdbarch,
3116 hppa_in_function_epilogue_p);
a2a84a72 3117 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3118 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3119 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3120 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3121 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3122 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3123 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3124
143985b7
AF
3125 /* Helper for function argument information. */
3126 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3127
36482093
AC
3128 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3129
3a3bc038
AC
3130 /* When a hardware watchpoint triggers, we'll move the inferior past
3131 it by removing all eventpoints; stepping past the instruction
3132 that caused the trigger; reinserting eventpoints; and checking
3133 whether any watched location changed. */
3134 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3135
5979bc46 3136 /* Inferior function call methods. */
fca7aa43 3137 switch (tdep->bytes_per_address)
5979bc46 3138 {
fca7aa43
AC
3139 case 4:
3140 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3141 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3142 set_gdbarch_convert_from_func_ptr_addr
3143 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3144 break;
3145 case 8:
782eae8b
AC
3146 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3147 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3148 break;
782eae8b 3149 default:
e2e0b3e5 3150 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3151 }
3152
3153 /* Struct return methods. */
fca7aa43 3154 switch (tdep->bytes_per_address)
fad850b2 3155 {
fca7aa43
AC
3156 case 4:
3157 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3158 break;
3159 case 8:
782eae8b 3160 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3161 break;
fca7aa43 3162 default:
e2e0b3e5 3163 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3164 }
7f07c5b6 3165
85f4f2d8 3166 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3167 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3168
5979bc46 3169 /* Frame unwind methods. */
227e86ad 3170 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3171 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3172
50306a9d
RC
3173 /* Hook in ABI-specific overrides, if they have been registered. */
3174 gdbarch_init_osabi (info, gdbarch);
3175
7f07c5b6 3176 /* Hook in the default unwinders. */
227e86ad
JB
3177 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3178 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3179 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3180
e6e68f1f
JB
3181 return gdbarch;
3182}
3183
3184static void
464963c9 3185hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3186{
464963c9 3187 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3188
3189 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3190 tdep->bytes_per_address);
3191 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3192}
3193
72753510
PA
3194/* Provide a prototype to silence -Wmissing-prototypes. */
3195extern initialize_file_ftype _initialize_hppa_tdep;
3196
4facf7e8
JB
3197void
3198_initialize_hppa_tdep (void)
3199{
3200 struct cmd_list_element *c;
4facf7e8 3201
e6e68f1f 3202 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3203
7c46b9fb
RC
3204 hppa_objfile_priv_data = register_objfile_data ();
3205
4facf7e8 3206 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3207 _("Print unwind table entry at given address."),
4facf7e8
JB
3208 &maintenanceprintlist);
3209
1777feb0 3210 /* Debug this files internals. */
7915a72c
AC
3211 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3212Set whether hppa target specific debugging information should be displayed."),
3213 _("\
3214Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3215This flag controls whether hppa target specific debugging information is\n\
3216displayed. This information is particularly useful for debugging frame\n\
7915a72c 3217unwinding problems."),
2c5b56ce 3218 NULL,
7915a72c 3219 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3220 &setdebuglist, &showdebuglist);
4facf7e8 3221}
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