gdb
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
6aba47ca 3 Copyright (C) 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
0fb0cc75 4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
a7aad9aa 5 Free Software Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
a9762ec7 14 the Free Software Foundation; either version 3 of the License, or
c5aa993b 15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b 22 You should have received a copy of the GNU General Public License
a9762ec7 23 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
24
25#include "defs.h"
c906108c
SS
26#include "bfd.h"
27#include "inferior.h"
4e052eda 28#include "regcache.h"
e5d66720 29#include "completer.h"
59623e27 30#include "osabi.h"
a7ff40e7 31#include "gdb_assert.h"
343af405 32#include "arch-utils.h"
c906108c
SS
33/* For argument passing to the inferior */
34#include "symtab.h"
fde2cceb 35#include "dis-asm.h"
26d08f08
AC
36#include "trad-frame.h"
37#include "frame-unwind.h"
38#include "frame-base.h"
c906108c 39
c906108c
SS
40#include "gdbcore.h"
41#include "gdbcmd.h"
e6bb342a 42#include "gdbtypes.h"
c906108c 43#include "objfiles.h"
3ff7cf9e 44#include "hppa-tdep.h"
c906108c 45
369aa520
RC
46static int hppa_debug = 0;
47
60383d10 48/* Some local constants. */
3ff7cf9e
JB
49static const int hppa32_num_regs = 128;
50static const int hppa64_num_regs = 96;
51
7c46b9fb
RC
52/* hppa-specific object data -- unwind and solib info.
53 TODO/maybe: think about splitting this into two parts; the unwind data is
54 common to all hppa targets, but is only used in this file; we can register
55 that separately and make this static. The solib data is probably hpux-
56 specific, so we can create a separate extern objfile_data that is registered
57 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
58const struct objfile_data *hppa_objfile_priv_data = NULL;
59
e2ac8128
JB
60/* Get at various relevent fields of an instruction word. */
61#define MASK_5 0x1f
62#define MASK_11 0x7ff
63#define MASK_14 0x3fff
64#define MASK_21 0x1fffff
65
e2ac8128
JB
66/* Sizes (in bytes) of the native unwind entries. */
67#define UNWIND_ENTRY_SIZE 16
68#define STUB_UNWIND_ENTRY_SIZE 8
69
c906108c
SS
70/* Routines to extract various sized constants out of hppa
71 instructions. */
72
73/* This assumes that no garbage lies outside of the lower bits of
74 value. */
75
63807e1d 76static int
abc485a1 77hppa_sign_extend (unsigned val, unsigned bits)
c906108c 78{
c5aa993b 79 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
80}
81
82/* For many immediate values the sign bit is the low bit! */
83
63807e1d 84static int
abc485a1 85hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 86{
c5aa993b 87 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
88}
89
e2ac8128
JB
90/* Extract the bits at positions between FROM and TO, using HP's numbering
91 (MSB = 0). */
92
abc485a1
RC
93int
94hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
95{
96 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
97}
98
c906108c
SS
99/* extract the immediate field from a ld{bhw}s instruction */
100
abc485a1
RC
101int
102hppa_extract_5_load (unsigned word)
c906108c 103{
abc485a1 104 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
105}
106
c906108c
SS
107/* extract the immediate field from a break instruction */
108
abc485a1
RC
109unsigned
110hppa_extract_5r_store (unsigned word)
c906108c
SS
111{
112 return (word & MASK_5);
113}
114
115/* extract the immediate field from a {sr}sm instruction */
116
abc485a1
RC
117unsigned
118hppa_extract_5R_store (unsigned word)
c906108c
SS
119{
120 return (word >> 16 & MASK_5);
121}
122
c906108c
SS
123/* extract a 14 bit immediate field */
124
abc485a1
RC
125int
126hppa_extract_14 (unsigned word)
c906108c 127{
abc485a1 128 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
129}
130
c906108c
SS
131/* extract a 21 bit constant */
132
abc485a1
RC
133int
134hppa_extract_21 (unsigned word)
c906108c
SS
135{
136 int val;
137
138 word &= MASK_21;
139 word <<= 11;
abc485a1 140 val = hppa_get_field (word, 20, 20);
c906108c 141 val <<= 11;
abc485a1 142 val |= hppa_get_field (word, 9, 19);
c906108c 143 val <<= 2;
abc485a1 144 val |= hppa_get_field (word, 5, 6);
c906108c 145 val <<= 5;
abc485a1 146 val |= hppa_get_field (word, 0, 4);
c906108c 147 val <<= 2;
abc485a1
RC
148 val |= hppa_get_field (word, 7, 8);
149 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
150}
151
c906108c
SS
152/* extract a 17 bit constant from branch instructions, returning the
153 19 bit signed value. */
154
abc485a1
RC
155int
156hppa_extract_17 (unsigned word)
c906108c 157{
abc485a1
RC
158 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
159 hppa_get_field (word, 29, 29) << 10 |
160 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
161 (word & 0x1) << 16, 17) << 2;
162}
3388d7ff
RC
163
164CORE_ADDR
165hppa_symbol_address(const char *sym)
166{
167 struct minimal_symbol *minsym;
168
169 minsym = lookup_minimal_symbol (sym, NULL, NULL);
170 if (minsym)
171 return SYMBOL_VALUE_ADDRESS (minsym);
172 else
173 return (CORE_ADDR)-1;
174}
77d18ded
RC
175
176struct hppa_objfile_private *
177hppa_init_objfile_priv_data (struct objfile *objfile)
178{
179 struct hppa_objfile_private *priv;
180
181 priv = (struct hppa_objfile_private *)
182 obstack_alloc (&objfile->objfile_obstack,
183 sizeof (struct hppa_objfile_private));
184 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
185 memset (priv, 0, sizeof (*priv));
186
187 return priv;
188}
c906108c
SS
189\f
190
191/* Compare the start address for two unwind entries returning 1 if
192 the first address is larger than the second, -1 if the second is
193 larger than the first, and zero if they are equal. */
194
195static int
fba45db2 196compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
197{
198 const struct unwind_table_entry *a = arg1;
199 const struct unwind_table_entry *b = arg2;
200
201 if (a->region_start > b->region_start)
202 return 1;
203 else if (a->region_start < b->region_start)
204 return -1;
205 else
206 return 0;
207}
208
53a5351d 209static void
fdd72f95 210record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 211{
fdd72f95 212 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 213 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
214 {
215 bfd_vma value = section->vma - section->filepos;
216 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
217
218 if (value < *low_text_segment_address)
219 *low_text_segment_address = value;
220 }
53a5351d
JM
221}
222
c906108c 223static void
fba45db2
KB
224internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
225 asection *section, unsigned int entries, unsigned int size,
226 CORE_ADDR text_offset)
c906108c
SS
227{
228 /* We will read the unwind entries into temporary memory, then
229 fill in the actual unwind table. */
fdd72f95 230
c906108c
SS
231 if (size > 0)
232 {
5db8bbe5 233 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
234 unsigned long tmp;
235 unsigned i;
236 char *buf = alloca (size);
fdd72f95 237 CORE_ADDR low_text_segment_address;
c906108c 238
fdd72f95 239 /* For ELF targets, then unwinds are supposed to
c2c6d25f
JM
240 be segment relative offsets instead of absolute addresses.
241
242 Note that when loading a shared library (text_offset != 0) the
243 unwinds are already relative to the text_offset that will be
244 passed in. */
5db8bbe5 245 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 246 {
fdd72f95
RC
247 low_text_segment_address = -1;
248
53a5351d 249 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
250 record_text_segment_lowaddr,
251 &low_text_segment_address);
53a5351d 252
fdd72f95 253 text_offset = low_text_segment_address;
53a5351d 254 }
5db8bbe5 255 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 256 {
5db8bbe5 257 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 258 }
53a5351d 259
c906108c
SS
260 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
261
262 /* Now internalize the information being careful to handle host/target
c5aa993b 263 endian issues. */
c906108c
SS
264 for (i = 0; i < entries; i++)
265 {
266 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 267 (bfd_byte *) buf);
c906108c
SS
268 table[i].region_start += text_offset;
269 buf += 4;
c5aa993b 270 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
271 table[i].region_end += text_offset;
272 buf += 4;
c5aa993b 273 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
274 buf += 4;
275 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
276 table[i].Millicode = (tmp >> 30) & 0x1;
277 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
278 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 279 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
280 table[i].Entry_SR = (tmp >> 25) & 0x1;
281 table[i].Entry_FR = (tmp >> 21) & 0xf;
282 table[i].Entry_GR = (tmp >> 16) & 0x1f;
283 table[i].Args_stored = (tmp >> 15) & 0x1;
284 table[i].Variable_Frame = (tmp >> 14) & 0x1;
285 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
286 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
287 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
288 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 289 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
290 table[i].cxx_info = (tmp >> 8) & 0x1;
291 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
292 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 293 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
294 table[i].Save_SP = (tmp >> 4) & 0x1;
295 table[i].Save_RP = (tmp >> 3) & 0x1;
296 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 297 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 298 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 299 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 buf += 4;
301 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
302 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
303 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
304 table[i].alloca_frame = (tmp >> 28) & 0x1;
305 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
306 table[i].Total_frame_size = tmp & 0x7ffffff;
307
c5aa993b 308 /* Stub unwinds are handled elsewhere. */
c906108c
SS
309 table[i].stub_unwind.stub_type = 0;
310 table[i].stub_unwind.padding = 0;
311 }
312 }
313}
314
315/* Read in the backtrace information stored in the `$UNWIND_START$' section of
316 the object file. This info is used mainly by find_unwind_entry() to find
317 out the stack frame size and frame pointer used by procedures. We put
318 everything on the psymbol obstack in the objfile so that it automatically
319 gets freed when the objfile is destroyed. */
320
321static void
fba45db2 322read_unwind_info (struct objfile *objfile)
c906108c 323{
d4f3574e
SS
324 asection *unwind_sec, *stub_unwind_sec;
325 unsigned unwind_size, stub_unwind_size, total_size;
326 unsigned index, unwind_entries;
c906108c
SS
327 unsigned stub_entries, total_entries;
328 CORE_ADDR text_offset;
7c46b9fb
RC
329 struct hppa_unwind_info *ui;
330 struct hppa_objfile_private *obj_private;
c906108c
SS
331
332 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
333 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
334 sizeof (struct hppa_unwind_info));
c906108c
SS
335
336 ui->table = NULL;
337 ui->cache = NULL;
338 ui->last = -1;
339
d4f3574e
SS
340 /* For reasons unknown the HP PA64 tools generate multiple unwinder
341 sections in a single executable. So we just iterate over every
342 section in the BFD looking for unwinder sections intead of trying
343 to do a lookup with bfd_get_section_by_name.
c906108c 344
d4f3574e
SS
345 First determine the total size of the unwind tables so that we
346 can allocate memory in a nice big hunk. */
347 total_entries = 0;
348 for (unwind_sec = objfile->obfd->sections;
349 unwind_sec;
350 unwind_sec = unwind_sec->next)
c906108c 351 {
d4f3574e
SS
352 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
353 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
354 {
355 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
356 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 357
d4f3574e
SS
358 total_entries += unwind_entries;
359 }
c906108c
SS
360 }
361
d4f3574e 362 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 363 use stub unwinds at the current time. */
d4f3574e
SS
364 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
365
c906108c
SS
366 if (stub_unwind_sec)
367 {
368 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
369 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
370 }
371 else
372 {
373 stub_unwind_size = 0;
374 stub_entries = 0;
375 }
376
377 /* Compute total number of unwind entries and their total size. */
d4f3574e 378 total_entries += stub_entries;
c906108c
SS
379 total_size = total_entries * sizeof (struct unwind_table_entry);
380
381 /* Allocate memory for the unwind table. */
382 ui->table = (struct unwind_table_entry *)
8b92e4d5 383 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 384 ui->last = total_entries - 1;
c906108c 385
d4f3574e
SS
386 /* Now read in each unwind section and internalize the standard unwind
387 entries. */
c906108c 388 index = 0;
d4f3574e
SS
389 for (unwind_sec = objfile->obfd->sections;
390 unwind_sec;
391 unwind_sec = unwind_sec->next)
392 {
393 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
394 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
395 {
396 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
397 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
398
399 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
400 unwind_entries, unwind_size, text_offset);
401 index += unwind_entries;
402 }
403 }
404
405 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
406 if (stub_unwind_size > 0)
407 {
408 unsigned int i;
409 char *buf = alloca (stub_unwind_size);
410
411 /* Read in the stub unwind entries. */
412 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
413 0, stub_unwind_size);
414
415 /* Now convert them into regular unwind entries. */
416 for (i = 0; i < stub_entries; i++, index++)
417 {
418 /* Clear out the next unwind entry. */
419 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
420
421 /* Convert offset & size into region_start and region_end.
422 Stuff away the stub type into "reserved" fields. */
423 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
424 (bfd_byte *) buf);
425 ui->table[index].region_start += text_offset;
426 buf += 4;
427 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 428 (bfd_byte *) buf);
c906108c
SS
429 buf += 2;
430 ui->table[index].region_end
c5aa993b
JM
431 = ui->table[index].region_start + 4 *
432 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
433 buf += 2;
434 }
435
436 }
437
438 /* Unwind table needs to be kept sorted. */
439 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
440 compare_unwind_entries);
441
442 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
443 obj_private = (struct hppa_objfile_private *)
444 objfile_data (objfile, hppa_objfile_priv_data);
445 if (obj_private == NULL)
77d18ded
RC
446 obj_private = hppa_init_objfile_priv_data (objfile);
447
c906108c
SS
448 obj_private->unwind_info = ui;
449}
450
451/* Lookup the unwind (stack backtrace) info for the given PC. We search all
452 of the objfiles seeking the unwind table entry for this PC. Each objfile
453 contains a sorted list of struct unwind_table_entry. Since we do a binary
454 search of the unwind tables, we depend upon them to be sorted. */
455
456struct unwind_table_entry *
fba45db2 457find_unwind_entry (CORE_ADDR pc)
c906108c
SS
458{
459 int first, middle, last;
460 struct objfile *objfile;
7c46b9fb 461 struct hppa_objfile_private *priv;
c906108c 462
369aa520
RC
463 if (hppa_debug)
464 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry 0x%s -> ",
465 paddr_nz (pc));
466
c906108c
SS
467 /* A function at address 0? Not in HP-UX! */
468 if (pc == (CORE_ADDR) 0)
369aa520
RC
469 {
470 if (hppa_debug)
471 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
472 return NULL;
473 }
c906108c
SS
474
475 ALL_OBJFILES (objfile)
c5aa993b 476 {
7c46b9fb 477 struct hppa_unwind_info *ui;
c5aa993b 478 ui = NULL;
7c46b9fb
RC
479 priv = objfile_data (objfile, hppa_objfile_priv_data);
480 if (priv)
481 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 482
c5aa993b
JM
483 if (!ui)
484 {
485 read_unwind_info (objfile);
7c46b9fb
RC
486 priv = objfile_data (objfile, hppa_objfile_priv_data);
487 if (priv == NULL)
8a3fe4f8 488 error (_("Internal error reading unwind information."));
7c46b9fb 489 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 490 }
c906108c 491
c5aa993b 492 /* First, check the cache */
c906108c 493
c5aa993b
JM
494 if (ui->cache
495 && pc >= ui->cache->region_start
496 && pc <= ui->cache->region_end)
369aa520
RC
497 {
498 if (hppa_debug)
499 fprintf_unfiltered (gdb_stdlog, "0x%s (cached) }\n",
e7b17823 500 paddr_nz ((uintptr_t) ui->cache));
369aa520
RC
501 return ui->cache;
502 }
c906108c 503
c5aa993b 504 /* Not in the cache, do a binary search */
c906108c 505
c5aa993b
JM
506 first = 0;
507 last = ui->last;
c906108c 508
c5aa993b
JM
509 while (first <= last)
510 {
511 middle = (first + last) / 2;
512 if (pc >= ui->table[middle].region_start
513 && pc <= ui->table[middle].region_end)
514 {
515 ui->cache = &ui->table[middle];
369aa520
RC
516 if (hppa_debug)
517 fprintf_unfiltered (gdb_stdlog, "0x%s }\n",
e7b17823 518 paddr_nz ((uintptr_t) ui->cache));
c5aa993b
JM
519 return &ui->table[middle];
520 }
c906108c 521
c5aa993b
JM
522 if (pc < ui->table[middle].region_start)
523 last = middle - 1;
524 else
525 first = middle + 1;
526 }
527 } /* ALL_OBJFILES() */
369aa520
RC
528
529 if (hppa_debug)
530 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
531
c906108c
SS
532 return NULL;
533}
534
1fb24930
RC
535/* The epilogue is defined here as the area either on the `bv' instruction
536 itself or an instruction which destroys the function's stack frame.
537
538 We do not assume that the epilogue is at the end of a function as we can
539 also have return sequences in the middle of a function. */
540static int
541hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
542{
543 unsigned long status;
544 unsigned int inst;
545 char buf[4];
546 int off;
547
8defab1a 548 status = target_read_memory (pc, buf, 4);
1fb24930
RC
549 if (status != 0)
550 return 0;
551
552 inst = extract_unsigned_integer (buf, 4);
553
554 /* The most common way to perform a stack adjustment ldo X(sp),sp
555 We are destroying a stack frame if the offset is negative. */
556 if ((inst & 0xffffc000) == 0x37de0000
557 && hppa_extract_14 (inst) < 0)
558 return 1;
559
560 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
561 if (((inst & 0x0fc010e0) == 0x0fc010e0
562 || (inst & 0x0fc010e0) == 0x0fc010e0)
563 && hppa_extract_14 (inst) < 0)
564 return 1;
565
566 /* bv %r0(%rp) or bv,n %r0(%rp) */
567 if (inst == 0xe840c000 || inst == 0xe840c002)
568 return 1;
569
570 return 0;
571}
572
85f4f2d8 573static const unsigned char *
67d57894 574hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 575{
56132691 576 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
577 (*len) = sizeof (breakpoint);
578 return breakpoint;
579}
580
e23457df
AC
581/* Return the name of a register. */
582
4a302917 583static const char *
d93859e2 584hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
585{
586 static char *names[] = {
587 "flags", "r1", "rp", "r3",
588 "r4", "r5", "r6", "r7",
589 "r8", "r9", "r10", "r11",
590 "r12", "r13", "r14", "r15",
591 "r16", "r17", "r18", "r19",
592 "r20", "r21", "r22", "r23",
593 "r24", "r25", "r26", "dp",
594 "ret0", "ret1", "sp", "r31",
595 "sar", "pcoqh", "pcsqh", "pcoqt",
596 "pcsqt", "eiem", "iir", "isr",
597 "ior", "ipsw", "goto", "sr4",
598 "sr0", "sr1", "sr2", "sr3",
599 "sr5", "sr6", "sr7", "cr0",
600 "cr8", "cr9", "ccr", "cr12",
601 "cr13", "cr24", "cr25", "cr26",
602 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
603 "fpsr", "fpe1", "fpe2", "fpe3",
604 "fpe4", "fpe5", "fpe6", "fpe7",
605 "fr4", "fr4R", "fr5", "fr5R",
606 "fr6", "fr6R", "fr7", "fr7R",
607 "fr8", "fr8R", "fr9", "fr9R",
608 "fr10", "fr10R", "fr11", "fr11R",
609 "fr12", "fr12R", "fr13", "fr13R",
610 "fr14", "fr14R", "fr15", "fr15R",
611 "fr16", "fr16R", "fr17", "fr17R",
612 "fr18", "fr18R", "fr19", "fr19R",
613 "fr20", "fr20R", "fr21", "fr21R",
614 "fr22", "fr22R", "fr23", "fr23R",
615 "fr24", "fr24R", "fr25", "fr25R",
616 "fr26", "fr26R", "fr27", "fr27R",
617 "fr28", "fr28R", "fr29", "fr29R",
618 "fr30", "fr30R", "fr31", "fr31R"
619 };
620 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
621 return NULL;
622 else
623 return names[i];
624}
625
4a302917 626static const char *
d93859e2 627hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
628{
629 static char *names[] = {
630 "flags", "r1", "rp", "r3",
631 "r4", "r5", "r6", "r7",
632 "r8", "r9", "r10", "r11",
633 "r12", "r13", "r14", "r15",
634 "r16", "r17", "r18", "r19",
635 "r20", "r21", "r22", "r23",
636 "r24", "r25", "r26", "dp",
637 "ret0", "ret1", "sp", "r31",
638 "sar", "pcoqh", "pcsqh", "pcoqt",
639 "pcsqt", "eiem", "iir", "isr",
640 "ior", "ipsw", "goto", "sr4",
641 "sr0", "sr1", "sr2", "sr3",
642 "sr5", "sr6", "sr7", "cr0",
643 "cr8", "cr9", "ccr", "cr12",
644 "cr13", "cr24", "cr25", "cr26",
645 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
646 "fpsr", "fpe1", "fpe2", "fpe3",
647 "fr4", "fr5", "fr6", "fr7",
648 "fr8", "fr9", "fr10", "fr11",
649 "fr12", "fr13", "fr14", "fr15",
650 "fr16", "fr17", "fr18", "fr19",
651 "fr20", "fr21", "fr22", "fr23",
652 "fr24", "fr25", "fr26", "fr27",
653 "fr28", "fr29", "fr30", "fr31"
654 };
655 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
656 return NULL;
657 else
658 return names[i];
659}
660
85c83e99 661/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 662static int
d3f73121 663hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 664{
85c83e99 665 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
666 if (reg <= 32)
667 return reg;
668
669 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 670 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
671 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
672
85c83e99 673 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
674 return -1;
675}
676
79508e1e
AC
677/* This function pushes a stack frame with arguments as part of the
678 inferior function calling mechanism.
679
680 This is the version of the function for the 32-bit PA machines, in
681 which later arguments appear at lower addresses. (The stack always
682 grows towards higher addresses.)
683
684 We simply allocate the appropriate amount of stack space and put
685 arguments into their proper slots. */
686
4a302917 687static CORE_ADDR
7d9b040b 688hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
689 struct regcache *regcache, CORE_ADDR bp_addr,
690 int nargs, struct value **args, CORE_ADDR sp,
691 int struct_return, CORE_ADDR struct_addr)
692{
79508e1e
AC
693 /* Stack base address at which any pass-by-reference parameters are
694 stored. */
695 CORE_ADDR struct_end = 0;
696 /* Stack base address at which the first parameter is stored. */
697 CORE_ADDR param_end = 0;
698
699 /* The inner most end of the stack after all the parameters have
700 been pushed. */
701 CORE_ADDR new_sp = 0;
702
703 /* Two passes. First pass computes the location of everything,
704 second pass writes the bytes out. */
705 int write_pass;
d49771ef
RC
706
707 /* Global pointer (r19) of the function we are trying to call. */
708 CORE_ADDR gp;
709
710 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
711
79508e1e
AC
712 for (write_pass = 0; write_pass < 2; write_pass++)
713 {
1797a8f6 714 CORE_ADDR struct_ptr = 0;
2a6228ef
RC
715 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
716 struct_ptr is adjusted for each argument below, so the first
717 argument will end up at sp-36. */
718 CORE_ADDR param_ptr = 32;
79508e1e 719 int i;
2a6228ef
RC
720 int small_struct = 0;
721
79508e1e
AC
722 for (i = 0; i < nargs; i++)
723 {
724 struct value *arg = args[i];
4991999e 725 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
726 /* The corresponding parameter that is pushed onto the
727 stack, and [possibly] passed in a register. */
728 char param_val[8];
729 int param_len;
730 memset (param_val, 0, sizeof param_val);
731 if (TYPE_LENGTH (type) > 8)
732 {
733 /* Large parameter, pass by reference. Store the value
734 in "struct" area and then pass its address. */
735 param_len = 4;
1797a8f6 736 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 737 if (write_pass)
0fd88904 738 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 739 TYPE_LENGTH (type));
1797a8f6 740 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
79508e1e
AC
741 }
742 else if (TYPE_CODE (type) == TYPE_CODE_INT
743 || TYPE_CODE (type) == TYPE_CODE_ENUM)
744 {
745 /* Integer value store, right aligned. "unpack_long"
746 takes care of any sign-extension problems. */
747 param_len = align_up (TYPE_LENGTH (type), 4);
748 store_unsigned_integer (param_val, param_len,
749 unpack_long (type,
0fd88904 750 value_contents (arg)));
79508e1e 751 }
2a6228ef
RC
752 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
753 {
754 /* Floating point value store, right aligned. */
755 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 756 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 757 }
79508e1e
AC
758 else
759 {
79508e1e 760 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
761
762 /* Small struct value are stored right-aligned. */
79508e1e 763 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 764 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
765
766 /* Structures of size 5, 6 and 7 bytes are special in that
767 the higher-ordered word is stored in the lower-ordered
768 argument, and even though it is a 8-byte quantity the
769 registers need not be 8-byte aligned. */
1b07b470 770 if (param_len > 4 && param_len < 8)
2a6228ef 771 small_struct = 1;
79508e1e 772 }
2a6228ef 773
1797a8f6 774 param_ptr += param_len;
2a6228ef
RC
775 if (param_len == 8 && !small_struct)
776 param_ptr = align_up (param_ptr, 8);
777
778 /* First 4 non-FP arguments are passed in gr26-gr23.
779 First 4 32-bit FP arguments are passed in fr4L-fr7L.
780 First 2 64-bit FP arguments are passed in fr5 and fr7.
781
782 The rest go on the stack, starting at sp-36, towards lower
783 addresses. 8-byte arguments must be aligned to a 8-byte
784 stack boundary. */
79508e1e
AC
785 if (write_pass)
786 {
1797a8f6 787 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
788
789 /* There are some cases when we don't know the type
790 expected by the callee (e.g. for variadic functions), so
791 pass the parameters in both general and fp regs. */
792 if (param_ptr <= 48)
79508e1e 793 {
2a6228ef
RC
794 int grreg = 26 - (param_ptr - 36) / 4;
795 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
796 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
797
798 regcache_cooked_write (regcache, grreg, param_val);
799 regcache_cooked_write (regcache, fpLreg, param_val);
800
79508e1e 801 if (param_len > 4)
2a6228ef
RC
802 {
803 regcache_cooked_write (regcache, grreg + 1,
804 param_val + 4);
805
806 regcache_cooked_write (regcache, fpreg, param_val);
807 regcache_cooked_write (regcache, fpreg + 1,
808 param_val + 4);
809 }
79508e1e
AC
810 }
811 }
812 }
813
814 /* Update the various stack pointers. */
815 if (!write_pass)
816 {
2a6228ef 817 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
818 /* PARAM_PTR already accounts for all the arguments passed
819 by the user. However, the ABI mandates minimum stack
820 space allocations for outgoing arguments. The ABI also
821 mandates minimum stack alignments which we must
822 preserve. */
2a6228ef 823 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
824 }
825 }
826
827 /* If a structure has to be returned, set up register 28 to hold its
828 address */
829 if (struct_return)
9c9acae0 830 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 831
e38c262f 832 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
833
834 if (gp != 0)
9c9acae0 835 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 836
79508e1e 837 /* Set the return address. */
77d18ded
RC
838 if (!gdbarch_push_dummy_code_p (gdbarch))
839 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 840
c4557624 841 /* Update the Stack Pointer. */
34f75cc1 842 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 843
2a6228ef 844 return param_end;
79508e1e
AC
845}
846
38ca4e0c
MK
847/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
848 Runtime Architecture for PA-RISC 2.0", which is distributed as part
849 as of the HP-UX Software Transition Kit (STK). This implementation
850 is based on version 3.3, dated October 6, 1997. */
2f690297 851
38ca4e0c 852/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 853
38ca4e0c
MK
854static int
855hppa64_integral_or_pointer_p (const struct type *type)
856{
857 switch (TYPE_CODE (type))
858 {
859 case TYPE_CODE_INT:
860 case TYPE_CODE_BOOL:
861 case TYPE_CODE_CHAR:
862 case TYPE_CODE_ENUM:
863 case TYPE_CODE_RANGE:
864 {
865 int len = TYPE_LENGTH (type);
866 return (len == 1 || len == 2 || len == 4 || len == 8);
867 }
868 case TYPE_CODE_PTR:
869 case TYPE_CODE_REF:
870 return (TYPE_LENGTH (type) == 8);
871 default:
872 break;
873 }
874
875 return 0;
876}
877
878/* Check whether TYPE is a "Floating Scalar Type". */
879
880static int
881hppa64_floating_p (const struct type *type)
882{
883 switch (TYPE_CODE (type))
884 {
885 case TYPE_CODE_FLT:
886 {
887 int len = TYPE_LENGTH (type);
888 return (len == 4 || len == 8 || len == 16);
889 }
890 default:
891 break;
892 }
893
894 return 0;
895}
2f690297 896
1218e655
RC
897/* If CODE points to a function entry address, try to look up the corresponding
898 function descriptor and return its address instead. If CODE is not a
899 function entry address, then just return it unchanged. */
900static CORE_ADDR
901hppa64_convert_code_addr_to_fptr (CORE_ADDR code)
902{
903 struct obj_section *sec, *opd;
904
905 sec = find_pc_section (code);
906
907 if (!sec)
908 return code;
909
910 /* If CODE is in a data section, assume it's already a fptr. */
911 if (!(sec->the_bfd_section->flags & SEC_CODE))
912 return code;
913
914 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
915 {
916 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 917 break;
1218e655
RC
918 }
919
920 if (opd < sec->objfile->sections_end)
921 {
922 CORE_ADDR addr;
923
aded6f54
PA
924 for (addr = obj_section_addr (opd);
925 addr < obj_section_endaddr (opd);
926 addr += 2 * 8)
927 {
1218e655
RC
928 ULONGEST opdaddr;
929 char tmp[8];
930
931 if (target_read_memory (addr, tmp, sizeof (tmp)))
932 break;
933 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp));
934
aded6f54 935 if (opdaddr == code)
1218e655
RC
936 return addr - 16;
937 }
938 }
939
940 return code;
941}
942
4a302917 943static CORE_ADDR
7d9b040b 944hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
945 struct regcache *regcache, CORE_ADDR bp_addr,
946 int nargs, struct value **args, CORE_ADDR sp,
947 int struct_return, CORE_ADDR struct_addr)
948{
38ca4e0c
MK
949 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
950 int i, offset = 0;
951 CORE_ADDR gp;
2f690297 952
38ca4e0c
MK
953 /* "The outgoing parameter area [...] must be aligned at a 16-byte
954 boundary." */
955 sp = align_up (sp, 16);
2f690297 956
38ca4e0c
MK
957 for (i = 0; i < nargs; i++)
958 {
959 struct value *arg = args[i];
960 struct type *type = value_type (arg);
961 int len = TYPE_LENGTH (type);
0fd88904 962 const bfd_byte *valbuf;
1218e655 963 bfd_byte fptrbuf[8];
38ca4e0c 964 int regnum;
2f690297 965
38ca4e0c
MK
966 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
967 offset = align_up (offset, 8);
77d18ded 968
38ca4e0c 969 if (hppa64_integral_or_pointer_p (type))
2f690297 970 {
38ca4e0c
MK
971 /* "Integral scalar parameters smaller than 64 bits are
972 padded on the left (i.e., the value is in the
973 least-significant bits of the 64-bit storage unit, and
974 the high-order bits are undefined)." Therefore we can
975 safely sign-extend them. */
976 if (len < 8)
449e1137 977 {
38ca4e0c
MK
978 arg = value_cast (builtin_type_int64, arg);
979 len = 8;
980 }
981 }
982 else if (hppa64_floating_p (type))
983 {
984 if (len > 8)
985 {
986 /* "Quad-precision (128-bit) floating-point scalar
987 parameters are aligned on a 16-byte boundary." */
988 offset = align_up (offset, 16);
989
990 /* "Double-extended- and quad-precision floating-point
991 parameters within the first 64 bytes of the parameter
992 list are always passed in general registers." */
449e1137
AC
993 }
994 else
995 {
38ca4e0c 996 if (len == 4)
449e1137 997 {
38ca4e0c
MK
998 /* "Single-precision (32-bit) floating-point scalar
999 parameters are padded on the left with 32 bits of
1000 garbage (i.e., the floating-point value is in the
1001 least-significant 32 bits of a 64-bit storage
1002 unit)." */
1003 offset += 4;
449e1137 1004 }
38ca4e0c
MK
1005
1006 /* "Single- and double-precision floating-point
1007 parameters in this area are passed according to the
1008 available formal parameter information in a function
1009 prototype. [...] If no prototype is in scope,
1010 floating-point parameters must be passed both in the
1011 corresponding general registers and in the
1012 corresponding floating-point registers." */
1013 regnum = HPPA64_FP4_REGNUM + offset / 8;
1014
1015 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1016 {
38ca4e0c
MK
1017 /* "Single-precision floating-point parameters, when
1018 passed in floating-point registers, are passed in
1019 the right halves of the floating point registers;
1020 the left halves are unused." */
1021 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1022 len, value_contents (arg));
449e1137
AC
1023 }
1024 }
2f690297 1025 }
38ca4e0c 1026 else
2f690297 1027 {
38ca4e0c
MK
1028 if (len > 8)
1029 {
1030 /* "Aggregates larger than 8 bytes are aligned on a
1031 16-byte boundary, possibly leaving an unused argument
1032 slot, which is filled with garbage. If necessary,
1033 they are padded on the right (with garbage), to a
1034 multiple of 8 bytes." */
1035 offset = align_up (offset, 16);
1036 }
1037 }
1038
1218e655
RC
1039 /* If we are passing a function pointer, make sure we pass a function
1040 descriptor instead of the function entry address. */
1041 if (TYPE_CODE (type) == TYPE_CODE_PTR
1042 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1043 {
1044 ULONGEST codeptr, fptr;
1045
1046 codeptr = unpack_long (type, value_contents (arg));
1047 fptr = hppa64_convert_code_addr_to_fptr (codeptr);
1048 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), fptr);
1049 valbuf = fptrbuf;
1050 }
1051 else
1052 {
1053 valbuf = value_contents (arg);
1054 }
1055
38ca4e0c 1056 /* Always store the argument in memory. */
1218e655 1057 write_memory (sp + offset, valbuf, len);
38ca4e0c 1058
38ca4e0c
MK
1059 regnum = HPPA_ARG0_REGNUM - offset / 8;
1060 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1061 {
1062 regcache_cooked_write_part (regcache, regnum,
1063 offset % 8, min (len, 8), valbuf);
1064 offset += min (len, 8);
1065 valbuf += min (len, 8);
1066 len -= min (len, 8);
1067 regnum--;
2f690297 1068 }
38ca4e0c
MK
1069
1070 offset += len;
2f690297
AC
1071 }
1072
38ca4e0c
MK
1073 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1074 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1075
1076 /* Allocate the outgoing parameter area. Make sure the outgoing
1077 parameter area is multiple of 16 bytes in length. */
1078 sp += max (align_up (offset, 16), 64);
1079
1080 /* Allocate 32-bytes of scratch space. The documentation doesn't
1081 mention this, but it seems to be needed. */
1082 sp += 32;
1083
1084 /* Allocate the frame marker area. */
1085 sp += 16;
1086
1087 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1088 its address. */
2f690297 1089 if (struct_return)
38ca4e0c 1090 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1091
38ca4e0c 1092 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1093 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1094 if (gp != 0)
38ca4e0c 1095 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1096
38ca4e0c 1097 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1098 if (!gdbarch_push_dummy_code_p (gdbarch))
1099 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1100
38ca4e0c
MK
1101 /* Set up GR30 to hold the stack pointer (sp). */
1102 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1103
38ca4e0c 1104 return sp;
2f690297 1105}
38ca4e0c 1106\f
2f690297 1107
08a27113
MK
1108/* Handle 32/64-bit struct return conventions. */
1109
1110static enum return_value_convention
c055b101 1111hppa32_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1112 struct type *type, struct regcache *regcache,
e127f0db 1113 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1114{
1115 if (TYPE_LENGTH (type) <= 2 * 4)
1116 {
1117 /* The value always lives in the right hand end of the register
1118 (or register pair)? */
1119 int b;
1120 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1121 int part = TYPE_LENGTH (type) % 4;
1122 /* The left hand register contains only part of the value,
1123 transfer that first so that the rest can be xfered as entire
1124 4-byte registers. */
1125 if (part > 0)
1126 {
1127 if (readbuf != NULL)
1128 regcache_cooked_read_part (regcache, reg, 4 - part,
1129 part, readbuf);
1130 if (writebuf != NULL)
1131 regcache_cooked_write_part (regcache, reg, 4 - part,
1132 part, writebuf);
1133 reg++;
1134 }
1135 /* Now transfer the remaining register values. */
1136 for (b = part; b < TYPE_LENGTH (type); b += 4)
1137 {
1138 if (readbuf != NULL)
e127f0db 1139 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1140 if (writebuf != NULL)
e127f0db 1141 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1142 reg++;
1143 }
1144 return RETURN_VALUE_REGISTER_CONVENTION;
1145 }
1146 else
1147 return RETURN_VALUE_STRUCT_CONVENTION;
1148}
1149
1150static enum return_value_convention
c055b101 1151hppa64_return_value (struct gdbarch *gdbarch, struct type *func_type,
08a27113 1152 struct type *type, struct regcache *regcache,
e127f0db 1153 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1154{
1155 int len = TYPE_LENGTH (type);
1156 int regnum, offset;
1157
1158 if (len > 16)
1159 {
1160 /* All return values larget than 128 bits must be aggregate
1161 return values. */
9738b034
MK
1162 gdb_assert (!hppa64_integral_or_pointer_p (type));
1163 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1164
1165 /* "Aggregate return values larger than 128 bits are returned in
1166 a buffer allocated by the caller. The address of the buffer
1167 must be passed in GR 28." */
1168 return RETURN_VALUE_STRUCT_CONVENTION;
1169 }
1170
1171 if (hppa64_integral_or_pointer_p (type))
1172 {
1173 /* "Integral return values are returned in GR 28. Values
1174 smaller than 64 bits are padded on the left (with garbage)." */
1175 regnum = HPPA_RET0_REGNUM;
1176 offset = 8 - len;
1177 }
1178 else if (hppa64_floating_p (type))
1179 {
1180 if (len > 8)
1181 {
1182 /* "Double-extended- and quad-precision floating-point
1183 values are returned in GRs 28 and 29. The sign,
1184 exponent, and most-significant bits of the mantissa are
1185 returned in GR 28; the least-significant bits of the
1186 mantissa are passed in GR 29. For double-extended
1187 precision values, GR 29 is padded on the right with 48
1188 bits of garbage." */
1189 regnum = HPPA_RET0_REGNUM;
1190 offset = 0;
1191 }
1192 else
1193 {
1194 /* "Single-precision and double-precision floating-point
1195 return values are returned in FR 4R (single precision) or
1196 FR 4 (double-precision)." */
1197 regnum = HPPA64_FP4_REGNUM;
1198 offset = 8 - len;
1199 }
1200 }
1201 else
1202 {
1203 /* "Aggregate return values up to 64 bits in size are returned
1204 in GR 28. Aggregates smaller than 64 bits are left aligned
1205 in the register; the pad bits on the right are undefined."
1206
1207 "Aggregate return values between 65 and 128 bits are returned
1208 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1209 the remaining bits are placed, left aligned, in GR 29. The
1210 pad bits on the right of GR 29 (if any) are undefined." */
1211 regnum = HPPA_RET0_REGNUM;
1212 offset = 0;
1213 }
1214
1215 if (readbuf)
1216 {
08a27113
MK
1217 while (len > 0)
1218 {
1219 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1220 min (len, 8), readbuf);
1221 readbuf += min (len, 8);
08a27113
MK
1222 len -= min (len, 8);
1223 regnum++;
1224 }
1225 }
1226
1227 if (writebuf)
1228 {
08a27113
MK
1229 while (len > 0)
1230 {
1231 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1232 min (len, 8), writebuf);
1233 writebuf += min (len, 8);
08a27113
MK
1234 len -= min (len, 8);
1235 regnum++;
1236 }
1237 }
1238
1239 return RETURN_VALUE_REGISTER_CONVENTION;
1240}
1241\f
1242
d49771ef 1243static CORE_ADDR
a7aad9aa 1244hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1245 struct target_ops *targ)
1246{
1247 if (addr & 2)
1248 {
0dfff4cb 1249 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1250 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1251 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1252 }
1253
1254 return addr;
1255}
1256
1797a8f6
AC
1257static CORE_ADDR
1258hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1259{
1260 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1261 and not _bit_)! */
1262 return align_up (addr, 64);
1263}
1264
2f690297
AC
1265/* Force all frames to 16-byte alignment. Better safe than sorry. */
1266
1267static CORE_ADDR
1797a8f6 1268hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1269{
1270 /* Just always 16-byte align. */
1271 return align_up (addr, 16);
1272}
1273
cc72850f 1274CORE_ADDR
61a1198a 1275hppa_read_pc (struct regcache *regcache)
c906108c 1276{
cc72850f 1277 ULONGEST ipsw;
61a1198a 1278 ULONGEST pc;
c906108c 1279
61a1198a
UW
1280 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1281 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1282
1283 /* If the current instruction is nullified, then we are effectively
1284 still executing the previous instruction. Pretend we are still
cc72850f
MK
1285 there. This is needed when single stepping; if the nullified
1286 instruction is on a different line, we don't want GDB to think
1287 we've stepped onto that line. */
fe46cd3a
RC
1288 if (ipsw & 0x00200000)
1289 pc -= 4;
1290
cc72850f 1291 return pc & ~0x3;
c906108c
SS
1292}
1293
cc72850f 1294void
61a1198a 1295hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1296{
61a1198a
UW
1297 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1298 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1299}
1300
1301/* return the alignment of a type in bytes. Structures have the maximum
1302 alignment required by their fields. */
1303
1304static int
fba45db2 1305hppa_alignof (struct type *type)
c906108c
SS
1306{
1307 int max_align, align, i;
1308 CHECK_TYPEDEF (type);
1309 switch (TYPE_CODE (type))
1310 {
1311 case TYPE_CODE_PTR:
1312 case TYPE_CODE_INT:
1313 case TYPE_CODE_FLT:
1314 return TYPE_LENGTH (type);
1315 case TYPE_CODE_ARRAY:
262452ec 1316 return hppa_alignof (TYPE_INDEX_TYPE (type));
c906108c
SS
1317 case TYPE_CODE_STRUCT:
1318 case TYPE_CODE_UNION:
1319 max_align = 1;
1320 for (i = 0; i < TYPE_NFIELDS (type); i++)
1321 {
1322 /* Bit fields have no real alignment. */
1323 /* if (!TYPE_FIELD_BITPOS (type, i)) */
c5aa993b 1324 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
c906108c
SS
1325 {
1326 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1327 max_align = max (max_align, align);
1328 }
1329 }
1330 return max_align;
1331 default:
1332 return 4;
1333 }
1334}
1335
c906108c
SS
1336/* For the given instruction (INST), return any adjustment it makes
1337 to the stack pointer or zero for no adjustment.
1338
1339 This only handles instructions commonly found in prologues. */
1340
1341static int
fba45db2 1342prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1343{
1344 /* This must persist across calls. */
1345 static int save_high21;
1346
1347 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1348 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1349 return hppa_extract_14 (inst);
c906108c
SS
1350
1351 /* stwm X,D(sp) */
1352 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1353 return hppa_extract_14 (inst);
c906108c 1354
104c1213
JM
1355 /* std,ma X,D(sp) */
1356 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1357 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1358
e22b26cb 1359 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1360 save high bits in save_high21 for later use. */
e22b26cb 1361 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1362 {
abc485a1 1363 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1364 return 0;
1365 }
1366
1367 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1368 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1369
1370 /* fstws as used by the HP compilers. */
1371 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1372 return hppa_extract_5_load (inst);
c906108c
SS
1373
1374 /* No adjustment. */
1375 return 0;
1376}
1377
1378/* Return nonzero if INST is a branch of some kind, else return zero. */
1379
1380static int
fba45db2 1381is_branch (unsigned long inst)
c906108c
SS
1382{
1383 switch (inst >> 26)
1384 {
1385 case 0x20:
1386 case 0x21:
1387 case 0x22:
1388 case 0x23:
7be570e7 1389 case 0x27:
c906108c
SS
1390 case 0x28:
1391 case 0x29:
1392 case 0x2a:
1393 case 0x2b:
7be570e7 1394 case 0x2f:
c906108c
SS
1395 case 0x30:
1396 case 0x31:
1397 case 0x32:
1398 case 0x33:
1399 case 0x38:
1400 case 0x39:
1401 case 0x3a:
7be570e7 1402 case 0x3b:
c906108c
SS
1403 return 1;
1404
1405 default:
1406 return 0;
1407 }
1408}
1409
1410/* Return the register number for a GR which is saved by INST or
1411 zero it INST does not save a GR. */
1412
1413static int
fba45db2 1414inst_saves_gr (unsigned long inst)
c906108c
SS
1415{
1416 /* Does it look like a stw? */
7be570e7
JM
1417 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1418 || (inst >> 26) == 0x1f
1419 || ((inst >> 26) == 0x1f
1420 && ((inst >> 6) == 0xa)))
abc485a1 1421 return hppa_extract_5R_store (inst);
7be570e7
JM
1422
1423 /* Does it look like a std? */
1424 if ((inst >> 26) == 0x1c
1425 || ((inst >> 26) == 0x03
1426 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1427 return hppa_extract_5R_store (inst);
c906108c
SS
1428
1429 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1430 if ((inst >> 26) == 0x1b)
abc485a1 1431 return hppa_extract_5R_store (inst);
c906108c
SS
1432
1433 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1434 too. */
7be570e7
JM
1435 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1436 || ((inst >> 26) == 0x3
1437 && (((inst >> 6) & 0xf) == 0x8
1438 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1439 return hppa_extract_5R_store (inst);
c5aa993b 1440
c906108c
SS
1441 return 0;
1442}
1443
1444/* Return the register number for a FR which is saved by INST or
1445 zero it INST does not save a FR.
1446
1447 Note we only care about full 64bit register stores (that's the only
1448 kind of stores the prologue will use).
1449
1450 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1451
1452static int
fba45db2 1453inst_saves_fr (unsigned long inst)
c906108c 1454{
7be570e7 1455 /* is this an FSTD ? */
c906108c 1456 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1457 return hppa_extract_5r_store (inst);
7be570e7 1458 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1459 return hppa_extract_5R_store (inst);
7be570e7 1460 /* is this an FSTW ? */
c906108c 1461 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1462 return hppa_extract_5r_store (inst);
7be570e7 1463 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1464 return hppa_extract_5R_store (inst);
c906108c
SS
1465 return 0;
1466}
1467
1468/* Advance PC across any function entry prologue instructions
1469 to reach some "real" code.
1470
1471 Use information in the unwind table to determine what exactly should
1472 be in the prologue. */
1473
1474
a71f8c30 1475static CORE_ADDR
be8626e0
MD
1476skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1477 int stop_before_branch)
c906108c
SS
1478{
1479 char buf[4];
1480 CORE_ADDR orig_pc = pc;
1481 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1482 unsigned long args_stored, status, i, restart_gr, restart_fr;
1483 struct unwind_table_entry *u;
a71f8c30 1484 int final_iteration;
c906108c
SS
1485
1486 restart_gr = 0;
1487 restart_fr = 0;
1488
1489restart:
1490 u = find_unwind_entry (pc);
1491 if (!u)
1492 return pc;
1493
c5aa993b 1494 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1495 if ((pc & ~0x3) != u->region_start)
1496 return pc;
1497
1498 /* This is how much of a frame adjustment we need to account for. */
1499 stack_remaining = u->Total_frame_size << 3;
1500
1501 /* Magic register saves we want to know about. */
1502 save_rp = u->Save_RP;
1503 save_sp = u->Save_SP;
1504
1505 /* An indication that args may be stored into the stack. Unfortunately
1506 the HPUX compilers tend to set this in cases where no args were
1507 stored too!. */
1508 args_stored = 1;
1509
1510 /* Turn the Entry_GR field into a bitmask. */
1511 save_gr = 0;
1512 for (i = 3; i < u->Entry_GR + 3; i++)
1513 {
1514 /* Frame pointer gets saved into a special location. */
eded0a31 1515 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1516 continue;
1517
1518 save_gr |= (1 << i);
1519 }
1520 save_gr &= ~restart_gr;
1521
1522 /* Turn the Entry_FR field into a bitmask too. */
1523 save_fr = 0;
1524 for (i = 12; i < u->Entry_FR + 12; i++)
1525 save_fr |= (1 << i);
1526 save_fr &= ~restart_fr;
1527
a71f8c30
RC
1528 final_iteration = 0;
1529
c906108c
SS
1530 /* Loop until we find everything of interest or hit a branch.
1531
1532 For unoptimized GCC code and for any HP CC code this will never ever
1533 examine any user instructions.
1534
1535 For optimzied GCC code we're faced with problems. GCC will schedule
1536 its prologue and make prologue instructions available for delay slot
1537 filling. The end result is user code gets mixed in with the prologue
1538 and a prologue instruction may be in the delay slot of the first branch
1539 or call.
1540
1541 Some unexpected things are expected with debugging optimized code, so
1542 we allow this routine to walk past user instructions in optimized
1543 GCC code. */
1544 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1545 || args_stored)
1546 {
1547 unsigned int reg_num;
1548 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1549 unsigned long old_save_rp, old_save_sp, next_inst;
1550
1551 /* Save copies of all the triggers so we can compare them later
c5aa993b 1552 (only for HPC). */
c906108c
SS
1553 old_save_gr = save_gr;
1554 old_save_fr = save_fr;
1555 old_save_rp = save_rp;
1556 old_save_sp = save_sp;
1557 old_stack_remaining = stack_remaining;
1558
8defab1a 1559 status = target_read_memory (pc, buf, 4);
c906108c 1560 inst = extract_unsigned_integer (buf, 4);
c5aa993b 1561
c906108c
SS
1562 /* Yow! */
1563 if (status != 0)
1564 return pc;
1565
1566 /* Note the interesting effects of this instruction. */
1567 stack_remaining -= prologue_inst_adjust_sp (inst);
1568
7be570e7
JM
1569 /* There are limited ways to store the return pointer into the
1570 stack. */
c4c79048 1571 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1572 save_rp = 0;
1573
104c1213 1574 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1575 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1576 if ((inst & 0xffffc000) == 0x6fc10000
1577 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1578 save_sp = 0;
1579
6426a772
JM
1580 /* Are we loading some register with an offset from the argument
1581 pointer? */
1582 if ((inst & 0xffe00000) == 0x37a00000
1583 || (inst & 0xffffffe0) == 0x081d0240)
1584 {
1585 pc += 4;
1586 continue;
1587 }
1588
c906108c
SS
1589 /* Account for general and floating-point register saves. */
1590 reg_num = inst_saves_gr (inst);
1591 save_gr &= ~(1 << reg_num);
1592
1593 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1594 Unfortunately args_stored only tells us that some arguments
1595 where stored into the stack. Not how many or what kind!
c906108c 1596
c5aa993b
JM
1597 This is a kludge as on the HP compiler sets this bit and it
1598 never does prologue scheduling. So once we see one, skip past
1599 all of them. We have similar code for the fp arg stores below.
c906108c 1600
c5aa993b
JM
1601 FIXME. Can still die if we have a mix of GR and FR argument
1602 stores! */
be8626e0 1603 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1604 && reg_num <= 26)
c906108c 1605 {
be8626e0 1606 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1607 && reg_num <= 26)
c906108c
SS
1608 {
1609 pc += 4;
8defab1a 1610 status = target_read_memory (pc, buf, 4);
c906108c
SS
1611 inst = extract_unsigned_integer (buf, 4);
1612 if (status != 0)
1613 return pc;
1614 reg_num = inst_saves_gr (inst);
1615 }
1616 args_stored = 0;
1617 continue;
1618 }
1619
1620 reg_num = inst_saves_fr (inst);
1621 save_fr &= ~(1 << reg_num);
1622
8defab1a 1623 status = target_read_memory (pc + 4, buf, 4);
c906108c 1624 next_inst = extract_unsigned_integer (buf, 4);
c5aa993b 1625
c906108c
SS
1626 /* Yow! */
1627 if (status != 0)
1628 return pc;
1629
1630 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1631 save. */
c906108c
SS
1632 if ((inst & 0xfc000000) == 0x34000000
1633 && inst_saves_fr (next_inst) >= 4
819844ad 1634 && inst_saves_fr (next_inst)
be8626e0 1635 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1636 {
1637 /* So we drop into the code below in a reasonable state. */
1638 reg_num = inst_saves_fr (next_inst);
1639 pc -= 4;
1640 }
1641
1642 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1643 This is a kludge as on the HP compiler sets this bit and it
1644 never does prologue scheduling. So once we see one, skip past
1645 all of them. */
819844ad 1646 if (reg_num >= 4
be8626e0 1647 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1648 {
819844ad
UW
1649 while (reg_num >= 4
1650 && reg_num
be8626e0 1651 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1652 {
1653 pc += 8;
8defab1a 1654 status = target_read_memory (pc, buf, 4);
c906108c
SS
1655 inst = extract_unsigned_integer (buf, 4);
1656 if (status != 0)
1657 return pc;
1658 if ((inst & 0xfc000000) != 0x34000000)
1659 break;
8defab1a 1660 status = target_read_memory (pc + 4, buf, 4);
c906108c
SS
1661 next_inst = extract_unsigned_integer (buf, 4);
1662 if (status != 0)
1663 return pc;
1664 reg_num = inst_saves_fr (next_inst);
1665 }
1666 args_stored = 0;
1667 continue;
1668 }
1669
1670 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1671 instruction is in the delay slot of the first call/branch. */
a71f8c30 1672 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1673 break;
1674
1675 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1676 arguments were stored into the stack (boo hiss). This could
1677 cause this code to then skip a bunch of user insns (up to the
1678 first branch).
1679
1680 To combat this we try to identify when args_stored was bogusly
1681 set and clear it. We only do this when args_stored is nonzero,
1682 all other resources are accounted for, and nothing changed on
1683 this pass. */
c906108c 1684 if (args_stored
c5aa993b 1685 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1686 && old_save_gr == save_gr && old_save_fr == save_fr
1687 && old_save_rp == save_rp && old_save_sp == save_sp
1688 && old_stack_remaining == stack_remaining)
1689 break;
c5aa993b 1690
c906108c
SS
1691 /* Bump the PC. */
1692 pc += 4;
a71f8c30
RC
1693
1694 /* !stop_before_branch, so also look at the insn in the delay slot
1695 of the branch. */
1696 if (final_iteration)
1697 break;
1698 if (is_branch (inst))
1699 final_iteration = 1;
c906108c
SS
1700 }
1701
1702 /* We've got a tenative location for the end of the prologue. However
1703 because of limitations in the unwind descriptor mechanism we may
1704 have went too far into user code looking for the save of a register
1705 that does not exist. So, if there registers we expected to be saved
1706 but never were, mask them out and restart.
1707
1708 This should only happen in optimized code, and should be very rare. */
c5aa993b 1709 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1710 {
1711 pc = orig_pc;
1712 restart_gr = save_gr;
1713 restart_fr = save_fr;
1714 goto restart;
1715 }
1716
1717 return pc;
1718}
1719
1720
7be570e7
JM
1721/* Return the address of the PC after the last prologue instruction if
1722 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1723
1724static CORE_ADDR
fba45db2 1725after_prologue (CORE_ADDR pc)
c906108c
SS
1726{
1727 struct symtab_and_line sal;
1728 CORE_ADDR func_addr, func_end;
1729 struct symbol *f;
1730
7be570e7
JM
1731 /* If we can not find the symbol in the partial symbol table, then
1732 there is no hope we can determine the function's start address
1733 with this code. */
c906108c 1734 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1735 return 0;
c906108c 1736
7be570e7 1737 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1738 sal = find_pc_line (func_addr, 0);
1739
7be570e7
JM
1740 /* There are only two cases to consider. First, the end of the source line
1741 is within the function bounds. In that case we return the end of the
1742 source line. Second is the end of the source line extends beyond the
1743 bounds of the current function. We need to use the slow code to
1744 examine instructions in that case.
c906108c 1745
7be570e7
JM
1746 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1747 the wrong thing to do. In fact, it should be entirely possible for this
1748 function to always return zero since the slow instruction scanning code
1749 is supposed to *always* work. If it does not, then it is a bug. */
1750 if (sal.end < func_end)
1751 return sal.end;
c5aa993b 1752 else
7be570e7 1753 return 0;
c906108c
SS
1754}
1755
1756/* To skip prologues, I use this predicate. Returns either PC itself
1757 if the code at PC does not look like a function prologue; otherwise
a71f8c30
RC
1758 returns an address that (if we're lucky) follows the prologue.
1759
1760 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1761 It doesn't necessarily skips all the insns in the prologue. In fact
1762 we might not want to skip all the insns because a prologue insn may
1763 appear in the delay slot of the first branch, and we don't want to
1764 skip over the branch in that case. */
c906108c 1765
8d153463 1766static CORE_ADDR
6093d2eb 1767hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1768{
c5aa993b
JM
1769 unsigned long inst;
1770 int offset;
1771 CORE_ADDR post_prologue_pc;
1772 char buf[4];
c906108c 1773
c5aa993b
JM
1774 /* See if we can determine the end of the prologue via the symbol table.
1775 If so, then return either PC, or the PC after the prologue, whichever
1776 is greater. */
c906108c 1777
c5aa993b 1778 post_prologue_pc = after_prologue (pc);
c906108c 1779
7be570e7
JM
1780 /* If after_prologue returned a useful address, then use it. Else
1781 fall back on the instruction skipping code.
1782
1783 Some folks have claimed this causes problems because the breakpoint
1784 may be the first instruction of the prologue. If that happens, then
1785 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1786 if (post_prologue_pc != 0)
1787 return max (pc, post_prologue_pc);
c5aa993b 1788 else
be8626e0 1789 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1790}
1791
29d375ac 1792/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1793
29d375ac 1794static struct unwind_table_entry *
227e86ad 1795hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1796{
227e86ad 1797 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1798
1799 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1800 result of get_frame_address_in_block implies a problem.
93d42b30 1801 The bits should have been removed earlier, before the return
eb2f4a08 1802 value of frame_pc_unwind. That might be happening already;
93d42b30
DJ
1803 if it isn't, it should be fixed. Then this call can be
1804 removed. */
227e86ad 1805 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1806 return find_unwind_entry (pc);
1807}
1808
26d08f08
AC
1809struct hppa_frame_cache
1810{
1811 CORE_ADDR base;
1812 struct trad_frame_saved_reg *saved_regs;
1813};
1814
1815static struct hppa_frame_cache *
227e86ad 1816hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1817{
227e86ad 1818 struct gdbarch *gdbarch = get_frame_arch (this_frame);
26d08f08
AC
1819 struct hppa_frame_cache *cache;
1820 long saved_gr_mask;
1821 long saved_fr_mask;
1822 CORE_ADDR this_sp;
1823 long frame_size;
1824 struct unwind_table_entry *u;
9f7194c3 1825 CORE_ADDR prologue_end;
50b2f48a 1826 int fp_in_r1 = 0;
26d08f08
AC
1827 int i;
1828
369aa520
RC
1829 if (hppa_debug)
1830 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1831 frame_relative_level(this_frame));
369aa520 1832
26d08f08 1833 if ((*this_cache) != NULL)
369aa520
RC
1834 {
1835 if (hppa_debug)
1836 fprintf_unfiltered (gdb_stdlog, "base=0x%s (cached) }",
1837 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
1838 return (*this_cache);
1839 }
26d08f08
AC
1840 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1841 (*this_cache) = cache;
227e86ad 1842 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1843
1844 /* Yow! */
227e86ad 1845 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1846 if (!u)
369aa520
RC
1847 {
1848 if (hppa_debug)
1849 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1850 return (*this_cache);
1851 }
26d08f08
AC
1852
1853 /* Turn the Entry_GR field into a bitmask. */
1854 saved_gr_mask = 0;
1855 for (i = 3; i < u->Entry_GR + 3; i++)
1856 {
1857 /* Frame pointer gets saved into a special location. */
eded0a31 1858 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1859 continue;
1860
1861 saved_gr_mask |= (1 << i);
1862 }
1863
1864 /* Turn the Entry_FR field into a bitmask too. */
1865 saved_fr_mask = 0;
1866 for (i = 12; i < u->Entry_FR + 12; i++)
1867 saved_fr_mask |= (1 << i);
1868
1869 /* Loop until we find everything of interest or hit a branch.
1870
1871 For unoptimized GCC code and for any HP CC code this will never ever
1872 examine any user instructions.
1873
1874 For optimized GCC code we're faced with problems. GCC will schedule
1875 its prologue and make prologue instructions available for delay slot
1876 filling. The end result is user code gets mixed in with the prologue
1877 and a prologue instruction may be in the delay slot of the first branch
1878 or call.
1879
1880 Some unexpected things are expected with debugging optimized code, so
1881 we allow this routine to walk past user instructions in optimized
1882 GCC code. */
1883 {
1884 int final_iteration = 0;
46acf081 1885 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1886 int looking_for_sp = u->Save_SP;
1887 int looking_for_rp = u->Save_RP;
1888 int fp_loc = -1;
9f7194c3 1889
a71f8c30 1890 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1891 skip_prologue_using_sal, in case we stepped into a function without
1892 symbol information. hppa_skip_prologue also bounds the returned
1893 pc by the passed in pc, so it will not return a pc in the next
a71f8c30
RC
1894 function.
1895
1896 We used to call hppa_skip_prologue to find the end of the prologue,
1897 but if some non-prologue instructions get scheduled into the prologue,
1898 and the program is compiled with debug information, the "easy" way
1899 in hppa_skip_prologue will return a prologue end that is too early
1900 for us to notice any potential frame adjustments. */
d5c27f81 1901
ef02daa9
DJ
1902 /* We used to use get_frame_func to locate the beginning of the
1903 function to pass to skip_prologue. However, when objects are
1904 compiled without debug symbols, get_frame_func can return the wrong
46acf081
RC
1905 function (or 0). We can do better than that by using unwind records.
1906 This only works if the Region_description of the unwind record
1907 indicates that it includes the entry point of the function.
1908 HP compilers sometimes generate unwind records for regions that
1909 do not include the entry or exit point of a function. GNU tools
1910 do not do this. */
1911
1912 if ((u->Region_description & 0x2) == 0)
1913 start_pc = u->region_start;
1914 else
227e86ad 1915 start_pc = get_frame_func (this_frame);
d5c27f81 1916
be8626e0 1917 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1918 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1919
1920 if (prologue_end != 0 && end_pc > prologue_end)
1921 end_pc = prologue_end;
1922
26d08f08 1923 frame_size = 0;
9f7194c3 1924
46acf081 1925 for (pc = start_pc;
26d08f08
AC
1926 ((saved_gr_mask || saved_fr_mask
1927 || looking_for_sp || looking_for_rp
1928 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1929 && pc < end_pc);
26d08f08
AC
1930 pc += 4)
1931 {
1932 int reg;
1933 char buf4[4];
4a302917
RC
1934 long inst;
1935
227e86ad 1936 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1937 {
8a3fe4f8 1938 error (_("Cannot read instruction at 0x%s."), paddr_nz (pc));
4a302917
RC
1939 return (*this_cache);
1940 }
1941
1942 inst = extract_unsigned_integer (buf4, sizeof buf4);
9f7194c3 1943
26d08f08
AC
1944 /* Note the interesting effects of this instruction. */
1945 frame_size += prologue_inst_adjust_sp (inst);
1946
1947 /* There are limited ways to store the return pointer into the
1948 stack. */
1949 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1950 {
1951 looking_for_rp = 0;
34f75cc1 1952 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1953 }
dfaf8edb
MK
1954 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1955 {
1956 looking_for_rp = 0;
1957 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1958 }
c4c79048
RC
1959 else if (inst == 0x0fc212c1
1960 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1961 {
1962 looking_for_rp = 0;
34f75cc1 1963 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1964 }
1965
1966 /* Check to see if we saved SP into the stack. This also
1967 happens to indicate the location of the saved frame
1968 pointer. */
1969 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1970 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1971 {
1972 looking_for_sp = 0;
eded0a31 1973 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 1974 }
50b2f48a
RC
1975 else if (inst == 0x08030241) /* copy %r3, %r1 */
1976 {
1977 fp_in_r1 = 1;
1978 }
26d08f08
AC
1979
1980 /* Account for general and floating-point register saves. */
1981 reg = inst_saves_gr (inst);
1982 if (reg >= 3 && reg <= 18
eded0a31 1983 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1984 {
1985 saved_gr_mask &= ~(1 << reg);
abc485a1 1986 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1987 /* stwm with a positive displacement is a _post_
1988 _modify_. */
1989 cache->saved_regs[reg].addr = 0;
1990 else if ((inst & 0xfc00000c) == 0x70000008)
1991 /* A std has explicit post_modify forms. */
1992 cache->saved_regs[reg].addr = 0;
1993 else
1994 {
1995 CORE_ADDR offset;
1996
1997 if ((inst >> 26) == 0x1c)
1998 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
1999 else if ((inst >> 26) == 0x03)
abc485a1 2000 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2001 else
abc485a1 2002 offset = hppa_extract_14 (inst);
26d08f08
AC
2003
2004 /* Handle code with and without frame pointers. */
2005 if (u->Save_SP)
2006 cache->saved_regs[reg].addr = offset;
2007 else
2008 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
2009 }
2010 }
2011
2012 /* GCC handles callee saved FP regs a little differently.
2013
2014 It emits an instruction to put the value of the start of
2015 the FP store area into %r1. It then uses fstds,ma with a
2016 basereg of %r1 for the stores.
2017
2018 HP CC emits them at the current stack pointer modifying the
2019 stack pointer as it stores each register. */
2020
2021 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2022 if ((inst & 0xffffc000) == 0x34610000
2023 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2024 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2025
2026 reg = inst_saves_fr (inst);
2027 if (reg >= 12 && reg <= 21)
2028 {
2029 /* Note +4 braindamage below is necessary because the FP
2030 status registers are internally 8 registers rather than
2031 the expected 4 registers. */
2032 saved_fr_mask &= ~(1 << reg);
2033 if (fp_loc == -1)
2034 {
2035 /* 1st HP CC FP register store. After this
2036 instruction we've set enough state that the GCC and
2037 HPCC code are both handled in the same manner. */
34f75cc1 2038 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2039 fp_loc = 8;
2040 }
2041 else
2042 {
eded0a31 2043 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2044 fp_loc += 8;
2045 }
2046 }
2047
2048 /* Quit if we hit any kind of branch the previous iteration. */
2049 if (final_iteration)
2050 break;
2051 /* We want to look precisely one instruction beyond the branch
2052 if we have not found everything yet. */
2053 if (is_branch (inst))
2054 final_iteration = 1;
2055 }
2056 }
2057
2058 {
2059 /* The frame base always represents the value of %sp at entry to
2060 the current function (and is thus equivalent to the "saved"
2061 stack pointer. */
227e86ad
JB
2062 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2063 HPPA_SP_REGNUM);
ed70ba00 2064 CORE_ADDR fp;
9f7194c3
RC
2065
2066 if (hppa_debug)
2067 fprintf_unfiltered (gdb_stdlog, " (this_sp=0x%s, pc=0x%s, "
2068 "prologue_end=0x%s) ",
2069 paddr_nz (this_sp),
227e86ad 2070 paddr_nz (get_frame_pc (this_frame)),
9f7194c3
RC
2071 paddr_nz (prologue_end));
2072
ed70ba00
RC
2073 /* Check to see if a frame pointer is available, and use it for
2074 frame unwinding if it is.
2075
2076 There are some situations where we need to rely on the frame
2077 pointer to do stack unwinding. For example, if a function calls
2078 alloca (), the stack pointer can get adjusted inside the body of
2079 the function. In this case, the ABI requires that the compiler
2080 maintain a frame pointer for the function.
2081
2082 The unwind record has a flag (alloca_frame) that indicates that
2083 a function has a variable frame; unfortunately, gcc/binutils
2084 does not set this flag. Instead, whenever a frame pointer is used
2085 and saved on the stack, the Save_SP flag is set. We use this to
2086 decide whether to use the frame pointer for unwinding.
2087
ed70ba00
RC
2088 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2089 instead of Save_SP. */
2090
227e86ad 2091 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2092
6fcecea0 2093 if (u->alloca_frame)
46acf081 2094 fp -= u->Total_frame_size << 3;
ed70ba00 2095
227e86ad 2096 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2097 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2098 {
2099 cache->base = fp;
2100
2101 if (hppa_debug)
9ed5ba24 2102 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [frame pointer]",
ed70ba00
RC
2103 paddr_nz (cache->base));
2104 }
1658da49
RC
2105 else if (u->Save_SP
2106 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2107 {
9f7194c3
RC
2108 /* Both we're expecting the SP to be saved and the SP has been
2109 saved. The entry SP value is saved at this frame's SP
2110 address. */
819844ad 2111 cache->base = read_memory_integer
65c5db89 2112 (this_sp, gdbarch_ptr_bit (gdbarch) / 8);
9f7194c3
RC
2113
2114 if (hppa_debug)
9ed5ba24 2115 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [saved]",
9f7194c3 2116 paddr_nz (cache->base));
9f7194c3 2117 }
26d08f08 2118 else
9f7194c3 2119 {
1658da49
RC
2120 /* The prologue has been slowly allocating stack space. Adjust
2121 the SP back. */
2122 cache->base = this_sp - frame_size;
9f7194c3 2123 if (hppa_debug)
9ed5ba24 2124 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [unwind adjust]",
9f7194c3
RC
2125 paddr_nz (cache->base));
2126
2127 }
eded0a31 2128 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2129 }
2130
412275d5
AC
2131 /* The PC is found in the "return register", "Millicode" uses "r31"
2132 as the return register while normal code uses "rp". */
26d08f08 2133 if (u->Millicode)
9f7194c3 2134 {
5859efe5 2135 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2136 {
2137 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2138 if (hppa_debug)
2139 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2140 }
9f7194c3
RC
2141 else
2142 {
227e86ad 2143 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2144 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2145 if (hppa_debug)
2146 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2147 }
2148 }
26d08f08 2149 else
9f7194c3 2150 {
34f75cc1 2151 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2152 {
2153 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2154 cache->saved_regs[HPPA_RP_REGNUM];
2155 if (hppa_debug)
2156 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2157 }
9f7194c3
RC
2158 else
2159 {
227e86ad
JB
2160 ULONGEST rp = get_frame_register_unsigned (this_frame,
2161 HPPA_RP_REGNUM);
34f75cc1 2162 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2163 if (hppa_debug)
2164 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2165 }
2166 }
26d08f08 2167
50b2f48a
RC
2168 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2169 frame. However, there is a one-insn window where we haven't saved it
2170 yet, but we've already clobbered it. Detect this case and fix it up.
2171
2172 The prologue sequence for frame-pointer functions is:
2173 0: stw %rp, -20(%sp)
2174 4: copy %r3, %r1
2175 8: copy %sp, %r3
2176 c: stw,ma %r1, XX(%sp)
2177
2178 So if we are at offset c, the r3 value that we want is not yet saved
2179 on the stack, but it's been overwritten. The prologue analyzer will
2180 set fp_in_r1 when it sees the copy insn so we know to get the value
2181 from r1 instead. */
2182 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2183 && fp_in_r1)
2184 {
227e86ad 2185 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2186 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2187 }
1658da49 2188
26d08f08
AC
2189 {
2190 /* Convert all the offsets into addresses. */
2191 int reg;
65c5db89 2192 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2193 {
2194 if (trad_frame_addr_p (cache->saved_regs, reg))
2195 cache->saved_regs[reg].addr += cache->base;
2196 }
2197 }
2198
f77a2124 2199 {
f77a2124
RC
2200 struct gdbarch_tdep *tdep;
2201
f77a2124
RC
2202 tdep = gdbarch_tdep (gdbarch);
2203
2204 if (tdep->unwind_adjust_stub)
227e86ad 2205 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2206 }
2207
369aa520
RC
2208 if (hppa_debug)
2209 fprintf_unfiltered (gdb_stdlog, "base=0x%s }",
2210 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2211 return (*this_cache);
2212}
2213
2214static void
227e86ad
JB
2215hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2216 struct frame_id *this_id)
26d08f08 2217{
d5c27f81 2218 struct hppa_frame_cache *info;
227e86ad 2219 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2220 struct unwind_table_entry *u;
2221
227e86ad
JB
2222 info = hppa_frame_cache (this_frame, this_cache);
2223 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2224
2225 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2226}
2227
227e86ad
JB
2228static struct value *
2229hppa_frame_prev_register (struct frame_info *this_frame,
2230 void **this_cache, int regnum)
26d08f08 2231{
227e86ad
JB
2232 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2233
2234 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
2235}
2236
2237static int
2238hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2239 struct frame_info *this_frame, void **this_cache)
2240{
2241 if (hppa_find_unwind_entry_in_block (this_frame))
2242 return 1;
2243
2244 return 0;
0da28f8a
RC
2245}
2246
2247static const struct frame_unwind hppa_frame_unwind =
2248{
2249 NORMAL_FRAME,
2250 hppa_frame_this_id,
227e86ad
JB
2251 hppa_frame_prev_register,
2252 NULL,
2253 hppa_frame_unwind_sniffer
0da28f8a
RC
2254};
2255
0da28f8a
RC
2256/* This is a generic fallback frame unwinder that kicks in if we fail all
2257 the other ones. Normally we would expect the stub and regular unwinder
2258 to work, but in some cases we might hit a function that just doesn't
2259 have any unwind information available. In this case we try to do
2260 unwinding solely based on code reading. This is obviously going to be
2261 slow, so only use this as a last resort. Currently this will only
2262 identify the stack and pc for the frame. */
2263
2264static struct hppa_frame_cache *
227e86ad 2265hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a
RC
2266{
2267 struct hppa_frame_cache *cache;
4ba6a975
MK
2268 unsigned int frame_size = 0;
2269 int found_rp = 0;
2270 CORE_ADDR start_pc;
0da28f8a 2271
d5c27f81 2272 if (hppa_debug)
4ba6a975
MK
2273 fprintf_unfiltered (gdb_stdlog,
2274 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2275 frame_relative_level (this_frame));
d5c27f81 2276
0da28f8a
RC
2277 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2278 (*this_cache) = cache;
227e86ad 2279 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2280
227e86ad 2281 start_pc = get_frame_func (this_frame);
4ba6a975 2282 if (start_pc)
0da28f8a 2283 {
227e86ad 2284 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2285 CORE_ADDR pc;
0da28f8a 2286
4ba6a975
MK
2287 for (pc = start_pc; pc < cur_pc; pc += 4)
2288 {
2289 unsigned int insn;
0da28f8a 2290
4ba6a975
MK
2291 insn = read_memory_unsigned_integer (pc, 4);
2292 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2293
4ba6a975
MK
2294 /* There are limited ways to store the return pointer into the
2295 stack. */
2296 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2297 {
2298 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2299 found_rp = 1;
2300 }
c4c79048
RC
2301 else if (insn == 0x0fc212c1
2302 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2303 {
2304 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2305 found_rp = 1;
2306 }
2307 }
412275d5 2308 }
0da28f8a 2309
d5c27f81 2310 if (hppa_debug)
4ba6a975
MK
2311 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2312 frame_size, found_rp);
d5c27f81 2313
227e86ad 2314 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2315 cache->base -= frame_size;
6d1be3f1 2316 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2317
2318 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2319 {
2320 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2321 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2322 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2323 }
412275d5
AC
2324 else
2325 {
4ba6a975 2326 ULONGEST rp;
227e86ad 2327 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2328 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2329 }
0da28f8a
RC
2330
2331 return cache;
26d08f08
AC
2332}
2333
0da28f8a 2334static void
227e86ad 2335hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2336 struct frame_id *this_id)
2337{
2338 struct hppa_frame_cache *info =
227e86ad
JB
2339 hppa_fallback_frame_cache (this_frame, this_cache);
2340
2341 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2342}
2343
227e86ad
JB
2344static struct value *
2345hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2346 void **this_cache, int regnum)
0da28f8a
RC
2347{
2348 struct hppa_frame_cache *info =
227e86ad
JB
2349 hppa_fallback_frame_cache (this_frame, this_cache);
2350
2351 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
0da28f8a
RC
2352}
2353
2354static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2355{
2356 NORMAL_FRAME,
0da28f8a 2357 hppa_fallback_frame_this_id,
227e86ad
JB
2358 hppa_fallback_frame_prev_register,
2359 NULL,
2360 default_frame_sniffer
26d08f08
AC
2361};
2362
7f07c5b6
RC
2363/* Stub frames, used for all kinds of call stubs. */
2364struct hppa_stub_unwind_cache
2365{
2366 CORE_ADDR base;
2367 struct trad_frame_saved_reg *saved_regs;
2368};
2369
2370static struct hppa_stub_unwind_cache *
227e86ad 2371hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2372 void **this_cache)
2373{
227e86ad 2374 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2375 struct hppa_stub_unwind_cache *info;
22b0923d 2376 struct unwind_table_entry *u;
7f07c5b6
RC
2377
2378 if (*this_cache)
2379 return *this_cache;
2380
2381 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2382 *this_cache = info;
227e86ad 2383 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2384
227e86ad 2385 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2386
090ccbb7 2387 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2388 {
2389 /* HPUX uses export stubs in function calls; the export stub clobbers
2390 the return value of the caller, and, later restores it from the
2391 stack. */
227e86ad 2392 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2393
2394 if (u && u->stub_unwind.stub_type == EXPORT)
2395 {
2396 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2397
2398 return info;
2399 }
2400 }
2401
2402 /* By default we assume that stubs do not change the rp. */
2403 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2404
7f07c5b6
RC
2405 return info;
2406}
2407
2408static void
227e86ad 2409hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2410 void **this_prologue_cache,
2411 struct frame_id *this_id)
2412{
2413 struct hppa_stub_unwind_cache *info
227e86ad 2414 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2415
2416 if (info)
227e86ad 2417 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
f1b38a57
RC
2418 else
2419 *this_id = null_frame_id;
7f07c5b6
RC
2420}
2421
227e86ad
JB
2422static struct value *
2423hppa_stub_frame_prev_register (struct frame_info *this_frame,
2424 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2425{
2426 struct hppa_stub_unwind_cache *info
227e86ad 2427 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2428
227e86ad 2429 if (info == NULL)
8a3fe4f8 2430 error (_("Requesting registers from null frame."));
7f07c5b6 2431
227e86ad
JB
2432 return hppa_frame_prev_register_helper (this_frame, info->saved_regs, regnum);
2433}
7f07c5b6 2434
227e86ad
JB
2435static int
2436hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2437 struct frame_info *this_frame,
2438 void **this_cache)
7f07c5b6 2439{
227e86ad
JB
2440 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2441 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2442 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2443
6d1be3f1 2444 if (pc == 0
84674fe1
AC
2445 || (tdep->in_solib_call_trampoline != NULL
2446 && tdep->in_solib_call_trampoline (pc, NULL))
464963c9 2447 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2448 return 1;
2449 return 0;
7f07c5b6
RC
2450}
2451
227e86ad
JB
2452static const struct frame_unwind hppa_stub_frame_unwind = {
2453 NORMAL_FRAME,
2454 hppa_stub_frame_this_id,
2455 hppa_stub_frame_prev_register,
2456 NULL,
2457 hppa_stub_unwind_sniffer
2458};
2459
26d08f08 2460static struct frame_id
227e86ad 2461hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2462{
227e86ad
JB
2463 return frame_id_build (get_frame_register_unsigned (this_frame,
2464 HPPA_SP_REGNUM),
2465 get_frame_pc (this_frame));
26d08f08
AC
2466}
2467
cc72850f 2468CORE_ADDR
26d08f08
AC
2469hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2470{
fe46cd3a
RC
2471 ULONGEST ipsw;
2472 CORE_ADDR pc;
2473
cc72850f
MK
2474 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2475 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2476
2477 /* If the current instruction is nullified, then we are effectively
2478 still executing the previous instruction. Pretend we are still
cc72850f
MK
2479 there. This is needed when single stepping; if the nullified
2480 instruction is on a different line, we don't want GDB to think
2481 we've stepped onto that line. */
fe46cd3a
RC
2482 if (ipsw & 0x00200000)
2483 pc -= 4;
2484
cc72850f 2485 return pc & ~0x3;
26d08f08
AC
2486}
2487
ff644745
JB
2488/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2489 Return NULL if no such symbol was found. */
2490
2491struct minimal_symbol *
2492hppa_lookup_stub_minimal_symbol (const char *name,
2493 enum unwind_stub_types stub_type)
2494{
2495 struct objfile *objfile;
2496 struct minimal_symbol *msym;
2497
2498 ALL_MSYMBOLS (objfile, msym)
2499 {
2500 if (strcmp (SYMBOL_LINKAGE_NAME (msym), name) == 0)
2501 {
2502 struct unwind_table_entry *u;
2503
2504 u = find_unwind_entry (SYMBOL_VALUE (msym));
2505 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2506 return msym;
2507 }
2508 }
2509
2510 return NULL;
2511}
2512
c906108c 2513static void
fba45db2 2514unwind_command (char *exp, int from_tty)
c906108c
SS
2515{
2516 CORE_ADDR address;
2517 struct unwind_table_entry *u;
2518
2519 /* If we have an expression, evaluate it and use it as the address. */
2520
2521 if (exp != 0 && *exp != 0)
2522 address = parse_and_eval_address (exp);
2523 else
2524 return;
2525
2526 u = find_unwind_entry (address);
2527
2528 if (!u)
2529 {
2530 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2531 return;
2532 }
2533
99d64d77 2534 printf_unfiltered ("unwind_table_entry (0x%lx):\n", (unsigned long)u);
c906108c
SS
2535
2536 printf_unfiltered ("\tregion_start = ");
2537 print_address (u->region_start, gdb_stdout);
d5c27f81 2538 gdb_flush (gdb_stdout);
c906108c
SS
2539
2540 printf_unfiltered ("\n\tregion_end = ");
2541 print_address (u->region_end, gdb_stdout);
d5c27f81 2542 gdb_flush (gdb_stdout);
c906108c 2543
c906108c 2544#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2545
2546 printf_unfiltered ("\n\tflags =");
2547 pif (Cannot_unwind);
2548 pif (Millicode);
2549 pif (Millicode_save_sr0);
2550 pif (Entry_SR);
2551 pif (Args_stored);
2552 pif (Variable_Frame);
2553 pif (Separate_Package_Body);
2554 pif (Frame_Extension_Millicode);
2555 pif (Stack_Overflow_Check);
2556 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2557 pif (sr4export);
2558 pif (cxx_info);
2559 pif (cxx_try_catch);
2560 pif (sched_entry_seq);
c906108c
SS
2561 pif (Save_SP);
2562 pif (Save_RP);
2563 pif (Save_MRP_in_frame);
6fcecea0 2564 pif (save_r19);
c906108c
SS
2565 pif (Cleanup_defined);
2566 pif (MPE_XL_interrupt_marker);
2567 pif (HP_UX_interrupt_marker);
2568 pif (Large_frame);
6fcecea0 2569 pif (alloca_frame);
c906108c
SS
2570
2571 putchar_unfiltered ('\n');
2572
c906108c 2573#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2574
2575 pin (Region_description);
2576 pin (Entry_FR);
2577 pin (Entry_GR);
2578 pin (Total_frame_size);
57dac9e1
RC
2579
2580 if (u->stub_unwind.stub_type)
2581 {
2582 printf_unfiltered ("\tstub type = ");
2583 switch (u->stub_unwind.stub_type)
2584 {
2585 case LONG_BRANCH:
2586 printf_unfiltered ("long branch\n");
2587 break;
2588 case PARAMETER_RELOCATION:
2589 printf_unfiltered ("parameter relocation\n");
2590 break;
2591 case EXPORT:
2592 printf_unfiltered ("export\n");
2593 break;
2594 case IMPORT:
2595 printf_unfiltered ("import\n");
2596 break;
2597 case IMPORT_SHLIB:
2598 printf_unfiltered ("import shlib\n");
2599 break;
2600 default:
2601 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2602 }
2603 }
c906108c 2604}
c906108c 2605
38ca4e0c
MK
2606/* Return the GDB type object for the "standard" data type of data in
2607 register REGNUM. */
d709c020 2608
eded0a31 2609static struct type *
38ca4e0c 2610hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2611{
38ca4e0c 2612 if (regnum < HPPA_FP4_REGNUM)
eded0a31 2613 return builtin_type_uint32;
d709c020 2614 else
8da61cc4 2615 return builtin_type_ieee_single;
d709c020
JB
2616}
2617
eded0a31 2618static struct type *
38ca4e0c 2619hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2620{
38ca4e0c 2621 if (regnum < HPPA64_FP4_REGNUM)
eded0a31 2622 return builtin_type_uint64;
3ff7cf9e 2623 else
8da61cc4 2624 return builtin_type_ieee_double;
3ff7cf9e
JB
2625}
2626
38ca4e0c
MK
2627/* Return non-zero if REGNUM is not a register available to the user
2628 through ptrace/ttrace. */
d709c020 2629
8d153463 2630static int
64a3914f 2631hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2632{
2633 return (regnum == 0
34f75cc1
RC
2634 || regnum == HPPA_PCSQ_HEAD_REGNUM
2635 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2636 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2637}
d709c020 2638
d037d088 2639static int
64a3914f 2640hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2641{
2642 /* cr26 and cr27 are readable (but not writable) from userspace. */
2643 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2644 return 0;
2645 else
64a3914f 2646 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2647}
2648
38ca4e0c 2649static int
64a3914f 2650hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2651{
2652 return (regnum == 0
2653 || regnum == HPPA_PCSQ_HEAD_REGNUM
2654 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2655 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2656}
2657
d037d088 2658static int
64a3914f 2659hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2660{
2661 /* cr26 and cr27 are readable (but not writable) from userspace. */
2662 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2663 return 0;
2664 else
64a3914f 2665 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2666}
2667
8d153463 2668static CORE_ADDR
24568a2c 2669hppa_smash_text_address (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2670{
2671 /* The low two bits of the PC on the PA contain the privilege level.
2672 Some genius implementing a (non-GCC) compiler apparently decided
2673 this means that "addresses" in a text section therefore include a
2674 privilege level, and thus symbol tables should contain these bits.
2675 This seems like a bonehead thing to do--anyway, it seems to work
2676 for our purposes to just ignore those bits. */
2677
2678 return (addr &= ~0x3);
2679}
2680
e127f0db
MK
2681/* Get the ARGIth function argument for the current function. */
2682
4a302917 2683static CORE_ADDR
143985b7
AF
2684hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2685 struct type *type)
2686{
e127f0db 2687 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2688}
2689
0f8d9d59
RC
2690static void
2691hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2692 int regnum, gdb_byte *buf)
0f8d9d59
RC
2693{
2694 ULONGEST tmp;
2695
2696 regcache_raw_read_unsigned (regcache, regnum, &tmp);
34f75cc1 2697 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
0f8d9d59 2698 tmp &= ~0x3;
e127f0db 2699 store_unsigned_integer (buf, sizeof tmp, tmp);
0f8d9d59
RC
2700}
2701
d49771ef 2702static CORE_ADDR
e38c262f 2703hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2704{
2705 return 0;
2706}
2707
227e86ad
JB
2708struct value *
2709hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2710 struct trad_frame_saved_reg saved_regs[],
227e86ad 2711 int regnum)
0da28f8a 2712{
227e86ad 2713 struct gdbarch *arch = get_frame_arch (this_frame);
8f4e467c 2714
8693c419
MK
2715 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2716 {
227e86ad
JB
2717 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2718 CORE_ADDR pc;
2719 struct value *pcoq_val =
2720 trad_frame_get_prev_register (this_frame, saved_regs,
2721 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2722
227e86ad
JB
2723 pc = extract_unsigned_integer (value_contents_all (pcoq_val), size);
2724 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2725 }
0da28f8a 2726
cc72850f
MK
2727 /* Make sure the "flags" register is zero in all unwound frames.
2728 The "flags" registers is a HP-UX specific wart, and only the code
2729 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2730 with it here. This shouldn't affect other systems since those
2731 should provide zero for the "flags" register anyway. */
2732 if (regnum == HPPA_FLAGS_REGNUM)
227e86ad 2733 return frame_unwind_got_constant (this_frame, regnum, 0);
cc72850f 2734
227e86ad 2735 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2736}
8693c419 2737\f
0da28f8a 2738
34f55018
MK
2739/* An instruction to match. */
2740struct insn_pattern
2741{
2742 unsigned int data; /* See if it matches this.... */
2743 unsigned int mask; /* ... with this mask. */
2744};
2745
2746/* See bfd/elf32-hppa.c */
2747static struct insn_pattern hppa_long_branch_stub[] = {
2748 /* ldil LR'xxx,%r1 */
2749 { 0x20200000, 0xffe00000 },
2750 /* be,n RR'xxx(%sr4,%r1) */
2751 { 0xe0202002, 0xffe02002 },
2752 { 0, 0 }
2753};
2754
2755static struct insn_pattern hppa_long_branch_pic_stub[] = {
2756 /* b,l .+8, %r1 */
2757 { 0xe8200000, 0xffe00000 },
2758 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2759 { 0x28200000, 0xffe00000 },
2760 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2761 { 0xe0202002, 0xffe02002 },
2762 { 0, 0 }
2763};
2764
2765static struct insn_pattern hppa_import_stub[] = {
2766 /* addil LR'xxx, %dp */
2767 { 0x2b600000, 0xffe00000 },
2768 /* ldw RR'xxx(%r1), %r21 */
2769 { 0x48350000, 0xffffb000 },
2770 /* bv %r0(%r21) */
2771 { 0xeaa0c000, 0xffffffff },
2772 /* ldw RR'xxx+4(%r1), %r19 */
2773 { 0x48330000, 0xffffb000 },
2774 { 0, 0 }
2775};
2776
2777static struct insn_pattern hppa_import_pic_stub[] = {
2778 /* addil LR'xxx,%r19 */
2779 { 0x2a600000, 0xffe00000 },
2780 /* ldw RR'xxx(%r1),%r21 */
2781 { 0x48350000, 0xffffb000 },
2782 /* bv %r0(%r21) */
2783 { 0xeaa0c000, 0xffffffff },
2784 /* ldw RR'xxx+4(%r1),%r19 */
2785 { 0x48330000, 0xffffb000 },
2786 { 0, 0 },
2787};
2788
2789static struct insn_pattern hppa_plt_stub[] = {
2790 /* b,l 1b, %r20 - 1b is 3 insns before here */
2791 { 0xea9f1fdd, 0xffffffff },
2792 /* depi 0,31,2,%r20 */
2793 { 0xd6801c1e, 0xffffffff },
2794 { 0, 0 }
2795};
2796
2797static struct insn_pattern hppa_sigtramp[] = {
2798 /* ldi 0, %r25 or ldi 1, %r25 */
2799 { 0x34190000, 0xfffffffd },
2800 /* ldi __NR_rt_sigreturn, %r20 */
2801 { 0x3414015a, 0xffffffff },
2802 /* be,l 0x100(%sr2, %r0), %sr0, %r31 */
2803 { 0xe4008200, 0xffffffff },
2804 /* nop */
2805 { 0x08000240, 0xffffffff },
2806 { 0, 0 }
2807};
2808
2809/* Maximum number of instructions on the patterns above. */
2810#define HPPA_MAX_INSN_PATTERN_LEN 4
2811
2812/* Return non-zero if the instructions at PC match the series
2813 described in PATTERN, or zero otherwise. PATTERN is an array of
2814 'struct insn_pattern' objects, terminated by an entry whose mask is
2815 zero.
2816
2817 When the match is successful, fill INSN[i] with what PATTERN[i]
2818 matched. */
2819
2820static int
2821hppa_match_insns (CORE_ADDR pc, struct insn_pattern *pattern,
2822 unsigned int *insn)
2823{
2824 CORE_ADDR npc = pc;
2825 int i;
2826
2827 for (i = 0; pattern[i].mask; i++)
2828 {
2829 gdb_byte buf[HPPA_INSN_SIZE];
2830
8defab1a 2831 target_read_memory (npc, buf, HPPA_INSN_SIZE);
34f55018
MK
2832 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE);
2833 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2834 npc += 4;
2835 else
2836 return 0;
2837 }
2838
2839 return 1;
2840}
2841
2842/* This relaxed version of the insstruction matcher allows us to match
2843 from somewhere inside the pattern, by looking backwards in the
2844 instruction scheme. */
2845
2846static int
2847hppa_match_insns_relaxed (CORE_ADDR pc, struct insn_pattern *pattern,
2848 unsigned int *insn)
2849{
2850 int offset, len = 0;
2851
2852 while (pattern[len].mask)
2853 len++;
2854
2855 for (offset = 0; offset < len; offset++)
2856 if (hppa_match_insns (pc - offset * HPPA_INSN_SIZE, pattern, insn))
2857 return 1;
2858
2859 return 0;
2860}
2861
2862static int
2863hppa_in_dyncall (CORE_ADDR pc)
2864{
2865 struct unwind_table_entry *u;
2866
2867 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2868 if (!u)
2869 return 0;
2870
2871 return (pc >= u->region_start && pc <= u->region_end);
2872}
2873
2874int
2875hppa_in_solib_call_trampoline (CORE_ADDR pc, char *name)
2876{
2877 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2878 struct unwind_table_entry *u;
2879
2880 if (in_plt_section (pc, name) || hppa_in_dyncall (pc))
2881 return 1;
2882
2883 /* The GNU toolchain produces linker stubs without unwind
2884 information. Since the pattern matching for linker stubs can be
2885 quite slow, so bail out if we do have an unwind entry. */
2886
2887 u = find_unwind_entry (pc);
806e23c0 2888 if (u != NULL)
34f55018
MK
2889 return 0;
2890
2891 return (hppa_match_insns_relaxed (pc, hppa_import_stub, insn)
2892 || hppa_match_insns_relaxed (pc, hppa_import_pic_stub, insn)
2893 || hppa_match_insns_relaxed (pc, hppa_long_branch_stub, insn)
2894 || hppa_match_insns_relaxed (pc, hppa_long_branch_pic_stub, insn));
2895}
2896
2897/* This code skips several kind of "trampolines" used on PA-RISC
2898 systems: $$dyncall, import stubs and PLT stubs. */
2899
2900CORE_ADDR
52f729a7 2901hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2902{
0dfff4cb
UW
2903 struct gdbarch *gdbarch = get_frame_arch (frame);
2904 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2905
34f55018
MK
2906 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2907 int dp_rel;
2908
2909 /* $$dyncall handles both PLABELs and direct addresses. */
2910 if (hppa_in_dyncall (pc))
2911 {
52f729a7 2912 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2913
2914 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2915 if (pc & 0x2)
0dfff4cb 2916 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2917
2918 return pc;
2919 }
2920
2921 dp_rel = hppa_match_insns (pc, hppa_import_stub, insn);
2922 if (dp_rel || hppa_match_insns (pc, hppa_import_pic_stub, insn))
2923 {
2924 /* Extract the target address from the addil/ldw sequence. */
2925 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2926
2927 if (dp_rel)
52f729a7 2928 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2929 else
52f729a7 2930 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2931
2932 /* fallthrough */
2933 }
2934
2935 if (in_plt_section (pc, NULL))
2936 {
0dfff4cb 2937 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2938
2939 /* If the PLT slot has not yet been resolved, the target will be
2940 the PLT stub. */
2941 if (in_plt_section (pc, NULL))
2942 {
2943 /* Sanity check: are we pointing to the PLT stub? */
2944 if (!hppa_match_insns (pc, hppa_plt_stub, insn))
2945 {
2946 warning (_("Cannot resolve PLT stub at 0x%s."), paddr_nz (pc));
2947 return 0;
2948 }
2949
2950 /* This should point to the fixup routine. */
0dfff4cb 2951 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2952 }
2953 }
2954
2955 return pc;
2956}
2957\f
2958
8e8b2dba
MC
2959/* Here is a table of C type sizes on hppa with various compiles
2960 and options. I measured this on PA 9000/800 with HP-UX 11.11
2961 and these compilers:
2962
2963 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2964 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2965 /opt/aCC/bin/aCC B3910B A.03.45
2966 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2967
2968 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2969 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2970 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2971 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2972 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2973 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2974 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2975 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2976
2977 Each line is:
2978
2979 compiler and options
2980 char, short, int, long, long long
2981 float, double, long double
2982 char *, void (*)()
2983
2984 So all these compilers use either ILP32 or LP64 model.
2985 TODO: gcc has more options so it needs more investigation.
2986
a2379359
MC
2987 For floating point types, see:
2988
2989 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2990 HP-UX floating-point guide, hpux 11.00
2991
8e8b2dba
MC
2992 -- chastain 2003-12-18 */
2993
e6e68f1f
JB
2994static struct gdbarch *
2995hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2996{
3ff7cf9e 2997 struct gdbarch_tdep *tdep;
e6e68f1f 2998 struct gdbarch *gdbarch;
59623e27
JB
2999
3000 /* Try to determine the ABI of the object we are loading. */
4be87837 3001 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 3002 {
4be87837
DJ
3003 /* If it's a SOM file, assume it's HP/UX SOM. */
3004 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
3005 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3006 }
e6e68f1f
JB
3007
3008 /* find a candidate among the list of pre-declared architectures. */
3009 arches = gdbarch_list_lookup_by_info (arches, &info);
3010 if (arches != NULL)
3011 return (arches->gdbarch);
3012
3013 /* If none found, then allocate and initialize one. */
fdd72f95 3014 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
3015 gdbarch = gdbarch_alloc (&info, tdep);
3016
3017 /* Determine from the bfd_arch_info structure if we are dealing with
3018 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3019 then default to a 32bit machine. */
3020 if (info.bfd_arch_info != NULL)
3021 tdep->bytes_per_address =
3022 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3023 else
3024 tdep->bytes_per_address = 4;
3025
d49771ef
RC
3026 tdep->find_global_pointer = hppa_find_global_pointer;
3027
3ff7cf9e
JB
3028 /* Some parts of the gdbarch vector depend on whether we are running
3029 on a 32 bits or 64 bits target. */
3030 switch (tdep->bytes_per_address)
3031 {
3032 case 4:
3033 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3034 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3035 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3036 set_gdbarch_cannot_store_register (gdbarch,
3037 hppa32_cannot_store_register);
3038 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3039 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3040 break;
3041 case 8:
3042 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3043 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3044 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3045 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3046 set_gdbarch_cannot_store_register (gdbarch,
3047 hppa64_cannot_store_register);
3048 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3049 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3050 break;
3051 default:
e2e0b3e5 3052 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3053 tdep->bytes_per_address);
3054 }
3055
3ff7cf9e 3056 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3057 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3058
8e8b2dba
MC
3059 /* The following gdbarch vector elements are the same in both ILP32
3060 and LP64, but might show differences some day. */
3061 set_gdbarch_long_long_bit (gdbarch, 64);
3062 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3063 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3064
3ff7cf9e
JB
3065 /* The following gdbarch vector elements do not depend on the address
3066 size, or in any other gdbarch element previously set. */
60383d10 3067 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3068 set_gdbarch_in_function_epilogue_p (gdbarch,
3069 hppa_in_function_epilogue_p);
a2a84a72 3070 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3071 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3072 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
b6fbdd1d 3073 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
3074 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
3075 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3076 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3077 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3078
143985b7
AF
3079 /* Helper for function argument information. */
3080 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3081
36482093
AC
3082 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3083
3a3bc038
AC
3084 /* When a hardware watchpoint triggers, we'll move the inferior past
3085 it by removing all eventpoints; stepping past the instruction
3086 that caused the trigger; reinserting eventpoints; and checking
3087 whether any watched location changed. */
3088 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3089
5979bc46 3090 /* Inferior function call methods. */
fca7aa43 3091 switch (tdep->bytes_per_address)
5979bc46 3092 {
fca7aa43
AC
3093 case 4:
3094 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3095 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3096 set_gdbarch_convert_from_func_ptr_addr
3097 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3098 break;
3099 case 8:
782eae8b
AC
3100 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3101 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3102 break;
782eae8b 3103 default:
e2e0b3e5 3104 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3105 }
3106
3107 /* Struct return methods. */
fca7aa43 3108 switch (tdep->bytes_per_address)
fad850b2 3109 {
fca7aa43
AC
3110 case 4:
3111 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3112 break;
3113 case 8:
782eae8b 3114 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3115 break;
fca7aa43 3116 default:
e2e0b3e5 3117 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3118 }
7f07c5b6 3119
85f4f2d8 3120 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3121 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3122
5979bc46 3123 /* Frame unwind methods. */
227e86ad 3124 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3125 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3126
50306a9d
RC
3127 /* Hook in ABI-specific overrides, if they have been registered. */
3128 gdbarch_init_osabi (info, gdbarch);
3129
7f07c5b6 3130 /* Hook in the default unwinders. */
227e86ad
JB
3131 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3132 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3133 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3134
e6e68f1f
JB
3135 return gdbarch;
3136}
3137
3138static void
464963c9 3139hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3140{
464963c9 3141 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3142
3143 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3144 tdep->bytes_per_address);
3145 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3146}
3147
4facf7e8
JB
3148void
3149_initialize_hppa_tdep (void)
3150{
3151 struct cmd_list_element *c;
4facf7e8 3152
e6e68f1f 3153 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3154
7c46b9fb
RC
3155 hppa_objfile_priv_data = register_objfile_data ();
3156
4facf7e8 3157 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3158 _("Print unwind table entry at given address."),
4facf7e8
JB
3159 &maintenanceprintlist);
3160
369aa520 3161 /* Debug this files internals. */
7915a72c
AC
3162 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3163Set whether hppa target specific debugging information should be displayed."),
3164 _("\
3165Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3166This flag controls whether hppa target specific debugging information is\n\
3167displayed. This information is particularly useful for debugging frame\n\
7915a72c 3168unwinding problems."),
2c5b56ce 3169 NULL,
7915a72c 3170 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3171 &setdebuglist, &showdebuglist);
4facf7e8 3172}
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