* hppab-nat.c (_initialize_kernel_u_addr): Delete unwanted functions.
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
66a1aa07
SG
1/* Machine-dependent code which would otherwise be in inflow.c and core.c,
2 for GDB, the GNU debugger. This code is for the HP PA-RISC cpu.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8This file is part of GDB.
9
10This program is free software; you can redistribute it and/or modify
11it under the terms of the GNU General Public License as published by
12the Free Software Foundation; either version 2 of the License, or
13(at your option) any later version.
14
15This program is distributed in the hope that it will be useful,
16but WITHOUT ANY WARRANTY; without even the implied warranty of
17MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18GNU General Public License for more details.
19
20You should have received a copy of the GNU General Public License
21along with this program; if not, write to the Free Software
22Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
23
24#include "defs.h"
25#include "frame.h"
26#include "inferior.h"
27#include "value.h"
28
29/* For argument passing to the inferior */
30#include "symtab.h"
31
32#ifdef USG
33#include <sys/types.h>
34#endif
35
36#include <sys/param.h>
37#include <sys/dir.h>
38#include <signal.h>
39#include <sys/ioctl.h>
40
41#ifdef COFF_ENCAPSULATE
42#include "a.out.encap.h"
43#else
44#include <a.out.h>
45#endif
46#ifndef N_SET_MAGIC
47#define N_SET_MAGIC(exec, val) ((exec).a_magic = (val))
48#endif
49
50/*#include <sys/user.h> After a.out.h */
51#include <sys/file.h>
52#include <sys/stat.h>
53#include <machine/psl.h>
54#include "wait.h"
55
56#include "gdbcore.h"
57#include "gdbcmd.h"
58#include "target.h"
59#include "symfile.h"
60#include "objfiles.h"
61
62static int restore_pc_queue PARAMS ((struct frame_saved_regs *fsr));
63static int hppa_alignof PARAMS ((struct type *arg));
8fa74880 64CORE_ADDR frame_saved_pc PARAMS ((FRAME frame));
c598654a
JL
65static int prologue_inst_adjust_sp PARAMS ((unsigned long));
66static int is_branch PARAMS ((unsigned long));
67static int inst_saves_gr PARAMS ((unsigned long));
68static int inst_saves_fr PARAMS ((unsigned long));
66a1aa07
SG
69
70\f
71/* Routines to extract various sized constants out of hppa
72 instructions. */
73
74/* This assumes that no garbage lies outside of the lower bits of
75 value. */
76
77int
78sign_extend (val, bits)
79 unsigned val, bits;
80{
81 return (int)(val >> bits - 1 ? (-1 << bits) | val : val);
82}
83
84/* For many immediate values the sign bit is the low bit! */
85
86int
87low_sign_extend (val, bits)
88 unsigned val, bits;
89{
90 return (int)((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
91}
92/* extract the immediate field from a ld{bhw}s instruction */
93
94unsigned
95get_field (val, from, to)
96 unsigned val, from, to;
97{
98 val = val >> 31 - to;
99 return val & ((1 << 32 - from) - 1);
100}
101
102unsigned
103set_field (val, from, to, new_val)
104 unsigned *val, from, to;
105{
106 unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
107 return *val = *val & mask | (new_val << (31 - from));
108}
109
110/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
111
112extract_3 (word)
113 unsigned word;
114{
115 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
116}
117
118extract_5_load (word)
119 unsigned word;
120{
121 return low_sign_extend (word >> 16 & MASK_5, 5);
122}
123
124/* extract the immediate field from a st{bhw}s instruction */
125
126int
127extract_5_store (word)
128 unsigned word;
129{
130 return low_sign_extend (word & MASK_5, 5);
131}
132
68c8d698
SG
133/* extract the immediate field from a break instruction */
134
135unsigned
136extract_5r_store (word)
137 unsigned word;
138{
139 return (word & MASK_5);
140}
141
142/* extract the immediate field from a {sr}sm instruction */
143
144unsigned
145extract_5R_store (word)
146 unsigned word;
147{
148 return (word >> 16 & MASK_5);
149}
150
66a1aa07
SG
151/* extract an 11 bit immediate field */
152
153int
154extract_11 (word)
155 unsigned word;
156{
157 return low_sign_extend (word & MASK_11, 11);
158}
159
160/* extract a 14 bit immediate field */
161
162int
163extract_14 (word)
164 unsigned word;
165{
166 return low_sign_extend (word & MASK_14, 14);
167}
168
169/* deposit a 14 bit constant in a word */
170
171unsigned
172deposit_14 (opnd, word)
173 int opnd;
174 unsigned word;
175{
176 unsigned sign = (opnd < 0 ? 1 : 0);
177
178 return word | ((unsigned)opnd << 1 & MASK_14) | sign;
179}
180
181/* extract a 21 bit constant */
182
183int
184extract_21 (word)
185 unsigned word;
186{
187 int val;
188
189 word &= MASK_21;
190 word <<= 11;
191 val = GET_FIELD (word, 20, 20);
192 val <<= 11;
193 val |= GET_FIELD (word, 9, 19);
194 val <<= 2;
195 val |= GET_FIELD (word, 5, 6);
196 val <<= 5;
197 val |= GET_FIELD (word, 0, 4);
198 val <<= 2;
199 val |= GET_FIELD (word, 7, 8);
200 return sign_extend (val, 21) << 11;
201}
202
203/* deposit a 21 bit constant in a word. Although 21 bit constants are
204 usually the top 21 bits of a 32 bit constant, we assume that only
205 the low 21 bits of opnd are relevant */
206
207unsigned
208deposit_21 (opnd, word)
209 unsigned opnd, word;
210{
211 unsigned val = 0;
212
213 val |= GET_FIELD (opnd, 11 + 14, 11 + 18);
214 val <<= 2;
215 val |= GET_FIELD (opnd, 11 + 12, 11 + 13);
216 val <<= 2;
217 val |= GET_FIELD (opnd, 11 + 19, 11 + 20);
218 val <<= 11;
219 val |= GET_FIELD (opnd, 11 + 1, 11 + 11);
220 val <<= 1;
221 val |= GET_FIELD (opnd, 11 + 0, 11 + 0);
222 return word | val;
223}
224
225/* extract a 12 bit constant from branch instructions */
226
227int
228extract_12 (word)
229 unsigned word;
230{
231 return sign_extend (GET_FIELD (word, 19, 28) |
232 GET_FIELD (word, 29, 29) << 10 |
233 (word & 0x1) << 11, 12) << 2;
234}
235
236/* extract a 17 bit constant from branch instructions, returning the
237 19 bit signed value. */
238
239int
240extract_17 (word)
241 unsigned word;
242{
243 return sign_extend (GET_FIELD (word, 19, 28) |
244 GET_FIELD (word, 29, 29) << 10 |
245 GET_FIELD (word, 11, 15) << 11 |
246 (word & 0x1) << 16, 17) << 2;
247}
248\f
66a1aa07
SG
249/* Lookup the unwind (stack backtrace) info for the given PC. We search all
250 of the objfiles seeking the unwind table entry for this PC. Each objfile
251 contains a sorted list of struct unwind_table_entry. Since we do a binary
252 search of the unwind tables, we depend upon them to be sorted. */
253
254static struct unwind_table_entry *
255find_unwind_entry(pc)
256 CORE_ADDR pc;
257{
258 int first, middle, last;
259 struct objfile *objfile;
260
261 ALL_OBJFILES (objfile)
262 {
263 struct obj_unwind_info *ui;
264
265 ui = OBJ_UNWIND_INFO (objfile);
266
267 if (!ui)
268 continue;
269
270 /* First, check the cache */
271
272 if (ui->cache
273 && pc >= ui->cache->region_start
274 && pc <= ui->cache->region_end)
275 return ui->cache;
276
277 /* Not in the cache, do a binary search */
278
279 first = 0;
280 last = ui->last;
281
282 while (first <= last)
283 {
284 middle = (first + last) / 2;
285 if (pc >= ui->table[middle].region_start
286 && pc <= ui->table[middle].region_end)
287 {
288 ui->cache = &ui->table[middle];
289 return &ui->table[middle];
290 }
291
292 if (pc < ui->table[middle].region_start)
293 last = middle - 1;
294 else
295 first = middle + 1;
296 }
297 } /* ALL_OBJFILES() */
298 return NULL;
299}
300
5ac7f56e
JK
301/* Called when no unwind descriptor was found for PC. Returns 1 if it
302 appears that PC is in a linker stub. */
303static int pc_in_linker_stub PARAMS ((CORE_ADDR));
304
305static int
306pc_in_linker_stub (pc)
307 CORE_ADDR pc;
308{
5ac7f56e
JK
309 int found_magic_instruction = 0;
310 int i;
08ecd8f3
JK
311 char buf[4];
312
313 /* If unable to read memory, assume pc is not in a linker stub. */
314 if (target_read_memory (pc, buf, 4) != 0)
315 return 0;
5ac7f56e 316
d08c6f4c
JK
317 /* We are looking for something like
318
319 ; $$dyncall jams RP into this special spot in the frame (RP')
320 ; before calling the "call stub"
321 ldw -18(sp),rp
322
323 ldsid (rp),r1 ; Get space associated with RP into r1
324 mtsp r1,sp ; Move it into space register 0
325 be,n 0(sr0),rp) ; back to your regularly scheduled program
326 */
327
5ac7f56e
JK
328 /* Maximum known linker stub size is 4 instructions. Search forward
329 from the given PC, then backward. */
330 for (i = 0; i < 4; i++)
331 {
6e35b037 332 /* If we hit something with an unwind, stop searching this direction. */
5ac7f56e
JK
333
334 if (find_unwind_entry (pc + i * 4) != 0)
335 break;
336
337 /* Check for ldsid (rp),r1 which is the magic instruction for a
338 return from a cross-space function call. */
339 if (read_memory_integer (pc + i * 4, 4) == 0x004010a1)
340 {
341 found_magic_instruction = 1;
342 break;
343 }
344 /* Add code to handle long call/branch and argument relocation stubs
345 here. */
346 }
347
348 if (found_magic_instruction != 0)
349 return 1;
350
351 /* Now look backward. */
352 for (i = 0; i < 4; i++)
353 {
6e35b037 354 /* If we hit something with an unwind, stop searching this direction. */
5ac7f56e
JK
355
356 if (find_unwind_entry (pc - i * 4) != 0)
357 break;
358
359 /* Check for ldsid (rp),r1 which is the magic instruction for a
360 return from a cross-space function call. */
361 if (read_memory_integer (pc - i * 4, 4) == 0x004010a1)
362 {
363 found_magic_instruction = 1;
364 break;
365 }
366 /* Add code to handle long call/branch and argument relocation stubs
367 here. */
368 }
369 return found_magic_instruction;
370}
371
66a1aa07
SG
372static int
373find_return_regnum(pc)
374 CORE_ADDR pc;
375{
376 struct unwind_table_entry *u;
377
378 u = find_unwind_entry (pc);
379
380 if (!u)
381 return RP_REGNUM;
382
383 if (u->Millicode)
384 return 31;
385
386 return RP_REGNUM;
387}
388
5ac7f56e 389/* Return size of frame, or -1 if we should use a frame pointer. */
66a1aa07
SG
390int
391find_proc_framesize(pc)
392 CORE_ADDR pc;
393{
394 struct unwind_table_entry *u;
395
66a1aa07
SG
396 u = find_unwind_entry (pc);
397
398 if (!u)
5ac7f56e
JK
399 {
400 if (pc_in_linker_stub (pc))
401 /* Linker stubs have a zero size frame. */
402 return 0;
403 else
404 return -1;
405 }
66a1aa07 406
eabbe766
JK
407 if (u->Save_SP)
408 /* If this bit is set, it means there is a frame pointer and we should
409 use it. */
410 return -1;
411
66a1aa07
SG
412 return u->Total_frame_size << 3;
413}
414
5ac7f56e
JK
415/* Return offset from sp at which rp is saved, or 0 if not saved. */
416static int rp_saved PARAMS ((CORE_ADDR));
417
418static int
419rp_saved (pc)
420 CORE_ADDR pc;
66a1aa07
SG
421{
422 struct unwind_table_entry *u;
423
424 u = find_unwind_entry (pc);
425
426 if (!u)
5ac7f56e
JK
427 {
428 if (pc_in_linker_stub (pc))
429 /* This is the so-called RP'. */
430 return -24;
431 else
432 return 0;
433 }
66a1aa07
SG
434
435 if (u->Save_RP)
5ac7f56e 436 return -20;
66a1aa07
SG
437 else
438 return 0;
439}
440\f
8fa74880
SG
441int
442frameless_function_invocation (frame)
443 FRAME frame;
444{
b8ec9a79 445 struct unwind_table_entry *u;
8fa74880 446
b8ec9a79 447 u = find_unwind_entry (frame->pc);
8fa74880 448
b8ec9a79 449 if (u == 0)
8fa74880 450 return frameless_look_for_prologue (frame);
b8ec9a79
JK
451
452 return (u->Total_frame_size == 0);
8fa74880
SG
453}
454
66a1aa07
SG
455CORE_ADDR
456saved_pc_after_call (frame)
457 FRAME frame;
458{
459 int ret_regnum;
460
461 ret_regnum = find_return_regnum (get_frame_pc (frame));
462
463 return read_register (ret_regnum) & ~0x3;
464}
465\f
466CORE_ADDR
467frame_saved_pc (frame)
468 FRAME frame;
469{
470 CORE_ADDR pc = get_frame_pc (frame);
471
8fa74880 472 if (frameless_function_invocation (frame))
66a1aa07
SG
473 {
474 int ret_regnum;
475
476 ret_regnum = find_return_regnum (pc);
477
478 return read_register (ret_regnum) & ~0x3;
479 }
66a1aa07 480 else
5ac7f56e
JK
481 {
482 int rp_offset = rp_saved (pc);
483
484 if (rp_offset == 0)
485 return read_register (RP_REGNUM) & ~0x3;
486 else
28403b8e 487 return read_memory_integer (frame->frame + rp_offset, 4) & ~0x3;
5ac7f56e 488 }
66a1aa07
SG
489}
490\f
491/* We need to correct the PC and the FP for the outermost frame when we are
492 in a system call. */
493
494void
495init_extra_frame_info (fromleaf, frame)
496 int fromleaf;
497 struct frame_info *frame;
498{
499 int flags;
500 int framesize;
501
192c3eeb 502 if (frame->next && !fromleaf)
66a1aa07
SG
503 return;
504
192c3eeb
JL
505 /* If the next frame represents a frameless function invocation
506 then we have to do some adjustments that are normally done by
507 FRAME_CHAIN. (FRAME_CHAIN is not called in this case.) */
508 if (fromleaf)
509 {
510 /* Find the framesize of *this* frame without peeking at the PC
511 in the current frame structure (it isn't set yet). */
512 framesize = find_proc_framesize (FRAME_SAVED_PC (get_next_frame (frame)));
513
514 /* Now adjust our base frame accordingly. If we have a frame pointer
515 use it, else subtract the size of this frame from the current
516 frame. (we always want frame->frame to point at the lowest address
517 in the frame). */
518 if (framesize == -1)
519 frame->frame = read_register (FP_REGNUM);
520 else
521 frame->frame -= framesize;
522 return;
523 }
524
66a1aa07
SG
525 flags = read_register (FLAGS_REGNUM);
526 if (flags & 2) /* In system call? */
527 frame->pc = read_register (31) & ~0x3;
528
192c3eeb
JL
529 /* The outermost frame is always derived from PC-framesize
530
531 One might think frameless innermost frames should have
532 a frame->frame that is the same as the parent's frame->frame.
533 That is wrong; frame->frame in that case should be the *high*
534 address of the parent's frame. It's complicated as hell to
535 explain, but the parent *always* creates some stack space for
536 the child. So the child actually does have a frame of some
537 sorts, and its base is the high address in its parent's frame. */
66a1aa07
SG
538 framesize = find_proc_framesize(frame->pc);
539 if (framesize == -1)
540 frame->frame = read_register (FP_REGNUM);
541 else
542 frame->frame = read_register (SP_REGNUM) - framesize;
66a1aa07
SG
543}
544\f
8966221d
JK
545/* Given a GDB frame, determine the address of the calling function's frame.
546 This will be used to create a new GDB frame struct, and then
547 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
548
549 This may involve searching through prologues for several functions
550 at boundaries where GCC calls HP C code, or where code which has
551 a frame pointer calls code without a frame pointer. */
552
553
66a1aa07
SG
554FRAME_ADDR
555frame_chain (frame)
556 struct frame_info *frame;
557{
8966221d
JK
558 int my_framesize, caller_framesize;
559 struct unwind_table_entry *u;
66a1aa07 560
8966221d
JK
561 /* Get frame sizes for the current frame and the frame of the
562 caller. */
563 my_framesize = find_proc_framesize (frame->pc);
564 caller_framesize = find_proc_framesize (FRAME_SAVED_PC(frame));
66a1aa07 565
8966221d
JK
566 /* If caller does not have a frame pointer, then its frame
567 can be found at current_frame - caller_framesize. */
568 if (caller_framesize != -1)
569 return frame->frame - caller_framesize;
570
571 /* Both caller and callee have frame pointers and are GCC compiled
572 (SAVE_SP bit in unwind descriptor is on for both functions.
573 The previous frame pointer is found at the top of the current frame. */
574 if (caller_framesize == -1 && my_framesize == -1)
575 return read_memory_integer (frame->frame, 4);
576
577 /* Caller has a frame pointer, but callee does not. This is a little
578 more difficult as GCC and HP C lay out locals and callee register save
579 areas very differently.
580
581 The previous frame pointer could be in a register, or in one of
582 several areas on the stack.
583
584 Walk from the current frame to the innermost frame examining
2f8c3639 585 unwind descriptors to determine if %r3 ever gets saved into the
8966221d 586 stack. If so return whatever value got saved into the stack.
2f8c3639 587 If it was never saved in the stack, then the value in %r3 is still
8966221d
JK
588 valid, so use it.
589
2f8c3639 590 We use information from unwind descriptors to determine if %r3
8966221d
JK
591 is saved into the stack (Entry_GR field has this information). */
592
593 while (frame)
594 {
595 u = find_unwind_entry (frame->pc);
596
597 if (!u)
598 {
01a03545
JK
599 /* We could find this information by examining prologues. I don't
600 think anyone has actually written any tools (not even "strip")
601 which leave them out of an executable, so maybe this is a moot
602 point. */
8966221d
JK
603 warning ("Unable to find unwind for PC 0x%x -- Help!", frame->pc);
604 return 0;
605 }
606
607 /* Entry_GR specifies the number of callee-saved general registers
2f8c3639
JL
608 saved in the stack. It starts at %r3, so %r3 would be 1. */
609 if (u->Entry_GR >= 1 || u->Save_SP)
8966221d
JK
610 break;
611 else
612 frame = frame->next;
613 }
614
615 if (frame)
616 {
617 /* We may have walked down the chain into a function with a frame
618 pointer. */
619 if (u->Save_SP)
620 return read_memory_integer (frame->frame, 4);
2f8c3639 621 /* %r3 was saved somewhere in the stack. Dig it out. */
8966221d 622 else
c598654a
JL
623 {
624 struct frame_info *fi;
625 struct frame_saved_regs saved_regs;
626
627 fi = get_frame_info (frame);
628 get_frame_saved_regs (fi, &saved_regs);
629 return read_memory_integer (saved_regs.regs[FP_REGNUM], 4);
630 }
8966221d
JK
631 }
632 else
633 {
2f8c3639 634 /* The value in %r3 was never saved into the stack (thus %r3 still
8966221d 635 holds the value of the previous frame pointer). */
2f8c3639 636 return read_register (FP_REGNUM);
8966221d
JK
637 }
638}
66a1aa07 639
66a1aa07
SG
640\f
641/* To see if a frame chain is valid, see if the caller looks like it
642 was compiled with gcc. */
643
644int
645frame_chain_valid (chain, thisframe)
646 FRAME_ADDR chain;
647 FRAME thisframe;
648{
247145e6
JK
649 struct minimal_symbol *msym_us;
650 struct minimal_symbol *msym_start;
4432b9f9 651 struct unwind_table_entry *u;
66a1aa07
SG
652
653 if (!chain)
654 return 0;
655
b8ec9a79 656 u = find_unwind_entry (thisframe->pc);
4b01383b 657
247145e6
JK
658 /* We can't just check that the same of msym_us is "_start", because
659 someone idiotically decided that they were going to make a Ltext_end
660 symbol with the same address. This Ltext_end symbol is totally
661 indistinguishable (as nearly as I can tell) from the symbol for a function
662 which is (legitimately, since it is in the user's namespace)
663 named Ltext_end, so we can't just ignore it. */
664 msym_us = lookup_minimal_symbol_by_pc (FRAME_SAVED_PC (thisframe));
665 msym_start = lookup_minimal_symbol ("_start", NULL);
666 if (msym_us
667 && msym_start
668 && SYMBOL_VALUE_ADDRESS (msym_us) == SYMBOL_VALUE_ADDRESS (msym_start))
b8ec9a79 669 return 0;
5ac7f56e 670
b8ec9a79
JK
671 if (u == NULL)
672 return 1;
5ac7f56e 673
b8ec9a79
JK
674 if (u->Save_SP || u->Total_frame_size)
675 return 1;
5ac7f56e 676
b8ec9a79
JK
677 if (pc_in_linker_stub (thisframe->pc))
678 return 1;
4b01383b 679
b8ec9a79 680 return 0;
66a1aa07
SG
681}
682
66a1aa07
SG
683/*
684 * These functions deal with saving and restoring register state
685 * around a function call in the inferior. They keep the stack
686 * double-word aligned; eventually, on an hp700, the stack will have
687 * to be aligned to a 64-byte boundary.
688 */
689
690int
691push_dummy_frame ()
692{
693 register CORE_ADDR sp;
694 register int regnum;
695 int int_buffer;
696 double freg_buffer;
697
698 /* Space for "arguments"; the RP goes in here. */
699 sp = read_register (SP_REGNUM) + 48;
700 int_buffer = read_register (RP_REGNUM) | 0x3;
701 write_memory (sp - 20, (char *)&int_buffer, 4);
702
703 int_buffer = read_register (FP_REGNUM);
704 write_memory (sp, (char *)&int_buffer, 4);
705
706 write_register (FP_REGNUM, sp);
707
708 sp += 8;
709
710 for (regnum = 1; regnum < 32; regnum++)
711 if (regnum != RP_REGNUM && regnum != FP_REGNUM)
712 sp = push_word (sp, read_register (regnum));
713
714 sp += 4;
715
716 for (regnum = FP0_REGNUM; regnum < NUM_REGS; regnum++)
717 {
718 read_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
719 sp = push_bytes (sp, (char *)&freg_buffer, 8);
720 }
721 sp = push_word (sp, read_register (IPSW_REGNUM));
722 sp = push_word (sp, read_register (SAR_REGNUM));
723 sp = push_word (sp, read_register (PCOQ_HEAD_REGNUM));
724 sp = push_word (sp, read_register (PCSQ_HEAD_REGNUM));
725 sp = push_word (sp, read_register (PCOQ_TAIL_REGNUM));
726 sp = push_word (sp, read_register (PCSQ_TAIL_REGNUM));
727 write_register (SP_REGNUM, sp);
728}
729
730find_dummy_frame_regs (frame, frame_saved_regs)
731 struct frame_info *frame;
732 struct frame_saved_regs *frame_saved_regs;
733{
734 CORE_ADDR fp = frame->frame;
735 int i;
736
737 frame_saved_regs->regs[RP_REGNUM] = fp - 20 & ~0x3;
738 frame_saved_regs->regs[FP_REGNUM] = fp;
739 frame_saved_regs->regs[1] = fp + 8;
66a1aa07 740
b227992a
SG
741 for (fp += 12, i = 3; i < 32; i++)
742 {
743 if (i != FP_REGNUM)
744 {
745 frame_saved_regs->regs[i] = fp;
746 fp += 4;
747 }
748 }
66a1aa07
SG
749
750 fp += 4;
751 for (i = FP0_REGNUM; i < NUM_REGS; i++, fp += 8)
752 frame_saved_regs->regs[i] = fp;
753
754 frame_saved_regs->regs[IPSW_REGNUM] = fp;
b227992a
SG
755 frame_saved_regs->regs[SAR_REGNUM] = fp + 4;
756 frame_saved_regs->regs[PCOQ_HEAD_REGNUM] = fp + 8;
757 frame_saved_regs->regs[PCSQ_HEAD_REGNUM] = fp + 12;
758 frame_saved_regs->regs[PCOQ_TAIL_REGNUM] = fp + 16;
759 frame_saved_regs->regs[PCSQ_TAIL_REGNUM] = fp + 20;
66a1aa07
SG
760}
761
762int
763hppa_pop_frame ()
764{
765 register FRAME frame = get_current_frame ();
766 register CORE_ADDR fp;
767 register int regnum;
768 struct frame_saved_regs fsr;
769 struct frame_info *fi;
770 double freg_buffer;
771
772 fi = get_frame_info (frame);
773 fp = fi->frame;
774 get_frame_saved_regs (fi, &fsr);
775
776 if (fsr.regs[IPSW_REGNUM]) /* Restoring a call dummy frame */
777 restore_pc_queue (&fsr);
778
779 for (regnum = 31; regnum > 0; regnum--)
780 if (fsr.regs[regnum])
781 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
782
783 for (regnum = NUM_REGS - 1; regnum >= FP0_REGNUM ; regnum--)
784 if (fsr.regs[regnum])
785 {
786 read_memory (fsr.regs[regnum], (char *)&freg_buffer, 8);
787 write_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
788 }
789
790 if (fsr.regs[IPSW_REGNUM])
791 write_register (IPSW_REGNUM,
792 read_memory_integer (fsr.regs[IPSW_REGNUM], 4));
793
794 if (fsr.regs[SAR_REGNUM])
795 write_register (SAR_REGNUM,
796 read_memory_integer (fsr.regs[SAR_REGNUM], 4));
797
ed1a07ad 798 /* If the PC was explicitly saved, then just restore it. */
66a1aa07
SG
799 if (fsr.regs[PCOQ_TAIL_REGNUM])
800 write_register (PCOQ_TAIL_REGNUM,
801 read_memory_integer (fsr.regs[PCOQ_TAIL_REGNUM], 4));
802
ed1a07ad
JK
803 /* Else use the value in %rp to set the new PC. */
804 else
805 target_write_pc (read_register (RP_REGNUM));
806
66a1aa07
SG
807 write_register (FP_REGNUM, read_memory_integer (fp, 4));
808
809 if (fsr.regs[IPSW_REGNUM]) /* call dummy */
810 write_register (SP_REGNUM, fp - 48);
811 else
812 write_register (SP_REGNUM, fp);
813
814 flush_cached_frames ();
815 set_current_frame (create_new_frame (read_register (FP_REGNUM),
816 read_pc ()));
817}
818
819/*
820 * After returning to a dummy on the stack, restore the instruction
821 * queue space registers. */
822
823static int
824restore_pc_queue (fsr)
825 struct frame_saved_regs *fsr;
826{
827 CORE_ADDR pc = read_pc ();
828 CORE_ADDR new_pc = read_memory_integer (fsr->regs[PCOQ_HEAD_REGNUM], 4);
829 int pid;
67ac9759 830 struct target_waitstatus w;
66a1aa07
SG
831 int insn_count;
832
833 /* Advance past break instruction in the call dummy. */
834 write_register (PCOQ_HEAD_REGNUM, pc + 4);
835 write_register (PCOQ_TAIL_REGNUM, pc + 8);
836
837 /*
838 * HPUX doesn't let us set the space registers or the space
839 * registers of the PC queue through ptrace. Boo, hiss.
840 * Conveniently, the call dummy has this sequence of instructions
841 * after the break:
842 * mtsp r21, sr0
843 * ble,n 0(sr0, r22)
844 *
845 * So, load up the registers and single step until we are in the
846 * right place.
847 */
848
849 write_register (21, read_memory_integer (fsr->regs[PCSQ_HEAD_REGNUM], 4));
850 write_register (22, new_pc);
851
852 for (insn_count = 0; insn_count < 3; insn_count++)
853 {
8c5e0021
JK
854 /* FIXME: What if the inferior gets a signal right now? Want to
855 merge this into wait_for_inferior (as a special kind of
856 watchpoint? By setting a breakpoint at the end? Is there
857 any other choice? Is there *any* way to do this stuff with
858 ptrace() or some equivalent?). */
66a1aa07 859 resume (1, 0);
67ac9759 860 target_wait (inferior_pid, &w);
66a1aa07 861
67ac9759 862 if (w.kind == TARGET_WAITKIND_SIGNALLED)
66a1aa07 863 {
67ac9759 864 stop_signal = w.value.sig;
66a1aa07 865 terminal_ours_for_output ();
67ac9759
JK
866 printf_unfiltered ("\nProgram terminated with signal %s, %s.\n",
867 target_signal_to_name (stop_signal),
868 target_signal_to_string (stop_signal));
199b2450 869 gdb_flush (gdb_stdout);
66a1aa07
SG
870 return 0;
871 }
872 }
8c5e0021 873 target_terminal_ours ();
66a1aa07
SG
874 fetch_inferior_registers (-1);
875 return 1;
876}
877
878CORE_ADDR
879hppa_push_arguments (nargs, args, sp, struct_return, struct_addr)
880 int nargs;
881 value *args;
882 CORE_ADDR sp;
883 int struct_return;
884 CORE_ADDR struct_addr;
885{
886 /* array of arguments' offsets */
1edc5cd2 887 int *offset = (int *)alloca(nargs * sizeof (int));
66a1aa07
SG
888 int cum = 0;
889 int i, alignment;
890
891 for (i = 0; i < nargs; i++)
892 {
893 /* Coerce chars to int & float to double if necessary */
894 args[i] = value_arg_coerce (args[i]);
895
896 cum += TYPE_LENGTH (VALUE_TYPE (args[i]));
897
898 /* value must go at proper alignment. Assume alignment is a
899 power of two.*/
900 alignment = hppa_alignof (VALUE_TYPE (args[i]));
901 if (cum % alignment)
902 cum = (cum + alignment) & -alignment;
903 offset[i] = -cum;
904 }
558f4183 905 sp += max ((cum + 7) & -8, 16);
66a1aa07
SG
906
907 for (i = 0; i < nargs; i++)
908 write_memory (sp + offset[i], VALUE_CONTENTS (args[i]),
909 TYPE_LENGTH (VALUE_TYPE (args[i])));
910
911 if (struct_return)
912 write_register (28, struct_addr);
913 return sp + 32;
914}
915
916/*
917 * Insert the specified number of args and function address
918 * into a call sequence of the above form stored at DUMMYNAME.
919 *
920 * On the hppa we need to call the stack dummy through $$dyncall.
921 * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
922 * real_pc, which is the location where gdb should start up the
923 * inferior to do the function call.
924 */
925
926CORE_ADDR
927hppa_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
f4f0d174 928 char *dummy;
66a1aa07
SG
929 CORE_ADDR pc;
930 CORE_ADDR fun;
931 int nargs;
932 value *args;
933 struct type *type;
934 int gcc_p;
935{
936 CORE_ADDR dyncall_addr, sr4export_addr;
937 struct minimal_symbol *msymbol;
6cfec929 938 int flags = read_register (FLAGS_REGNUM);
66a1aa07
SG
939
940 msymbol = lookup_minimal_symbol ("$$dyncall", (struct objfile *) NULL);
941 if (msymbol == NULL)
942 error ("Can't find an address for $$dyncall trampoline");
943
944 dyncall_addr = SYMBOL_VALUE_ADDRESS (msymbol);
945
946 msymbol = lookup_minimal_symbol ("_sr4export", (struct objfile *) NULL);
947 if (msymbol == NULL)
948 error ("Can't find an address for _sr4export trampoline");
949
950 sr4export_addr = SYMBOL_VALUE_ADDRESS (msymbol);
951
f4f0d174
JK
952 store_unsigned_integer
953 (&dummy[9*REGISTER_SIZE],
954 REGISTER_SIZE,
955 deposit_21 (fun >> 11,
956 extract_unsigned_integer (&dummy[9*REGISTER_SIZE],
957 REGISTER_SIZE)));
958 store_unsigned_integer
959 (&dummy[10*REGISTER_SIZE],
960 REGISTER_SIZE,
961 deposit_14 (fun & MASK_11,
962 extract_unsigned_integer (&dummy[10*REGISTER_SIZE],
963 REGISTER_SIZE)));
964 store_unsigned_integer
965 (&dummy[12*REGISTER_SIZE],
966 REGISTER_SIZE,
967 deposit_21 (sr4export_addr >> 11,
968 extract_unsigned_integer (&dummy[12*REGISTER_SIZE],
969 REGISTER_SIZE)));
970 store_unsigned_integer
971 (&dummy[13*REGISTER_SIZE],
972 REGISTER_SIZE,
973 deposit_14 (sr4export_addr & MASK_11,
974 extract_unsigned_integer (&dummy[13*REGISTER_SIZE],
975 REGISTER_SIZE)));
66a1aa07
SG
976
977 write_register (22, pc);
978
6cfec929
JK
979 /* If we are in a syscall, then we should call the stack dummy
980 directly. $$dyncall is not needed as the kernel sets up the
981 space id registers properly based on the value in %r31. In
982 fact calling $$dyncall will not work because the value in %r22
983 will be clobbered on the syscall exit path. */
984 if (flags & 2)
985 return pc;
986 else
987 return dyncall_addr;
988
66a1aa07
SG
989}
990
d3862cae
JK
991/* Get the PC from %r31 if currently in a syscall. Also mask out privilege
992 bits. */
993CORE_ADDR
994target_read_pc ()
995{
996 int flags = read_register (FLAGS_REGNUM);
997
998 if (flags & 2)
999 return read_register (31) & ~0x3;
1000 return read_register (PC_REGNUM) & ~0x3;
1001}
1002
6cfec929
JK
1003/* Write out the PC. If currently in a syscall, then also write the new
1004 PC value into %r31. */
1005void
1006target_write_pc (v)
1007 CORE_ADDR v;
1008{
1009 int flags = read_register (FLAGS_REGNUM);
1010
1011 /* If in a syscall, then set %r31. Also make sure to get the
1012 privilege bits set correctly. */
1013 if (flags & 2)
1014 write_register (31, (long) (v | 0x3));
1015
1016 write_register (PC_REGNUM, (long) v);
1017 write_register (NPC_REGNUM, (long) v + 4);
1018}
1019
66a1aa07
SG
1020/* return the alignment of a type in bytes. Structures have the maximum
1021 alignment required by their fields. */
1022
1023static int
1024hppa_alignof (arg)
1025 struct type *arg;
1026{
1027 int max_align, align, i;
1028 switch (TYPE_CODE (arg))
1029 {
1030 case TYPE_CODE_PTR:
1031 case TYPE_CODE_INT:
1032 case TYPE_CODE_FLT:
1033 return TYPE_LENGTH (arg);
1034 case TYPE_CODE_ARRAY:
1035 return hppa_alignof (TYPE_FIELD_TYPE (arg, 0));
1036 case TYPE_CODE_STRUCT:
1037 case TYPE_CODE_UNION:
1038 max_align = 2;
1039 for (i = 0; i < TYPE_NFIELDS (arg); i++)
1040 {
1041 /* Bit fields have no real alignment. */
1042 if (!TYPE_FIELD_BITPOS (arg, i))
1043 {
1044 align = hppa_alignof (TYPE_FIELD_TYPE (arg, i));
1045 max_align = max (max_align, align);
1046 }
1047 }
1048 return max_align;
1049 default:
1050 return 4;
1051 }
1052}
1053
1054/* Print the register regnum, or all registers if regnum is -1 */
1055
1056pa_do_registers_info (regnum, fpregs)
1057 int regnum;
1058 int fpregs;
1059{
1060 char raw_regs [REGISTER_BYTES];
1061 int i;
1062
1063 for (i = 0; i < NUM_REGS; i++)
1064 read_relative_register_raw_bytes (i, raw_regs + REGISTER_BYTE (i));
1065 if (regnum == -1)
1066 pa_print_registers (raw_regs, regnum, fpregs);
1067 else if (regnum < FP0_REGNUM)
199b2450 1068 printf_unfiltered ("%s %x\n", reg_names[regnum], *(long *)(raw_regs +
66a1aa07
SG
1069 REGISTER_BYTE (regnum)));
1070 else
1071 pa_print_fp_reg (regnum);
1072}
1073
1074pa_print_registers (raw_regs, regnum, fpregs)
1075 char *raw_regs;
1076 int regnum;
1077 int fpregs;
1078{
1079 int i;
1080
1081 for (i = 0; i < 18; i++)
199b2450 1082 printf_unfiltered ("%8.8s: %8x %8.8s: %8x %8.8s: %8x %8.8s: %8x\n",
66a1aa07
SG
1083 reg_names[i],
1084 *(int *)(raw_regs + REGISTER_BYTE (i)),
1085 reg_names[i + 18],
1086 *(int *)(raw_regs + REGISTER_BYTE (i + 18)),
1087 reg_names[i + 36],
1088 *(int *)(raw_regs + REGISTER_BYTE (i + 36)),
1089 reg_names[i + 54],
1090 *(int *)(raw_regs + REGISTER_BYTE (i + 54)));
1091
1092 if (fpregs)
1093 for (i = 72; i < NUM_REGS; i++)
1094 pa_print_fp_reg (i);
1095}
1096
1097pa_print_fp_reg (i)
1098 int i;
1099{
1100 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
1101 unsigned char virtual_buffer[MAX_REGISTER_VIRTUAL_SIZE];
66a1aa07 1102
ad09cb2b 1103 /* Get the data in raw format. */
66a1aa07 1104 read_relative_register_raw_bytes (i, raw_buffer);
ad09cb2b
PS
1105
1106 /* Convert raw data to virtual format if necessary. */
1107#ifdef REGISTER_CONVERTIBLE
1108 if (REGISTER_CONVERTIBLE (i))
1109 {
1110 REGISTER_CONVERT_TO_VIRTUAL (i, REGISTER_VIRTUAL_TYPE (i),
1111 raw_buffer, virtual_buffer);
1112 }
1113 else
1114#endif
1115 memcpy (virtual_buffer, raw_buffer,
1116 REGISTER_VIRTUAL_SIZE (i));
66a1aa07 1117
199b2450
TL
1118 fputs_filtered (reg_names[i], gdb_stdout);
1119 print_spaces_filtered (15 - strlen (reg_names[i]), gdb_stdout);
66a1aa07 1120
199b2450 1121 val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, gdb_stdout, 0,
66a1aa07
SG
1122 1, 0, Val_pretty_default);
1123 printf_filtered ("\n");
1124}
1125
1126/* Function calls that pass into a new compilation unit must pass through a
1127 small piece of code that does long format (`external' in HPPA parlance)
1128 jumps. We figure out where the trampoline is going to end up, and return
1129 the PC of the final destination. If we aren't in a trampoline, we just
1130 return NULL.
1131
1132 For computed calls, we just extract the new PC from r22. */
1133
1134CORE_ADDR
1135skip_trampoline_code (pc, name)
1136 CORE_ADDR pc;
1137 char *name;
1138{
1139 long inst0, inst1;
1140 static CORE_ADDR dyncall = 0;
1141 struct minimal_symbol *msym;
1142
1143/* FIXME XXX - dyncall must be initialized whenever we get a new exec file */
1144
1145 if (!dyncall)
1146 {
1147 msym = lookup_minimal_symbol ("$$dyncall", NULL);
1148 if (msym)
1149 dyncall = SYMBOL_VALUE_ADDRESS (msym);
1150 else
1151 dyncall = -1;
1152 }
1153
1154 if (pc == dyncall)
1155 return (CORE_ADDR)(read_register (22) & ~0x3);
1156
1157 inst0 = read_memory_integer (pc, 4);
1158 inst1 = read_memory_integer (pc+4, 4);
1159
1160 if ( (inst0 & 0xffe00000) == 0x20200000 /* ldil xxx, r1 */
1161 && (inst1 & 0xffe0e002) == 0xe0202002) /* be,n yyy(sr4, r1) */
1162 pc = extract_21 (inst0) + extract_17 (inst1);
1163 else
1164 pc = (CORE_ADDR)NULL;
1165
1166 return pc;
1167}
1168
c598654a
JL
1169/* For the given instruction (INST), return any adjustment it makes
1170 to the stack pointer or zero for no adjustment.
1171
1172 This only handles instructions commonly found in prologues. */
1173
1174static int
1175prologue_inst_adjust_sp (inst)
1176 unsigned long inst;
1177{
1178 /* This must persist across calls. */
1179 static int save_high21;
1180
1181 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1182 if ((inst & 0xffffc000) == 0x37de0000)
1183 return extract_14 (inst);
1184
1185 /* stwm X,D(sp) */
1186 if ((inst & 0xffe00000) == 0x6fc00000)
1187 return extract_14 (inst);
1188
1189 /* addil high21,%r1; ldo low11,(%r1),%r30)
1190 save high bits in save_high21 for later use. */
1191 if ((inst & 0xffe00000) == 0x28200000)
1192 {
1193 save_high21 = extract_21 (inst);
1194 return 0;
1195 }
1196
1197 if ((inst & 0xffff0000) == 0x343e0000)
1198 return save_high21 + extract_14 (inst);
1199
1200 /* fstws as used by the HP compilers. */
1201 if ((inst & 0xffffffe0) == 0x2fd01220)
1202 return extract_5_load (inst);
1203
1204 /* No adjustment. */
1205 return 0;
1206}
1207
1208/* Return nonzero if INST is a branch of some kind, else return zero. */
1209
1210static int
1211is_branch (inst)
1212 unsigned long inst;
1213{
1214 switch (inst >> 26)
1215 {
1216 case 0x20:
1217 case 0x21:
1218 case 0x22:
1219 case 0x23:
1220 case 0x28:
1221 case 0x29:
1222 case 0x2a:
1223 case 0x2b:
1224 case 0x30:
1225 case 0x31:
1226 case 0x32:
1227 case 0x33:
1228 case 0x38:
1229 case 0x39:
1230 case 0x3a:
1231 return 1;
1232
1233 default:
1234 return 0;
1235 }
1236}
1237
1238/* Return the register number for a GR which is saved by INST or
1239 zero it INST does not save a GR.
1240
1241 Note we only care about full 32bit register stores (that's the only
1242 kind of stores the prologue will use). */
1243
1244static int
1245inst_saves_gr (inst)
1246 unsigned long inst;
1247{
1248 /* Does it look like a stw? */
1249 if ((inst >> 26) == 0x1a)
1250 return extract_5R_store (inst);
1251
1252 /* Does it look like a stwm? */
1253 if ((inst >> 26) == 0x1b)
1254 return extract_5R_store (inst);
1255
1256 return 0;
1257}
1258
1259/* Return the register number for a FR which is saved by INST or
1260 zero it INST does not save a FR.
1261
1262 Note we only care about full 64bit register stores (that's the only
1263 kind of stores the prologue will use). */
1264
1265static int
1266inst_saves_fr (inst)
1267 unsigned long inst;
1268{
1269 if ((inst & 0xfc1fffe0) == 0x2c101220)
1270 return extract_5r_store (inst);
1271 return 0;
1272}
1273
66a1aa07 1274/* Advance PC across any function entry prologue instructions
c598654a 1275 to reach some "real" code.
66a1aa07 1276
c598654a
JL
1277 Use information in the unwind table to determine what exactly should
1278 be in the prologue. */
66a1aa07
SG
1279
1280CORE_ADDR
1281skip_prologue(pc)
1282 CORE_ADDR pc;
1283{
34df79fc 1284 char buf[4];
c598654a
JL
1285 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1286 int status, i;
1287 struct unwind_table_entry *u;
66a1aa07 1288
c598654a
JL
1289 u = find_unwind_entry (pc);
1290 if (!u)
1291 return 0;
1292
1293 /* This is how much of a frame adjustment we need to account for. */
1294 stack_remaining = u->Total_frame_size << 3;
66a1aa07 1295
c598654a
JL
1296 /* Magic register saves we want to know about. */
1297 save_rp = u->Save_RP;
1298 save_sp = u->Save_SP;
1299
1300 /* Turn the Entry_GR field into a bitmask. */
1301 save_gr = 0;
1302 for (i = 3; i < u->Entry_GR + 3; i++)
66a1aa07 1303 {
c598654a
JL
1304 /* Frame pointer gets saved into a special location. */
1305 if (u->Save_SP && i == FP_REGNUM)
1306 continue;
1307
1308 save_gr |= (1 << i);
1309 }
1310
1311 /* Turn the Entry_FR field into a bitmask too. */
1312 save_fr = 0;
1313 for (i = 12; i < u->Entry_FR + 12; i++)
1314 save_fr |= (1 << i);
1315
1316 /* Loop until we find everything of interest or hit a branch.
1317
1318 For unoptimized GCC code and for any HP CC code this will never ever
1319 examine any user instructions.
1320
1321 For optimzied GCC code we're faced with problems. GCC will schedule
1322 its prologue and make prologue instructions available for delay slot
1323 filling. The end result is user code gets mixed in with the prologue
1324 and a prologue instruction may be in the delay slot of the first branch
1325 or call.
1326
1327 Some unexpected things are expected with debugging optimized code, so
1328 we allow this routine to walk past user instructions in optimized
1329 GCC code. */
1330 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
1331 {
1332 status = target_read_memory (pc, buf, 4);
1333 inst = extract_unsigned_integer (buf, 4);
1334
1335 /* Yow! */
1336 if (status != 0)
1337 return pc;
1338
1339 /* Note the interesting effects of this instruction. */
1340 stack_remaining -= prologue_inst_adjust_sp (inst);
1341
1342 /* There is only one instruction used for saving RP into the stack. */
1343 if (inst == 0x6bc23fd9)
1344 save_rp = 0;
1345
1346 /* This is the only way we save SP into the stack. At this time
1347 the HP compilers never bother to save SP into the stack. */
1348 if ((inst & 0xffffc000) == 0x6fc10000)
1349 save_sp = 0;
1350
1351 /* Account for general and floating-point register saves. */
1352 save_gr &= ~(1 << inst_saves_gr (inst));
1353 save_fr &= ~(1 << inst_saves_fr (inst));
1354
1355 /* Quit if we hit any kind of branch. This can happen if a prologue
1356 instruction is in the delay slot of the first call/branch. */
1357 if (is_branch (inst))
1358 break;
1359
1360 /* Bump the PC. */
1361 pc += 4;
66a1aa07 1362 }
66a1aa07
SG
1363
1364 return pc;
1365}
1366
c598654a
JL
1367/* Put here the code to store, into a struct frame_saved_regs,
1368 the addresses of the saved registers of frame described by FRAME_INFO.
1369 This includes special registers such as pc and fp saved in special
1370 ways in the stack frame. sp is even more special:
1371 the address we return for it IS the sp for the next frame. */
1372
1373void
1374hppa_frame_find_saved_regs (frame_info, frame_saved_regs)
1375 struct frame_info *frame_info;
1376 struct frame_saved_regs *frame_saved_regs;
1377{
1378 CORE_ADDR pc;
1379 struct unwind_table_entry *u;
1380 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1381 int status, i, reg;
1382 char buf[4];
1383 int fp_loc = -1;
1384
1385 /* Zero out everything. */
1386 memset (frame_saved_regs, '\0', sizeof (struct frame_saved_regs));
1387
1388 /* Call dummy frames always look the same, so there's no need to
1389 examine the dummy code to determine locations of saved registers;
1390 instead, let find_dummy_frame_regs fill in the correct offsets
1391 for the saved registers. */
1392 if ((frame_info->pc >= frame_info->frame
1393 && frame_info->pc <= (frame_info->frame + CALL_DUMMY_LENGTH
1394 + 32 * 4 + (NUM_REGS - FP0_REGNUM) * 8
1395 + 6 * 4)))
1396 find_dummy_frame_regs (frame_info, frame_saved_regs);
1397
1398 /* Get the starting address of the function referred to by the PC
1399 saved in frame_info. */
1400 pc = get_pc_function_start (frame_info->pc);
1401
1402 /* Yow! */
1403 u = find_unwind_entry (pc);
1404 if (!u)
1405 return;
1406
1407 /* This is how much of a frame adjustment we need to account for. */
1408 stack_remaining = u->Total_frame_size << 3;
1409
1410 /* Magic register saves we want to know about. */
1411 save_rp = u->Save_RP;
1412 save_sp = u->Save_SP;
1413
1414 /* Turn the Entry_GR field into a bitmask. */
1415 save_gr = 0;
1416 for (i = 3; i < u->Entry_GR + 3; i++)
1417 {
1418 /* Frame pointer gets saved into a special location. */
1419 if (u->Save_SP && i == FP_REGNUM)
1420 continue;
1421
1422 save_gr |= (1 << i);
1423 }
1424
1425 /* Turn the Entry_FR field into a bitmask too. */
1426 save_fr = 0;
1427 for (i = 12; i < u->Entry_FR + 12; i++)
1428 save_fr |= (1 << i);
1429
1430 /* Loop until we find everything of interest or hit a branch.
1431
1432 For unoptimized GCC code and for any HP CC code this will never ever
1433 examine any user instructions.
1434
1435 For optimzied GCC code we're faced with problems. GCC will schedule
1436 its prologue and make prologue instructions available for delay slot
1437 filling. The end result is user code gets mixed in with the prologue
1438 and a prologue instruction may be in the delay slot of the first branch
1439 or call.
1440
1441 Some unexpected things are expected with debugging optimized code, so
1442 we allow this routine to walk past user instructions in optimized
1443 GCC code. */
1444 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
1445 {
1446 status = target_read_memory (pc, buf, 4);
1447 inst = extract_unsigned_integer (buf, 4);
1448
1449 /* Yow! */
1450 if (status != 0)
1451 return;
1452
1453 /* Note the interesting effects of this instruction. */
1454 stack_remaining -= prologue_inst_adjust_sp (inst);
1455
1456 /* There is only one instruction used for saving RP into the stack. */
1457 if (inst == 0x6bc23fd9)
1458 {
1459 save_rp = 0;
1460 frame_saved_regs->regs[RP_REGNUM] = frame_info->frame - 20;
1461 }
1462
1463 /* This is the only way we save SP into the stack. At this time
1464 the HP compilers never bother to save SP into the stack. */
1465 if ((inst & 0xffffc000) == 0x6fc10000)
1466 {
1467 save_sp = 0;
1468 frame_saved_regs->regs[SP_REGNUM] = frame_info->frame;
1469 }
1470
1471 /* Account for general and floating-point register saves. */
1472 reg = inst_saves_gr (inst);
1473 if (reg >= 3 && reg <= 18
1474 && (!u->Save_SP || reg != FP_REGNUM))
1475 {
1476 save_gr &= ~(1 << reg);
1477
1478 /* stwm with a positive displacement is a *post modify*. */
1479 if ((inst >> 26) == 0x1b
1480 && extract_14 (inst) >= 0)
1481 frame_saved_regs->regs[reg] = frame_info->frame;
1482 else
1483 {
1484 /* Handle code with and without frame pointers. */
1485 if (u->Save_SP)
1486 frame_saved_regs->regs[reg]
1487 = frame_info->frame + extract_14 (inst);
1488 else
1489 frame_saved_regs->regs[reg]
1490 = frame_info->frame + (u->Total_frame_size << 3)
1491 + extract_14 (inst);
1492 }
1493 }
1494
1495
1496 /* GCC handles callee saved FP regs a little differently.
1497
1498 It emits an instruction to put the value of the start of
1499 the FP store area into %r1. It then uses fstds,ma with
1500 a basereg of %r1 for the stores.
1501
1502 HP CC emits them at the current stack pointer modifying
1503 the stack pointer as it stores each register. */
1504
1505 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1506 if ((inst & 0xffffc000) == 0x34610000
1507 || (inst & 0xffffc000) == 0x37c10000)
1508 fp_loc = extract_14 (inst);
1509
1510 reg = inst_saves_fr (inst);
1511 if (reg >= 12 && reg <= 21)
1512 {
1513 /* Note +4 braindamage below is necessary because the FP status
1514 registers are internally 8 registers rather than the expected
1515 4 registers. */
1516 save_fr &= ~(1 << reg);
1517 if (fp_loc == -1)
1518 {
1519 /* 1st HP CC FP register store. After this instruction
1520 we've set enough state that the GCC and HPCC code are
1521 both handled in the same manner. */
1522 frame_saved_regs->regs[reg + FP4_REGNUM + 4] = frame_info->frame;
1523 fp_loc = 8;
1524 }
1525 else
1526 {
1527 frame_saved_regs->regs[reg + FP0_REGNUM + 4]
1528 = frame_info->frame + fp_loc;
1529 fp_loc += 8;
1530 }
1531 }
1532
1533 /* Quit if we hit any kind of branch. This can happen if a prologue
1534 instruction is in the delay slot of the first call/branch. */
1535 if (is_branch (inst))
1536 break;
1537
1538 /* Bump the PC. */
1539 pc += 4;
1540 }
1541}
1542
63757ecd
JK
1543#ifdef MAINTENANCE_CMDS
1544
66a1aa07
SG
1545static void
1546unwind_command (exp, from_tty)
1547 char *exp;
1548 int from_tty;
1549{
1550 CORE_ADDR address;
1551 union
1552 {
1553 int *foo;
1554 struct unwind_table_entry *u;
1555 } xxx;
1556
1557 /* If we have an expression, evaluate it and use it as the address. */
1558
1559 if (exp != 0 && *exp != 0)
1560 address = parse_and_eval_address (exp);
1561 else
1562 return;
1563
1564 xxx.u = find_unwind_entry (address);
1565
1566 if (!xxx.u)
1567 {
199b2450 1568 printf_unfiltered ("Can't find unwind table entry for PC 0x%x\n", address);
66a1aa07
SG
1569 return;
1570 }
1571
199b2450 1572 printf_unfiltered ("%08x\n%08X\n%08X\n%08X\n", xxx.foo[0], xxx.foo[1], xxx.foo[2],
66a1aa07
SG
1573 xxx.foo[3]);
1574}
976bb0be 1575#endif /* MAINTENANCE_CMDS */
63757ecd
JK
1576
1577void
1578_initialize_hppa_tdep ()
1579{
976bb0be 1580#ifdef MAINTENANCE_CMDS
63757ecd
JK
1581 add_cmd ("unwind", class_maintenance, unwind_command,
1582 "Print unwind table entry at given address.",
1583 &maintenanceprintlist);
63757ecd 1584#endif /* MAINTENANCE_CMDS */
976bb0be 1585}
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