gdbarch_breakpoint_from_pc doesn't return NULL
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
618f726f 3 Copyright (C) 1986-2016 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
369aa520
RC
44static int hppa_debug = 0;
45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
73 struct hppa_unwind_info *unwind_info; /* a pointer */
74 struct so_list *so_info; /* a pointer */
75 CORE_ADDR dp;
76
77 int dummy_call_sequence_reg;
78 CORE_ADDR dummy_call_sequence_addr;
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
61a12cfa 87static const struct objfile_data *hppa_objfile_priv_data = NULL;
7c46b9fb 88
1777feb0 89/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
90#define MASK_5 0x1f
91#define MASK_11 0x7ff
92#define MASK_14 0x3fff
93#define MASK_21 0x1fffff
94
e2ac8128
JB
95/* Sizes (in bytes) of the native unwind entries. */
96#define UNWIND_ENTRY_SIZE 16
97#define STUB_UNWIND_ENTRY_SIZE 8
98
c906108c 99/* Routines to extract various sized constants out of hppa
1777feb0 100 instructions. */
c906108c
SS
101
102/* This assumes that no garbage lies outside of the lower bits of
1777feb0 103 value. */
c906108c 104
63807e1d 105static int
abc485a1 106hppa_sign_extend (unsigned val, unsigned bits)
c906108c 107{
66c6502d 108 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
109}
110
1777feb0 111/* For many immediate values the sign bit is the low bit! */
c906108c 112
63807e1d 113static int
abc485a1 114hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 115{
66c6502d 116 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
117}
118
e2ac8128 119/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 120 (MSB = 0). */
e2ac8128 121
abc485a1
RC
122int
123hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
124{
125 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
126}
127
1777feb0 128/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 129
abc485a1
RC
130int
131hppa_extract_5_load (unsigned word)
c906108c 132{
abc485a1 133 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
134}
135
1777feb0 136/* Extract the immediate field from a break instruction. */
c906108c 137
abc485a1
RC
138unsigned
139hppa_extract_5r_store (unsigned word)
c906108c
SS
140{
141 return (word & MASK_5);
142}
143
1777feb0 144/* Extract the immediate field from a {sr}sm instruction. */
c906108c 145
abc485a1
RC
146unsigned
147hppa_extract_5R_store (unsigned word)
c906108c
SS
148{
149 return (word >> 16 & MASK_5);
150}
151
1777feb0 152/* Extract a 14 bit immediate field. */
c906108c 153
abc485a1
RC
154int
155hppa_extract_14 (unsigned word)
c906108c 156{
abc485a1 157 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
158}
159
1777feb0 160/* Extract a 21 bit constant. */
c906108c 161
abc485a1
RC
162int
163hppa_extract_21 (unsigned word)
c906108c
SS
164{
165 int val;
166
167 word &= MASK_21;
168 word <<= 11;
abc485a1 169 val = hppa_get_field (word, 20, 20);
c906108c 170 val <<= 11;
abc485a1 171 val |= hppa_get_field (word, 9, 19);
c906108c 172 val <<= 2;
abc485a1 173 val |= hppa_get_field (word, 5, 6);
c906108c 174 val <<= 5;
abc485a1 175 val |= hppa_get_field (word, 0, 4);
c906108c 176 val <<= 2;
abc485a1
RC
177 val |= hppa_get_field (word, 7, 8);
178 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
179}
180
c906108c 181/* extract a 17 bit constant from branch instructions, returning the
1777feb0 182 19 bit signed value. */
c906108c 183
abc485a1
RC
184int
185hppa_extract_17 (unsigned word)
c906108c 186{
abc485a1
RC
187 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
188 hppa_get_field (word, 29, 29) << 10 |
189 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
190 (word & 0x1) << 16, 17) << 2;
191}
3388d7ff
RC
192
193CORE_ADDR
194hppa_symbol_address(const char *sym)
195{
3b7344d5 196 struct bound_minimal_symbol minsym;
3388d7ff
RC
197
198 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 199 if (minsym.minsym)
77e371c0 200 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
201 else
202 return (CORE_ADDR)-1;
203}
77d18ded 204
61a12cfa 205static struct hppa_objfile_private *
77d18ded
RC
206hppa_init_objfile_priv_data (struct objfile *objfile)
207{
208 struct hppa_objfile_private *priv;
209
210 priv = (struct hppa_objfile_private *)
211 obstack_alloc (&objfile->objfile_obstack,
212 sizeof (struct hppa_objfile_private));
213 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
214 memset (priv, 0, sizeof (*priv));
215
216 return priv;
217}
c906108c
SS
218\f
219
220/* Compare the start address for two unwind entries returning 1 if
221 the first address is larger than the second, -1 if the second is
222 larger than the first, and zero if they are equal. */
223
224static int
fba45db2 225compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 226{
9a3c8263
SM
227 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
228 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
229
230 if (a->region_start > b->region_start)
231 return 1;
232 else if (a->region_start < b->region_start)
233 return -1;
234 else
235 return 0;
236}
237
53a5351d 238static void
fdd72f95 239record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 240{
fdd72f95 241 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 242 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
243 {
244 bfd_vma value = section->vma - section->filepos;
245 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
246
247 if (value < *low_text_segment_address)
248 *low_text_segment_address = value;
249 }
53a5351d
JM
250}
251
c906108c 252static void
fba45db2 253internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 254 asection *section, unsigned int entries,
241fd515 255 size_t size, CORE_ADDR text_offset)
c906108c
SS
256{
257 /* We will read the unwind entries into temporary memory, then
258 fill in the actual unwind table. */
fdd72f95 259
c906108c
SS
260 if (size > 0)
261 {
5db8bbe5 262 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
263 unsigned long tmp;
264 unsigned i;
224c3ddb 265 char *buf = (char *) alloca (size);
fdd72f95 266 CORE_ADDR low_text_segment_address;
c906108c 267
fdd72f95 268 /* For ELF targets, then unwinds are supposed to
1777feb0 269 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
270
271 Note that when loading a shared library (text_offset != 0) the
272 unwinds are already relative to the text_offset that will be
273 passed in. */
5db8bbe5 274 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 275 {
fdd72f95
RC
276 low_text_segment_address = -1;
277
53a5351d 278 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
279 record_text_segment_lowaddr,
280 &low_text_segment_address);
53a5351d 281
fdd72f95 282 text_offset = low_text_segment_address;
53a5351d 283 }
5db8bbe5 284 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 285 {
5db8bbe5 286 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 287 }
53a5351d 288
c906108c
SS
289 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
290
291 /* Now internalize the information being careful to handle host/target
c5aa993b 292 endian issues. */
c906108c
SS
293 for (i = 0; i < entries; i++)
294 {
295 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 296 (bfd_byte *) buf);
c906108c
SS
297 table[i].region_start += text_offset;
298 buf += 4;
c5aa993b 299 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 table[i].region_end += text_offset;
301 buf += 4;
c5aa993b 302 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
303 buf += 4;
304 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
305 table[i].Millicode = (tmp >> 30) & 0x1;
306 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
307 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 308 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
309 table[i].Entry_SR = (tmp >> 25) & 0x1;
310 table[i].Entry_FR = (tmp >> 21) & 0xf;
311 table[i].Entry_GR = (tmp >> 16) & 0x1f;
312 table[i].Args_stored = (tmp >> 15) & 0x1;
313 table[i].Variable_Frame = (tmp >> 14) & 0x1;
314 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
315 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
316 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
317 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 318 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
319 table[i].cxx_info = (tmp >> 8) & 0x1;
320 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
321 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 322 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
323 table[i].Save_SP = (tmp >> 4) & 0x1;
324 table[i].Save_RP = (tmp >> 3) & 0x1;
325 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 326 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 327 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 328 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
329 buf += 4;
330 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
331 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
332 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
333 table[i].alloca_frame = (tmp >> 28) & 0x1;
334 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
335 table[i].Total_frame_size = tmp & 0x7ffffff;
336
1777feb0 337 /* Stub unwinds are handled elsewhere. */
c906108c
SS
338 table[i].stub_unwind.stub_type = 0;
339 table[i].stub_unwind.padding = 0;
340 }
341 }
342}
343
344/* Read in the backtrace information stored in the `$UNWIND_START$' section of
345 the object file. This info is used mainly by find_unwind_entry() to find
346 out the stack frame size and frame pointer used by procedures. We put
347 everything on the psymbol obstack in the objfile so that it automatically
348 gets freed when the objfile is destroyed. */
349
350static void
fba45db2 351read_unwind_info (struct objfile *objfile)
c906108c 352{
d4f3574e 353 asection *unwind_sec, *stub_unwind_sec;
241fd515 354 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 355 unsigned index, unwind_entries;
c906108c
SS
356 unsigned stub_entries, total_entries;
357 CORE_ADDR text_offset;
7c46b9fb
RC
358 struct hppa_unwind_info *ui;
359 struct hppa_objfile_private *obj_private;
c906108c 360
a99dad3d 361 text_offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
7c46b9fb
RC
362 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
363 sizeof (struct hppa_unwind_info));
c906108c
SS
364
365 ui->table = NULL;
366 ui->cache = NULL;
367 ui->last = -1;
368
d4f3574e
SS
369 /* For reasons unknown the HP PA64 tools generate multiple unwinder
370 sections in a single executable. So we just iterate over every
371 section in the BFD looking for unwinder sections intead of trying
1777feb0 372 to do a lookup with bfd_get_section_by_name.
c906108c 373
d4f3574e
SS
374 First determine the total size of the unwind tables so that we
375 can allocate memory in a nice big hunk. */
376 total_entries = 0;
377 for (unwind_sec = objfile->obfd->sections;
378 unwind_sec;
379 unwind_sec = unwind_sec->next)
c906108c 380 {
d4f3574e
SS
381 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
382 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
383 {
384 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
385 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 386
d4f3574e
SS
387 total_entries += unwind_entries;
388 }
c906108c
SS
389 }
390
d4f3574e 391 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 392 use stub unwinds at the current time. */
d4f3574e
SS
393 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
394
c906108c
SS
395 if (stub_unwind_sec)
396 {
397 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
398 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
399 }
400 else
401 {
402 stub_unwind_size = 0;
403 stub_entries = 0;
404 }
405
406 /* Compute total number of unwind entries and their total size. */
d4f3574e 407 total_entries += stub_entries;
c906108c
SS
408 total_size = total_entries * sizeof (struct unwind_table_entry);
409
410 /* Allocate memory for the unwind table. */
411 ui->table = (struct unwind_table_entry *)
8b92e4d5 412 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 413 ui->last = total_entries - 1;
c906108c 414
d4f3574e
SS
415 /* Now read in each unwind section and internalize the standard unwind
416 entries. */
c906108c 417 index = 0;
d4f3574e
SS
418 for (unwind_sec = objfile->obfd->sections;
419 unwind_sec;
420 unwind_sec = unwind_sec->next)
421 {
422 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
423 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
424 {
425 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
426 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
427
428 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
429 unwind_entries, unwind_size, text_offset);
430 index += unwind_entries;
431 }
432 }
433
434 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
435 if (stub_unwind_size > 0)
436 {
437 unsigned int i;
224c3ddb 438 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
439
440 /* Read in the stub unwind entries. */
441 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
442 0, stub_unwind_size);
443
444 /* Now convert them into regular unwind entries. */
445 for (i = 0; i < stub_entries; i++, index++)
446 {
447 /* Clear out the next unwind entry. */
448 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
449
1777feb0 450 /* Convert offset & size into region_start and region_end.
c906108c
SS
451 Stuff away the stub type into "reserved" fields. */
452 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
453 (bfd_byte *) buf);
454 ui->table[index].region_start += text_offset;
455 buf += 4;
456 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 457 (bfd_byte *) buf);
c906108c
SS
458 buf += 2;
459 ui->table[index].region_end
c5aa993b
JM
460 = ui->table[index].region_start + 4 *
461 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
462 buf += 2;
463 }
464
465 }
466
467 /* Unwind table needs to be kept sorted. */
468 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
469 compare_unwind_entries);
470
471 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
472 obj_private = (struct hppa_objfile_private *)
473 objfile_data (objfile, hppa_objfile_priv_data);
474 if (obj_private == NULL)
77d18ded
RC
475 obj_private = hppa_init_objfile_priv_data (objfile);
476
c906108c
SS
477 obj_private->unwind_info = ui;
478}
479
480/* Lookup the unwind (stack backtrace) info for the given PC. We search all
481 of the objfiles seeking the unwind table entry for this PC. Each objfile
482 contains a sorted list of struct unwind_table_entry. Since we do a binary
483 search of the unwind tables, we depend upon them to be sorted. */
484
485struct unwind_table_entry *
fba45db2 486find_unwind_entry (CORE_ADDR pc)
c906108c
SS
487{
488 int first, middle, last;
489 struct objfile *objfile;
7c46b9fb 490 struct hppa_objfile_private *priv;
c906108c 491
369aa520 492 if (hppa_debug)
5af949e3
UW
493 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
494 hex_string (pc));
369aa520 495
1777feb0 496 /* A function at address 0? Not in HP-UX! */
c906108c 497 if (pc == (CORE_ADDR) 0)
369aa520
RC
498 {
499 if (hppa_debug)
500 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
501 return NULL;
502 }
c906108c
SS
503
504 ALL_OBJFILES (objfile)
c5aa993b 505 {
7c46b9fb 506 struct hppa_unwind_info *ui;
c5aa993b 507 ui = NULL;
9a3c8263
SM
508 priv = ((struct hppa_objfile_private *)
509 objfile_data (objfile, hppa_objfile_priv_data));
7c46b9fb
RC
510 if (priv)
511 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 512
c5aa993b
JM
513 if (!ui)
514 {
515 read_unwind_info (objfile);
9a3c8263
SM
516 priv = ((struct hppa_objfile_private *)
517 objfile_data (objfile, hppa_objfile_priv_data));
7c46b9fb 518 if (priv == NULL)
8a3fe4f8 519 error (_("Internal error reading unwind information."));
7c46b9fb 520 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 521 }
c906108c 522
1777feb0 523 /* First, check the cache. */
c906108c 524
c5aa993b
JM
525 if (ui->cache
526 && pc >= ui->cache->region_start
527 && pc <= ui->cache->region_end)
369aa520
RC
528 {
529 if (hppa_debug)
5af949e3
UW
530 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
531 hex_string ((uintptr_t) ui->cache));
369aa520
RC
532 return ui->cache;
533 }
c906108c 534
1777feb0 535 /* Not in the cache, do a binary search. */
c906108c 536
c5aa993b
JM
537 first = 0;
538 last = ui->last;
c906108c 539
c5aa993b
JM
540 while (first <= last)
541 {
542 middle = (first + last) / 2;
543 if (pc >= ui->table[middle].region_start
544 && pc <= ui->table[middle].region_end)
545 {
546 ui->cache = &ui->table[middle];
369aa520 547 if (hppa_debug)
5af949e3
UW
548 fprintf_unfiltered (gdb_stdlog, "%s }\n",
549 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
550 return &ui->table[middle];
551 }
c906108c 552
c5aa993b
JM
553 if (pc < ui->table[middle].region_start)
554 last = middle - 1;
555 else
556 first = middle + 1;
557 }
558 } /* ALL_OBJFILES() */
369aa520
RC
559
560 if (hppa_debug)
561 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
562
c906108c
SS
563 return NULL;
564}
565
c9cf6e20
MG
566/* Implement the stack_frame_destroyed_p gdbarch method.
567
568 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 569 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
570
571 We do not assume that the epilogue is at the end of a function as we can
572 also have return sequences in the middle of a function. */
c9cf6e20 573
1fb24930 574static int
c9cf6e20 575hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 576{
e17a4113 577 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
578 unsigned long status;
579 unsigned int inst;
e362b510 580 gdb_byte buf[4];
1fb24930 581
8defab1a 582 status = target_read_memory (pc, buf, 4);
1fb24930
RC
583 if (status != 0)
584 return 0;
585
e17a4113 586 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
587
588 /* The most common way to perform a stack adjustment ldo X(sp),sp
589 We are destroying a stack frame if the offset is negative. */
590 if ((inst & 0xffffc000) == 0x37de0000
591 && hppa_extract_14 (inst) < 0)
592 return 1;
593
594 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
595 if (((inst & 0x0fc010e0) == 0x0fc010e0
596 || (inst & 0x0fc010e0) == 0x0fc010e0)
597 && hppa_extract_14 (inst) < 0)
598 return 1;
599
600 /* bv %r0(%rp) or bv,n %r0(%rp) */
601 if (inst == 0xe840c000 || inst == 0xe840c002)
602 return 1;
603
604 return 0;
605}
606
85f4f2d8 607static const unsigned char *
67d57894 608hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 609{
56132691 610 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
611 (*len) = sizeof (breakpoint);
612 return breakpoint;
613}
614
e23457df
AC
615/* Return the name of a register. */
616
4a302917 617static const char *
d93859e2 618hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
619{
620 static char *names[] = {
621 "flags", "r1", "rp", "r3",
622 "r4", "r5", "r6", "r7",
623 "r8", "r9", "r10", "r11",
624 "r12", "r13", "r14", "r15",
625 "r16", "r17", "r18", "r19",
626 "r20", "r21", "r22", "r23",
627 "r24", "r25", "r26", "dp",
628 "ret0", "ret1", "sp", "r31",
629 "sar", "pcoqh", "pcsqh", "pcoqt",
630 "pcsqt", "eiem", "iir", "isr",
631 "ior", "ipsw", "goto", "sr4",
632 "sr0", "sr1", "sr2", "sr3",
633 "sr5", "sr6", "sr7", "cr0",
634 "cr8", "cr9", "ccr", "cr12",
635 "cr13", "cr24", "cr25", "cr26",
636 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
637 "fpsr", "fpe1", "fpe2", "fpe3",
638 "fpe4", "fpe5", "fpe6", "fpe7",
639 "fr4", "fr4R", "fr5", "fr5R",
640 "fr6", "fr6R", "fr7", "fr7R",
641 "fr8", "fr8R", "fr9", "fr9R",
642 "fr10", "fr10R", "fr11", "fr11R",
643 "fr12", "fr12R", "fr13", "fr13R",
644 "fr14", "fr14R", "fr15", "fr15R",
645 "fr16", "fr16R", "fr17", "fr17R",
646 "fr18", "fr18R", "fr19", "fr19R",
647 "fr20", "fr20R", "fr21", "fr21R",
648 "fr22", "fr22R", "fr23", "fr23R",
649 "fr24", "fr24R", "fr25", "fr25R",
650 "fr26", "fr26R", "fr27", "fr27R",
651 "fr28", "fr28R", "fr29", "fr29R",
652 "fr30", "fr30R", "fr31", "fr31R"
653 };
654 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
655 return NULL;
656 else
657 return names[i];
658}
659
4a302917 660static const char *
d93859e2 661hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
662{
663 static char *names[] = {
664 "flags", "r1", "rp", "r3",
665 "r4", "r5", "r6", "r7",
666 "r8", "r9", "r10", "r11",
667 "r12", "r13", "r14", "r15",
668 "r16", "r17", "r18", "r19",
669 "r20", "r21", "r22", "r23",
670 "r24", "r25", "r26", "dp",
671 "ret0", "ret1", "sp", "r31",
672 "sar", "pcoqh", "pcsqh", "pcoqt",
673 "pcsqt", "eiem", "iir", "isr",
674 "ior", "ipsw", "goto", "sr4",
675 "sr0", "sr1", "sr2", "sr3",
676 "sr5", "sr6", "sr7", "cr0",
677 "cr8", "cr9", "ccr", "cr12",
678 "cr13", "cr24", "cr25", "cr26",
679 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
680 "fpsr", "fpe1", "fpe2", "fpe3",
681 "fr4", "fr5", "fr6", "fr7",
682 "fr8", "fr9", "fr10", "fr11",
683 "fr12", "fr13", "fr14", "fr15",
684 "fr16", "fr17", "fr18", "fr19",
685 "fr20", "fr21", "fr22", "fr23",
686 "fr24", "fr25", "fr26", "fr27",
687 "fr28", "fr29", "fr30", "fr31"
688 };
689 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
690 return NULL;
691 else
692 return names[i];
693}
694
85c83e99 695/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 696static int
d3f73121 697hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 698{
85c83e99 699 /* The general registers and the sar are the same in both sets. */
0fde2c53 700 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
701 return reg;
702
703 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 704 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
705 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
706
1ef7fcb5
RC
707 return -1;
708}
709
79508e1e
AC
710/* This function pushes a stack frame with arguments as part of the
711 inferior function calling mechanism.
712
713 This is the version of the function for the 32-bit PA machines, in
714 which later arguments appear at lower addresses. (The stack always
715 grows towards higher addresses.)
716
717 We simply allocate the appropriate amount of stack space and put
718 arguments into their proper slots. */
719
4a302917 720static CORE_ADDR
7d9b040b 721hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
722 struct regcache *regcache, CORE_ADDR bp_addr,
723 int nargs, struct value **args, CORE_ADDR sp,
724 int struct_return, CORE_ADDR struct_addr)
725{
e17a4113
UW
726 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
727
79508e1e
AC
728 /* Stack base address at which any pass-by-reference parameters are
729 stored. */
730 CORE_ADDR struct_end = 0;
731 /* Stack base address at which the first parameter is stored. */
732 CORE_ADDR param_end = 0;
733
79508e1e
AC
734 /* Two passes. First pass computes the location of everything,
735 second pass writes the bytes out. */
736 int write_pass;
d49771ef
RC
737
738 /* Global pointer (r19) of the function we are trying to call. */
739 CORE_ADDR gp;
740
741 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
742
79508e1e
AC
743 for (write_pass = 0; write_pass < 2; write_pass++)
744 {
1797a8f6 745 CORE_ADDR struct_ptr = 0;
1777feb0 746 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
747 struct_ptr is adjusted for each argument below, so the first
748 argument will end up at sp-36. */
749 CORE_ADDR param_ptr = 32;
79508e1e 750 int i;
2a6228ef
RC
751 int small_struct = 0;
752
79508e1e
AC
753 for (i = 0; i < nargs; i++)
754 {
755 struct value *arg = args[i];
4991999e 756 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
757 /* The corresponding parameter that is pushed onto the
758 stack, and [possibly] passed in a register. */
948f8e3d 759 gdb_byte param_val[8];
79508e1e
AC
760 int param_len;
761 memset (param_val, 0, sizeof param_val);
762 if (TYPE_LENGTH (type) > 8)
763 {
764 /* Large parameter, pass by reference. Store the value
765 in "struct" area and then pass its address. */
766 param_len = 4;
1797a8f6 767 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 768 if (write_pass)
0fd88904 769 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 770 TYPE_LENGTH (type));
e17a4113
UW
771 store_unsigned_integer (param_val, 4, byte_order,
772 struct_end - struct_ptr);
79508e1e
AC
773 }
774 else if (TYPE_CODE (type) == TYPE_CODE_INT
775 || TYPE_CODE (type) == TYPE_CODE_ENUM)
776 {
777 /* Integer value store, right aligned. "unpack_long"
778 takes care of any sign-extension problems. */
779 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 780 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 781 unpack_long (type,
0fd88904 782 value_contents (arg)));
79508e1e 783 }
2a6228ef
RC
784 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
785 {
786 /* Floating point value store, right aligned. */
787 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 788 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 789 }
79508e1e
AC
790 else
791 {
79508e1e 792 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
793
794 /* Small struct value are stored right-aligned. */
79508e1e 795 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 796 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
797
798 /* Structures of size 5, 6 and 7 bytes are special in that
799 the higher-ordered word is stored in the lower-ordered
800 argument, and even though it is a 8-byte quantity the
801 registers need not be 8-byte aligned. */
1b07b470 802 if (param_len > 4 && param_len < 8)
2a6228ef 803 small_struct = 1;
79508e1e 804 }
2a6228ef 805
1797a8f6 806 param_ptr += param_len;
2a6228ef
RC
807 if (param_len == 8 && !small_struct)
808 param_ptr = align_up (param_ptr, 8);
809
810 /* First 4 non-FP arguments are passed in gr26-gr23.
811 First 4 32-bit FP arguments are passed in fr4L-fr7L.
812 First 2 64-bit FP arguments are passed in fr5 and fr7.
813
814 The rest go on the stack, starting at sp-36, towards lower
815 addresses. 8-byte arguments must be aligned to a 8-byte
816 stack boundary. */
79508e1e
AC
817 if (write_pass)
818 {
1797a8f6 819 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
820
821 /* There are some cases when we don't know the type
822 expected by the callee (e.g. for variadic functions), so
823 pass the parameters in both general and fp regs. */
824 if (param_ptr <= 48)
79508e1e 825 {
2a6228ef
RC
826 int grreg = 26 - (param_ptr - 36) / 4;
827 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
828 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
829
830 regcache_cooked_write (regcache, grreg, param_val);
831 regcache_cooked_write (regcache, fpLreg, param_val);
832
79508e1e 833 if (param_len > 4)
2a6228ef
RC
834 {
835 regcache_cooked_write (regcache, grreg + 1,
836 param_val + 4);
837
838 regcache_cooked_write (regcache, fpreg, param_val);
839 regcache_cooked_write (regcache, fpreg + 1,
840 param_val + 4);
841 }
79508e1e
AC
842 }
843 }
844 }
845
846 /* Update the various stack pointers. */
847 if (!write_pass)
848 {
2a6228ef 849 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
850 /* PARAM_PTR already accounts for all the arguments passed
851 by the user. However, the ABI mandates minimum stack
852 space allocations for outgoing arguments. The ABI also
853 mandates minimum stack alignments which we must
854 preserve. */
2a6228ef 855 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
856 }
857 }
858
859 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 860 address. */
79508e1e 861 if (struct_return)
9c9acae0 862 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 863
e38c262f 864 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
865
866 if (gp != 0)
9c9acae0 867 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 868
79508e1e 869 /* Set the return address. */
77d18ded
RC
870 if (!gdbarch_push_dummy_code_p (gdbarch))
871 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 872
c4557624 873 /* Update the Stack Pointer. */
34f75cc1 874 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 875
2a6228ef 876 return param_end;
79508e1e
AC
877}
878
38ca4e0c
MK
879/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
880 Runtime Architecture for PA-RISC 2.0", which is distributed as part
881 as of the HP-UX Software Transition Kit (STK). This implementation
882 is based on version 3.3, dated October 6, 1997. */
2f690297 883
38ca4e0c 884/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 885
38ca4e0c
MK
886static int
887hppa64_integral_or_pointer_p (const struct type *type)
888{
889 switch (TYPE_CODE (type))
890 {
891 case TYPE_CODE_INT:
892 case TYPE_CODE_BOOL:
893 case TYPE_CODE_CHAR:
894 case TYPE_CODE_ENUM:
895 case TYPE_CODE_RANGE:
896 {
897 int len = TYPE_LENGTH (type);
898 return (len == 1 || len == 2 || len == 4 || len == 8);
899 }
900 case TYPE_CODE_PTR:
901 case TYPE_CODE_REF:
902 return (TYPE_LENGTH (type) == 8);
903 default:
904 break;
905 }
906
907 return 0;
908}
909
910/* Check whether TYPE is a "Floating Scalar Type". */
911
912static int
913hppa64_floating_p (const struct type *type)
914{
915 switch (TYPE_CODE (type))
916 {
917 case TYPE_CODE_FLT:
918 {
919 int len = TYPE_LENGTH (type);
920 return (len == 4 || len == 8 || len == 16);
921 }
922 default:
923 break;
924 }
925
926 return 0;
927}
2f690297 928
1218e655
RC
929/* If CODE points to a function entry address, try to look up the corresponding
930 function descriptor and return its address instead. If CODE is not a
931 function entry address, then just return it unchanged. */
932static CORE_ADDR
e17a4113 933hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 934{
e17a4113 935 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
936 struct obj_section *sec, *opd;
937
938 sec = find_pc_section (code);
939
940 if (!sec)
941 return code;
942
943 /* If CODE is in a data section, assume it's already a fptr. */
944 if (!(sec->the_bfd_section->flags & SEC_CODE))
945 return code;
946
947 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
948 {
949 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 950 break;
1218e655
RC
951 }
952
953 if (opd < sec->objfile->sections_end)
954 {
955 CORE_ADDR addr;
956
aded6f54
PA
957 for (addr = obj_section_addr (opd);
958 addr < obj_section_endaddr (opd);
959 addr += 2 * 8)
960 {
1218e655 961 ULONGEST opdaddr;
948f8e3d 962 gdb_byte tmp[8];
1218e655
RC
963
964 if (target_read_memory (addr, tmp, sizeof (tmp)))
965 break;
e17a4113 966 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 967
aded6f54 968 if (opdaddr == code)
1218e655
RC
969 return addr - 16;
970 }
971 }
972
973 return code;
974}
975
4a302917 976static CORE_ADDR
7d9b040b 977hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
978 struct regcache *regcache, CORE_ADDR bp_addr,
979 int nargs, struct value **args, CORE_ADDR sp,
980 int struct_return, CORE_ADDR struct_addr)
981{
38ca4e0c 982 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 983 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
984 int i, offset = 0;
985 CORE_ADDR gp;
2f690297 986
38ca4e0c
MK
987 /* "The outgoing parameter area [...] must be aligned at a 16-byte
988 boundary." */
989 sp = align_up (sp, 16);
2f690297 990
38ca4e0c
MK
991 for (i = 0; i < nargs; i++)
992 {
993 struct value *arg = args[i];
994 struct type *type = value_type (arg);
995 int len = TYPE_LENGTH (type);
0fd88904 996 const bfd_byte *valbuf;
1218e655 997 bfd_byte fptrbuf[8];
38ca4e0c 998 int regnum;
2f690297 999
38ca4e0c
MK
1000 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
1001 offset = align_up (offset, 8);
77d18ded 1002
38ca4e0c 1003 if (hppa64_integral_or_pointer_p (type))
2f690297 1004 {
38ca4e0c
MK
1005 /* "Integral scalar parameters smaller than 64 bits are
1006 padded on the left (i.e., the value is in the
1007 least-significant bits of the 64-bit storage unit, and
1008 the high-order bits are undefined)." Therefore we can
1009 safely sign-extend them. */
1010 if (len < 8)
449e1137 1011 {
df4df182 1012 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1013 len = 8;
1014 }
1015 }
1016 else if (hppa64_floating_p (type))
1017 {
1018 if (len > 8)
1019 {
1020 /* "Quad-precision (128-bit) floating-point scalar
1021 parameters are aligned on a 16-byte boundary." */
1022 offset = align_up (offset, 16);
1023
1024 /* "Double-extended- and quad-precision floating-point
1025 parameters within the first 64 bytes of the parameter
1026 list are always passed in general registers." */
449e1137
AC
1027 }
1028 else
1029 {
38ca4e0c 1030 if (len == 4)
449e1137 1031 {
38ca4e0c
MK
1032 /* "Single-precision (32-bit) floating-point scalar
1033 parameters are padded on the left with 32 bits of
1034 garbage (i.e., the floating-point value is in the
1035 least-significant 32 bits of a 64-bit storage
1036 unit)." */
1037 offset += 4;
449e1137 1038 }
38ca4e0c
MK
1039
1040 /* "Single- and double-precision floating-point
1041 parameters in this area are passed according to the
1042 available formal parameter information in a function
1043 prototype. [...] If no prototype is in scope,
1044 floating-point parameters must be passed both in the
1045 corresponding general registers and in the
1046 corresponding floating-point registers." */
1047 regnum = HPPA64_FP4_REGNUM + offset / 8;
1048
1049 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1050 {
38ca4e0c
MK
1051 /* "Single-precision floating-point parameters, when
1052 passed in floating-point registers, are passed in
1053 the right halves of the floating point registers;
1054 the left halves are unused." */
1055 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1056 len, value_contents (arg));
449e1137
AC
1057 }
1058 }
2f690297 1059 }
38ca4e0c 1060 else
2f690297 1061 {
38ca4e0c
MK
1062 if (len > 8)
1063 {
1064 /* "Aggregates larger than 8 bytes are aligned on a
1065 16-byte boundary, possibly leaving an unused argument
1777feb0 1066 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1067 they are padded on the right (with garbage), to a
1068 multiple of 8 bytes." */
1069 offset = align_up (offset, 16);
1070 }
1071 }
1072
1218e655
RC
1073 /* If we are passing a function pointer, make sure we pass a function
1074 descriptor instead of the function entry address. */
1075 if (TYPE_CODE (type) == TYPE_CODE_PTR
1076 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1077 {
1078 ULONGEST codeptr, fptr;
1079
1080 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1081 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1082 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1083 fptr);
1218e655
RC
1084 valbuf = fptrbuf;
1085 }
1086 else
1087 {
1088 valbuf = value_contents (arg);
1089 }
1090
38ca4e0c 1091 /* Always store the argument in memory. */
1218e655 1092 write_memory (sp + offset, valbuf, len);
38ca4e0c 1093
38ca4e0c
MK
1094 regnum = HPPA_ARG0_REGNUM - offset / 8;
1095 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1096 {
1097 regcache_cooked_write_part (regcache, regnum,
325fac50
PA
1098 offset % 8, std::min (len, 8), valbuf);
1099 offset += std::min (len, 8);
1100 valbuf += std::min (len, 8);
1101 len -= std::min (len, 8);
38ca4e0c 1102 regnum--;
2f690297 1103 }
38ca4e0c
MK
1104
1105 offset += len;
2f690297
AC
1106 }
1107
38ca4e0c
MK
1108 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1109 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1110
1111 /* Allocate the outgoing parameter area. Make sure the outgoing
1112 parameter area is multiple of 16 bytes in length. */
325fac50 1113 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1114
1115 /* Allocate 32-bytes of scratch space. The documentation doesn't
1116 mention this, but it seems to be needed. */
1117 sp += 32;
1118
1119 /* Allocate the frame marker area. */
1120 sp += 16;
1121
1122 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1123 its address. */
2f690297 1124 if (struct_return)
38ca4e0c 1125 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1126
38ca4e0c 1127 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1128 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1129 if (gp != 0)
38ca4e0c 1130 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1131
38ca4e0c 1132 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1133 if (!gdbarch_push_dummy_code_p (gdbarch))
1134 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1135
38ca4e0c
MK
1136 /* Set up GR30 to hold the stack pointer (sp). */
1137 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1138
38ca4e0c 1139 return sp;
2f690297 1140}
38ca4e0c 1141\f
2f690297 1142
08a27113
MK
1143/* Handle 32/64-bit struct return conventions. */
1144
1145static enum return_value_convention
6a3a010b 1146hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1147 struct type *type, struct regcache *regcache,
e127f0db 1148 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1149{
1150 if (TYPE_LENGTH (type) <= 2 * 4)
1151 {
1152 /* The value always lives in the right hand end of the register
1153 (or register pair)? */
1154 int b;
1155 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1156 int part = TYPE_LENGTH (type) % 4;
1157 /* The left hand register contains only part of the value,
1158 transfer that first so that the rest can be xfered as entire
1159 4-byte registers. */
1160 if (part > 0)
1161 {
1162 if (readbuf != NULL)
1163 regcache_cooked_read_part (regcache, reg, 4 - part,
1164 part, readbuf);
1165 if (writebuf != NULL)
1166 regcache_cooked_write_part (regcache, reg, 4 - part,
1167 part, writebuf);
1168 reg++;
1169 }
1170 /* Now transfer the remaining register values. */
1171 for (b = part; b < TYPE_LENGTH (type); b += 4)
1172 {
1173 if (readbuf != NULL)
e127f0db 1174 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1175 if (writebuf != NULL)
e127f0db 1176 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1177 reg++;
1178 }
1179 return RETURN_VALUE_REGISTER_CONVENTION;
1180 }
1181 else
1182 return RETURN_VALUE_STRUCT_CONVENTION;
1183}
1184
1185static enum return_value_convention
6a3a010b 1186hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1187 struct type *type, struct regcache *regcache,
e127f0db 1188 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1189{
1190 int len = TYPE_LENGTH (type);
1191 int regnum, offset;
1192
bad43aa5 1193 if (len > 16)
08a27113
MK
1194 {
1195 /* All return values larget than 128 bits must be aggregate
1196 return values. */
9738b034
MK
1197 gdb_assert (!hppa64_integral_or_pointer_p (type));
1198 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1199
1200 /* "Aggregate return values larger than 128 bits are returned in
1201 a buffer allocated by the caller. The address of the buffer
1202 must be passed in GR 28." */
1203 return RETURN_VALUE_STRUCT_CONVENTION;
1204 }
1205
1206 if (hppa64_integral_or_pointer_p (type))
1207 {
1208 /* "Integral return values are returned in GR 28. Values
1209 smaller than 64 bits are padded on the left (with garbage)." */
1210 regnum = HPPA_RET0_REGNUM;
1211 offset = 8 - len;
1212 }
1213 else if (hppa64_floating_p (type))
1214 {
1215 if (len > 8)
1216 {
1217 /* "Double-extended- and quad-precision floating-point
1218 values are returned in GRs 28 and 29. The sign,
1219 exponent, and most-significant bits of the mantissa are
1220 returned in GR 28; the least-significant bits of the
1221 mantissa are passed in GR 29. For double-extended
1222 precision values, GR 29 is padded on the right with 48
1223 bits of garbage." */
1224 regnum = HPPA_RET0_REGNUM;
1225 offset = 0;
1226 }
1227 else
1228 {
1229 /* "Single-precision and double-precision floating-point
1230 return values are returned in FR 4R (single precision) or
1231 FR 4 (double-precision)." */
1232 regnum = HPPA64_FP4_REGNUM;
1233 offset = 8 - len;
1234 }
1235 }
1236 else
1237 {
1238 /* "Aggregate return values up to 64 bits in size are returned
1239 in GR 28. Aggregates smaller than 64 bits are left aligned
1240 in the register; the pad bits on the right are undefined."
1241
1242 "Aggregate return values between 65 and 128 bits are returned
1243 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1244 the remaining bits are placed, left aligned, in GR 29. The
1245 pad bits on the right of GR 29 (if any) are undefined." */
1246 regnum = HPPA_RET0_REGNUM;
1247 offset = 0;
1248 }
1249
1250 if (readbuf)
1251 {
08a27113
MK
1252 while (len > 0)
1253 {
1254 regcache_cooked_read_part (regcache, regnum, offset,
325fac50
PA
1255 std::min (len, 8), readbuf);
1256 readbuf += std::min (len, 8);
1257 len -= std::min (len, 8);
08a27113
MK
1258 regnum++;
1259 }
1260 }
1261
1262 if (writebuf)
1263 {
08a27113
MK
1264 while (len > 0)
1265 {
1266 regcache_cooked_write_part (regcache, regnum, offset,
325fac50
PA
1267 std::min (len, 8), writebuf);
1268 writebuf += std::min (len, 8);
1269 len -= std::min (len, 8);
08a27113
MK
1270 regnum++;
1271 }
1272 }
1273
1274 return RETURN_VALUE_REGISTER_CONVENTION;
1275}
1276\f
1277
d49771ef 1278static CORE_ADDR
a7aad9aa 1279hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1280 struct target_ops *targ)
1281{
1282 if (addr & 2)
1283 {
0dfff4cb 1284 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1285 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1286 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1287 }
1288
1289 return addr;
1290}
1291
1797a8f6
AC
1292static CORE_ADDR
1293hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1294{
1295 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1296 and not _bit_)! */
1297 return align_up (addr, 64);
1298}
1299
2f690297
AC
1300/* Force all frames to 16-byte alignment. Better safe than sorry. */
1301
1302static CORE_ADDR
1797a8f6 1303hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1304{
1305 /* Just always 16-byte align. */
1306 return align_up (addr, 16);
1307}
1308
cc72850f 1309CORE_ADDR
61a1198a 1310hppa_read_pc (struct regcache *regcache)
c906108c 1311{
cc72850f 1312 ULONGEST ipsw;
61a1198a 1313 ULONGEST pc;
c906108c 1314
61a1198a
UW
1315 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1316 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1317
1318 /* If the current instruction is nullified, then we are effectively
1319 still executing the previous instruction. Pretend we are still
cc72850f
MK
1320 there. This is needed when single stepping; if the nullified
1321 instruction is on a different line, we don't want GDB to think
1322 we've stepped onto that line. */
fe46cd3a
RC
1323 if (ipsw & 0x00200000)
1324 pc -= 4;
1325
cc72850f 1326 return pc & ~0x3;
c906108c
SS
1327}
1328
cc72850f 1329void
61a1198a 1330hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1331{
61a1198a
UW
1332 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1333 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1334}
1335
c906108c 1336/* For the given instruction (INST), return any adjustment it makes
1777feb0 1337 to the stack pointer or zero for no adjustment.
c906108c
SS
1338
1339 This only handles instructions commonly found in prologues. */
1340
1341static int
fba45db2 1342prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1343{
1344 /* This must persist across calls. */
1345 static int save_high21;
1346
1347 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1348 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1349 return hppa_extract_14 (inst);
c906108c
SS
1350
1351 /* stwm X,D(sp) */
1352 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1353 return hppa_extract_14 (inst);
c906108c 1354
104c1213
JM
1355 /* std,ma X,D(sp) */
1356 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1357 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1358
e22b26cb 1359 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1360 save high bits in save_high21 for later use. */
e22b26cb 1361 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1362 {
abc485a1 1363 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1364 return 0;
1365 }
1366
1367 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1368 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1369
1370 /* fstws as used by the HP compilers. */
1371 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1372 return hppa_extract_5_load (inst);
c906108c
SS
1373
1374 /* No adjustment. */
1375 return 0;
1376}
1377
1378/* Return nonzero if INST is a branch of some kind, else return zero. */
1379
1380static int
fba45db2 1381is_branch (unsigned long inst)
c906108c
SS
1382{
1383 switch (inst >> 26)
1384 {
1385 case 0x20:
1386 case 0x21:
1387 case 0x22:
1388 case 0x23:
7be570e7 1389 case 0x27:
c906108c
SS
1390 case 0x28:
1391 case 0x29:
1392 case 0x2a:
1393 case 0x2b:
7be570e7 1394 case 0x2f:
c906108c
SS
1395 case 0x30:
1396 case 0x31:
1397 case 0x32:
1398 case 0x33:
1399 case 0x38:
1400 case 0x39:
1401 case 0x3a:
7be570e7 1402 case 0x3b:
c906108c
SS
1403 return 1;
1404
1405 default:
1406 return 0;
1407 }
1408}
1409
1410/* Return the register number for a GR which is saved by INST or
b35018fd 1411 zero if INST does not save a GR.
c906108c 1412
b35018fd 1413 Referenced from:
7be570e7 1414
b35018fd
CG
1415 parisc 1.1:
1416 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1417
b35018fd
CG
1418 parisc 2.0:
1419 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1420
b35018fd
CG
1421 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1422 on page 106 in parisc 2.0, all instructions for storing values from
1423 the general registers are:
c5aa993b 1424
b35018fd
CG
1425 Store: stb, sth, stw, std (according to Chapter 7, they
1426 are only in both "inst >> 26" and "inst >> 6".
1427 Store Absolute: stwa, stda (according to Chapter 7, they are only
1428 in "inst >> 6".
1429 Store Bytes: stby, stdby (according to Chapter 7, they are
1430 only in "inst >> 6").
1431
1432 For (inst >> 26), according to Chapter 7:
1433
1434 The effective memory reference address is formed by the addition
1435 of an immediate displacement to a base value.
1436
1437 - stb: 0x18, store a byte from a general register.
1438
1439 - sth: 0x19, store a halfword from a general register.
1440
1441 - stw: 0x1a, store a word from a general register.
1442
1443 - stwm: 0x1b, store a word from a general register and perform base
1444 register modification (2.0 will still treate it as stw).
1445
1446 - std: 0x1c, store a doubleword from a general register (2.0 only).
1447
1448 - stw: 0x1f, store a word from a general register (2.0 only).
1449
1450 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1451
1452 The effective memory reference address is formed by the addition
1453 of an index value to a base value specified in the instruction.
1454
1455 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1456
1457 - sth: 0x09, store a halfword from a general register (1.1 calls
1458 sths).
1459
1460 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1461
1462 - std: 0x0b: store a doubleword from a general register (2.0 only)
1463
1464 Implement fast byte moves (stores) to unaligned word or doubleword
1465 destination.
1466
1467 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1468
1469 - stdby: 0x0d for unaligned doubleword (2.0 only).
1470
1471 Store a word or doubleword using an absolute memory address formed
1472 using short or long displacement or indexed
1473
1474 - stwa: 0x0e, store a word from a general register to an absolute
1475 address (1.0 calls stwas).
1476
1477 - stda: 0x0f, store a doubleword from a general register to an
1478 absolute address (2.0 only). */
1479
1480static int
1481inst_saves_gr (unsigned long inst)
1482{
1483 switch ((inst >> 26) & 0x0f)
1484 {
1485 case 0x03:
1486 switch ((inst >> 6) & 0x0f)
1487 {
1488 case 0x08:
1489 case 0x09:
1490 case 0x0a:
1491 case 0x0b:
1492 case 0x0c:
1493 case 0x0d:
1494 case 0x0e:
1495 case 0x0f:
1496 return hppa_extract_5R_store (inst);
1497 default:
1498 return 0;
1499 }
1500 case 0x18:
1501 case 0x19:
1502 case 0x1a:
1503 case 0x1b:
1504 case 0x1c:
1505 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1506 case 0x1f:
1507 return hppa_extract_5R_store (inst);
1508 default:
1509 return 0;
1510 }
c906108c
SS
1511}
1512
1513/* Return the register number for a FR which is saved by INST or
1514 zero it INST does not save a FR.
1515
1516 Note we only care about full 64bit register stores (that's the only
1517 kind of stores the prologue will use).
1518
1519 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1520
1521static int
fba45db2 1522inst_saves_fr (unsigned long inst)
c906108c 1523{
1777feb0 1524 /* Is this an FSTD? */
c906108c 1525 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1526 return hppa_extract_5r_store (inst);
7be570e7 1527 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1528 return hppa_extract_5R_store (inst);
1777feb0 1529 /* Is this an FSTW? */
c906108c 1530 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1531 return hppa_extract_5r_store (inst);
7be570e7 1532 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1533 return hppa_extract_5R_store (inst);
c906108c
SS
1534 return 0;
1535}
1536
1537/* Advance PC across any function entry prologue instructions
1777feb0 1538 to reach some "real" code.
c906108c
SS
1539
1540 Use information in the unwind table to determine what exactly should
1541 be in the prologue. */
1542
1543
a71f8c30 1544static CORE_ADDR
be8626e0
MD
1545skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1546 int stop_before_branch)
c906108c 1547{
e17a4113 1548 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1549 gdb_byte buf[4];
c906108c
SS
1550 CORE_ADDR orig_pc = pc;
1551 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1552 unsigned long args_stored, status, i, restart_gr, restart_fr;
1553 struct unwind_table_entry *u;
a71f8c30 1554 int final_iteration;
c906108c
SS
1555
1556 restart_gr = 0;
1557 restart_fr = 0;
1558
1559restart:
1560 u = find_unwind_entry (pc);
1561 if (!u)
1562 return pc;
1563
1777feb0 1564 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1565 if ((pc & ~0x3) != u->region_start)
1566 return pc;
1567
1568 /* This is how much of a frame adjustment we need to account for. */
1569 stack_remaining = u->Total_frame_size << 3;
1570
1571 /* Magic register saves we want to know about. */
1572 save_rp = u->Save_RP;
1573 save_sp = u->Save_SP;
1574
1575 /* An indication that args may be stored into the stack. Unfortunately
1576 the HPUX compilers tend to set this in cases where no args were
1577 stored too!. */
1578 args_stored = 1;
1579
1580 /* Turn the Entry_GR field into a bitmask. */
1581 save_gr = 0;
1582 for (i = 3; i < u->Entry_GR + 3; i++)
1583 {
1584 /* Frame pointer gets saved into a special location. */
eded0a31 1585 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1586 continue;
1587
1588 save_gr |= (1 << i);
1589 }
1590 save_gr &= ~restart_gr;
1591
1592 /* Turn the Entry_FR field into a bitmask too. */
1593 save_fr = 0;
1594 for (i = 12; i < u->Entry_FR + 12; i++)
1595 save_fr |= (1 << i);
1596 save_fr &= ~restart_fr;
1597
a71f8c30
RC
1598 final_iteration = 0;
1599
c906108c
SS
1600 /* Loop until we find everything of interest or hit a branch.
1601
1602 For unoptimized GCC code and for any HP CC code this will never ever
1603 examine any user instructions.
1604
1605 For optimzied GCC code we're faced with problems. GCC will schedule
1606 its prologue and make prologue instructions available for delay slot
1607 filling. The end result is user code gets mixed in with the prologue
1608 and a prologue instruction may be in the delay slot of the first branch
1609 or call.
1610
1611 Some unexpected things are expected with debugging optimized code, so
1612 we allow this routine to walk past user instructions in optimized
1613 GCC code. */
1614 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1615 || args_stored)
1616 {
1617 unsigned int reg_num;
1618 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1619 unsigned long old_save_rp, old_save_sp, next_inst;
1620
1621 /* Save copies of all the triggers so we can compare them later
c5aa993b 1622 (only for HPC). */
c906108c
SS
1623 old_save_gr = save_gr;
1624 old_save_fr = save_fr;
1625 old_save_rp = save_rp;
1626 old_save_sp = save_sp;
1627 old_stack_remaining = stack_remaining;
1628
8defab1a 1629 status = target_read_memory (pc, buf, 4);
e17a4113 1630 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1631
c906108c
SS
1632 /* Yow! */
1633 if (status != 0)
1634 return pc;
1635
1636 /* Note the interesting effects of this instruction. */
1637 stack_remaining -= prologue_inst_adjust_sp (inst);
1638
7be570e7
JM
1639 /* There are limited ways to store the return pointer into the
1640 stack. */
c4c79048 1641 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1642 save_rp = 0;
1643
104c1213 1644 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1645 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1646 if ((inst & 0xffffc000) == 0x6fc10000
1647 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1648 save_sp = 0;
1649
6426a772
JM
1650 /* Are we loading some register with an offset from the argument
1651 pointer? */
1652 if ((inst & 0xffe00000) == 0x37a00000
1653 || (inst & 0xffffffe0) == 0x081d0240)
1654 {
1655 pc += 4;
1656 continue;
1657 }
1658
c906108c
SS
1659 /* Account for general and floating-point register saves. */
1660 reg_num = inst_saves_gr (inst);
1661 save_gr &= ~(1 << reg_num);
1662
1663 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1664 Unfortunately args_stored only tells us that some arguments
1665 where stored into the stack. Not how many or what kind!
c906108c 1666
c5aa993b
JM
1667 This is a kludge as on the HP compiler sets this bit and it
1668 never does prologue scheduling. So once we see one, skip past
1669 all of them. We have similar code for the fp arg stores below.
c906108c 1670
c5aa993b
JM
1671 FIXME. Can still die if we have a mix of GR and FR argument
1672 stores! */
be8626e0 1673 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1674 && reg_num <= 26)
c906108c 1675 {
be8626e0 1676 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1677 && reg_num <= 26)
c906108c
SS
1678 {
1679 pc += 4;
8defab1a 1680 status = target_read_memory (pc, buf, 4);
e17a4113 1681 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1682 if (status != 0)
1683 return pc;
1684 reg_num = inst_saves_gr (inst);
1685 }
1686 args_stored = 0;
1687 continue;
1688 }
1689
1690 reg_num = inst_saves_fr (inst);
1691 save_fr &= ~(1 << reg_num);
1692
8defab1a 1693 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1694 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1695
c906108c
SS
1696 /* Yow! */
1697 if (status != 0)
1698 return pc;
1699
1700 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1701 save. */
c906108c
SS
1702 if ((inst & 0xfc000000) == 0x34000000
1703 && inst_saves_fr (next_inst) >= 4
819844ad 1704 && inst_saves_fr (next_inst)
be8626e0 1705 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1706 {
1707 /* So we drop into the code below in a reasonable state. */
1708 reg_num = inst_saves_fr (next_inst);
1709 pc -= 4;
1710 }
1711
1712 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1713 This is a kludge as on the HP compiler sets this bit and it
1714 never does prologue scheduling. So once we see one, skip past
1715 all of them. */
819844ad 1716 if (reg_num >= 4
be8626e0 1717 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1718 {
819844ad
UW
1719 while (reg_num >= 4
1720 && reg_num
be8626e0 1721 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1722 {
1723 pc += 8;
8defab1a 1724 status = target_read_memory (pc, buf, 4);
e17a4113 1725 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1726 if (status != 0)
1727 return pc;
1728 if ((inst & 0xfc000000) != 0x34000000)
1729 break;
8defab1a 1730 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1731 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1732 if (status != 0)
1733 return pc;
1734 reg_num = inst_saves_fr (next_inst);
1735 }
1736 args_stored = 0;
1737 continue;
1738 }
1739
1740 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1741 instruction is in the delay slot of the first call/branch. */
a71f8c30 1742 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1743 break;
1744
1745 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1746 arguments were stored into the stack (boo hiss). This could
1747 cause this code to then skip a bunch of user insns (up to the
1748 first branch).
1749
1750 To combat this we try to identify when args_stored was bogusly
1751 set and clear it. We only do this when args_stored is nonzero,
1752 all other resources are accounted for, and nothing changed on
1753 this pass. */
c906108c 1754 if (args_stored
c5aa993b 1755 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1756 && old_save_gr == save_gr && old_save_fr == save_fr
1757 && old_save_rp == save_rp && old_save_sp == save_sp
1758 && old_stack_remaining == stack_remaining)
1759 break;
c5aa993b 1760
c906108c
SS
1761 /* Bump the PC. */
1762 pc += 4;
a71f8c30
RC
1763
1764 /* !stop_before_branch, so also look at the insn in the delay slot
1765 of the branch. */
1766 if (final_iteration)
1767 break;
1768 if (is_branch (inst))
1769 final_iteration = 1;
c906108c
SS
1770 }
1771
1772 /* We've got a tenative location for the end of the prologue. However
1773 because of limitations in the unwind descriptor mechanism we may
1774 have went too far into user code looking for the save of a register
1775 that does not exist. So, if there registers we expected to be saved
1776 but never were, mask them out and restart.
1777
1778 This should only happen in optimized code, and should be very rare. */
c5aa993b 1779 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1780 {
1781 pc = orig_pc;
1782 restart_gr = save_gr;
1783 restart_fr = save_fr;
1784 goto restart;
1785 }
1786
1787 return pc;
1788}
1789
1790
7be570e7
JM
1791/* Return the address of the PC after the last prologue instruction if
1792 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1793
1794static CORE_ADDR
fba45db2 1795after_prologue (CORE_ADDR pc)
c906108c
SS
1796{
1797 struct symtab_and_line sal;
1798 CORE_ADDR func_addr, func_end;
c906108c 1799
7be570e7
JM
1800 /* If we can not find the symbol in the partial symbol table, then
1801 there is no hope we can determine the function's start address
1802 with this code. */
c906108c 1803 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1804 return 0;
c906108c 1805
7be570e7 1806 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1807 sal = find_pc_line (func_addr, 0);
1808
7be570e7
JM
1809 /* There are only two cases to consider. First, the end of the source line
1810 is within the function bounds. In that case we return the end of the
1811 source line. Second is the end of the source line extends beyond the
1812 bounds of the current function. We need to use the slow code to
1777feb0 1813 examine instructions in that case.
c906108c 1814
7be570e7
JM
1815 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1816 the wrong thing to do. In fact, it should be entirely possible for this
1817 function to always return zero since the slow instruction scanning code
1818 is supposed to *always* work. If it does not, then it is a bug. */
1819 if (sal.end < func_end)
1820 return sal.end;
c5aa993b 1821 else
7be570e7 1822 return 0;
c906108c
SS
1823}
1824
1825/* To skip prologues, I use this predicate. Returns either PC itself
1826 if the code at PC does not look like a function prologue; otherwise
1777feb0 1827 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1828
1829 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1830 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1831 we might not want to skip all the insns because a prologue insn may
1832 appear in the delay slot of the first branch, and we don't want to
1833 skip over the branch in that case. */
c906108c 1834
8d153463 1835static CORE_ADDR
6093d2eb 1836hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1837{
c5aa993b 1838 CORE_ADDR post_prologue_pc;
c906108c 1839
c5aa993b
JM
1840 /* See if we can determine the end of the prologue via the symbol table.
1841 If so, then return either PC, or the PC after the prologue, whichever
1842 is greater. */
c906108c 1843
c5aa993b 1844 post_prologue_pc = after_prologue (pc);
c906108c 1845
7be570e7
JM
1846 /* If after_prologue returned a useful address, then use it. Else
1847 fall back on the instruction skipping code.
1848
1849 Some folks have claimed this causes problems because the breakpoint
1850 may be the first instruction of the prologue. If that happens, then
1851 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1852 if (post_prologue_pc != 0)
325fac50 1853 return std::max (pc, post_prologue_pc);
c5aa993b 1854 else
be8626e0 1855 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1856}
1857
29d375ac 1858/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1859
29d375ac 1860static struct unwind_table_entry *
227e86ad 1861hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1862{
227e86ad 1863 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1864
1865 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1866 result of get_frame_address_in_block implies a problem.
93d42b30 1867 The bits should have been removed earlier, before the return
c7ce8faa 1868 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1869 if it isn't, it should be fixed. Then this call can be
1870 removed. */
227e86ad 1871 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1872 return find_unwind_entry (pc);
1873}
1874
26d08f08
AC
1875struct hppa_frame_cache
1876{
1877 CORE_ADDR base;
1878 struct trad_frame_saved_reg *saved_regs;
1879};
1880
1881static struct hppa_frame_cache *
227e86ad 1882hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1883{
227e86ad 1884 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1885 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1886 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1887 struct hppa_frame_cache *cache;
1888 long saved_gr_mask;
1889 long saved_fr_mask;
26d08f08
AC
1890 long frame_size;
1891 struct unwind_table_entry *u;
9f7194c3 1892 CORE_ADDR prologue_end;
50b2f48a 1893 int fp_in_r1 = 0;
26d08f08
AC
1894 int i;
1895
369aa520
RC
1896 if (hppa_debug)
1897 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1898 frame_relative_level(this_frame));
369aa520 1899
26d08f08 1900 if ((*this_cache) != NULL)
369aa520
RC
1901 {
1902 if (hppa_debug)
5af949e3
UW
1903 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1904 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1905 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1906 }
26d08f08
AC
1907 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1908 (*this_cache) = cache;
227e86ad 1909 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1910
1911 /* Yow! */
227e86ad 1912 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1913 if (!u)
369aa520
RC
1914 {
1915 if (hppa_debug)
1916 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1917 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1918 }
26d08f08
AC
1919
1920 /* Turn the Entry_GR field into a bitmask. */
1921 saved_gr_mask = 0;
1922 for (i = 3; i < u->Entry_GR + 3; i++)
1923 {
1924 /* Frame pointer gets saved into a special location. */
eded0a31 1925 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1926 continue;
1927
1928 saved_gr_mask |= (1 << i);
1929 }
1930
1931 /* Turn the Entry_FR field into a bitmask too. */
1932 saved_fr_mask = 0;
1933 for (i = 12; i < u->Entry_FR + 12; i++)
1934 saved_fr_mask |= (1 << i);
1935
1936 /* Loop until we find everything of interest or hit a branch.
1937
1938 For unoptimized GCC code and for any HP CC code this will never ever
1939 examine any user instructions.
1940
1941 For optimized GCC code we're faced with problems. GCC will schedule
1942 its prologue and make prologue instructions available for delay slot
1943 filling. The end result is user code gets mixed in with the prologue
1944 and a prologue instruction may be in the delay slot of the first branch
1945 or call.
1946
1947 Some unexpected things are expected with debugging optimized code, so
1948 we allow this routine to walk past user instructions in optimized
1949 GCC code. */
1950 {
1951 int final_iteration = 0;
46acf081 1952 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1953 int looking_for_sp = u->Save_SP;
1954 int looking_for_rp = u->Save_RP;
1955 int fp_loc = -1;
9f7194c3 1956
a71f8c30 1957 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1958 skip_prologue_using_sal, in case we stepped into a function without
1959 symbol information. hppa_skip_prologue also bounds the returned
1960 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1961 function.
a71f8c30
RC
1962
1963 We used to call hppa_skip_prologue to find the end of the prologue,
1964 but if some non-prologue instructions get scheduled into the prologue,
1965 and the program is compiled with debug information, the "easy" way
1966 in hppa_skip_prologue will return a prologue end that is too early
1967 for us to notice any potential frame adjustments. */
d5c27f81 1968
ef02daa9
DJ
1969 /* We used to use get_frame_func to locate the beginning of the
1970 function to pass to skip_prologue. However, when objects are
1971 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1972 function (or 0). We can do better than that by using unwind records.
46acf081 1973 This only works if the Region_description of the unwind record
1777feb0 1974 indicates that it includes the entry point of the function.
46acf081
RC
1975 HP compilers sometimes generate unwind records for regions that
1976 do not include the entry or exit point of a function. GNU tools
1977 do not do this. */
1978
1979 if ((u->Region_description & 0x2) == 0)
1980 start_pc = u->region_start;
1981 else
227e86ad 1982 start_pc = get_frame_func (this_frame);
d5c27f81 1983
be8626e0 1984 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1985 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1986
1987 if (prologue_end != 0 && end_pc > prologue_end)
1988 end_pc = prologue_end;
1989
26d08f08 1990 frame_size = 0;
9f7194c3 1991
46acf081 1992 for (pc = start_pc;
26d08f08
AC
1993 ((saved_gr_mask || saved_fr_mask
1994 || looking_for_sp || looking_for_rp
1995 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1996 && pc < end_pc);
26d08f08
AC
1997 pc += 4)
1998 {
1999 int reg;
e362b510 2000 gdb_byte buf4[4];
4a302917
RC
2001 long inst;
2002
227e86ad 2003 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 2004 {
5af949e3
UW
2005 error (_("Cannot read instruction at %s."),
2006 paddress (gdbarch, pc));
9a3c8263 2007 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
2008 }
2009
e17a4113 2010 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 2011
26d08f08
AC
2012 /* Note the interesting effects of this instruction. */
2013 frame_size += prologue_inst_adjust_sp (inst);
2014
2015 /* There are limited ways to store the return pointer into the
2016 stack. */
2017 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2018 {
2019 looking_for_rp = 0;
34f75cc1 2020 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 2021 }
dfaf8edb
MK
2022 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2023 {
2024 looking_for_rp = 0;
2025 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
2026 }
c4c79048
RC
2027 else if (inst == 0x0fc212c1
2028 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2029 {
2030 looking_for_rp = 0;
34f75cc1 2031 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
2032 }
2033
2034 /* Check to see if we saved SP into the stack. This also
2035 happens to indicate the location of the saved frame
2036 pointer. */
2037 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2038 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2039 {
2040 looking_for_sp = 0;
eded0a31 2041 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 2042 }
50b2f48a
RC
2043 else if (inst == 0x08030241) /* copy %r3, %r1 */
2044 {
2045 fp_in_r1 = 1;
2046 }
26d08f08
AC
2047
2048 /* Account for general and floating-point register saves. */
2049 reg = inst_saves_gr (inst);
2050 if (reg >= 3 && reg <= 18
eded0a31 2051 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2052 {
2053 saved_gr_mask &= ~(1 << reg);
abc485a1 2054 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2055 /* stwm with a positive displacement is a _post_
2056 _modify_. */
2057 cache->saved_regs[reg].addr = 0;
2058 else if ((inst & 0xfc00000c) == 0x70000008)
2059 /* A std has explicit post_modify forms. */
2060 cache->saved_regs[reg].addr = 0;
2061 else
2062 {
2063 CORE_ADDR offset;
2064
2065 if ((inst >> 26) == 0x1c)
66c6502d 2066 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2067 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2068 else if ((inst >> 26) == 0x03)
abc485a1 2069 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2070 else
abc485a1 2071 offset = hppa_extract_14 (inst);
26d08f08
AC
2072
2073 /* Handle code with and without frame pointers. */
2074 if (u->Save_SP)
2075 cache->saved_regs[reg].addr = offset;
2076 else
1777feb0
MS
2077 cache->saved_regs[reg].addr
2078 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
2079 }
2080 }
2081
2082 /* GCC handles callee saved FP regs a little differently.
2083
2084 It emits an instruction to put the value of the start of
2085 the FP store area into %r1. It then uses fstds,ma with a
2086 basereg of %r1 for the stores.
2087
2088 HP CC emits them at the current stack pointer modifying the
2089 stack pointer as it stores each register. */
2090
2091 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2092 if ((inst & 0xffffc000) == 0x34610000
2093 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2094 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2095
2096 reg = inst_saves_fr (inst);
2097 if (reg >= 12 && reg <= 21)
2098 {
2099 /* Note +4 braindamage below is necessary because the FP
2100 status registers are internally 8 registers rather than
2101 the expected 4 registers. */
2102 saved_fr_mask &= ~(1 << reg);
2103 if (fp_loc == -1)
2104 {
2105 /* 1st HP CC FP register store. After this
2106 instruction we've set enough state that the GCC and
2107 HPCC code are both handled in the same manner. */
34f75cc1 2108 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2109 fp_loc = 8;
2110 }
2111 else
2112 {
eded0a31 2113 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2114 fp_loc += 8;
2115 }
2116 }
2117
1777feb0 2118 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2119 if (final_iteration)
2120 break;
2121 /* We want to look precisely one instruction beyond the branch
2122 if we have not found everything yet. */
2123 if (is_branch (inst))
2124 final_iteration = 1;
2125 }
2126 }
2127
2128 {
2129 /* The frame base always represents the value of %sp at entry to
2130 the current function (and is thus equivalent to the "saved"
2131 stack pointer. */
227e86ad
JB
2132 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2133 HPPA_SP_REGNUM);
ed70ba00 2134 CORE_ADDR fp;
9f7194c3
RC
2135
2136 if (hppa_debug)
5af949e3
UW
2137 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2138 "prologue_end=%s) ",
2139 paddress (gdbarch, this_sp),
2140 paddress (gdbarch, get_frame_pc (this_frame)),
2141 paddress (gdbarch, prologue_end));
9f7194c3 2142
ed70ba00
RC
2143 /* Check to see if a frame pointer is available, and use it for
2144 frame unwinding if it is.
2145
2146 There are some situations where we need to rely on the frame
2147 pointer to do stack unwinding. For example, if a function calls
2148 alloca (), the stack pointer can get adjusted inside the body of
2149 the function. In this case, the ABI requires that the compiler
2150 maintain a frame pointer for the function.
2151
2152 The unwind record has a flag (alloca_frame) that indicates that
2153 a function has a variable frame; unfortunately, gcc/binutils
2154 does not set this flag. Instead, whenever a frame pointer is used
2155 and saved on the stack, the Save_SP flag is set. We use this to
2156 decide whether to use the frame pointer for unwinding.
2157
ed70ba00
RC
2158 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2159 instead of Save_SP. */
2160
227e86ad 2161 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2162
6fcecea0 2163 if (u->alloca_frame)
46acf081 2164 fp -= u->Total_frame_size << 3;
ed70ba00 2165
227e86ad 2166 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2167 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2168 {
2169 cache->base = fp;
2170
2171 if (hppa_debug)
5af949e3
UW
2172 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2173 paddress (gdbarch, cache->base));
ed70ba00 2174 }
1658da49
RC
2175 else if (u->Save_SP
2176 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2177 {
9f7194c3
RC
2178 /* Both we're expecting the SP to be saved and the SP has been
2179 saved. The entry SP value is saved at this frame's SP
2180 address. */
e17a4113 2181 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2182
2183 if (hppa_debug)
5af949e3
UW
2184 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2185 paddress (gdbarch, cache->base));
9f7194c3 2186 }
26d08f08 2187 else
9f7194c3 2188 {
1658da49
RC
2189 /* The prologue has been slowly allocating stack space. Adjust
2190 the SP back. */
2191 cache->base = this_sp - frame_size;
9f7194c3 2192 if (hppa_debug)
5af949e3
UW
2193 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2194 paddress (gdbarch, cache->base));
9f7194c3
RC
2195
2196 }
eded0a31 2197 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2198 }
2199
412275d5
AC
2200 /* The PC is found in the "return register", "Millicode" uses "r31"
2201 as the return register while normal code uses "rp". */
26d08f08 2202 if (u->Millicode)
9f7194c3 2203 {
5859efe5 2204 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2205 {
2206 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2207 if (hppa_debug)
2208 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2209 }
9f7194c3
RC
2210 else
2211 {
227e86ad 2212 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2213 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2214 if (hppa_debug)
2215 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2216 }
2217 }
26d08f08 2218 else
9f7194c3 2219 {
34f75cc1 2220 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2221 {
2222 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2223 cache->saved_regs[HPPA_RP_REGNUM];
2224 if (hppa_debug)
2225 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2226 }
9f7194c3
RC
2227 else
2228 {
227e86ad
JB
2229 ULONGEST rp = get_frame_register_unsigned (this_frame,
2230 HPPA_RP_REGNUM);
34f75cc1 2231 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2232 if (hppa_debug)
2233 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2234 }
2235 }
26d08f08 2236
50b2f48a
RC
2237 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2238 frame. However, there is a one-insn window where we haven't saved it
2239 yet, but we've already clobbered it. Detect this case and fix it up.
2240
2241 The prologue sequence for frame-pointer functions is:
2242 0: stw %rp, -20(%sp)
2243 4: copy %r3, %r1
2244 8: copy %sp, %r3
2245 c: stw,ma %r1, XX(%sp)
2246
2247 So if we are at offset c, the r3 value that we want is not yet saved
2248 on the stack, but it's been overwritten. The prologue analyzer will
2249 set fp_in_r1 when it sees the copy insn so we know to get the value
2250 from r1 instead. */
2251 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2252 && fp_in_r1)
2253 {
227e86ad 2254 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2255 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2256 }
1658da49 2257
26d08f08
AC
2258 {
2259 /* Convert all the offsets into addresses. */
2260 int reg;
65c5db89 2261 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2262 {
2263 if (trad_frame_addr_p (cache->saved_regs, reg))
2264 cache->saved_regs[reg].addr += cache->base;
2265 }
2266 }
2267
f77a2124 2268 {
f77a2124
RC
2269 struct gdbarch_tdep *tdep;
2270
f77a2124
RC
2271 tdep = gdbarch_tdep (gdbarch);
2272
2273 if (tdep->unwind_adjust_stub)
227e86ad 2274 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2275 }
2276
369aa520 2277 if (hppa_debug)
5af949e3
UW
2278 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2279 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2280 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2281}
2282
2283static void
227e86ad
JB
2284hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2285 struct frame_id *this_id)
26d08f08 2286{
d5c27f81 2287 struct hppa_frame_cache *info;
d5c27f81
RC
2288 struct unwind_table_entry *u;
2289
227e86ad
JB
2290 info = hppa_frame_cache (this_frame, this_cache);
2291 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2292
2293 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2294}
2295
227e86ad
JB
2296static struct value *
2297hppa_frame_prev_register (struct frame_info *this_frame,
2298 void **this_cache, int regnum)
26d08f08 2299{
227e86ad
JB
2300 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2301
1777feb0
MS
2302 return hppa_frame_prev_register_helper (this_frame,
2303 info->saved_regs, regnum);
227e86ad
JB
2304}
2305
2306static int
2307hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2308 struct frame_info *this_frame, void **this_cache)
2309{
2310 if (hppa_find_unwind_entry_in_block (this_frame))
2311 return 1;
2312
2313 return 0;
0da28f8a
RC
2314}
2315
2316static const struct frame_unwind hppa_frame_unwind =
2317{
2318 NORMAL_FRAME,
8fbca658 2319 default_frame_unwind_stop_reason,
0da28f8a 2320 hppa_frame_this_id,
227e86ad
JB
2321 hppa_frame_prev_register,
2322 NULL,
2323 hppa_frame_unwind_sniffer
0da28f8a
RC
2324};
2325
0da28f8a
RC
2326/* This is a generic fallback frame unwinder that kicks in if we fail all
2327 the other ones. Normally we would expect the stub and regular unwinder
2328 to work, but in some cases we might hit a function that just doesn't
2329 have any unwind information available. In this case we try to do
2330 unwinding solely based on code reading. This is obviously going to be
2331 slow, so only use this as a last resort. Currently this will only
2332 identify the stack and pc for the frame. */
2333
2334static struct hppa_frame_cache *
227e86ad 2335hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2336{
e17a4113
UW
2337 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2338 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2339 struct hppa_frame_cache *cache;
4ba6a975
MK
2340 unsigned int frame_size = 0;
2341 int found_rp = 0;
2342 CORE_ADDR start_pc;
0da28f8a 2343
d5c27f81 2344 if (hppa_debug)
4ba6a975
MK
2345 fprintf_unfiltered (gdb_stdlog,
2346 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2347 frame_relative_level (this_frame));
d5c27f81 2348
0da28f8a
RC
2349 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2350 (*this_cache) = cache;
227e86ad 2351 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2352
227e86ad 2353 start_pc = get_frame_func (this_frame);
4ba6a975 2354 if (start_pc)
0da28f8a 2355 {
227e86ad 2356 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2357 CORE_ADDR pc;
0da28f8a 2358
4ba6a975
MK
2359 for (pc = start_pc; pc < cur_pc; pc += 4)
2360 {
2361 unsigned int insn;
0da28f8a 2362
e17a4113 2363 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2364 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2365
4ba6a975
MK
2366 /* There are limited ways to store the return pointer into the
2367 stack. */
2368 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2369 {
2370 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2371 found_rp = 1;
2372 }
c4c79048
RC
2373 else if (insn == 0x0fc212c1
2374 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2375 {
2376 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2377 found_rp = 1;
2378 }
2379 }
412275d5 2380 }
0da28f8a 2381
d5c27f81 2382 if (hppa_debug)
4ba6a975
MK
2383 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2384 frame_size, found_rp);
d5c27f81 2385
227e86ad 2386 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2387 cache->base -= frame_size;
6d1be3f1 2388 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2389
2390 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2391 {
2392 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2393 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2394 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2395 }
412275d5
AC
2396 else
2397 {
4ba6a975 2398 ULONGEST rp;
227e86ad 2399 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2400 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2401 }
0da28f8a
RC
2402
2403 return cache;
26d08f08
AC
2404}
2405
0da28f8a 2406static void
227e86ad 2407hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2408 struct frame_id *this_id)
2409{
2410 struct hppa_frame_cache *info =
227e86ad
JB
2411 hppa_fallback_frame_cache (this_frame, this_cache);
2412
2413 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2414}
2415
227e86ad
JB
2416static struct value *
2417hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2418 void **this_cache, int regnum)
0da28f8a 2419{
1777feb0
MS
2420 struct hppa_frame_cache *info
2421 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2422
1777feb0
MS
2423 return hppa_frame_prev_register_helper (this_frame,
2424 info->saved_regs, regnum);
0da28f8a
RC
2425}
2426
2427static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2428{
2429 NORMAL_FRAME,
8fbca658 2430 default_frame_unwind_stop_reason,
0da28f8a 2431 hppa_fallback_frame_this_id,
227e86ad
JB
2432 hppa_fallback_frame_prev_register,
2433 NULL,
2434 default_frame_sniffer
26d08f08
AC
2435};
2436
7f07c5b6
RC
2437/* Stub frames, used for all kinds of call stubs. */
2438struct hppa_stub_unwind_cache
2439{
2440 CORE_ADDR base;
2441 struct trad_frame_saved_reg *saved_regs;
2442};
2443
2444static struct hppa_stub_unwind_cache *
227e86ad 2445hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2446 void **this_cache)
2447{
227e86ad 2448 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2449 struct hppa_stub_unwind_cache *info;
22b0923d 2450 struct unwind_table_entry *u;
7f07c5b6
RC
2451
2452 if (*this_cache)
9a3c8263 2453 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2454
2455 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2456 *this_cache = info;
227e86ad 2457 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2458
227e86ad 2459 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2460
090ccbb7 2461 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2462 {
2463 /* HPUX uses export stubs in function calls; the export stub clobbers
2464 the return value of the caller, and, later restores it from the
2465 stack. */
227e86ad 2466 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2467
2468 if (u && u->stub_unwind.stub_type == EXPORT)
2469 {
2470 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2471
2472 return info;
2473 }
2474 }
2475
2476 /* By default we assume that stubs do not change the rp. */
2477 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2478
7f07c5b6
RC
2479 return info;
2480}
2481
2482static void
227e86ad 2483hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2484 void **this_prologue_cache,
2485 struct frame_id *this_id)
2486{
2487 struct hppa_stub_unwind_cache *info
227e86ad 2488 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2489
2490 if (info)
227e86ad 2491 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2492}
2493
227e86ad
JB
2494static struct value *
2495hppa_stub_frame_prev_register (struct frame_info *this_frame,
2496 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2497{
2498 struct hppa_stub_unwind_cache *info
227e86ad 2499 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2500
227e86ad 2501 if (info == NULL)
8a3fe4f8 2502 error (_("Requesting registers from null frame."));
7f07c5b6 2503
1777feb0
MS
2504 return hppa_frame_prev_register_helper (this_frame,
2505 info->saved_regs, regnum);
227e86ad 2506}
7f07c5b6 2507
227e86ad
JB
2508static int
2509hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2510 struct frame_info *this_frame,
2511 void **this_cache)
7f07c5b6 2512{
227e86ad
JB
2513 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2514 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2515 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2516
6d1be3f1 2517 if (pc == 0
84674fe1 2518 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2519 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2520 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2521 return 1;
2522 return 0;
7f07c5b6
RC
2523}
2524
227e86ad
JB
2525static const struct frame_unwind hppa_stub_frame_unwind = {
2526 NORMAL_FRAME,
8fbca658 2527 default_frame_unwind_stop_reason,
227e86ad
JB
2528 hppa_stub_frame_this_id,
2529 hppa_stub_frame_prev_register,
2530 NULL,
2531 hppa_stub_unwind_sniffer
2532};
2533
26d08f08 2534static struct frame_id
227e86ad 2535hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2536{
227e86ad
JB
2537 return frame_id_build (get_frame_register_unsigned (this_frame,
2538 HPPA_SP_REGNUM),
2539 get_frame_pc (this_frame));
26d08f08
AC
2540}
2541
cc72850f 2542CORE_ADDR
26d08f08
AC
2543hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2544{
fe46cd3a
RC
2545 ULONGEST ipsw;
2546 CORE_ADDR pc;
2547
cc72850f
MK
2548 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2549 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2550
2551 /* If the current instruction is nullified, then we are effectively
2552 still executing the previous instruction. Pretend we are still
cc72850f
MK
2553 there. This is needed when single stepping; if the nullified
2554 instruction is on a different line, we don't want GDB to think
2555 we've stepped onto that line. */
fe46cd3a
RC
2556 if (ipsw & 0x00200000)
2557 pc -= 4;
2558
cc72850f 2559 return pc & ~0x3;
26d08f08
AC
2560}
2561
ff644745
JB
2562/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2563 Return NULL if no such symbol was found. */
2564
3b7344d5 2565struct bound_minimal_symbol
ff644745
JB
2566hppa_lookup_stub_minimal_symbol (const char *name,
2567 enum unwind_stub_types stub_type)
2568{
2569 struct objfile *objfile;
2570 struct minimal_symbol *msym;
3b7344d5 2571 struct bound_minimal_symbol result = { NULL, NULL };
ff644745
JB
2572
2573 ALL_MSYMBOLS (objfile, msym)
2574 {
efd66ac6 2575 if (strcmp (MSYMBOL_LINKAGE_NAME (msym), name) == 0)
ff644745
JB
2576 {
2577 struct unwind_table_entry *u;
2578
efd66ac6 2579 u = find_unwind_entry (MSYMBOL_VALUE (msym));
ff644745 2580 if (u != NULL && u->stub_unwind.stub_type == stub_type)
3b7344d5
TT
2581 {
2582 result.objfile = objfile;
2583 result.minsym = msym;
2584 return result;
2585 }
ff644745
JB
2586 }
2587 }
2588
3b7344d5 2589 return result;
ff644745
JB
2590}
2591
c906108c 2592static void
fba45db2 2593unwind_command (char *exp, int from_tty)
c906108c
SS
2594{
2595 CORE_ADDR address;
2596 struct unwind_table_entry *u;
2597
2598 /* If we have an expression, evaluate it and use it as the address. */
2599
2600 if (exp != 0 && *exp != 0)
2601 address = parse_and_eval_address (exp);
2602 else
2603 return;
2604
2605 u = find_unwind_entry (address);
2606
2607 if (!u)
2608 {
2609 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2610 return;
2611 }
2612
3329c4b5 2613 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2614
5af949e3 2615 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2616 gdb_flush (gdb_stdout);
c906108c 2617
5af949e3 2618 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2619 gdb_flush (gdb_stdout);
c906108c 2620
c906108c 2621#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2622
2623 printf_unfiltered ("\n\tflags =");
2624 pif (Cannot_unwind);
2625 pif (Millicode);
2626 pif (Millicode_save_sr0);
2627 pif (Entry_SR);
2628 pif (Args_stored);
2629 pif (Variable_Frame);
2630 pif (Separate_Package_Body);
2631 pif (Frame_Extension_Millicode);
2632 pif (Stack_Overflow_Check);
2633 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2634 pif (sr4export);
2635 pif (cxx_info);
2636 pif (cxx_try_catch);
2637 pif (sched_entry_seq);
c906108c
SS
2638 pif (Save_SP);
2639 pif (Save_RP);
2640 pif (Save_MRP_in_frame);
6fcecea0 2641 pif (save_r19);
c906108c
SS
2642 pif (Cleanup_defined);
2643 pif (MPE_XL_interrupt_marker);
2644 pif (HP_UX_interrupt_marker);
2645 pif (Large_frame);
6fcecea0 2646 pif (alloca_frame);
c906108c
SS
2647
2648 putchar_unfiltered ('\n');
2649
c906108c 2650#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2651
2652 pin (Region_description);
2653 pin (Entry_FR);
2654 pin (Entry_GR);
2655 pin (Total_frame_size);
57dac9e1
RC
2656
2657 if (u->stub_unwind.stub_type)
2658 {
2659 printf_unfiltered ("\tstub type = ");
2660 switch (u->stub_unwind.stub_type)
2661 {
2662 case LONG_BRANCH:
2663 printf_unfiltered ("long branch\n");
2664 break;
2665 case PARAMETER_RELOCATION:
2666 printf_unfiltered ("parameter relocation\n");
2667 break;
2668 case EXPORT:
2669 printf_unfiltered ("export\n");
2670 break;
2671 case IMPORT:
2672 printf_unfiltered ("import\n");
2673 break;
2674 case IMPORT_SHLIB:
2675 printf_unfiltered ("import shlib\n");
2676 break;
2677 default:
2678 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2679 }
2680 }
c906108c 2681}
c906108c 2682
38ca4e0c
MK
2683/* Return the GDB type object for the "standard" data type of data in
2684 register REGNUM. */
d709c020 2685
eded0a31 2686static struct type *
38ca4e0c 2687hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2688{
38ca4e0c 2689 if (regnum < HPPA_FP4_REGNUM)
df4df182 2690 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2691 else
27067745 2692 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2693}
2694
eded0a31 2695static struct type *
38ca4e0c 2696hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2697{
38ca4e0c 2698 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2699 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2700 else
27067745 2701 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2702}
2703
38ca4e0c
MK
2704/* Return non-zero if REGNUM is not a register available to the user
2705 through ptrace/ttrace. */
d709c020 2706
8d153463 2707static int
64a3914f 2708hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2709{
2710 return (regnum == 0
34f75cc1
RC
2711 || regnum == HPPA_PCSQ_HEAD_REGNUM
2712 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2713 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2714}
d709c020 2715
d037d088 2716static int
64a3914f 2717hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2718{
2719 /* cr26 and cr27 are readable (but not writable) from userspace. */
2720 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2721 return 0;
2722 else
64a3914f 2723 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2724}
2725
38ca4e0c 2726static int
64a3914f 2727hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2728{
2729 return (regnum == 0
2730 || regnum == HPPA_PCSQ_HEAD_REGNUM
2731 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2732 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2733}
2734
d037d088 2735static int
64a3914f 2736hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2737{
2738 /* cr26 and cr27 are readable (but not writable) from userspace. */
2739 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2740 return 0;
2741 else
64a3914f 2742 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2743}
2744
8d153463 2745static CORE_ADDR
85ddcc70 2746hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2747{
2748 /* The low two bits of the PC on the PA contain the privilege level.
2749 Some genius implementing a (non-GCC) compiler apparently decided
2750 this means that "addresses" in a text section therefore include a
2751 privilege level, and thus symbol tables should contain these bits.
2752 This seems like a bonehead thing to do--anyway, it seems to work
2753 for our purposes to just ignore those bits. */
2754
2755 return (addr &= ~0x3);
2756}
2757
e127f0db
MK
2758/* Get the ARGIth function argument for the current function. */
2759
4a302917 2760static CORE_ADDR
143985b7
AF
2761hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2762 struct type *type)
2763{
e127f0db 2764 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2765}
2766
05d1431c 2767static enum register_status
0f8d9d59 2768hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2769 int regnum, gdb_byte *buf)
0f8d9d59 2770{
05d1431c
PA
2771 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2772 ULONGEST tmp;
2773 enum register_status status;
0f8d9d59 2774
05d1431c
PA
2775 status = regcache_raw_read_unsigned (regcache, regnum, &tmp);
2776 if (status == REG_VALID)
2777 {
2778 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2779 tmp &= ~0x3;
2780 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2781 }
2782 return status;
0f8d9d59
RC
2783}
2784
d49771ef 2785static CORE_ADDR
e38c262f 2786hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2787{
2788 return 0;
2789}
2790
227e86ad
JB
2791struct value *
2792hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2793 struct trad_frame_saved_reg saved_regs[],
227e86ad 2794 int regnum)
0da28f8a 2795{
227e86ad 2796 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2797 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2798
8693c419
MK
2799 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2800 {
227e86ad
JB
2801 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2802 CORE_ADDR pc;
2803 struct value *pcoq_val =
2804 trad_frame_get_prev_register (this_frame, saved_regs,
2805 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2806
e17a4113
UW
2807 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2808 size, byte_order);
227e86ad 2809 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2810 }
0da28f8a 2811
227e86ad 2812 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2813}
8693c419 2814\f
0da28f8a 2815
34f55018
MK
2816/* An instruction to match. */
2817struct insn_pattern
2818{
2819 unsigned int data; /* See if it matches this.... */
2820 unsigned int mask; /* ... with this mask. */
2821};
2822
2823/* See bfd/elf32-hppa.c */
2824static struct insn_pattern hppa_long_branch_stub[] = {
2825 /* ldil LR'xxx,%r1 */
2826 { 0x20200000, 0xffe00000 },
2827 /* be,n RR'xxx(%sr4,%r1) */
2828 { 0xe0202002, 0xffe02002 },
2829 { 0, 0 }
2830};
2831
2832static struct insn_pattern hppa_long_branch_pic_stub[] = {
2833 /* b,l .+8, %r1 */
2834 { 0xe8200000, 0xffe00000 },
2835 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2836 { 0x28200000, 0xffe00000 },
2837 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2838 { 0xe0202002, 0xffe02002 },
2839 { 0, 0 }
2840};
2841
2842static struct insn_pattern hppa_import_stub[] = {
2843 /* addil LR'xxx, %dp */
2844 { 0x2b600000, 0xffe00000 },
2845 /* ldw RR'xxx(%r1), %r21 */
2846 { 0x48350000, 0xffffb000 },
2847 /* bv %r0(%r21) */
2848 { 0xeaa0c000, 0xffffffff },
2849 /* ldw RR'xxx+4(%r1), %r19 */
2850 { 0x48330000, 0xffffb000 },
2851 { 0, 0 }
2852};
2853
2854static struct insn_pattern hppa_import_pic_stub[] = {
2855 /* addil LR'xxx,%r19 */
2856 { 0x2a600000, 0xffe00000 },
2857 /* ldw RR'xxx(%r1),%r21 */
2858 { 0x48350000, 0xffffb000 },
2859 /* bv %r0(%r21) */
2860 { 0xeaa0c000, 0xffffffff },
2861 /* ldw RR'xxx+4(%r1),%r19 */
2862 { 0x48330000, 0xffffb000 },
2863 { 0, 0 },
2864};
2865
2866static struct insn_pattern hppa_plt_stub[] = {
2867 /* b,l 1b, %r20 - 1b is 3 insns before here */
2868 { 0xea9f1fdd, 0xffffffff },
2869 /* depi 0,31,2,%r20 */
2870 { 0xd6801c1e, 0xffffffff },
2871 { 0, 0 }
34f55018
MK
2872};
2873
2874/* Maximum number of instructions on the patterns above. */
2875#define HPPA_MAX_INSN_PATTERN_LEN 4
2876
2877/* Return non-zero if the instructions at PC match the series
2878 described in PATTERN, or zero otherwise. PATTERN is an array of
2879 'struct insn_pattern' objects, terminated by an entry whose mask is
2880 zero.
2881
2882 When the match is successful, fill INSN[i] with what PATTERN[i]
2883 matched. */
2884
2885static int
e17a4113
UW
2886hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2887 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2888{
e17a4113 2889 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2890 CORE_ADDR npc = pc;
2891 int i;
2892
2893 for (i = 0; pattern[i].mask; i++)
2894 {
2895 gdb_byte buf[HPPA_INSN_SIZE];
2896
8defab1a 2897 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2898 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2899 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2900 npc += 4;
2901 else
2902 return 0;
2903 }
2904
2905 return 1;
2906}
2907
2908/* This relaxed version of the insstruction matcher allows us to match
2909 from somewhere inside the pattern, by looking backwards in the
2910 instruction scheme. */
2911
2912static int
e17a4113
UW
2913hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2914 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2915{
2916 int offset, len = 0;
2917
2918 while (pattern[len].mask)
2919 len++;
2920
2921 for (offset = 0; offset < len; offset++)
e17a4113
UW
2922 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2923 pattern, insn))
34f55018
MK
2924 return 1;
2925
2926 return 0;
2927}
2928
2929static int
2930hppa_in_dyncall (CORE_ADDR pc)
2931{
2932 struct unwind_table_entry *u;
2933
2934 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2935 if (!u)
2936 return 0;
2937
2938 return (pc >= u->region_start && pc <= u->region_end);
2939}
2940
2941int
3e5d3a5a 2942hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2943{
2944 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2945 struct unwind_table_entry *u;
2946
3e5d3a5a 2947 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2948 return 1;
2949
2950 /* The GNU toolchain produces linker stubs without unwind
2951 information. Since the pattern matching for linker stubs can be
2952 quite slow, so bail out if we do have an unwind entry. */
2953
2954 u = find_unwind_entry (pc);
806e23c0 2955 if (u != NULL)
34f55018
MK
2956 return 0;
2957
e17a4113
UW
2958 return
2959 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2960 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2961 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2962 || hppa_match_insns_relaxed (gdbarch, pc,
2963 hppa_long_branch_pic_stub, insn));
34f55018
MK
2964}
2965
2966/* This code skips several kind of "trampolines" used on PA-RISC
2967 systems: $$dyncall, import stubs and PLT stubs. */
2968
2969CORE_ADDR
52f729a7 2970hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2971{
0dfff4cb
UW
2972 struct gdbarch *gdbarch = get_frame_arch (frame);
2973 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2974
34f55018
MK
2975 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2976 int dp_rel;
2977
2978 /* $$dyncall handles both PLABELs and direct addresses. */
2979 if (hppa_in_dyncall (pc))
2980 {
52f729a7 2981 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2982
2983 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2984 if (pc & 0x2)
0dfff4cb 2985 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2986
2987 return pc;
2988 }
2989
e17a4113
UW
2990 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2991 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2992 {
2993 /* Extract the target address from the addil/ldw sequence. */
2994 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2995
2996 if (dp_rel)
52f729a7 2997 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2998 else
52f729a7 2999 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
3000
3001 /* fallthrough */
3002 }
3003
3e5d3a5a 3004 if (in_plt_section (pc))
34f55018 3005 {
0dfff4cb 3006 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
3007
3008 /* If the PLT slot has not yet been resolved, the target will be
3009 the PLT stub. */
3e5d3a5a 3010 if (in_plt_section (pc))
34f55018
MK
3011 {
3012 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 3013 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 3014 {
5af949e3
UW
3015 warning (_("Cannot resolve PLT stub at %s."),
3016 paddress (gdbarch, pc));
34f55018
MK
3017 return 0;
3018 }
3019
3020 /* This should point to the fixup routine. */
0dfff4cb 3021 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
3022 }
3023 }
3024
3025 return pc;
3026}
3027\f
3028
8e8b2dba
MC
3029/* Here is a table of C type sizes on hppa with various compiles
3030 and options. I measured this on PA 9000/800 with HP-UX 11.11
3031 and these compilers:
3032
3033 /usr/ccs/bin/cc HP92453-01 A.11.01.21
3034 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3035 /opt/aCC/bin/aCC B3910B A.03.45
3036 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3037
3038 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3039 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3040 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3041 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3042 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3043 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3044 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3045 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3046
3047 Each line is:
3048
3049 compiler and options
3050 char, short, int, long, long long
3051 float, double, long double
3052 char *, void (*)()
3053
3054 So all these compilers use either ILP32 or LP64 model.
3055 TODO: gcc has more options so it needs more investigation.
3056
a2379359
MC
3057 For floating point types, see:
3058
3059 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3060 HP-UX floating-point guide, hpux 11.00
3061
8e8b2dba
MC
3062 -- chastain 2003-12-18 */
3063
e6e68f1f
JB
3064static struct gdbarch *
3065hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3066{
3ff7cf9e 3067 struct gdbarch_tdep *tdep;
e6e68f1f 3068 struct gdbarch *gdbarch;
59623e27
JB
3069
3070 /* Try to determine the ABI of the object we are loading. */
4be87837 3071 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 3072 {
4be87837
DJ
3073 /* If it's a SOM file, assume it's HP/UX SOM. */
3074 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
3075 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3076 }
e6e68f1f
JB
3077
3078 /* find a candidate among the list of pre-declared architectures. */
3079 arches = gdbarch_list_lookup_by_info (arches, &info);
3080 if (arches != NULL)
3081 return (arches->gdbarch);
3082
3083 /* If none found, then allocate and initialize one. */
41bf6aca 3084 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3085 gdbarch = gdbarch_alloc (&info, tdep);
3086
3087 /* Determine from the bfd_arch_info structure if we are dealing with
3088 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3089 then default to a 32bit machine. */
3090 if (info.bfd_arch_info != NULL)
3091 tdep->bytes_per_address =
3092 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3093 else
3094 tdep->bytes_per_address = 4;
3095
d49771ef
RC
3096 tdep->find_global_pointer = hppa_find_global_pointer;
3097
3ff7cf9e
JB
3098 /* Some parts of the gdbarch vector depend on whether we are running
3099 on a 32 bits or 64 bits target. */
3100 switch (tdep->bytes_per_address)
3101 {
3102 case 4:
3103 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3104 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3105 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3106 set_gdbarch_cannot_store_register (gdbarch,
3107 hppa32_cannot_store_register);
3108 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3109 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3110 break;
3111 case 8:
3112 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3113 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3114 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3115 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3116 set_gdbarch_cannot_store_register (gdbarch,
3117 hppa64_cannot_store_register);
3118 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3119 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3120 break;
3121 default:
e2e0b3e5 3122 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3123 tdep->bytes_per_address);
3124 }
3125
3ff7cf9e 3126 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3127 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3128
8e8b2dba
MC
3129 /* The following gdbarch vector elements are the same in both ILP32
3130 and LP64, but might show differences some day. */
3131 set_gdbarch_long_long_bit (gdbarch, 64);
3132 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3133 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3134
3ff7cf9e
JB
3135 /* The following gdbarch vector elements do not depend on the address
3136 size, or in any other gdbarch element previously set. */
60383d10 3137 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3138 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3139 hppa_stack_frame_destroyed_p);
a2a84a72 3140 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3141 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3142 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3143 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3144 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3145 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3146 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3147
143985b7
AF
3148 /* Helper for function argument information. */
3149 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3150
36482093
AC
3151 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3152
3a3bc038
AC
3153 /* When a hardware watchpoint triggers, we'll move the inferior past
3154 it by removing all eventpoints; stepping past the instruction
3155 that caused the trigger; reinserting eventpoints; and checking
3156 whether any watched location changed. */
3157 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3158
5979bc46 3159 /* Inferior function call methods. */
fca7aa43 3160 switch (tdep->bytes_per_address)
5979bc46 3161 {
fca7aa43
AC
3162 case 4:
3163 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3164 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3165 set_gdbarch_convert_from_func_ptr_addr
3166 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3167 break;
3168 case 8:
782eae8b
AC
3169 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3170 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3171 break;
782eae8b 3172 default:
e2e0b3e5 3173 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3174 }
3175
3176 /* Struct return methods. */
fca7aa43 3177 switch (tdep->bytes_per_address)
fad850b2 3178 {
fca7aa43
AC
3179 case 4:
3180 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3181 break;
3182 case 8:
782eae8b 3183 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3184 break;
fca7aa43 3185 default:
e2e0b3e5 3186 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3187 }
7f07c5b6 3188
85f4f2d8 3189 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3190 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3191
5979bc46 3192 /* Frame unwind methods. */
227e86ad 3193 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3194 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3195
50306a9d
RC
3196 /* Hook in ABI-specific overrides, if they have been registered. */
3197 gdbarch_init_osabi (info, gdbarch);
3198
7f07c5b6 3199 /* Hook in the default unwinders. */
227e86ad
JB
3200 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3201 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3202 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3203
e6e68f1f
JB
3204 return gdbarch;
3205}
3206
3207static void
464963c9 3208hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3209{
464963c9 3210 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3211
3212 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3213 tdep->bytes_per_address);
3214 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3215}
3216
72753510
PA
3217/* Provide a prototype to silence -Wmissing-prototypes. */
3218extern initialize_file_ftype _initialize_hppa_tdep;
3219
4facf7e8
JB
3220void
3221_initialize_hppa_tdep (void)
3222{
e6e68f1f 3223 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3224
7c46b9fb
RC
3225 hppa_objfile_priv_data = register_objfile_data ();
3226
4facf7e8 3227 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3228 _("Print unwind table entry at given address."),
4facf7e8
JB
3229 &maintenanceprintlist);
3230
1777feb0 3231 /* Debug this files internals. */
7915a72c
AC
3232 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3233Set whether hppa target specific debugging information should be displayed."),
3234 _("\
3235Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3236This flag controls whether hppa target specific debugging information is\n\
3237displayed. This information is particularly useful for debugging frame\n\
7915a72c 3238unwinding problems."),
2c5b56ce 3239 NULL,
7915a72c 3240 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3241 &setdebuglist, &showdebuglist);
4facf7e8 3242}
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