import strstr and strerror modules
[deliverable/binutils-gdb.git] / gdb / i386-darwin-nat.c
CommitLineData
a80b95ba 1/* Darwin support for GDB, the GNU debugger.
0b1afbb3 2 Copyright (C) 1997-2013 Free Software Foundation, Inc.
a80b95ba
TG
3
4 Contributed by Apple Computer, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "target.h"
25#include "symfile.h"
26#include "symtab.h"
27#include "objfiles.h"
28#include "gdbcmd.h"
29#include "regcache.h"
30#include "gdb_assert.h"
31#include "i386-tdep.h"
a80b95ba
TG
32#include "i387-tdep.h"
33#include "gdbarch.h"
34#include "arch-utils.h"
acdb24a9 35#include "gdbcore.h"
a80b95ba 36
bc884eba 37#include "i386-nat.h"
a80b95ba
TG
38#include "darwin-nat.h"
39#include "i386-darwin-tdep.h"
40
5cd226f2
TG
41#ifdef BFD64
42#include "amd64-nat.h"
46187dff 43#include "amd64-tdep.h"
5cd226f2
TG
44#include "amd64-darwin-tdep.h"
45#endif
46
a80b95ba
TG
47/* Read register values from the inferior process.
48 If REGNO is -1, do this for all registers.
49 Otherwise, REGNO specifies which register (so we can save time). */
50static void
28439f5e
PA
51i386_darwin_fetch_inferior_registers (struct target_ops *ops,
52 struct regcache *regcache, int regno)
a80b95ba
TG
53{
54 thread_t current_thread = ptid_get_tid (inferior_ptid);
55 int fetched = 0;
56 struct gdbarch *gdbarch = get_regcache_arch (regcache);
57
5cd226f2 58#ifdef BFD64
a80b95ba
TG
59 if (gdbarch_ptr_bit (gdbarch) == 64)
60 {
61 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
62 {
63 x86_thread_state_t gp_regs;
64 unsigned int gp_count = x86_THREAD_STATE_COUNT;
65 kern_return_t ret;
66
67 ret = thread_get_state
68 (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
69 &gp_count);
70 if (ret != KERN_SUCCESS)
71 {
1777feb0 72 printf_unfiltered (_("Error calling thread_get_state for "
17092398 73 "GP registers for thread 0x%lx\n"),
016b7430 74 (unsigned long) current_thread);
a80b95ba
TG
75 MACH_CHECK_ERROR (ret);
76 }
77 amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
78 fetched++;
79 }
80
81 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
82 {
83 x86_float_state_t fp_regs;
84 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
85 kern_return_t ret;
86
87 ret = thread_get_state
88 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
89 &fp_count);
90 if (ret != KERN_SUCCESS)
91 {
1777feb0 92 printf_unfiltered (_("Error calling thread_get_state for "
17092398 93 "float registers for thread 0x%lx\n"),
016b7430 94 (unsigned long) current_thread);
a80b95ba
TG
95 MACH_CHECK_ERROR (ret);
96 }
46187dff 97 amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
98 fetched++;
99 }
100 }
101 else
5cd226f2 102#endif
a80b95ba
TG
103 {
104 if (regno == -1 || regno < I386_NUM_GREGS)
105 {
cf9bb588
TG
106 x86_thread_state32_t gp_regs;
107 unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba
TG
108 kern_return_t ret;
109 int i;
110
111 ret = thread_get_state
cf9bb588 112 (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba
TG
113 &gp_count);
114 if (ret != KERN_SUCCESS)
115 {
1777feb0 116 printf_unfiltered (_("Error calling thread_get_state for "
17092398
TG
117 "GP registers for thread 0x%lx\n"),
118 (unsigned long) current_thread);
a80b95ba
TG
119 MACH_CHECK_ERROR (ret);
120 }
121 for (i = 0; i < I386_NUM_GREGS; i++)
122 regcache_raw_supply
123 (regcache, i,
124 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
125
126 fetched++;
127 }
128
129 if (regno == -1
130 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
131 {
cf9bb588
TG
132 x86_float_state32_t fp_regs;
133 unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba
TG
134 kern_return_t ret;
135
136 ret = thread_get_state
cf9bb588 137 (current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
a80b95ba
TG
138 &fp_count);
139 if (ret != KERN_SUCCESS)
140 {
1777feb0 141 printf_unfiltered (_("Error calling thread_get_state for "
17092398
TG
142 "float registers for thread 0x%lx\n"),
143 (unsigned long) current_thread);
a80b95ba
TG
144 MACH_CHECK_ERROR (ret);
145 }
146 i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
147 fetched++;
148 }
149 }
150
151 if (! fetched)
152 {
153 warning (_("unknown register %d"), regno);
154 regcache_raw_supply (regcache, regno, NULL);
155 }
156}
157
158/* Store our register values back into the inferior.
159 If REGNO is -1, do this for all registers.
160 Otherwise, REGNO specifies which register (so we can save time). */
161
162static void
28439f5e
PA
163i386_darwin_store_inferior_registers (struct target_ops *ops,
164 struct regcache *regcache, int regno)
a80b95ba
TG
165{
166 thread_t current_thread = ptid_get_tid (inferior_ptid);
167 struct gdbarch *gdbarch = get_regcache_arch (regcache);
168
5cd226f2 169#ifdef BFD64
a80b95ba
TG
170 if (gdbarch_ptr_bit (gdbarch) == 64)
171 {
172 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
173 {
174 x86_thread_state_t gp_regs;
175 kern_return_t ret;
176 unsigned int gp_count = x86_THREAD_STATE_COUNT;
177
178 ret = thread_get_state
179 (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
180 &gp_count);
181 MACH_CHECK_ERROR (ret);
182 gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
183 gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
184
185 amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
186
187 ret = thread_set_state (current_thread, x86_THREAD_STATE,
188 (thread_state_t) &gp_regs,
189 x86_THREAD_STATE_COUNT);
190 MACH_CHECK_ERROR (ret);
191 }
192
193 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
194 {
195 x86_float_state_t fp_regs;
196 kern_return_t ret;
197 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
198
199 ret = thread_get_state
200 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
201 &fp_count);
202 MACH_CHECK_ERROR (ret);
203 gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
204 gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
205
46187dff 206 amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
207
208 ret = thread_set_state (current_thread, x86_FLOAT_STATE,
209 (thread_state_t) & fp_regs,
210 x86_FLOAT_STATE_COUNT);
211 MACH_CHECK_ERROR (ret);
212 }
213 }
214 else
5cd226f2 215#endif
a80b95ba
TG
216 {
217 if (regno == -1 || regno < I386_NUM_GREGS)
218 {
cf9bb588 219 x86_thread_state32_t gp_regs;
a80b95ba 220 kern_return_t ret;
cf9bb588 221 unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba
TG
222 int i;
223
224 ret = thread_get_state
cf9bb588 225 (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba
TG
226 &gp_count);
227 MACH_CHECK_ERROR (ret);
228
229 for (i = 0; i < I386_NUM_GREGS; i++)
230 if (regno == -1 || regno == i)
231 regcache_raw_collect
232 (regcache, i,
233 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
234
cf9bb588
TG
235 ret = thread_set_state (current_thread, x86_THREAD_STATE32,
236 (thread_state_t) &gp_regs,
237 x86_THREAD_STATE32_COUNT);
a80b95ba
TG
238 MACH_CHECK_ERROR (ret);
239 }
240
241 if (regno == -1
242 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
243 {
cf9bb588
TG
244 x86_float_state32_t fp_regs;
245 unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba
TG
246 kern_return_t ret;
247
248 ret = thread_get_state
cf9bb588 249 (current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
a80b95ba
TG
250 &fp_count);
251 MACH_CHECK_ERROR (ret);
252
253 i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
254
cf9bb588
TG
255 ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
256 (thread_state_t) &fp_regs,
257 x86_FLOAT_STATE32_COUNT);
a80b95ba
TG
258 MACH_CHECK_ERROR (ret);
259 }
260 }
261}
262
a80b95ba
TG
263/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
264
a80b95ba 265static void
b1328b1b 266i386_darwin_dr_set (int regnum, CORE_ADDR value)
a80b95ba
TG
267{
268 int current_pid;
269 thread_t current_thread;
270 x86_debug_state_t dr_regs;
271 kern_return_t ret;
61d82a0d 272 unsigned int dr_count;
a80b95ba
TG
273
274 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
275
276 current_thread = ptid_get_tid (inferior_ptid);
277
61d82a0d
TG
278 dr_regs.dsh.flavor = x86_DEBUG_STATE;
279 dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba 280 dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d 281 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba 282 (thread_state_t) &dr_regs, &dr_count);
b1328b1b 283 MACH_CHECK_ERROR (ret);
a80b95ba 284
61d82a0d 285 switch (dr_regs.dsh.flavor)
a80b95ba 286 {
61d82a0d
TG
287 case x86_DEBUG_STATE32:
288 switch (regnum)
289 {
290 case 0:
291 dr_regs.uds.ds32.__dr0 = value;
292 break;
293 case 1:
294 dr_regs.uds.ds32.__dr1 = value;
295 break;
296 case 2:
297 dr_regs.uds.ds32.__dr2 = value;
298 break;
299 case 3:
300 dr_regs.uds.ds32.__dr3 = value;
301 break;
302 case 4:
303 dr_regs.uds.ds32.__dr4 = value;
304 break;
305 case 5:
306 dr_regs.uds.ds32.__dr5 = value;
307 break;
308 case 6:
309 dr_regs.uds.ds32.__dr6 = value;
310 break;
311 case 7:
312 dr_regs.uds.ds32.__dr7 = value;
313 break;
314 }
315 break;
316#ifdef BFD64
317 case x86_DEBUG_STATE64:
318 switch (regnum)
319 {
320 case 0:
321 dr_regs.uds.ds64.__dr0 = value;
322 break;
323 case 1:
324 dr_regs.uds.ds64.__dr1 = value;
325 break;
326 case 2:
327 dr_regs.uds.ds64.__dr2 = value;
328 break;
329 case 3:
330 dr_regs.uds.ds64.__dr3 = value;
331 break;
332 case 4:
333 dr_regs.uds.ds64.__dr4 = value;
334 break;
335 case 5:
336 dr_regs.uds.ds64.__dr5 = value;
337 break;
338 case 6:
339 dr_regs.uds.ds64.__dr6 = value;
340 break;
341 case 7:
342 dr_regs.uds.ds64.__dr7 = value;
343 break;
344 }
345 break;
346#endif
a80b95ba
TG
347 }
348
b1328b1b
TG
349 ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
350 (thread_state_t) &dr_regs.uds, dr_count);
a80b95ba 351
b1328b1b 352 MACH_CHECK_ERROR (ret);
a80b95ba
TG
353}
354
b1328b1b 355static CORE_ADDR
a80b95ba
TG
356i386_darwin_dr_get (int regnum)
357{
358 thread_t current_thread;
359 x86_debug_state_t dr_regs;
360 kern_return_t ret;
61d82a0d 361 unsigned int dr_count;
a80b95ba
TG
362
363 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
364
365 current_thread = ptid_get_tid (inferior_ptid);
366
61d82a0d
TG
367 dr_regs.dsh.flavor = x86_DEBUG_STATE;
368 dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba 369 dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d 370 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba 371 (thread_state_t) &dr_regs, &dr_count);
b1328b1b 372 MACH_CHECK_ERROR (ret);
a80b95ba 373
61d82a0d 374 switch (dr_regs.dsh.flavor)
a80b95ba 375 {
61d82a0d
TG
376 case x86_DEBUG_STATE32:
377 switch (regnum)
378 {
379 case 0:
380 return dr_regs.uds.ds32.__dr0;
381 case 1:
382 return dr_regs.uds.ds32.__dr1;
383 case 2:
384 return dr_regs.uds.ds32.__dr2;
385 case 3:
386 return dr_regs.uds.ds32.__dr3;
387 case 4:
388 return dr_regs.uds.ds32.__dr4;
389 case 5:
390 return dr_regs.uds.ds32.__dr5;
391 case 6:
392 return dr_regs.uds.ds32.__dr6;
393 case 7:
394 return dr_regs.uds.ds32.__dr7;
395 default:
396 return -1;
397 }
398 break;
399#ifdef BFD64
400 case x86_DEBUG_STATE64:
401 switch (regnum)
402 {
403 case 0:
404 return dr_regs.uds.ds64.__dr0;
405 case 1:
406 return dr_regs.uds.ds64.__dr1;
407 case 2:
408 return dr_regs.uds.ds64.__dr2;
409 case 3:
410 return dr_regs.uds.ds64.__dr3;
411 case 4:
412 return dr_regs.uds.ds64.__dr4;
413 case 5:
414 return dr_regs.uds.ds64.__dr5;
415 case 6:
416 return dr_regs.uds.ds64.__dr6;
417 case 7:
418 return dr_regs.uds.ds64.__dr7;
419 default:
420 return -1;
421 }
422 break;
423#endif
424 default:
425 return -1;
a80b95ba
TG
426 }
427}
428
61d82a0d 429static void
a80b95ba
TG
430i386_darwin_dr_set_control (unsigned long control)
431{
432 i386_darwin_dr_set (DR_CONTROL, control);
433}
434
61d82a0d 435static void
a80b95ba
TG
436i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
437{
438 gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
439
440 i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
441}
442
61d82a0d 443static CORE_ADDR
7b50312a 444i386_darwin_dr_get_addr (int regnum)
a80b95ba 445{
7b50312a 446 return i386_darwin_dr_get (regnum);
a80b95ba
TG
447}
448
61d82a0d 449static unsigned long
a80b95ba
TG
450i386_darwin_dr_get_status (void)
451{
452 return i386_darwin_dr_get (DR_STATUS);
453}
454
61d82a0d 455static unsigned long
7b50312a
PA
456i386_darwin_dr_get_control (void)
457{
458 return i386_darwin_dr_get (DR_CONTROL);
459}
460
a80b95ba
TG
461void
462darwin_check_osabi (darwin_inferior *inf, thread_t thread)
463{
f5656ead 464 if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
a80b95ba
TG
465 {
466 /* Attaching to a process. Let's figure out what kind it is. */
467 x86_thread_state_t gp_regs;
468 struct gdbarch_info info;
469 unsigned int gp_count = x86_THREAD_STATE_COUNT;
470 kern_return_t ret;
471
472 ret = thread_get_state (thread, x86_THREAD_STATE,
473 (thread_state_t) &gp_regs, &gp_count);
474 if (ret != KERN_SUCCESS)
475 {
476 MACH_CHECK_ERROR (ret);
477 return;
478 }
479
480 gdbarch_info_init (&info);
481 gdbarch_info_fill (&info);
f5656ead 482 info.byte_order = gdbarch_byte_order (target_gdbarch ());
a80b95ba
TG
483 info.osabi = GDB_OSABI_DARWIN;
484 if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
485 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
486 bfd_mach_x86_64);
487 else
61d82a0d 488 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
a80b95ba
TG
489 bfd_mach_i386_i386);
490 gdbarch_update_p (info);
491 }
492}
493
494#define X86_EFLAGS_T 0x100UL
495
acdb24a9
TG
496/* Returning from a signal trampoline is done by calling a
497 special system call (sigreturn). This system call
498 restores the registers that were saved when the signal was
499 raised, including %eflags/%rflags. That means that single-stepping
500 won't work. Instead, we'll have to modify the signal context
501 that's about to be restored, and set the trace flag there. */
502
503static int
504i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
505{
f5656ead 506 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9
TG
507 static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
508 gdb_byte buf[sizeof (darwin_syscall)];
509
510 /* Check if PC is at a sigreturn system call. */
511 if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
512 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
513 && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
514 {
515 ULONGEST uctx_addr;
516 ULONGEST mctx_addr;
517 ULONGEST flags_addr;
518 unsigned int eflags;
519
e17a4113
UW
520 uctx_addr = read_memory_unsigned_integer
521 (regs->uts.ts32.__esp + 4, 4, byte_order);
522 mctx_addr = read_memory_unsigned_integer
523 (uctx_addr + 28, 4, byte_order);
acdb24a9
TG
524
525 flags_addr = mctx_addr + 12 + 9 * 4;
526 read_memory (flags_addr, (gdb_byte *) &eflags, 4);
527 eflags |= X86_EFLAGS_T;
528 write_memory (flags_addr, (gdb_byte *) &eflags, 4);
529
530 return 1;
531 }
532 return 0;
533}
534
5cd226f2 535#ifdef BFD64
acdb24a9
TG
536static int
537amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
538{
f5656ead 539 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9
TG
540 static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
541 gdb_byte buf[sizeof (darwin_syscall)];
542
543 /* Check if PC is at a sigreturn system call. */
544 if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
545 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
546 && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
547 {
548 ULONGEST mctx_addr;
549 ULONGEST flags_addr;
550 unsigned int rflags;
551
e17a4113
UW
552 mctx_addr = read_memory_unsigned_integer
553 (regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9
TG
554 flags_addr = mctx_addr + 16 + 17 * 8;
555
556 /* AMD64 is little endian. */
557 read_memory (flags_addr, (gdb_byte *) &rflags, 4);
558 rflags |= X86_EFLAGS_T;
559 write_memory (flags_addr, (gdb_byte *) &rflags, 4);
560
561 return 1;
562 }
563 return 0;
564}
5cd226f2 565#endif
acdb24a9 566
a80b95ba
TG
567void
568darwin_set_sstep (thread_t thread, int enable)
569{
570 x86_thread_state_t regs;
571 unsigned int count = x86_THREAD_STATE_COUNT;
572 kern_return_t kret;
573
574 kret = thread_get_state (thread, x86_THREAD_STATE,
575 (thread_state_t) &regs, &count);
576 if (kret != KERN_SUCCESS)
577 {
578 printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
579 kret, thread);
580 return;
581 }
acdb24a9 582
a80b95ba
TG
583 switch (regs.tsh.flavor)
584 {
585 case x86_THREAD_STATE32:
586 {
587 __uint32_t bit = enable ? X86_EFLAGS_T : 0;
b1328b1b 588
acdb24a9
TG
589 if (enable && i386_darwin_sstep_at_sigreturn (&regs))
590 return;
a80b95ba
TG
591 if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
592 return;
1777feb0
MS
593 regs.uts.ts32.__eflags
594 = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
b1328b1b 595 kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba
TG
596 (thread_state_t) &regs, count);
597 MACH_CHECK_ERROR (kret);
598 }
599 break;
5cd226f2 600#ifdef BFD64
a80b95ba
TG
601 case x86_THREAD_STATE64:
602 {
603 __uint64_t bit = enable ? X86_EFLAGS_T : 0;
604
acdb24a9
TG
605 if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
606 return;
a80b95ba
TG
607 if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
608 return;
1777feb0
MS
609 regs.uts.ts64.__rflags
610 = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
b1328b1b 611 kret = thread_set_state (thread, x86_THREAD_STATE,
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612 (thread_state_t) &regs, count);
613 MACH_CHECK_ERROR (kret);
614 }
615 break;
5cd226f2 616#endif
a80b95ba 617 default:
b37520b6 618 error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
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619 }
620}
621
622void
623darwin_complete_target (struct target_ops *target)
624{
5cd226f2 625#ifdef BFD64
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626 amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
627 amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
628 amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
629 amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2 630#endif
a80b95ba 631
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632 i386_use_watchpoints (target);
633
634 i386_dr_low.set_control = i386_darwin_dr_set_control;
635 i386_dr_low.set_addr = i386_darwin_dr_set_addr;
636 i386_dr_low.get_addr = i386_darwin_dr_get_addr;
637 i386_dr_low.get_status = i386_darwin_dr_get_status;
638 i386_dr_low.get_control = i386_darwin_dr_get_control;
639
640 /* Let's assume that the kernel is 64 bits iff the executable is. */
641#ifdef __x86_64__
642 i386_set_debug_register_length (8);
643#else
644 i386_set_debug_register_length (4);
645#endif
646
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647 target->to_fetch_registers = i386_darwin_fetch_inferior_registers;
648 target->to_store_registers = i386_darwin_store_inferior_registers;
649}
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