Consistent use of (C) after "Copyright".
[deliverable/binutils-gdb.git] / gdb / i386-darwin-nat.c
CommitLineData
a80b95ba 1/* Darwin support for GDB, the GNU debugger.
0b1afbb3 2 Copyright (C) 1997-2013 Free Software Foundation, Inc.
a80b95ba
TG
3
4 Contributed by Apple Computer, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "target.h"
25#include "symfile.h"
26#include "symtab.h"
27#include "objfiles.h"
28#include "gdbcmd.h"
29#include "regcache.h"
30#include "gdb_assert.h"
31#include "i386-tdep.h"
a80b95ba
TG
32#include "i387-tdep.h"
33#include "gdbarch.h"
34#include "arch-utils.h"
acdb24a9 35#include "gdbcore.h"
a80b95ba 36
bc884eba 37#include "i386-nat.h"
a80b95ba
TG
38#include "darwin-nat.h"
39#include "i386-darwin-tdep.h"
40
5cd226f2
TG
41#ifdef BFD64
42#include "amd64-nat.h"
46187dff 43#include "amd64-tdep.h"
5cd226f2
TG
44#include "amd64-darwin-tdep.h"
45#endif
46
a80b95ba
TG
47/* Read register values from the inferior process.
48 If REGNO is -1, do this for all registers.
49 Otherwise, REGNO specifies which register (so we can save time). */
50static void
28439f5e
PA
51i386_darwin_fetch_inferior_registers (struct target_ops *ops,
52 struct regcache *regcache, int regno)
a80b95ba
TG
53{
54 thread_t current_thread = ptid_get_tid (inferior_ptid);
55 int fetched = 0;
56 struct gdbarch *gdbarch = get_regcache_arch (regcache);
57
5cd226f2 58#ifdef BFD64
a80b95ba
TG
59 if (gdbarch_ptr_bit (gdbarch) == 64)
60 {
61 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
62 {
63 x86_thread_state_t gp_regs;
64 unsigned int gp_count = x86_THREAD_STATE_COUNT;
65 kern_return_t ret;
66
67 ret = thread_get_state
68 (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
69 &gp_count);
70 if (ret != KERN_SUCCESS)
71 {
1777feb0 72 printf_unfiltered (_("Error calling thread_get_state for "
17092398 73 "GP registers for thread 0x%lx\n"),
016b7430 74 (unsigned long) current_thread);
a80b95ba
TG
75 MACH_CHECK_ERROR (ret);
76 }
77 amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
78 fetched++;
79 }
80
81 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
82 {
83 x86_float_state_t fp_regs;
84 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
85 kern_return_t ret;
86
87 ret = thread_get_state
88 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
89 &fp_count);
90 if (ret != KERN_SUCCESS)
91 {
1777feb0 92 printf_unfiltered (_("Error calling thread_get_state for "
17092398 93 "float registers for thread 0x%lx\n"),
016b7430 94 (unsigned long) current_thread);
a80b95ba
TG
95 MACH_CHECK_ERROR (ret);
96 }
46187dff 97 amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
98 fetched++;
99 }
100 }
101 else
5cd226f2 102#endif
a80b95ba
TG
103 {
104 if (regno == -1 || regno < I386_NUM_GREGS)
105 {
cf9bb588
TG
106 x86_thread_state32_t gp_regs;
107 unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba
TG
108 kern_return_t ret;
109 int i;
110
111 ret = thread_get_state
cf9bb588 112 (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba
TG
113 &gp_count);
114 if (ret != KERN_SUCCESS)
115 {
1777feb0 116 printf_unfiltered (_("Error calling thread_get_state for "
17092398
TG
117 "GP registers for thread 0x%lx\n"),
118 (unsigned long) current_thread);
a80b95ba
TG
119 MACH_CHECK_ERROR (ret);
120 }
121 for (i = 0; i < I386_NUM_GREGS; i++)
122 regcache_raw_supply
123 (regcache, i,
124 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
125
126 fetched++;
127 }
128
129 if (regno == -1
130 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
131 {
cf9bb588
TG
132 x86_float_state32_t fp_regs;
133 unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba
TG
134 kern_return_t ret;
135
136 ret = thread_get_state
cf9bb588 137 (current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
a80b95ba
TG
138 &fp_count);
139 if (ret != KERN_SUCCESS)
140 {
1777feb0 141 printf_unfiltered (_("Error calling thread_get_state for "
17092398
TG
142 "float registers for thread 0x%lx\n"),
143 (unsigned long) current_thread);
a80b95ba
TG
144 MACH_CHECK_ERROR (ret);
145 }
146 i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
147 fetched++;
148 }
149 }
150
151 if (! fetched)
152 {
153 warning (_("unknown register %d"), regno);
154 regcache_raw_supply (regcache, regno, NULL);
155 }
156}
157
158/* Store our register values back into the inferior.
159 If REGNO is -1, do this for all registers.
160 Otherwise, REGNO specifies which register (so we can save time). */
161
162static void
28439f5e
PA
163i386_darwin_store_inferior_registers (struct target_ops *ops,
164 struct regcache *regcache, int regno)
a80b95ba
TG
165{
166 thread_t current_thread = ptid_get_tid (inferior_ptid);
167 struct gdbarch *gdbarch = get_regcache_arch (regcache);
168
5cd226f2 169#ifdef BFD64
a80b95ba
TG
170 if (gdbarch_ptr_bit (gdbarch) == 64)
171 {
172 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
173 {
174 x86_thread_state_t gp_regs;
175 kern_return_t ret;
176 unsigned int gp_count = x86_THREAD_STATE_COUNT;
177
178 ret = thread_get_state
179 (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
180 &gp_count);
181 MACH_CHECK_ERROR (ret);
182 gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
183 gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
184
185 amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
186
187 ret = thread_set_state (current_thread, x86_THREAD_STATE,
188 (thread_state_t) &gp_regs,
189 x86_THREAD_STATE_COUNT);
190 MACH_CHECK_ERROR (ret);
191 }
192
193 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
194 {
195 x86_float_state_t fp_regs;
196 kern_return_t ret;
197 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
198
199 ret = thread_get_state
200 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
201 &fp_count);
202 MACH_CHECK_ERROR (ret);
203 gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
204 gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
205
46187dff 206 amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
207
208 ret = thread_set_state (current_thread, x86_FLOAT_STATE,
209 (thread_state_t) & fp_regs,
210 x86_FLOAT_STATE_COUNT);
211 MACH_CHECK_ERROR (ret);
212 }
213 }
214 else
5cd226f2 215#endif
a80b95ba
TG
216 {
217 if (regno == -1 || regno < I386_NUM_GREGS)
218 {
cf9bb588 219 x86_thread_state32_t gp_regs;
a80b95ba 220 kern_return_t ret;
cf9bb588 221 unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba
TG
222 int i;
223
224 ret = thread_get_state
cf9bb588 225 (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba
TG
226 &gp_count);
227 MACH_CHECK_ERROR (ret);
228
229 for (i = 0; i < I386_NUM_GREGS; i++)
230 if (regno == -1 || regno == i)
231 regcache_raw_collect
232 (regcache, i,
233 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
234
cf9bb588
TG
235 ret = thread_set_state (current_thread, x86_THREAD_STATE32,
236 (thread_state_t) &gp_regs,
237 x86_THREAD_STATE32_COUNT);
a80b95ba
TG
238 MACH_CHECK_ERROR (ret);
239 }
240
241 if (regno == -1
242 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
243 {
cf9bb588
TG
244 x86_float_state32_t fp_regs;
245 unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba
TG
246 kern_return_t ret;
247
248 ret = thread_get_state
cf9bb588 249 (current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
a80b95ba
TG
250 &fp_count);
251 MACH_CHECK_ERROR (ret);
252
253 i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
254
cf9bb588
TG
255 ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
256 (thread_state_t) &fp_regs,
257 x86_FLOAT_STATE32_COUNT);
a80b95ba
TG
258 MACH_CHECK_ERROR (ret);
259 }
260 }
261}
262
c381a3f6 263#ifdef HW_WATCHPOINT_NOT_YET_ENABLED
a80b95ba
TG
264/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
265
a80b95ba
TG
266static void
267i386_darwin_dr_set (int regnum, uint32_t value)
268{
269 int current_pid;
270 thread_t current_thread;
271 x86_debug_state_t dr_regs;
272 kern_return_t ret;
273 unsigned int dr_count = x86_DEBUG_STATE_COUNT;
274
275 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
276
277 current_thread = ptid_get_tid (inferior_ptid);
278
279 dr_regs.dsh.flavor = x86_DEBUG_STATE32;
280 dr_regs.dsh.count = x86_DEBUG_STATE32_COUNT;
281 dr_count = x86_DEBUG_STATE_COUNT;
282 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
283 (thread_state_t) &dr_regs, &dr_count);
284
285 if (ret != KERN_SUCCESS)
286 {
1777feb0
MS
287 printf_unfiltered (_("Error reading debug registers "
288 "thread 0x%x via thread_get_state\n"),
289 (int) current_thread);
a80b95ba
TG
290 MACH_CHECK_ERROR (ret);
291 }
292
293 switch (regnum)
294 {
295 case 0:
296 dr_regs.uds.ds32.__dr0 = value;
297 break;
298 case 1:
299 dr_regs.uds.ds32.__dr1 = value;
300 break;
301 case 2:
302 dr_regs.uds.ds32.__dr2 = value;
303 break;
304 case 3:
305 dr_regs.uds.ds32.__dr3 = value;
306 break;
307 case 4:
308 dr_regs.uds.ds32.__dr4 = value;
309 break;
310 case 5:
311 dr_regs.uds.ds32.__dr5 = value;
312 break;
313 case 6:
314 dr_regs.uds.ds32.__dr6 = value;
315 break;
316 case 7:
317 dr_regs.uds.ds32.__dr7 = value;
318 break;
319 }
320
321 ret = thread_set_state (current_thread, x86_DEBUG_STATE,
322 (thread_state_t) &dr_regs, dr_count);
323
324 if (ret != KERN_SUCCESS)
325 {
1777feb0
MS
326 printf_unfiltered (_("Error writing debug registers "
327 "thread 0x%x via thread_get_state\n"),
328 (int) current_thread);
a80b95ba
TG
329 MACH_CHECK_ERROR (ret);
330 }
331}
332
333static uint32_t
334i386_darwin_dr_get (int regnum)
335{
336 thread_t current_thread;
337 x86_debug_state_t dr_regs;
338 kern_return_t ret;
339 unsigned int dr_count = x86_DEBUG_STATE_COUNT;
340
341 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
342
343 current_thread = ptid_get_tid (inferior_ptid);
344
345 dr_regs.dsh.flavor = x86_DEBUG_STATE32;
346 dr_regs.dsh.count = x86_DEBUG_STATE32_COUNT;
347 dr_count = x86_DEBUG_STATE_COUNT;
348 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
349 (thread_state_t) &dr_regs, &dr_count);
350
351 if (ret != KERN_SUCCESS)
352 {
1777feb0
MS
353 printf_unfiltered (_("Error reading debug registers "
354 "thread 0x%x via thread_get_state\n"),
355 (int) current_thread);
a80b95ba
TG
356 MACH_CHECK_ERROR (ret);
357 }
358
359 switch (regnum)
360 {
361 case 0:
362 return dr_regs.uds.ds32.__dr0;
363 case 1:
364 return dr_regs.uds.ds32.__dr1;
365 case 2:
366 return dr_regs.uds.ds32.__dr2;
367 case 3:
368 return dr_regs.uds.ds32.__dr3;
369 case 4:
370 return dr_regs.uds.ds32.__dr4;
371 case 5:
372 return dr_regs.uds.ds32.__dr5;
373 case 6:
374 return dr_regs.uds.ds32.__dr6;
375 case 7:
376 return dr_regs.uds.ds32.__dr7;
377 default:
378 return -1;
379 }
380}
381
382void
383i386_darwin_dr_set_control (unsigned long control)
384{
385 i386_darwin_dr_set (DR_CONTROL, control);
386}
387
388void
389i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
390{
391 gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
392
393 i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
394}
395
7b50312a
PA
396CORE_ADDR
397i386_darwin_dr_get_addr (int regnum)
a80b95ba 398{
7b50312a 399 return i386_darwin_dr_get (regnum);
a80b95ba
TG
400}
401
402unsigned long
403i386_darwin_dr_get_status (void)
404{
405 return i386_darwin_dr_get (DR_STATUS);
406}
407
7b50312a
PA
408unsigned long
409i386_darwin_dr_get_control (void)
410{
411 return i386_darwin_dr_get (DR_CONTROL);
412}
c381a3f6 413#endif
7b50312a 414
a80b95ba
TG
415void
416darwin_check_osabi (darwin_inferior *inf, thread_t thread)
417{
f5656ead 418 if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
a80b95ba
TG
419 {
420 /* Attaching to a process. Let's figure out what kind it is. */
421 x86_thread_state_t gp_regs;
422 struct gdbarch_info info;
423 unsigned int gp_count = x86_THREAD_STATE_COUNT;
424 kern_return_t ret;
425
426 ret = thread_get_state (thread, x86_THREAD_STATE,
427 (thread_state_t) &gp_regs, &gp_count);
428 if (ret != KERN_SUCCESS)
429 {
430 MACH_CHECK_ERROR (ret);
431 return;
432 }
433
434 gdbarch_info_init (&info);
435 gdbarch_info_fill (&info);
f5656ead 436 info.byte_order = gdbarch_byte_order (target_gdbarch ());
a80b95ba
TG
437 info.osabi = GDB_OSABI_DARWIN;
438 if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
439 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
440 bfd_mach_x86_64);
441 else
442 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
443 bfd_mach_i386_i386);
444 gdbarch_update_p (info);
445 }
446}
447
448#define X86_EFLAGS_T 0x100UL
449
acdb24a9
TG
450/* Returning from a signal trampoline is done by calling a
451 special system call (sigreturn). This system call
452 restores the registers that were saved when the signal was
453 raised, including %eflags/%rflags. That means that single-stepping
454 won't work. Instead, we'll have to modify the signal context
455 that's about to be restored, and set the trace flag there. */
456
457static int
458i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
459{
f5656ead 460 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9
TG
461 static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
462 gdb_byte buf[sizeof (darwin_syscall)];
463
464 /* Check if PC is at a sigreturn system call. */
465 if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
466 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
467 && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
468 {
469 ULONGEST uctx_addr;
470 ULONGEST mctx_addr;
471 ULONGEST flags_addr;
472 unsigned int eflags;
473
e17a4113
UW
474 uctx_addr = read_memory_unsigned_integer
475 (regs->uts.ts32.__esp + 4, 4, byte_order);
476 mctx_addr = read_memory_unsigned_integer
477 (uctx_addr + 28, 4, byte_order);
acdb24a9
TG
478
479 flags_addr = mctx_addr + 12 + 9 * 4;
480 read_memory (flags_addr, (gdb_byte *) &eflags, 4);
481 eflags |= X86_EFLAGS_T;
482 write_memory (flags_addr, (gdb_byte *) &eflags, 4);
483
484 return 1;
485 }
486 return 0;
487}
488
5cd226f2 489#ifdef BFD64
acdb24a9
TG
490static int
491amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
492{
f5656ead 493 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9
TG
494 static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
495 gdb_byte buf[sizeof (darwin_syscall)];
496
497 /* Check if PC is at a sigreturn system call. */
498 if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
499 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
500 && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
501 {
502 ULONGEST mctx_addr;
503 ULONGEST flags_addr;
504 unsigned int rflags;
505
e17a4113
UW
506 mctx_addr = read_memory_unsigned_integer
507 (regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9
TG
508 flags_addr = mctx_addr + 16 + 17 * 8;
509
510 /* AMD64 is little endian. */
511 read_memory (flags_addr, (gdb_byte *) &rflags, 4);
512 rflags |= X86_EFLAGS_T;
513 write_memory (flags_addr, (gdb_byte *) &rflags, 4);
514
515 return 1;
516 }
517 return 0;
518}
5cd226f2 519#endif
acdb24a9 520
a80b95ba
TG
521void
522darwin_set_sstep (thread_t thread, int enable)
523{
524 x86_thread_state_t regs;
525 unsigned int count = x86_THREAD_STATE_COUNT;
526 kern_return_t kret;
527
528 kret = thread_get_state (thread, x86_THREAD_STATE,
529 (thread_state_t) &regs, &count);
530 if (kret != KERN_SUCCESS)
531 {
532 printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
533 kret, thread);
534 return;
535 }
acdb24a9 536
a80b95ba
TG
537 switch (regs.tsh.flavor)
538 {
539 case x86_THREAD_STATE32:
540 {
541 __uint32_t bit = enable ? X86_EFLAGS_T : 0;
542
acdb24a9
TG
543 if (enable && i386_darwin_sstep_at_sigreturn (&regs))
544 return;
a80b95ba
TG
545 if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
546 return;
1777feb0
MS
547 regs.uts.ts32.__eflags
548 = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
a80b95ba
TG
549 kret = thread_set_state (thread, x86_THREAD_STATE,
550 (thread_state_t) &regs, count);
551 MACH_CHECK_ERROR (kret);
552 }
553 break;
5cd226f2 554#ifdef BFD64
a80b95ba
TG
555 case x86_THREAD_STATE64:
556 {
557 __uint64_t bit = enable ? X86_EFLAGS_T : 0;
558
acdb24a9
TG
559 if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
560 return;
a80b95ba
TG
561 if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
562 return;
1777feb0
MS
563 regs.uts.ts64.__rflags
564 = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
a80b95ba
TG
565 kret = thread_set_state (thread, x86_THREAD_STATE,
566 (thread_state_t) &regs, count);
567 MACH_CHECK_ERROR (kret);
568 }
569 break;
5cd226f2 570#endif
a80b95ba 571 default:
b37520b6 572 error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
a80b95ba
TG
573 }
574}
575
576void
577darwin_complete_target (struct target_ops *target)
578{
5cd226f2 579#ifdef BFD64
a80b95ba
TG
580 amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
581 amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
582 amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
583 amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2 584#endif
a80b95ba
TG
585
586 target->to_fetch_registers = i386_darwin_fetch_inferior_registers;
587 target->to_store_registers = i386_darwin_store_inferior_registers;
588}
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