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[deliverable/binutils-gdb.git] / gdb / i386-pinsn.c
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dd3b648e
RP		 1/* Print i386 instructions for GDB, the GNU debugger.
2 Copyright (C) 1988, 1989 Free Software Foundation, Inc.
3
4This file is part of GDB.
5
6GDB is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 1, or (at your option)
9any later version.
10
11GDB is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GDB; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20/*
21 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 * July 1988
23 */
24
25/*
26 * The main tables describing the instructions is essentially a copy
27 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
28 * Programmers Manual. Usually, there is a capital letter, followed
29 * by a small letter. The capital letter tell the addressing mode,
30 * and the small letter tells about the operand size. Refer to
31 * the Intel manual for details.
32 */
33
34#include <stdio.h>
35#include <ctype.h>
36
37#define Eb OP_E, b_mode
38#define indirEb OP_indirE, b_mode
39#define Gb OP_G, b_mode
40#define Ev OP_E, v_mode
41#define indirEv OP_indirE, v_mode
42#define Ew OP_E, w_mode
43#define Ma OP_E, v_mode
44#define M OP_E, 0
45#define Mp OP_E, 0 /* ? */
46#define Gv OP_G, v_mode
47#define Gw OP_G, w_mode
48#define Rw OP_rm, w_mode
49#define Rd OP_rm, d_mode
50#define Ib OP_I, b_mode
51#define sIb OP_sI, b_mode /* sign extened byte */
52#define Iv OP_I, v_mode
53#define Iw OP_I, w_mode
54#define Jb OP_J, b_mode
55#define Jv OP_J, v_mode
56#define ONE OP_ONE, 0
57#define Cd OP_C, d_mode
58#define Dd OP_D, d_mode
59#define Td OP_T, d_mode
60
61#define eAX OP_REG, eAX_reg
62#define eBX OP_REG, eBX_reg
63#define eCX OP_REG, eCX_reg
64#define eDX OP_REG, eDX_reg
65#define eSP OP_REG, eSP_reg
66#define eBP OP_REG, eBP_reg
67#define eSI OP_REG, eSI_reg
68#define eDI OP_REG, eDI_reg
69#define AL OP_REG, al_reg
70#define CL OP_REG, cl_reg
71#define DL OP_REG, dl_reg
72#define BL OP_REG, bl_reg
73#define AH OP_REG, ah_reg
74#define CH OP_REG, ch_reg
75#define DH OP_REG, dh_reg
76#define BH OP_REG, bh_reg
77#define AX OP_REG, ax_reg
78#define DX OP_REG, dx_reg
79#define indirDX OP_REG, indir_dx_reg
80
81#define Sw OP_SEG, w_mode
82#define Ap OP_DIR, lptr
83#define Av OP_DIR, v_mode
84#define Ob OP_OFF, b_mode
85#define Ov OP_OFF, v_mode
86#define Xb OP_DSSI, b_mode
87#define Xv OP_DSSI, v_mode
88#define Yb OP_ESDI, b_mode
89#define Yv OP_ESDI, v_mode
90
91#define es OP_REG, es_reg
92#define ss OP_REG, ss_reg
93#define cs OP_REG, cs_reg
94#define ds OP_REG, ds_reg
95#define fs OP_REG, fs_reg
96#define gs OP_REG, gs_reg
97
98int OP_E(), OP_indirE(), OP_G(), OP_I(), OP_sI(), OP_REG();
99int OP_J(), OP_SEG();
100int OP_DIR(), OP_OFF(), OP_DSSI(), OP_ESDI(), OP_ONE(), OP_C();
101int OP_D(), OP_T(), OP_rm();
102
103
104#define b_mode 1
105#define v_mode 2
106#define w_mode 3
107#define d_mode 4
108
109#define es_reg 100
110#define cs_reg 101
111#define ss_reg 102
112#define ds_reg 103
113#define fs_reg 104
114#define gs_reg 105
115#define eAX_reg 107
116#define eCX_reg 108
117#define eDX_reg 109
118#define eBX_reg 110
119#define eSP_reg 111
120#define eBP_reg 112
121#define eSI_reg 113
122#define eDI_reg 114
123
124#define lptr 115
125
126#define al_reg 116
127#define cl_reg 117
128#define dl_reg 118
129#define bl_reg 119
130#define ah_reg 120
131#define ch_reg 121
132#define dh_reg 122
133#define bh_reg 123
134
135#define ax_reg 124
136#define cx_reg 125
137#define dx_reg 126
138#define bx_reg 127
139#define sp_reg 128
140#define bp_reg 129
141#define si_reg 130
142#define di_reg 131
143
144#define indir_dx_reg 150
145
146#define GRP1b NULL, NULL, 0
147#define GRP1S NULL, NULL, 1
148#define GRP1Ss NULL, NULL, 2
149#define GRP2b NULL, NULL, 3
150#define GRP2S NULL, NULL, 4
151#define GRP2b_one NULL, NULL, 5
152#define GRP2S_one NULL, NULL, 6
153#define GRP2b_cl NULL, NULL, 7
154#define GRP2S_cl NULL, NULL, 8
155#define GRP3b NULL, NULL, 9
156#define GRP3S NULL, NULL, 10
157#define GRP4 NULL, NULL, 11
158#define GRP5 NULL, NULL, 12
159#define GRP6 NULL, NULL, 13
160#define GRP7 NULL, NULL, 14
161#define GRP8 NULL, NULL, 15
162
163#define FLOATCODE 50
164#define FLOAT NULL, NULL, FLOATCODE
165
166struct dis386 {
167 char *name;
168 int (*op1)();
169 int bytemode1;
170 int (*op2)();
171 int bytemode2;
172 int (*op3)();
173 int bytemode3;
174};
175
176struct dis386 dis386[] = {
177 /* 00 */
178 { "addb", Eb, Gb },
179 { "addS", Ev, Gv },
180 { "addb", Gb, Eb },
181 { "addS", Gv, Ev },
182 { "addb", AL, Ib },
183 { "addS", eAX, Iv },
184 { "pushl", es },
185 { "popl", es },
186 /* 08 */
187 { "orb", Eb, Gb },
188 { "orS", Ev, Gv },
189 { "orb", Gb, Eb },
190 { "orS", Gv, Ev },
191 { "orb", AL, Ib },
192 { "orS", eAX, Iv },
193 { "pushl", cs },
194 { "(bad)" }, /* 0x0f extended opcode escape */
195 /* 10 */
196 { "adcb", Eb, Gb },
197 { "adcS", Ev, Gv },
198 { "adcb", Gb, Eb },
199 { "adcS", Gv, Ev },
200 { "adcb", AL, Ib },
201 { "adcS", eAX, Iv },
202 { "pushl", ss },
203 { "popl", ss },
204 /* 18 */
205 { "sbbb", Eb, Gb },
206 { "sbbS", Ev, Gv },
207 { "sbbb", Gb, Eb },
208 { "sbbS", Gv, Ev },
209 { "sbbb", AL, Ib },
210 { "sbbS", eAX, Iv },
211 { "pushl", ds },
212 { "popl", ds },
213 /* 20 */
214 { "andb", Eb, Gb },
215 { "andS", Ev, Gv },
216 { "andb", Gb, Eb },
217 { "andS", Gv, Ev },
218 { "andb", AL, Ib },
219 { "andS", eAX, Iv },
220 { "(bad)" }, /* SEG ES prefix */
221 { "daa" },
222 /* 28 */
223 { "subb", Eb, Gb },
224 { "subS", Ev, Gv },
225 { "subb", Gb, Eb },
226 { "subS", Gv, Ev },
227 { "subb", AL, Ib },
228 { "subS", eAX, Iv },
229 { "(bad)" }, /* SEG CS prefix */
230 { "das" },
231 /* 30 */
232 { "xorb", Eb, Gb },
233 { "xorS", Ev, Gv },
234 { "xorb", Gb, Eb },
235 { "xorS", Gv, Ev },
236 { "xorb", AL, Ib },
237 { "xorS", eAX, Iv },
238 { "(bad)" }, /* SEG SS prefix */
239 { "aaa" },
240 /* 38 */
241 { "cmpb", Eb, Gb },
242 { "cmpS", Ev, Gv },
243 { "cmpb", Gb, Eb },
244 { "cmpS", Gv, Ev },
245 { "cmpb", AL, Ib },
246 { "cmpS", eAX, Iv },
247 { "(bad)" }, /* SEG DS prefix */
248 { "aas" },
249 /* 40 */
250 { "incS", eAX },
251 { "incS", eCX },
252 { "incS", eDX },
253 { "incS", eBX },
254 { "incS", eSP },
255 { "incS", eBP },
256 { "incS", eSI },
257 { "incS", eDI },
258 /* 48 */
259 { "decS", eAX },
260 { "decS", eCX },
261 { "decS", eDX },
262 { "decS", eBX },
263 { "decS", eSP },
264 { "decS", eBP },
265 { "decS", eSI },
266 { "decS", eDI },
267 /* 50 */
268 { "pushS", eAX },
269 { "pushS", eCX },
270 { "pushS", eDX },
271 { "pushS", eBX },
272 { "pushS", eSP },
273 { "pushS", eBP },
274 { "pushS", eSI },
275 { "pushS", eDI },
276 /* 58 */
277 { "popS", eAX },
278 { "popS", eCX },
279 { "popS", eDX },
280 { "popS", eBX },
281 { "popS", eSP },
282 { "popS", eBP },
283 { "popS", eSI },
284 { "popS", eDI },
285 /* 60 */
286 { "pusha" },
287 { "popa" },
288 { "boundS", Gv, Ma },
289 { "arpl", Ew, Gw },
290 { "(bad)" }, /* seg fs */
291 { "(bad)" }, /* seg gs */
292 { "(bad)" }, /* op size prefix */
293 { "(bad)" }, /* adr size prefix */
294 /* 68 */
295 { "pushS", Iv }, /* 386 book wrong */
296 { "imulS", Gv, Ev, Iv },
297 { "pushl", sIb }, /* push of byte really pushes 4 bytes */
298 { "imulS", Gv, Ev, Ib },
299 { "insb", Yb, indirDX },
300 { "insS", Yv, indirDX },
301 { "outsb", indirDX, Xb },
302 { "outsS", indirDX, Xv },
303 /* 70 */
304 { "jo", Jb },
305 { "jno", Jb },
306 { "jb", Jb },
307 { "jae", Jb },
308 { "je", Jb },
309 { "jne", Jb },
310 { "jbe", Jb },
311 { "ja", Jb },
312 /* 78 */
313 { "js", Jb },
314 { "jns", Jb },
315 { "jp", Jb },
316 { "jnp", Jb },
317 { "jl", Jb },
318 { "jnl", Jb },
319 { "jle", Jb },
320 { "jg", Jb },
321 /* 80 */
322 { GRP1b },
323 { GRP1S },
324 { "(bad)" },
325 { GRP1Ss },
326 { "testb", Eb, Gb },
327 { "testS", Ev, Gv },
328 { "xchgb", Eb, Gb },
329 { "xchgS", Ev, Gv },
330 /* 88 */
331 { "movb", Eb, Gb },
332 { "movS", Ev, Gv },
333 { "movb", Gb, Eb },
334 { "movS", Gv, Ev },
335 { "movw", Ew, Sw },
336 { "leaS", Gv, M },
337 { "movw", Sw, Ew },
338 { "popS", Ev },
339 /* 90 */
340 { "nop" },
341 { "xchgS", eCX, eAX },
342 { "xchgS", eDX, eAX },
343 { "xchgS", eBX, eAX },
344 { "xchgS", eSP, eAX },
345 { "xchgS", eBP, eAX },
346 { "xchgS", eSI, eAX },
347 { "xchgS", eDI, eAX },
348 /* 98 */
349 { "cwtl" },
350 { "cltd" },
351 { "lcall", Ap },
352 { "(bad)" }, /* fwait */
353 { "pushf" },
354 { "popf" },
355 { "sahf" },
356 { "lahf" },
357 /* a0 */
358 { "movb", AL, Ob },
359 { "movS", eAX, Ov },
360 { "movb", Ob, AL },
361 { "movS", Ov, eAX },
362 { "movsb", Yb, Xb },
363 { "movsS", Yv, Xv },
364 { "cmpsb", Yb, Xb },
365 { "cmpsS", Yv, Xv },
366 /* a8 */
367 { "testb", AL, Ib },
368 { "testS", eAX, Iv },
369 { "stosb", Yb, AL },
370 { "stosS", Yv, eAX },
371 { "lodsb", AL, Xb },
372 { "lodsS", eAX, Xv },
373 { "scasb", AL, Xb },
374 { "scasS", eAX, Xv },
375 /* b0 */
376 { "movb", AL, Ib },
377 { "movb", CL, Ib },
378 { "movb", DL, Ib },
379 { "movb", BL, Ib },
380 { "movb", AH, Ib },
381 { "movb", CH, Ib },
382 { "movb", DH, Ib },
383 { "movb", BH, Ib },
384 /* b8 */
385 { "movS", eAX, Iv },
386 { "movS", eCX, Iv },
387 { "movS", eDX, Iv },
388 { "movS", eBX, Iv },
389 { "movS", eSP, Iv },
390 { "movS", eBP, Iv },
391 { "movS", eSI, Iv },
392 { "movS", eDI, Iv },
393 /* c0 */
394 { GRP2b },
395 { GRP2S },
396 { "ret", Iw },
397 { "ret" },
398 { "lesS", Gv, Mp },
399 { "ldsS", Gv, Mp },
400 { "movb", Eb, Ib },
401 { "movS", Ev, Iv },
402 /* c8 */
403 { "enter", Iw, Ib },
404 { "leave" },
405 { "lret", Iw },
406 { "lret" },
407 { "int3" },
408 { "int", Ib },
409 { "into" },
410 { "iret" },
411 /* d0 */
412 { GRP2b_one },
413 { GRP2S_one },
414 { GRP2b_cl },
415 { GRP2S_cl },
416 { "aam", Ib },
417 { "aad", Ib },
418 { "(bad)" },
419 { "xlat" },
420 /* d8 */
421 { FLOAT },
422 { FLOAT },
423 { FLOAT },
424 { FLOAT },
425 { FLOAT },
426 { FLOAT },
427 { FLOAT },
428 { FLOAT },
429 /* e0 */
430 { "loopne", Jb },
431 { "loope", Jb },
432 { "loop", Jb },
433 { "jCcxz", Jb },
434 { "inb", AL, Ib },
435 { "inS", eAX, Ib },
436 { "outb", Ib, AL },
437 { "outS", Ib, eAX },
438 /* e8 */
439 { "call", Av },
440 { "jmp", Jv },
441 { "ljmp", Ap },
442 { "jmp", Jb },
443 { "inb", AL, indirDX },
444 { "inS", eAX, indirDX },
445 { "outb", indirDX, AL },
446 { "outS", indirDX, eAX },
447 /* f0 */
448 { "(bad)" }, /* lock prefix */
449 { "(bad)" },
450 { "(bad)" }, /* repne */
451 { "(bad)" }, /* repz */
452 { "hlt" },
453 { "cmc" },
454 { GRP3b },
455 { GRP3S },
456 /* f8 */
457 { "clc" },
458 { "stc" },
459 { "cli" },
460 { "sti" },
461 { "cld" },
462 { "std" },
463 { GRP4 },
464 { GRP5 },
465};
466
467struct dis386 dis386_twobyte[] = {
468 /* 00 */
469 { GRP6 },
470 { GRP7 },
471 { "larS", Gv, Ew },
472 { "lslS", Gv, Ew },
473 { "(bad)" },
474 { "(bad)" },
475 { "clts" },
476 { "(bad)" },
477 /* 08 */
478 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
479 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
480 /* 10 */
481 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
482 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
483 /* 18 */
484 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
485 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
486 /* 20 */
487 /* these are all backward in appendix A of the intel book */
488 { "movl", Rd, Cd },
489 { "movl", Rd, Dd },
490 { "movl", Cd, Rd },
491 { "movl", Dd, Rd },
492 { "movl", Rd, Td },
493 { "(bad)" },
494 { "movl", Td, Rd },
495 { "(bad)" },
496 /* 28 */
497 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
498 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
499 /* 30 */
500 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
501 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
502 /* 38 */
503 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
504 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
505 /* 40 */
506 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
507 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
508 /* 48 */
509 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
510 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
511 /* 50 */
512 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
513 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
514 /* 58 */
515 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
516 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
517 /* 60 */
518 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
519 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
520 /* 68 */
521 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
522 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
523 /* 70 */
524 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
525 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
526 /* 78 */
527 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
528 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
529 /* 80 */
530 { "jo", Jv },
531 { "jno", Jv },
532 { "jb", Jv },
533 { "jae", Jv },
534 { "je", Jv },
535 { "jne", Jv },
536 { "jbe", Jv },
537 { "ja", Jv },
538 /* 88 */
539 { "js", Jv },
540 { "jns", Jv },
541 { "jp", Jv },
542 { "jnp", Jv },
543 { "jl", Jv },
544 { "jge", Jv },
545 { "jle", Jv },
546 { "jg", Jv },
547 /* 90 */
548 { "seto", Eb },
549 { "setno", Eb },
550 { "setb", Eb },
551 { "setae", Eb },
552 { "sete", Eb },
553 { "setne", Eb },
554 { "setbe", Eb },
555 { "seta", Eb },
556 /* 98 */
557 { "sets", Eb },
558 { "setns", Eb },
559 { "setp", Eb },
560 { "setnp", Eb },
561 { "setl", Eb },
562 { "setge", Eb },
563 { "setle", Eb },
564 { "setg", Eb },
565 /* a0 */
566 { "pushl", fs },
567 { "popl", fs },
568 { "(bad)" },
569 { "btS", Ev, Gv },
570 { "shldS", Ev, Gv, Ib },
571 { "shldS", Ev, Gv, CL },
572 { "(bad)" },
573 { "(bad)" },
574 /* a8 */
575 { "pushl", gs },
576 { "popl", gs },
577 { "(bad)" },
578 { "btsS", Ev, Gv },
579 { "shrdS", Ev, Gv, Ib },
580 { "shrdS", Ev, Gv, CL },
581 { "(bad)" },
582 { "imulS", Gv, Ev },
583 /* b0 */
584 { "(bad)" },
585 { "(bad)" },
586 { "lssS", Gv, Mp }, /* 386 lists only Mp */
587 { "btrS", Ev, Gv },
588 { "lfsS", Gv, Mp }, /* 386 lists only Mp */
589 { "lgsS", Gv, Mp }, /* 386 lists only Mp */
590 { "movzbS", Gv, Eb },
591 { "movzwS", Gv, Ew },
592 /* b8 */
593 { "(bad)" },
594 { "(bad)" },
595 { GRP8 },
596 { "btcS", Ev, Gv },
597 { "bsfS", Gv, Ev },
598 { "bsrS", Gv, Ev },
599 { "movsbS", Gv, Eb },
600 { "movswS", Gv, Ew },
601 /* c0 */
602 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
603 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
604 /* c8 */
605 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
606 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
607 /* d0 */
608 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
609 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
610 /* d8 */
611 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
612 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
613 /* e0 */
614 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
615 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
616 /* e8 */
617 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
618 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
619 /* f0 */
620 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
621 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
622 /* f8 */
623 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
624 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
625};
626
627static char obuf[100];
628static char *obufp;
629static char scratchbuf[100];
630static unsigned char *start_codep;
631static unsigned char *codep;
632static int mod;
633static int rm;
634static int reg;
635static void oappend ();
636
637static char *names32[]={
638 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
639};
640static char *names16[] = {
641 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
642};
643static char *names8[] = {
644 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
645};
646static char *names_seg[] = {
647 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
648};
649
650struct dis386 grps[][8] = {
651 /* GRP1b */
652 {
653 { "addb", Eb, Ib },
654 { "orb", Eb, Ib },
655 { "adcb", Eb, Ib },
656 { "sbbb", Eb, Ib },
657 { "andb", Eb, Ib },
658 { "subb", Eb, Ib },
659 { "xorb", Eb, Ib },
660 { "cmpb", Eb, Ib }
661 },
662 /* GRP1S */
663 {
664 { "addS", Ev, Iv },
665 { "orS", Ev, Iv },
666 { "adcS", Ev, Iv },
667 { "sbbS", Ev, Iv },
668 { "andS", Ev, Iv },
669 { "subS", Ev, Iv },
670 { "xorS", Ev, Iv },
671 { "cmpS", Ev, Iv }
672 },
673 /* GRP1Ss */
674 {
675 { "addS", Ev, sIb },
676 { "orS", Ev, sIb },
677 { "adcS", Ev, sIb },
678 { "sbbS", Ev, sIb },
679 { "andS", Ev, sIb },
680 { "subS", Ev, sIb },
681 { "xorS", Ev, sIb },
682 { "cmpS", Ev, sIb }
683 },
684 /* GRP2b */
685 {
686 { "rolb", Eb, Ib },
687 { "rorb", Eb, Ib },
688 { "rclb", Eb, Ib },
689 { "rcrb", Eb, Ib },
690 { "shlb", Eb, Ib },
691 { "shrb", Eb, Ib },
692 { "(bad)" },
693 { "sarb", Eb, Ib },
694 },
695 /* GRP2S */
696 {
697 { "rolS", Ev, Ib },
698 { "rorS", Ev, Ib },
699 { "rclS", Ev, Ib },
700 { "rcrS", Ev, Ib },
701 { "shlS", Ev, Ib },
702 { "shrS", Ev, Ib },
703 { "(bad)" },
704 { "sarS", Ev, Ib },
705 },
706 /* GRP2b_one */
707 {
708 { "rolb", Eb },
709 { "rorb", Eb },
710 { "rclb", Eb },
711 { "rcrb", Eb },
712 { "shlb", Eb },
713 { "shrb", Eb },
714 { "(bad)" },
715 { "sarb", Eb },
716 },
717 /* GRP2S_one */
718 {
719 { "rolS", Ev },
720 { "rorS", Ev },
721 { "rclS", Ev },
722 { "rcrS", Ev },
723 { "shlS", Ev },
724 { "shrS", Ev },
725 { "(bad)" },
726 { "sarS", Ev },
727 },
728 /* GRP2b_cl */
729 {
730 { "rolb", Eb, CL },
731 { "rorb", Eb, CL },
732 { "rclb", Eb, CL },
733 { "rcrb", Eb, CL },
734 { "shlb", Eb, CL },
735 { "shrb", Eb, CL },
736 { "(bad)" },
737 { "sarb", Eb, CL },
738 },
739 /* GRP2S_cl */
740 {
741 { "rolS", Ev, CL },
742 { "rorS", Ev, CL },
743 { "rclS", Ev, CL },
744 { "rcrS", Ev, CL },
745 { "shlS", Ev, CL },
746 { "shrS", Ev, CL },
747 { "(bad)" },
748 { "sarS", Ev, CL }
749 },
750 /* GRP3b */
751 {
752 { "testb", Eb, Ib },
753 { "(bad)", Eb },
754 { "notb", Eb },
755 { "negb", Eb },
756 { "mulb", AL, Eb },
757 { "imulb", AL, Eb },
758 { "divb", AL, Eb },
759 { "idivb", AL, Eb }
760 },
761 /* GRP3S */
762 {
763 { "testS", Ev, Iv },
764 { "(bad)" },
765 { "notS", Ev },
766 { "negS", Ev },
767 { "mulS", eAX, Ev },
768 { "imulS", eAX, Ev },
769 { "divS", eAX, Ev },
770 { "idivS", eAX, Ev },
771 },
772 /* GRP4 */
773 {
774 { "incb", Eb },
775 { "decb", Eb },
776 { "(bad)" },
777 { "(bad)" },
778 { "(bad)" },
779 { "(bad)" },
780 { "(bad)" },
781 { "(bad)" },
782 },
783 /* GRP5 */
784 {
785 { "incS", Ev },
786 { "decS", Ev },
787 { "call", indirEv },
788 { "lcall", indirEv },
789 { "jmp", indirEv },
790 { "ljmp", indirEv },
791 { "pushS", Ev },
792 { "(bad)" },
793 },
794 /* GRP6 */
795 {
796 { "sldt", Ew },
797 { "str", Ew },
798 { "lldt", Ew },
799 { "ltr", Ew },
800 { "verr", Ew },
801 { "verw", Ew },
802 { "(bad)" },
803 { "(bad)" }
804 },
805 /* GRP7 */
806 {
807 { "sgdt", Ew },
808 { "sidt", Ew },
809 { "lgdt", Ew },
810 { "lidt", Ew },
811 { "smsw", Ew },
812 { "(bad)" },
813 { "lmsw", Ew },
814 { "(bad)" },
815 },
816 /* GRP8 */
817 {
818 { "(bad)" },
819 { "(bad)" },
820 { "(bad)" },
821 { "(bad)" },
822 { "btS", Ev, Ib },
823 { "btsS", Ev, Ib },
824 { "btrS", Ev, Ib },
825 { "btcS", Ev, Ib },
826 }
827};
828
829#define PREFIX_REPZ 1
830#define PREFIX_REPNZ 2
831#define PREFIX_LOCK 4
832#define PREFIX_CS 8
833#define PREFIX_SS 0x10
834#define PREFIX_DS 0x20
835#define PREFIX_ES 0x40
836#define PREFIX_FS 0x80
837#define PREFIX_GS 0x100
838#define PREFIX_DATA 0x200
839#define PREFIX_ADR 0x400
840#define PREFIX_FWAIT 0x800
841
842static int prefixes;
843
844ckprefix ()
845{
846 prefixes = 0;
847 while (1)
848 {
849 switch (*codep)
850 {
851 case 0xf3:
852 prefixes |= PREFIX_REPZ;
853 break;
854 case 0xf2:
855 prefixes |= PREFIX_REPNZ;
856 break;
857 case 0xf0:
858 prefixes |= PREFIX_LOCK;
859 break;
860 case 0x2e:
861 prefixes |= PREFIX_CS;
862 break;
863 case 0x36:
864 prefixes |= PREFIX_SS;
865 break;
866 case 0x3e:
867 prefixes |= PREFIX_DS;
868 break;
869 case 0x26:
870 prefixes |= PREFIX_ES;
871 break;
872 case 0x64:
873 prefixes |= PREFIX_FS;
874 break;
875 case 0x65:
876 prefixes |= PREFIX_GS;
877 break;
878 case 0x66:
879 prefixes |= PREFIX_DATA;
880 break;
881 case 0x67:
882 prefixes |= PREFIX_ADR;
883 break;
884 case 0x9b:
885 prefixes |= PREFIX_FWAIT;
886 break;
887 default:
888 return;
889 }
890 codep++;
891 }
892}
893
894static int dflag;
895static int aflag;
896
897static char op1out[100], op2out[100], op3out[100];
898static int op_address[3], op_ad, op_index[3];
899static int start_pc;
900extern void fputs_filtered ();
901
902/*
903 * disassemble the first instruction in 'inbuf'. You have to make
904 * sure all of the bytes of the instruction are filled in.
905 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
906 * (see topic "Redundant prefixes" in the "Differences from 8086"
907 * section of the "Virtual 8086 Mode" chapter.)
908 * 'pc' should be the address of this instruction, it will
909 * be used to print the target address if this is a relative jump or call
910 * 'outbuf' gets filled in with the disassembled instruction. it should
911 * be long enough to hold the longest disassembled instruction.
912 * 100 bytes is certainly enough, unless symbol printing is added later
913 * The function returns the length of this instruction in bytes.
914 */
915i386dis (pc, inbuf, stream)
916 int pc;
917 unsigned char *inbuf;
918 FILE *stream;
919{
920 struct dis386 *dp;
921 char *p;
922 int i;
923 int enter_instruction;
924 char *first, *second, *third;
925 int needcomma;
926
927 obuf[0] = 0;
928 op1out[0] = 0;
929 op2out[0] = 0;
930 op3out[0] = 0;
931
932 op_index[0] = op_index[1] = op_index[2] = -1;
933
934 start_pc = pc;
935 start_codep = inbuf;
936 codep = inbuf;
937
938 ckprefix ();
939
940 if (*codep == 0xc8)
941 enter_instruction = 1;
942 else
943 enter_instruction = 0;
944
945 obufp = obuf;
946
947 if (prefixes & PREFIX_REPZ)
948 oappend ("repz ");
949 if (prefixes & PREFIX_REPNZ)
950 oappend ("repnz ");
951 if (prefixes & PREFIX_LOCK)
952 oappend ("lock ");
953
954 if ((prefixes & PREFIX_FWAIT)
955 && ((*codep < 0xd8) || (*codep > 0xdf)))
956 {
957 /* fwait not followed by floating point instruction */
958 fputs_filtered ("fwait", stream);
959 return (1);
960 }
961
962 /* these would be initialized to 0 if disassembling for 8086 or 286 */
963 dflag = 1;
964 aflag = 1;
965
966 if (prefixes & PREFIX_DATA)
967 dflag ^= 1;
968
969 if (prefixes & PREFIX_ADR)
970 {
971 aflag ^= 1;
972 oappend ("addr16 ");
973 }
974
975 if (*codep == 0x0f)
976 dp = &dis386_twobyte[*++codep];
977 else
978 dp = &dis386[*codep];
979 codep++;
980 mod = (*codep >> 6) & 3;
981 reg = (*codep >> 3) & 7;
982 rm = *codep & 7;
983
984 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
985 {
986 dofloat ();
987 }
988 else
989 {
990 if (dp->name == NULL)
991 dp = &grps[dp->bytemode1][reg];
992
993 putop (dp->name);
994
995 obufp = op1out;
996 op_ad = 2;
997 if (dp->op1)
998 (*dp->op1)(dp->bytemode1);
999
1000 obufp = op2out;
1001 op_ad = 1;
1002 if (dp->op2)
1003 (*dp->op2)(dp->bytemode2);
1004
1005 obufp = op3out;
1006 op_ad = 0;
1007 if (dp->op3)
1008 (*dp->op3)(dp->bytemode3);
1009 }
1010
1011 obufp = obuf + strlen (obuf);
1012 for (i = strlen (obuf); i < 6; i++)
1013 oappend (" ");
1014 oappend (" ");
1015 fputs_filtered (obuf, stream);
1016
1017 /* enter instruction is printed with operands in the
1018 * same order as the intel book; everything else
1019 * is printed in reverse order
1020 */
1021 if (enter_instruction)
1022 {
1023 first = op1out;
1024 second = op2out;
1025 third = op3out;
1026 op_ad = op_index[0];
1027 op_index[0] = op_index[2];
1028 op_index[2] = op_ad;
1029 }
1030 else
1031 {
1032 first = op3out;
1033 second = op2out;
1034 third = op1out;
1035 }
1036 needcomma = 0;
1037 if (*first)
1038 {
1039 if (op_index[0] != -1)
1040 print_address (op_address[op_index[0]], stream);
1041 else
1042 fputs_filtered (first, stream);
1043 needcomma = 1;
1044 }
1045 if (*second)
1046 {
1047 if (needcomma)
1048 fputs_filtered (",", stream);
1049 if (op_index[1] != -1)
1050 print_address (op_address[op_index[1]], stream);
1051 else
1052 fputs_filtered (second, stream);
1053 needcomma = 1;
1054 }
1055 if (*third)
1056 {
1057 if (needcomma)
1058 fputs_filtered (",", stream);
1059 if (op_index[2] != -1)
1060 print_address (op_address[op_index[2]], stream);
1061 else
1062 fputs_filtered (third, stream);
1063 }
1064 return (codep - inbuf);
1065}
1066
1067char *float_mem[] = {
1068 /* d8 */
1069 "fadds",
1070 "fmuls",
1071 "fcoms",
1072 "fcomps",
1073 "fsubs",
1074 "fsubrs",
1075 "fdivs",
1076 "fdivrs",
1077 /* d9 */
1078 "flds",
1079 "(bad)",
1080 "fsts",
1081 "fstps",
1082 "fldenv",
1083 "fldcw",
1084 "fNstenv",
1085 "fNstcw",
1086 /* da */
1087 "fiaddl",
1088 "fimull",
1089 "ficoml",
1090 "ficompl",
1091 "fisubl",
1092 "fisubrl",
1093 "fidivl",
1094 "fidivrl",
1095 /* db */
1096 "fildl",
1097 "(bad)",
1098 "fistl",
1099 "fistpl",
1100 "(bad)",
1101 "fldt",
1102 "(bad)",
1103 "fstpt",
1104 /* dc */
1105 "faddl",
1106 "fmull",
1107 "fcoml",
1108 "fcompl",
1109 "fsubl",
1110 "fsubrl",
1111 "fdivl",
1112 "fdivrl",
1113 /* dd */
1114 "fldl",
1115 "(bad)",
1116 "fstl",
1117 "fstpl",
1118 "frstor",
1119 "(bad)",
1120 "fNsave",
1121 "fNstsw",
1122 /* de */
1123 "fiadd",
1124 "fimul",
1125 "ficom",
1126 "ficomp",
1127 "fisub",
1128 "fisubr",
1129 "fidiv",
1130 "fidivr",
1131 /* df */
1132 "fild",
1133 "(bad)",
1134 "fist",
1135 "fistp",
1136 "fbld",
1137 "fildll",
1138 "fbstp",
1139 "fistpll",
1140};
1141
1142#define ST OP_ST, 0
1143#define STi OP_STi, 0
1144int OP_ST(), OP_STi();
1145
1146#define FGRPd9_2 NULL, NULL, 0
1147#define FGRPd9_4 NULL, NULL, 1
1148#define FGRPd9_5 NULL, NULL, 2
1149#define FGRPd9_6 NULL, NULL, 3
1150#define FGRPd9_7 NULL, NULL, 4
1151#define FGRPda_5 NULL, NULL, 5
1152#define FGRPdb_4 NULL, NULL, 6
1153#define FGRPde_3 NULL, NULL, 7
1154#define FGRPdf_4 NULL, NULL, 8
1155
1156struct dis386 float_reg[][8] = {
1157 /* d8 */
1158 {
1159 { "fadd", ST, STi },
1160 { "fmul", ST, STi },
1161 { "fcom", STi },
1162 { "fcomp", STi },
1163 { "fsub", ST, STi },
1164 { "fsubr", ST, STi },
1165 { "fdiv", ST, STi },
1166 { "fdivr", ST, STi },
1167 },
1168 /* d9 */
1169 {
1170 { "fld", STi },
1171 { "fxch", STi },
1172 { FGRPd9_2 },
1173 { "(bad)" },
1174 { FGRPd9_4 },
1175 { FGRPd9_5 },
1176 { FGRPd9_6 },
1177 { FGRPd9_7 },
1178 },
1179 /* da */
1180 {
1181 { "(bad)" },
1182 { "(bad)" },
1183 { "(bad)" },
1184 { "(bad)" },
1185 { "(bad)" },
1186 { FGRPda_5 },
1187 { "(bad)" },
1188 { "(bad)" },
1189 },
1190 /* db */
1191 {
1192 { "(bad)" },
1193 { "(bad)" },
1194 { "(bad)" },
1195 { "(bad)" },
1196 { FGRPdb_4 },
1197 { "(bad)" },
1198 { "(bad)" },
1199 { "(bad)" },
1200 },
1201 /* dc */
1202 {
1203 { "fadd", STi, ST },
1204 { "fmul", STi, ST },
1205 { "(bad)" },
1206 { "(bad)" },
1207 { "fsub", STi, ST },
1208 { "fsubr", STi, ST },
1209 { "fdiv", STi, ST },
1210 { "fdivr", STi, ST },
1211 },
1212 /* dd */
1213 {
1214 { "ffree", STi },
1215 { "(bad)" },
1216 { "fst", STi },
1217 { "fstp", STi },
1218 { "fucom", STi },
1219 { "fucomp", STi },
1220 { "(bad)" },
1221 { "(bad)" },
1222 },
1223 /* de */
1224 {
1225 { "faddp", STi, ST },
1226 { "fmulp", STi, ST },
1227 { "(bad)" },
1228 { FGRPde_3 },
1229 { "fsubp", STi, ST },
1230 { "fsubrp", STi, ST },
1231 { "fdivp", STi, ST },
1232 { "fdivrp", STi, ST },
1233 },
1234 /* df */
1235 {
1236 { "(bad)" },
1237 { "(bad)" },
1238 { "(bad)" },
1239 { "(bad)" },
1240 { FGRPdf_4 },
1241 { "(bad)" },
1242 { "(bad)" },
1243 { "(bad)" },
1244 },
1245};
1246
1247
1248char *fgrps[][8] = {
1249 /* d9_2 0 */
1250 {
1251 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1252 },
1253
1254 /* d9_4 1 */
1255 {
1256 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
1257 },
1258
1259 /* d9_5 2 */
1260 {
1261 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
1262 },
1263
1264 /* d9_6 3 */
1265 {
1266 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
1267 },
1268
1269 /* d9_7 4 */
1270 {
1271 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
1272 },
1273
1274 /* da_5 5 */
1275 {
1276 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1277 },
1278
1279 /* db_4 6 */
1280 {
1281 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
1282 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
1283 },
1284
1285 /* de_3 7 */
1286 {
1287 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1288 },
1289
1290 /* df_4 8 */
1291 {
1292 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1293 },
1294};
1295
1296
1297dofloat ()
1298{
1299 struct dis386 *dp;
1300 unsigned char floatop;
1301
1302 floatop = codep[-1];
1303
1304 if (mod != 3)
1305 {
1306 putop (float_mem[(floatop - 0xd8) * 8 + reg]);
1307 obufp = op1out;
1308 OP_E (v_mode);
1309 return;
1310 }
1311 codep++;
1312
1313 dp = &float_reg[floatop - 0xd8][reg];
1314 if (dp->name == NULL)
1315 {
1316 putop (fgrps[dp->bytemode1][rm]);
1317 /* instruction fnstsw is only one with strange arg */
1318 if (floatop == 0xdf && *codep == 0xe0)
1319 strcpy (op1out, "%eax");
1320 }
1321 else
1322 {
1323 putop (dp->name);
1324 obufp = op1out;
1325 if (dp->op1)
1326 (*dp->op1)(dp->bytemode1);
1327 obufp = op2out;
1328 if (dp->op2)
1329 (*dp->op2)(dp->bytemode2);
1330 }
1331}
1332
1333/* ARGSUSED */
1334OP_ST (ignore)
1335{
1336 oappend ("%st");
1337}
1338
1339/* ARGSUSED */
1340OP_STi (ignore)
1341{
1342 sprintf (scratchbuf, "%%st(%d)", rm);
1343 oappend (scratchbuf);
1344}
1345
1346
1347/* capital letters in template are macros */
1348putop (template)
1349 char *template;
1350{
1351 char *p;
1352
1353 for (p = template; *p; p++)
1354 {
1355 switch (*p)
1356 {
1357 default:
1358 *obufp++ = *p;
1359 break;
1360 case 'C': /* For jcxz/jecxz */
1361 if (aflag == 0)
1362 *obufp++ = 'e';
1363 break;
1364 case 'N':
1365 if ((prefixes & PREFIX_FWAIT) == 0)
1366 *obufp++ = 'n';
1367 break;
1368 case 'S':
1369 /* operand size flag */
1370 if (dflag)
1371 *obufp++ = 'l';
1372 else
1373 *obufp++ = 'w';
1374 break;
1375 }
1376 }
1377 *obufp = 0;
1378}
1379
1380static void
1381oappend (s)
1382char *s;
1383{
1384 strcpy (obufp, s);
1385 obufp += strlen (s);
1386 *obufp = 0;
1387}
1388
1389append_prefix ()
1390{
1391 if (prefixes & PREFIX_CS)
1392 oappend ("%cs:");
1393 if (prefixes & PREFIX_DS)
1394 oappend ("%ds:");
1395 if (prefixes & PREFIX_SS)
1396 oappend ("%ss:");
1397 if (prefixes & PREFIX_ES)
1398 oappend ("%es:");
1399 if (prefixes & PREFIX_FS)
1400 oappend ("%fs:");
1401 if (prefixes & PREFIX_GS)
1402 oappend ("%gs:");
1403}
1404
1405OP_indirE (bytemode)
1406{
1407 oappend ("*");
1408 OP_E (bytemode);
1409}
1410
1411OP_E (bytemode)
1412{
1413 int disp;
1414 int havesib;
1415 int didoutput = 0;
1416 int base;
1417 int index;
1418 int scale;
1419 int havebase;
1420
1421 /* skip mod/rm byte */
1422 codep++;
1423
1424 havesib = 0;
1425 havebase = 0;
1426 disp = 0;
1427
1428 if (mod == 3)
1429 {
1430 switch (bytemode)
1431 {
1432 case b_mode:
1433 oappend (names8[rm]);
1434 break;
1435 case w_mode:
1436 oappend (names16[rm]);
1437 break;
1438 case v_mode:
1439 if (dflag)
1440 oappend (names32[rm]);
1441 else
1442 oappend (names16[rm]);
1443 break;
1444 default:
1445 oappend ("<bad dis table>");
1446 break;
1447 }
1448 return;
1449 }
1450
1451 append_prefix ();
1452 if (rm == 4)
1453 {
1454 havesib = 1;
1455 havebase = 1;
1456 scale = (*codep >> 6) & 3;
1457 index = (*codep >> 3) & 7;
1458 base = *codep & 7;
1459 codep++;
1460 }
1461
1462 switch (mod)
1463 {
1464 case 0:
1465 switch (rm)
1466 {
1467 case 4:
1468 /* implies havesib and havebase */
1469 if (base == 5) {
1470 havebase = 0;
1471 disp = get32 ();
1472 }
1473 break;
1474 case 5:
1475 disp = get32 ();
1476 break;
1477 default:
1478 havebase = 1;
1479 base = rm;
1480 break;
1481 }
1482 break;
1483 case 1:
1484 disp = *(char *)codep++;
1485 if (rm != 4)
1486 {
1487 havebase = 1;
1488 base = rm;
1489 }
1490 break;
1491 case 2:
1492 disp = get32 ();
1493 if (rm != 4)
1494 {
1495 havebase = 1;
1496 base = rm;
1497 }
1498 break;
1499 }
1500
1501 if (mod != 0 || rm == 5 || (havesib && base == 5))
1502 {
1503 sprintf (scratchbuf, "%d", disp);
1504 oappend (scratchbuf);
1505 }
1506
1507 if (havebase || havesib)
1508 {
1509 oappend ("(");
1510 if (havebase)
1511 oappend (names32[base]);
1512 if (havesib)
1513 {
1514 if (index != 4)
1515 {
1516 sprintf (scratchbuf, ",%s", names32[index]);
1517 oappend (scratchbuf);
1518 }
1519 sprintf (scratchbuf, ",%d", 1 << scale);
1520 oappend (scratchbuf);
1521 }
1522 oappend (")");
1523 }
1524}
1525
1526OP_G (bytemode)
1527{
1528 switch (bytemode)
1529 {
1530 case b_mode:
1531 oappend (names8[reg]);
1532 break;
1533 case w_mode:
1534 oappend (names16[reg]);
1535 break;
1536 case d_mode:
1537 oappend (names32[reg]);
1538 break;
1539 case v_mode:
1540 if (dflag)
1541 oappend (names32[reg]);
1542 else
1543 oappend (names16[reg]);
1544 break;
1545 default:
1546 oappend ("<internal disassembler error>");
1547 break;
1548 }
1549}
1550
1551get32 ()
1552{
1553 int x = 0;
1554
1555 x = *codep++ & 0xff;
1556 x |= (*codep++ & 0xff) << 8;
1557 x |= (*codep++ & 0xff) << 16;
1558 x |= (*codep++ & 0xff) << 24;
1559 return (x);
1560}
1561
1562get16 ()
1563{
1564 int x = 0;
1565
1566 x = *codep++ & 0xff;
1567 x |= (*codep++ & 0xff) << 8;
1568 return (x);
1569}
1570
1571set_op (op)
1572int op;
1573{
1574 op_index[op_ad] = op_ad;
1575 op_address[op_ad] = op;
1576}
1577
1578OP_REG (code)
1579{
1580 char *s;
1581
1582 switch (code)
1583 {
1584 case indir_dx_reg: s = "(%dx)"; break;
1585 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
1586 case sp_reg: case bp_reg: case si_reg: case di_reg:
1587 s = names16[code - ax_reg];
1588 break;
1589 case es_reg: case ss_reg: case cs_reg:
1590 case ds_reg: case fs_reg: case gs_reg:
1591 s = names_seg[code - es_reg];
1592 break;
1593 case al_reg: case ah_reg: case cl_reg: case ch_reg:
1594 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
1595 s = names8[code - al_reg];
1596 break;
1597 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
1598 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
1599 if (dflag)
1600 s = names32[code - eAX_reg];
1601 else
1602 s = names16[code - eAX_reg];
1603 break;
1604 default:
1605 s = "<internal disassembler error>";
1606 break;
1607 }
1608 oappend (s);
1609}
1610
1611OP_I (bytemode)
1612{
1613 int op;
1614
1615 switch (bytemode)
1616 {
1617 case b_mode:
1618 op = *codep++ & 0xff;
1619 break;
1620 case v_mode:
1621 if (dflag)
1622 op = get32 ();
1623 else
1624 op = get16 ();
1625 break;
1626 case w_mode:
1627 op = get16 ();
1628 break;
1629 default:
1630 oappend ("<internal disassembler error>");
1631 return;
1632 }
1633 sprintf (scratchbuf, "$0x%x", op);
1634 oappend (scratchbuf);
1635}
1636
1637OP_sI (bytemode)
1638{
1639 int op;
1640
1641 switch (bytemode)
1642 {
1643 case b_mode:
1644 op = *(char *)codep++;
1645 break;
1646 case v_mode:
1647 if (dflag)
1648 op = get32 ();
1649 else
1650 op = (short)get16();
1651 break;
1652 case w_mode:
1653 op = (short)get16 ();
1654 break;
1655 default:
1656 oappend ("<internal disassembler error>");
1657 return;
1658 }
1659 sprintf (scratchbuf, "$0x%x", op);
1660 oappend (scratchbuf);
1661}
1662
1663OP_J (bytemode)
1664{
1665 int disp;
1666 int mask = -1;
1667
1668 switch (bytemode)
1669 {
1670 case b_mode:
1671 disp = *(char *)codep++;
1672 break;
1673 case v_mode:
1674 if (dflag)
1675 disp = get32 ();
1676 else
1677 {
1678 disp = (short)get16 ();
1679 /* for some reason, a data16 prefix on a jump instruction
1680 means that the pc is masked to 16 bits after the
1681 displacement is added! */
1682 mask = 0xffff;
1683 }
1684 break;
1685 default:
1686 oappend ("<internal disassembler error>");
1687 return;
1688 }
1689 disp = (start_pc + codep - start_codep + disp) & mask;
1690 set_op (disp);
1691 sprintf (scratchbuf, "0x%x", disp);
1692 oappend (scratchbuf);
1693}
1694
1695/* ARGSUSED */
1696OP_SEG (dummy)
1697{
1698 static char *sreg[] = {
1699 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
1700 };
1701
1702 oappend (sreg[reg]);
1703}
1704
1705OP_DIR (size)
1706{
1707 int seg, offset;
1708
1709 switch (size)
1710 {
1711 case lptr:
1712 if (aflag)
1713 {
1714 offset = get32 ();
1715 seg = get16 ();
1716 }
1717 else
1718 {
1719 offset = get16 ();
1720 seg = get16 ();
1721 }
1722 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
1723 oappend (scratchbuf);
1724 break;
1725 case v_mode:
1726 if (aflag)
1727 offset = get32 ();
1728 else
1729 offset = (short)get16 ();
1730
1731 offset = start_pc + codep - start_codep + offset;
1732 set_op (offset);
1733 sprintf (scratchbuf, "0x%x", offset);
1734 oappend (scratchbuf);
1735 break;
1736 default:
1737 oappend ("<internal disassembler error>");
1738 break;
1739 }
1740}
1741
1742/* ARGSUSED */
1743OP_OFF (bytemode)
1744{
1745 int off;
1746
1747 if (aflag)
1748 off = get32 ();
1749 else
1750 off = get16 ();
1751
1752 sprintf (scratchbuf, "0x%x", off);
1753 oappend (scratchbuf);
1754}
1755
1756/* ARGSUSED */
1757OP_ESDI (dummy)
1758{
1759 oappend ("%es:(");
1760 oappend (aflag ? "%edi" : "%di");
1761 oappend (")");
1762}
1763
1764/* ARGSUSED */
1765OP_DSSI (dummy)
1766{
1767 oappend ("%ds:(");
1768 oappend (aflag ? "%esi" : "%si");
1769 oappend (")");
1770}
1771
1772/* ARGSUSED */
1773OP_ONE (dummy)
1774{
1775 oappend ("1");
1776}
1777
1778/* ARGSUSED */
1779OP_C (dummy)
1780{
1781 codep++; /* skip mod/rm */
1782 sprintf (scratchbuf, "%%cr%d", reg);
1783 oappend (scratchbuf);
1784}
1785
1786/* ARGSUSED */
1787OP_D (dummy)
1788{
1789 codep++; /* skip mod/rm */
1790 sprintf (scratchbuf, "%%db%d", reg);
1791 oappend (scratchbuf);
1792}
1793
1794/* ARGSUSED */
1795OP_T (dummy)
1796{
1797 codep++; /* skip mod/rm */
1798 sprintf (scratchbuf, "%%tr%d", reg);
1799 oappend (scratchbuf);
1800}
1801
1802OP_rm (bytemode)
1803{
1804 switch (bytemode)
1805 {
1806 case d_mode:
1807 oappend (names32[rm]);
1808 break;
1809 case w_mode:
1810 oappend (names16[rm]);
1811 break;
1812 }
1813}
1814
1815/* GDB interface */
1816#include "defs.h"
1817#include "param.h"
1818#include "symtab.h"
1819#include "frame.h"
1820#include "inferior.h"
1821#include "gdbcore.h"
1822
1823#define MAXLEN 20
1824print_insn (memaddr, stream)
1825 CORE_ADDR memaddr;
1826 FILE *stream;
1827{
1828 unsigned char buffer[MAXLEN];
1829
1830 read_memory (memaddr, buffer, MAXLEN);
1831
1832 return (i386dis ((int)memaddr, buffer, stream));
1833}
1834
GDB Binutils - Deliverables
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