2000-06-14 Jim Blandy <jimb@redhat.com>
[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c
SS
1/* Intel 386 target-dependent stuff.
2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "gdb_string.h"
24#include "frame.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "target.h"
28#include "floatformat.h"
29#include "symtab.h"
30#include "gdbcmd.h"
31#include "command.h"
b4a20239 32#include "arch-utils.h"
c906108c 33
a14ed312 34static long i386_get_frame_setup (CORE_ADDR);
c906108c 35
a14ed312 36static void i386_follow_jump (void);
c906108c 37
a14ed312 38static void codestream_read (unsigned char *, int);
c906108c 39
a14ed312 40static void codestream_seek (CORE_ADDR);
c906108c 41
a14ed312 42static unsigned char codestream_fill (int);
c906108c 43
a14ed312 44CORE_ADDR skip_trampoline_code (CORE_ADDR, char *);
c906108c
SS
45
46static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
47
a14ed312 48void _initialize_i386_tdep (void);
c906108c 49
917317f4
JM
50/* i386_register_byte[i] is the offset into the register file of the
51 start of register number i. We initialize this from
52 i386_register_raw_size. */
53int i386_register_byte[MAX_NUM_REGS];
54
ceb4951f
JB
55/* i386_register_raw_size[i] is the number of bytes of storage in
56 GDB's register array occupied by register i. */
917317f4
JM
57int i386_register_raw_size[MAX_NUM_REGS] = {
58 4, 4, 4, 4,
59 4, 4, 4, 4,
60 4, 4, 4, 4,
61 4, 4, 4, 4,
62 10, 10, 10, 10,
63 10, 10, 10, 10,
64 4, 4, 4, 4,
65 4, 4, 4, 4,
66 16, 16, 16, 16,
67 16, 16, 16, 16,
68 4
69};
70
71/* i386_register_virtual_size[i] is the size in bytes of the virtual
72 type of register i. */
73int i386_register_virtual_size[MAX_NUM_REGS];
74
75
c906108c 76/* This is the variable the is set with "set disassembly-flavor",
c5aa993b 77 and its legitimate values. */
53904c9e
AC
78static const char att_flavor[] = "att";
79static const char intel_flavor[] = "intel";
80static const char *valid_flavors[] =
c5aa993b 81{
c906108c
SS
82 att_flavor,
83 intel_flavor,
84 NULL
85};
53904c9e 86static const char *disassembly_flavor = att_flavor;
c906108c 87
a14ed312 88static void i386_print_register (char *, int, int);
d4f3574e 89
7a292a7a 90/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
a14ed312
KB
91static void set_disassembly_flavor_sfunc (char *, int,
92 struct cmd_list_element *);
93static void set_disassembly_flavor (void);
7a292a7a 94
c906108c
SS
95/* Stdio style buffering was used to minimize calls to ptrace, but this
96 buffering did not take into account that the code section being accessed
97 may not be an even number of buffers long (even if the buffer is only
98 sizeof(int) long). In cases where the code section size happened to
99 be a non-integral number of buffers long, attempting to read the last
100 buffer would fail. Simply using target_read_memory and ignoring errors,
101 rather than read_memory, is not the correct solution, since legitimate
102 access errors would then be totally ignored. To properly handle this
103 situation and continue to use buffering would require that this code
104 be able to determine the minimum code section size granularity (not the
105 alignment of the section itself, since the actual failing case that
106 pointed out this problem had a section alignment of 4 but was not a
107 multiple of 4 bytes long), on a target by target basis, and then
108 adjust it's buffer size accordingly. This is messy, but potentially
109 feasible. It probably needs the bfd library's help and support. For
110 now, the buffer size is set to 1. (FIXME -fnf) */
111
112#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
113static CORE_ADDR codestream_next_addr;
114static CORE_ADDR codestream_addr;
115static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
116static int codestream_off;
117static int codestream_cnt;
118
119#define codestream_tell() (codestream_addr + codestream_off)
120#define codestream_peek() (codestream_cnt == 0 ? \
121 codestream_fill(1): codestream_buf[codestream_off])
122#define codestream_get() (codestream_cnt-- == 0 ? \
123 codestream_fill(0) : codestream_buf[codestream_off++])
124
c5aa993b 125static unsigned char
c906108c 126codestream_fill (peek_flag)
c5aa993b 127 int peek_flag;
c906108c
SS
128{
129 codestream_addr = codestream_next_addr;
130 codestream_next_addr += CODESTREAM_BUFSIZ;
131 codestream_off = 0;
132 codestream_cnt = CODESTREAM_BUFSIZ;
133 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 134
c906108c 135 if (peek_flag)
c5aa993b 136 return (codestream_peek ());
c906108c 137 else
c5aa993b 138 return (codestream_get ());
c906108c
SS
139}
140
141static void
142codestream_seek (place)
c5aa993b 143 CORE_ADDR place;
c906108c
SS
144{
145 codestream_next_addr = place / CODESTREAM_BUFSIZ;
146 codestream_next_addr *= CODESTREAM_BUFSIZ;
147 codestream_cnt = 0;
148 codestream_fill (1);
c5aa993b 149 while (codestream_tell () != place)
c906108c
SS
150 codestream_get ();
151}
152
153static void
154codestream_read (buf, count)
155 unsigned char *buf;
156 int count;
157{
158 unsigned char *p;
159 int i;
160 p = buf;
161 for (i = 0; i < count; i++)
162 *p++ = codestream_get ();
163}
164
165/* next instruction is a jump, move to target */
166
167static void
168i386_follow_jump ()
169{
170 unsigned char buf[4];
171 long delta;
172
173 int data16;
174 CORE_ADDR pos;
175
176 pos = codestream_tell ();
177
178 data16 = 0;
179 if (codestream_peek () == 0x66)
180 {
181 codestream_get ();
182 data16 = 1;
183 }
184
185 switch (codestream_get ())
186 {
187 case 0xe9:
188 /* relative jump: if data16 == 0, disp32, else disp16 */
189 if (data16)
190 {
191 codestream_read (buf, 2);
192 delta = extract_signed_integer (buf, 2);
193
194 /* include size of jmp inst (including the 0x66 prefix). */
c5aa993b 195 pos += delta + 4;
c906108c
SS
196 }
197 else
198 {
199 codestream_read (buf, 4);
200 delta = extract_signed_integer (buf, 4);
201
202 pos += delta + 5;
203 }
204 break;
205 case 0xeb:
206 /* relative jump, disp8 (ignore data16) */
207 codestream_read (buf, 1);
208 /* Sign-extend it. */
209 delta = extract_signed_integer (buf, 1);
210
211 pos += delta + 2;
212 break;
213 }
214 codestream_seek (pos);
215}
216
217/*
218 * find & return amound a local space allocated, and advance codestream to
219 * first register push (if any)
220 *
221 * if entry sequence doesn't make sense, return -1, and leave
222 * codestream pointer random
223 */
224
225static long
226i386_get_frame_setup (pc)
227 CORE_ADDR pc;
228{
229 unsigned char op;
230
231 codestream_seek (pc);
232
233 i386_follow_jump ();
234
235 op = codestream_get ();
236
237 if (op == 0x58) /* popl %eax */
238 {
239 /*
240 * this function must start with
241 *
c5aa993b 242 * popl %eax 0x58
c906108c
SS
243 * xchgl %eax, (%esp) 0x87 0x04 0x24
244 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
245 *
246 * (the system 5 compiler puts out the second xchg
247 * inst, and the assembler doesn't try to optimize it,
248 * so the 'sib' form gets generated)
249 *
250 * this sequence is used to get the address of the return
251 * buffer for a function that returns a structure
252 */
253 int pos;
254 unsigned char buf[4];
c5aa993b
JM
255 static unsigned char proto1[3] =
256 {0x87, 0x04, 0x24};
257 static unsigned char proto2[4] =
258 {0x87, 0x44, 0x24, 0x00};
c906108c
SS
259 pos = codestream_tell ();
260 codestream_read (buf, 4);
261 if (memcmp (buf, proto1, 3) == 0)
262 pos += 3;
263 else if (memcmp (buf, proto2, 4) == 0)
264 pos += 4;
265
266 codestream_seek (pos);
c5aa993b 267 op = codestream_get (); /* update next opcode */
c906108c
SS
268 }
269
270 if (op == 0x68 || op == 0x6a)
271 {
272 /*
273 * this function may start with
274 *
275 * pushl constant
276 * call _probe
277 * addl $4, %esp
278 * followed by
279 * pushl %ebp
280 * etc.
281 */
282 int pos;
283 unsigned char buf[8];
284
285 /* Skip past the pushl instruction; it has either a one-byte
286 or a four-byte operand, depending on the opcode. */
287 pos = codestream_tell ();
288 if (op == 0x68)
289 pos += 4;
290 else
291 pos += 1;
292 codestream_seek (pos);
293
294 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
295 followed by "addl $4,%esp" (2 bytes). */
296 codestream_read (buf, sizeof (buf));
297 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
298 pos += sizeof (buf);
299 codestream_seek (pos);
c5aa993b 300 op = codestream_get (); /* update next opcode */
c906108c
SS
301 }
302
303 if (op == 0x55) /* pushl %ebp */
c5aa993b 304 {
c906108c
SS
305 /* check for movl %esp, %ebp - can be written two ways */
306 switch (codestream_get ())
307 {
308 case 0x8b:
309 if (codestream_get () != 0xec)
310 return (-1);
311 break;
312 case 0x89:
313 if (codestream_get () != 0xe5)
314 return (-1);
315 break;
316 default:
317 return (-1);
318 }
319 /* check for stack adjustment
c5aa993b 320
c906108c
SS
321 * subl $XXX, %esp
322 *
323 * note: you can't subtract a 16 bit immediate
324 * from a 32 bit reg, so we don't have to worry
325 * about a data16 prefix
326 */
327 op = codestream_peek ();
328 if (op == 0x83)
329 {
330 /* subl with 8 bit immed */
331 codestream_get ();
332 if (codestream_get () != 0xec)
333 /* Some instruction starting with 0x83 other than subl. */
334 {
335 codestream_seek (codestream_tell () - 2);
336 return 0;
337 }
338 /* subl with signed byte immediate
339 * (though it wouldn't make sense to be negative)
340 */
c5aa993b 341 return (codestream_get ());
c906108c
SS
342 }
343 else if (op == 0x81)
344 {
345 char buf[4];
346 /* Maybe it is subl with 32 bit immedediate. */
c5aa993b 347 codestream_get ();
c906108c
SS
348 if (codestream_get () != 0xec)
349 /* Some instruction starting with 0x81 other than subl. */
350 {
351 codestream_seek (codestream_tell () - 2);
352 return 0;
353 }
354 /* It is subl with 32 bit immediate. */
c5aa993b 355 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
356 return extract_signed_integer (buf, 4);
357 }
358 else
359 {
360 return (0);
361 }
362 }
363 else if (op == 0xc8)
364 {
365 char buf[2];
366 /* enter instruction: arg is 16 bit unsigned immed */
c5aa993b
JM
367 codestream_read ((unsigned char *) buf, 2);
368 codestream_get (); /* flush final byte of enter instruction */
c906108c
SS
369 return extract_unsigned_integer (buf, 2);
370 }
371 return (-1);
372}
373
374/* Return number of args passed to a frame.
375 Can return -1, meaning no way to tell. */
376
377int
378i386_frame_num_args (fi)
379 struct frame_info *fi;
380{
381#if 1
382 return -1;
383#else
384 /* This loses because not only might the compiler not be popping the
385 args right after the function call, it might be popping args from both
386 this call and a previous one, and we would say there are more args
387 than there really are. */
388
c5aa993b
JM
389 int retpc;
390 unsigned char op;
c906108c
SS
391 struct frame_info *pfi;
392
393 /* on the 386, the instruction following the call could be:
394 popl %ecx - one arg
395 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
396 anything else - zero args */
397
398 int frameless;
399
392a587b 400 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c
SS
401 if (frameless)
402 /* In the absence of a frame pointer, GDB doesn't get correct values
403 for nameless arguments. Return -1, so it doesn't print any
404 nameless arguments. */
405 return -1;
406
c5aa993b 407 pfi = get_prev_frame (fi);
c906108c
SS
408 if (pfi == 0)
409 {
410 /* Note: this can happen if we are looking at the frame for
c5aa993b
JM
411 main, because FRAME_CHAIN_VALID won't let us go into
412 start. If we have debugging symbols, that's not really
413 a big deal; it just means it will only show as many arguments
414 to main as are declared. */
c906108c
SS
415 return -1;
416 }
417 else
418 {
c5aa993b
JM
419 retpc = pfi->pc;
420 op = read_memory_integer (retpc, 1);
421 if (op == 0x59)
422 /* pop %ecx */
423 return 1;
c906108c
SS
424 else if (op == 0x83)
425 {
c5aa993b
JM
426 op = read_memory_integer (retpc + 1, 1);
427 if (op == 0xc4)
428 /* addl $<signed imm 8 bits>, %esp */
429 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
430 else
431 return 0;
432 }
433 else if (op == 0x81)
c5aa993b
JM
434 { /* add with 32 bit immediate */
435 op = read_memory_integer (retpc + 1, 1);
436 if (op == 0xc4)
437 /* addl $<imm 32>, %esp */
438 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
439 else
440 return 0;
441 }
442 else
443 {
444 return 0;
445 }
446 }
447#endif
448}
449
450/*
451 * parse the first few instructions of the function to see
452 * what registers were stored.
453 *
454 * We handle these cases:
455 *
456 * The startup sequence can be at the start of the function,
457 * or the function can start with a branch to startup code at the end.
458 *
459 * %ebp can be set up with either the 'enter' instruction, or
460 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
461 * but was once used in the sys5 compiler)
462 *
463 * Local space is allocated just below the saved %ebp by either the
464 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
465 * a 16 bit unsigned argument for space to allocate, and the
466 * 'addl' instruction could have either a signed byte, or
467 * 32 bit immediate.
468 *
469 * Next, the registers used by this function are pushed. In
470 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
471 * (and sometimes a harmless bug causes it to also save but not restore %eax);
472 * however, the code below is willing to see the pushes in any order,
473 * and will handle up to 8 of them.
474 *
475 * If the setup sequence is at the end of the function, then the
476 * next instruction will be a branch back to the start.
477 */
478
479void
1211c4e4 480i386_frame_init_saved_regs (fip)
c906108c 481 struct frame_info *fip;
c906108c
SS
482{
483 long locals = -1;
484 unsigned char op;
485 CORE_ADDR dummy_bottom;
486 CORE_ADDR adr;
487 CORE_ADDR pc;
488 int i;
c5aa993b 489
1211c4e4
AC
490 if (fip->saved_regs)
491 return;
492
493 frame_saved_regs_zalloc (fip);
c5aa993b 494
c906108c
SS
495 /* if frame is the end of a dummy, compute where the
496 * beginning would be
497 */
498 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 499
c906108c 500 /* check if the PC is in the stack, in a dummy frame */
c5aa993b 501 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c
SS
502 {
503 /* all regs were saved by push_call_dummy () */
504 adr = fip->frame;
c5aa993b 505 for (i = 0; i < NUM_REGS; i++)
c906108c
SS
506 {
507 adr -= REGISTER_RAW_SIZE (i);
1211c4e4 508 fip->saved_regs[i] = adr;
c906108c
SS
509 }
510 return;
511 }
c5aa993b 512
c906108c
SS
513 pc = get_pc_function_start (fip->pc);
514 if (pc != 0)
515 locals = i386_get_frame_setup (pc);
c5aa993b
JM
516
517 if (locals >= 0)
c906108c
SS
518 {
519 adr = fip->frame - 4 - locals;
c5aa993b 520 for (i = 0; i < 8; i++)
c906108c
SS
521 {
522 op = codestream_get ();
523 if (op < 0x50 || op > 0x57)
524 break;
525#ifdef I386_REGNO_TO_SYMMETRY
526 /* Dynix uses different internal numbering. Ick. */
1211c4e4 527 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
c906108c 528#else
1211c4e4 529 fip->saved_regs[op - 0x50] = adr;
c906108c
SS
530#endif
531 adr -= 4;
532 }
533 }
c5aa993b 534
1211c4e4
AC
535 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
536 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
537}
538
539/* return pc of first real instruction */
540
541int
542i386_skip_prologue (pc)
543 int pc;
544{
545 unsigned char op;
546 int i;
c5aa993b
JM
547 static unsigned char pic_pat[6] =
548 {0xe8, 0, 0, 0, 0, /* call 0x0 */
549 0x5b, /* popl %ebx */
550 };
c906108c 551 CORE_ADDR pos;
c5aa993b 552
c906108c
SS
553 if (i386_get_frame_setup (pc) < 0)
554 return (pc);
c5aa993b 555
c906108c
SS
556 /* found valid frame setup - codestream now points to
557 * start of push instructions for saving registers
558 */
c5aa993b 559
c906108c
SS
560 /* skip over register saves */
561 for (i = 0; i < 8; i++)
562 {
563 op = codestream_peek ();
564 /* break if not pushl inst */
c5aa993b 565 if (op < 0x50 || op > 0x57)
c906108c
SS
566 break;
567 codestream_get ();
568 }
569
570 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
571 the address of the global offset table (GOT) into register %ebx.
c5aa993b
JM
572 call 0x0
573 popl %ebx
574 movl %ebx,x(%ebp) (optional)
575 addl y,%ebx
c906108c
SS
576 This code is with the rest of the prologue (at the end of the
577 function), so we have to skip it to get to the first real
578 instruction at the start of the function. */
c5aa993b 579
c906108c
SS
580 pos = codestream_tell ();
581 for (i = 0; i < 6; i++)
582 {
583 op = codestream_get ();
c5aa993b 584 if (pic_pat[i] != op)
c906108c
SS
585 break;
586 }
587 if (i == 6)
588 {
589 unsigned char buf[4];
590 long delta = 6;
591
592 op = codestream_get ();
c5aa993b 593 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
594 {
595 op = codestream_get ();
c5aa993b 596 if (op == 0x5d) /* one byte offset from %ebp */
c906108c
SS
597 {
598 delta += 3;
599 codestream_read (buf, 1);
600 }
c5aa993b 601 else if (op == 0x9d) /* four byte offset from %ebp */
c906108c
SS
602 {
603 delta += 6;
604 codestream_read (buf, 4);
605 }
c5aa993b
JM
606 else /* unexpected instruction */
607 delta = -1;
608 op = codestream_get ();
c906108c 609 }
c5aa993b
JM
610 /* addl y,%ebx */
611 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 612 {
c5aa993b 613 pos += delta + 6;
c906108c
SS
614 }
615 }
616 codestream_seek (pos);
c5aa993b 617
c906108c 618 i386_follow_jump ();
c5aa993b 619
c906108c
SS
620 return (codestream_tell ());
621}
622
623void
624i386_push_dummy_frame ()
625{
626 CORE_ADDR sp = read_register (SP_REGNUM);
627 int regnum;
628 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 629
c906108c
SS
630 sp = push_word (sp, read_register (PC_REGNUM));
631 sp = push_word (sp, read_register (FP_REGNUM));
632 write_register (FP_REGNUM, sp);
633 for (regnum = 0; regnum < NUM_REGS; regnum++)
634 {
635 read_register_gen (regnum, regbuf);
636 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
637 }
638 write_register (SP_REGNUM, sp);
639}
640
a7769679
MK
641/* Insert the (relative) function address into the call sequence
642 stored at DYMMY. */
643
644void
645i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
646 value_ptr *args, struct type *type, int gcc_p)
647{
648 int from, to, delta, loc;
649
650 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
651 from = loc + 5;
652 to = (int)(fun);
653 delta = to - from;
654
655 *((char *)(dummy) + 1) = (delta & 0xff);
656 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
657 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
658 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
659}
660
c906108c
SS
661void
662i386_pop_frame ()
663{
664 struct frame_info *frame = get_current_frame ();
665 CORE_ADDR fp;
666 int regnum;
c906108c 667 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 668
c906108c 669 fp = FRAME_FP (frame);
1211c4e4
AC
670 i386_frame_init_saved_regs (frame);
671
c5aa993b 672 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c
SS
673 {
674 CORE_ADDR adr;
1211c4e4 675 adr = frame->saved_regs[regnum];
c906108c
SS
676 if (adr)
677 {
678 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
679 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
680 REGISTER_RAW_SIZE (regnum));
681 }
682 }
683 write_register (FP_REGNUM, read_memory_integer (fp, 4));
684 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
685 write_register (SP_REGNUM, fp + 8);
686 flush_cached_frames ();
687}
688
689#ifdef GET_LONGJMP_TARGET
690
691/* Figure out where the longjmp will land. Slurp the args out of the stack.
692 We expect the first arg to be a pointer to the jmp_buf structure from which
693 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
694 This routine returns true on success. */
695
696int
c5aa993b 697get_longjmp_target (pc)
c906108c
SS
698 CORE_ADDR *pc;
699{
700 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
701 CORE_ADDR sp, jb_addr;
702
703 sp = read_register (SP_REGNUM);
704
c5aa993b 705 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
c906108c
SS
706 buf,
707 TARGET_PTR_BIT / TARGET_CHAR_BIT))
708 return 0;
709
710 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
711
712 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
713 TARGET_PTR_BIT / TARGET_CHAR_BIT))
714 return 0;
715
716 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
717
718 return 1;
719}
720
721#endif /* GET_LONGJMP_TARGET */
722
1a309862
MK
723/* These registers are used for returning integers (and on some
724 targets also for returning `struct' and `union' values when their
725 size and alignment match an integer type. */
726#define LOW_RETURN_REGNUM 0 /* %eax */
727#define HIGH_RETURN_REGNUM 2 /* %edx */
728
729/* Extract from an array REGBUF containing the (raw) register state, a
730 function return value of TYPE, and copy that, in virtual format,
731 into VALBUF. */
732
c906108c 733void
1a309862 734i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 735{
1a309862
MK
736 int len = TYPE_LENGTH (type);
737
c5aa993b 738 if (TYPE_CODE_FLT == TYPE_CODE (type))
c906108c 739 {
1a309862
MK
740 if (NUM_FREGS == 0)
741 {
742 warning ("Cannot find floating-point return value.");
743 memset (valbuf, 0, len);
744 }
745
746 /* Floating-point return values can be found in %st(0). */
747 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
748 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
749 {
750 /* Copy straight over, but take care of the padding. */
751 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
752 FPU_REG_RAW_SIZE);
753 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
754 }
755 else
756 {
757 /* Convert the extended floating-point number found in
758 %st(0) to the desired type. This is probably not exactly
759 how it would happen on the target itself, but it is the
760 best we can do. */
761 DOUBLEST val;
762 floatformat_to_doublest (&floatformat_i387_ext,
763 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
764 store_floating (valbuf, TYPE_LENGTH (type), val);
765 }
c906108c
SS
766 }
767 else
c5aa993b 768 {
d4f3574e
SS
769 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
770 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
771
772 if (len <= low_size)
1a309862 773 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
d4f3574e
SS
774 else if (len <= (low_size + high_size))
775 {
776 memcpy (valbuf,
1a309862 777 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
d4f3574e 778 memcpy (valbuf + low_size,
1a309862 779 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
d4f3574e
SS
780 }
781 else
1a309862 782 internal_error ("Cannot extract return value of %d bytes long.", len);
c906108c
SS
783 }
784}
785
ac27f131
MK
786/* Convert data from raw format for register REGNUM in buffer FROM to
787 virtual format with type TYPE in buffer TO. In principle both
788 formats are identical except that the virtual format has two extra
789 bytes appended that aren't used. We set these to zero. */
790
791void
792i386_register_convert_to_virtual (int regnum, struct type *type,
793 char *from, char *to)
794{
795 /* Copy straight over, but take care of the padding. */
796 memcpy (to, from, FPU_REG_RAW_SIZE);
797 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
798}
799
800/* Convert data from virtual format with type TYPE in buffer FROM to
801 raw format for register REGNUM in buffer TO. Simply omit the two
802 unused bytes. */
803
804void
805i386_register_convert_to_raw (struct type *type, int regnum,
806 char *from, char *to)
807{
808 memcpy (to, from, FPU_REG_RAW_SIZE);
809}
810
811\f
c906108c
SS
812#ifdef I386V4_SIGTRAMP_SAVED_PC
813/* Get saved user PC for sigtramp from the pushed ucontext on the stack
814 for all three variants of SVR4 sigtramps. */
815
816CORE_ADDR
817i386v4_sigtramp_saved_pc (frame)
818 struct frame_info *frame;
819{
820 CORE_ADDR saved_pc_offset = 4;
821 char *name = NULL;
822
823 find_pc_partial_function (frame->pc, &name, NULL, NULL);
824 if (name)
825 {
826 if (STREQ (name, "_sigreturn"))
827 saved_pc_offset = 132 + 14 * 4;
828 else if (STREQ (name, "_sigacthandler"))
829 saved_pc_offset = 80 + 14 * 4;
830 else if (STREQ (name, "sigvechandler"))
831 saved_pc_offset = 120 + 14 * 4;
832 }
833
834 if (frame->next)
835 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
836 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
837}
838#endif /* I386V4_SIGTRAMP_SAVED_PC */
839
a0b3c4fd 840
c906108c
SS
841#ifdef STATIC_TRANSFORM_NAME
842/* SunPRO encodes the static variables. This is not related to C++ mangling,
843 it is done for C too. */
844
845char *
846sunpro_static_transform_name (name)
847 char *name;
848{
849 char *p;
850 if (IS_STATIC_TRANSFORM_NAME (name))
851 {
852 /* For file-local statics there will be a period, a bunch
c5aa993b
JM
853 of junk (the contents of which match a string given in the
854 N_OPT), a period and the name. For function-local statics
855 there will be a bunch of junk (which seems to change the
856 second character from 'A' to 'B'), a period, the name of the
857 function, and the name. So just skip everything before the
858 last period. */
c906108c
SS
859 p = strrchr (name, '.');
860 if (p != NULL)
861 name = p + 1;
862 }
863 return name;
864}
865#endif /* STATIC_TRANSFORM_NAME */
866
867
868
869/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
870
871CORE_ADDR
872skip_trampoline_code (pc, name)
873 CORE_ADDR pc;
874 char *name;
875{
c5aa993b 876 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 877 {
c5aa993b 878 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 879 struct minimal_symbol *indsym =
c5aa993b
JM
880 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
881 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 882
c5aa993b 883 if (symname)
c906108c 884 {
c5aa993b
JM
885 if (strncmp (symname, "__imp_", 6) == 0
886 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
887 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
888 }
889 }
890 return 0; /* not a trampoline */
891}
892
893static int
894gdb_print_insn_i386 (memaddr, info)
895 bfd_vma memaddr;
c5aa993b 896 disassemble_info *info;
c906108c
SS
897{
898 if (disassembly_flavor == att_flavor)
899 return print_insn_i386_att (memaddr, info);
900 else if (disassembly_flavor == intel_flavor)
901 return print_insn_i386_intel (memaddr, info);
7a292a7a
SS
902 /* Never reached - disassembly_flavour is always either att_flavor
903 or intel_flavor */
904 abort ();
905}
906
907/* If the disassembly mode is intel, we have to also switch the
908 bfd mach_type. This function is run in the set disassembly_flavor
909 command, and does that. */
910
911static void
912set_disassembly_flavor_sfunc (args, from_tty, c)
913 char *args;
914 int from_tty;
915 struct cmd_list_element *c;
916{
917 set_disassembly_flavor ();
7a292a7a
SS
918}
919
920static void
921set_disassembly_flavor ()
922{
923 if (disassembly_flavor == att_flavor)
924 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
925 else if (disassembly_flavor == intel_flavor)
926 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
c906108c
SS
927}
928
2acceee2 929
c906108c
SS
930void
931_initialize_i386_tdep ()
932{
917317f4
JM
933 /* Initialize the table saying where each register starts in the
934 register file. */
935 {
936 int i, offset;
937
938 offset = 0;
939 for (i = 0; i < MAX_NUM_REGS; i++)
940 {
941 i386_register_byte[i] = offset;
942 offset += i386_register_raw_size[i];
943 }
944 }
945
946 /* Initialize the table of virtual register sizes. */
947 {
948 int i;
949
950 for (i = 0; i < MAX_NUM_REGS; i++)
951 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
952 }
c5aa993b 953
c906108c
SS
954 tm_print_insn = gdb_print_insn_i386;
955 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
956
957 /* Add the variable that controls the disassembly flavor */
917317f4
JM
958 {
959 struct cmd_list_element *new_cmd;
7a292a7a 960
917317f4
JM
961 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
962 valid_flavors,
1ed2a135 963 &disassembly_flavor,
917317f4 964 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 965and the default value is \"att\".",
917317f4
JM
966 &setlist);
967 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
968 add_show_from_set (new_cmd, &showlist);
969 }
c5aa993b 970
7a292a7a
SS
971 /* Finally, initialize the disassembly flavor to the default given
972 in the disassembly_flavor variable */
c906108c 973
7a292a7a 974 set_disassembly_flavor ();
c906108c 975}
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