Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "gdb_string.h" | |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
27 | #include "gdbcore.h" | |
dfe01d39 | 28 | #include "objfiles.h" |
c906108c SS |
29 | #include "target.h" |
30 | #include "floatformat.h" | |
c0d1d883 | 31 | #include "symfile.h" |
c906108c SS |
32 | #include "symtab.h" |
33 | #include "gdbcmd.h" | |
34 | #include "command.h" | |
b4a20239 | 35 | #include "arch-utils.h" |
4e052eda | 36 | #include "regcache.h" |
d16aafd8 | 37 | #include "doublest.h" |
fd0407d6 | 38 | #include "value.h" |
3d261580 | 39 | #include "gdb_assert.h" |
38c968cf | 40 | #include "reggroups.h" |
5a4d6ff4 | 41 | #include "dummy-frame.h" |
4be87837 | 42 | #include "osabi.h" |
3d261580 | 43 | |
d2a7c97a | 44 | #include "i386-tdep.h" |
61113f8b | 45 | #include "i387-tdep.h" |
d2a7c97a | 46 | |
fc633446 MK |
47 | /* Names of the registers. The first 10 registers match the register |
48 | numbering scheme used by GCC for stabs and DWARF. */ | |
49 | static char *i386_register_names[] = | |
50 | { | |
51 | "eax", "ecx", "edx", "ebx", | |
52 | "esp", "ebp", "esi", "edi", | |
53 | "eip", "eflags", "cs", "ss", | |
54 | "ds", "es", "fs", "gs", | |
55 | "st0", "st1", "st2", "st3", | |
56 | "st4", "st5", "st6", "st7", | |
57 | "fctrl", "fstat", "ftag", "fiseg", | |
58 | "fioff", "foseg", "fooff", "fop", | |
59 | "xmm0", "xmm1", "xmm2", "xmm3", | |
60 | "xmm4", "xmm5", "xmm6", "xmm7", | |
61 | "mxcsr" | |
62 | }; | |
63 | ||
28fc6740 AC |
64 | /* MMX registers. */ |
65 | ||
66 | static char *i386_mmx_names[] = | |
67 | { | |
68 | "mm0", "mm1", "mm2", "mm3", | |
69 | "mm4", "mm5", "mm6", "mm7" | |
70 | }; | |
71 | static const int mmx_num_regs = (sizeof (i386_mmx_names) | |
72 | / sizeof (i386_mmx_names[0])); | |
73 | #define MM0_REGNUM (NUM_REGS) | |
74 | ||
75 | static int | |
23a34459 | 76 | i386_mmx_regnum_p (int reg) |
28fc6740 AC |
77 | { |
78 | return (reg >= MM0_REGNUM && reg < MM0_REGNUM + mmx_num_regs); | |
79 | } | |
80 | ||
23a34459 AC |
81 | /* FP register? */ |
82 | ||
83 | int | |
84 | i386_fp_regnum_p (int regnum) | |
85 | { | |
86 | return (regnum < NUM_REGS | |
87 | && (FP0_REGNUM && FP0_REGNUM <= (regnum) && (regnum) < FPC_REGNUM)); | |
88 | } | |
89 | ||
90 | int | |
91 | i386_fpc_regnum_p (int regnum) | |
92 | { | |
93 | return (regnum < NUM_REGS | |
94 | && (FPC_REGNUM <= (regnum) && (regnum) < XMM0_REGNUM)); | |
95 | } | |
96 | ||
97 | /* SSE register? */ | |
98 | ||
99 | int | |
100 | i386_sse_regnum_p (int regnum) | |
101 | { | |
102 | return (regnum < NUM_REGS | |
103 | && (XMM0_REGNUM <= (regnum) && (regnum) < MXCSR_REGNUM)); | |
104 | } | |
105 | ||
106 | int | |
107 | i386_mxcsr_regnum_p (int regnum) | |
108 | { | |
109 | return (regnum < NUM_REGS | |
110 | && (regnum == MXCSR_REGNUM)); | |
111 | } | |
112 | ||
fc633446 MK |
113 | /* Return the name of register REG. */ |
114 | ||
fa88f677 | 115 | const char * |
fc633446 MK |
116 | i386_register_name (int reg) |
117 | { | |
118 | if (reg < 0) | |
119 | return NULL; | |
23a34459 | 120 | if (i386_mmx_regnum_p (reg)) |
28fc6740 | 121 | return i386_mmx_names[reg - MM0_REGNUM]; |
fc633446 MK |
122 | if (reg >= sizeof (i386_register_names) / sizeof (*i386_register_names)) |
123 | return NULL; | |
124 | ||
125 | return i386_register_names[reg]; | |
126 | } | |
127 | ||
85540d8c MK |
128 | /* Convert stabs register number REG to the appropriate register |
129 | number used by GDB. */ | |
130 | ||
8201327c | 131 | static int |
85540d8c MK |
132 | i386_stab_reg_to_regnum (int reg) |
133 | { | |
134 | /* This implements what GCC calls the "default" register map. */ | |
135 | if (reg >= 0 && reg <= 7) | |
136 | { | |
137 | /* General registers. */ | |
138 | return reg; | |
139 | } | |
140 | else if (reg >= 12 && reg <= 19) | |
141 | { | |
142 | /* Floating-point registers. */ | |
143 | return reg - 12 + FP0_REGNUM; | |
144 | } | |
145 | else if (reg >= 21 && reg <= 28) | |
146 | { | |
147 | /* SSE registers. */ | |
148 | return reg - 21 + XMM0_REGNUM; | |
149 | } | |
150 | else if (reg >= 29 && reg <= 36) | |
151 | { | |
152 | /* MMX registers. */ | |
7d12f766 | 153 | return reg - 29 + MM0_REGNUM; |
85540d8c MK |
154 | } |
155 | ||
156 | /* This will hopefully provoke a warning. */ | |
157 | return NUM_REGS + NUM_PSEUDO_REGS; | |
158 | } | |
159 | ||
8201327c | 160 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
161 | number used by GDB. */ |
162 | ||
8201327c | 163 | static int |
85540d8c MK |
164 | i386_dwarf_reg_to_regnum (int reg) |
165 | { | |
166 | /* The DWARF register numbering includes %eip and %eflags, and | |
167 | numbers the floating point registers differently. */ | |
168 | if (reg >= 0 && reg <= 9) | |
169 | { | |
170 | /* General registers. */ | |
171 | return reg; | |
172 | } | |
173 | else if (reg >= 11 && reg <= 18) | |
174 | { | |
175 | /* Floating-point registers. */ | |
176 | return reg - 11 + FP0_REGNUM; | |
177 | } | |
178 | else if (reg >= 21) | |
179 | { | |
180 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
181 | return i386_stab_reg_to_regnum (reg); | |
182 | } | |
183 | ||
184 | /* This will hopefully provoke a warning. */ | |
185 | return NUM_REGS + NUM_PSEUDO_REGS; | |
186 | } | |
fc338970 | 187 | \f |
917317f4 | 188 | |
fc338970 MK |
189 | /* This is the variable that is set with "set disassembly-flavor", and |
190 | its legitimate values. */ | |
53904c9e AC |
191 | static const char att_flavor[] = "att"; |
192 | static const char intel_flavor[] = "intel"; | |
193 | static const char *valid_flavors[] = | |
c5aa993b | 194 | { |
c906108c SS |
195 | att_flavor, |
196 | intel_flavor, | |
197 | NULL | |
198 | }; | |
53904c9e | 199 | static const char *disassembly_flavor = att_flavor; |
c906108c | 200 | |
fc338970 MK |
201 | /* Stdio style buffering was used to minimize calls to ptrace, but |
202 | this buffering did not take into account that the code section | |
203 | being accessed may not be an even number of buffers long (even if | |
204 | the buffer is only sizeof(int) long). In cases where the code | |
205 | section size happened to be a non-integral number of buffers long, | |
206 | attempting to read the last buffer would fail. Simply using | |
207 | target_read_memory and ignoring errors, rather than read_memory, is | |
208 | not the correct solution, since legitimate access errors would then | |
209 | be totally ignored. To properly handle this situation and continue | |
210 | to use buffering would require that this code be able to determine | |
211 | the minimum code section size granularity (not the alignment of the | |
212 | section itself, since the actual failing case that pointed out this | |
213 | problem had a section alignment of 4 but was not a multiple of 4 | |
214 | bytes long), on a target by target basis, and then adjust it's | |
215 | buffer size accordingly. This is messy, but potentially feasible. | |
216 | It probably needs the bfd library's help and support. For now, the | |
217 | buffer size is set to 1. (FIXME -fnf) */ | |
218 | ||
219 | #define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */ | |
c906108c SS |
220 | static CORE_ADDR codestream_next_addr; |
221 | static CORE_ADDR codestream_addr; | |
222 | static unsigned char codestream_buf[CODESTREAM_BUFSIZ]; | |
223 | static int codestream_off; | |
224 | static int codestream_cnt; | |
225 | ||
226 | #define codestream_tell() (codestream_addr + codestream_off) | |
fc338970 MK |
227 | #define codestream_peek() \ |
228 | (codestream_cnt == 0 ? \ | |
229 | codestream_fill(1) : codestream_buf[codestream_off]) | |
230 | #define codestream_get() \ | |
231 | (codestream_cnt-- == 0 ? \ | |
232 | codestream_fill(0) : codestream_buf[codestream_off++]) | |
c906108c | 233 | |
c5aa993b | 234 | static unsigned char |
fba45db2 | 235 | codestream_fill (int peek_flag) |
c906108c SS |
236 | { |
237 | codestream_addr = codestream_next_addr; | |
238 | codestream_next_addr += CODESTREAM_BUFSIZ; | |
239 | codestream_off = 0; | |
240 | codestream_cnt = CODESTREAM_BUFSIZ; | |
241 | read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ); | |
c5aa993b | 242 | |
c906108c | 243 | if (peek_flag) |
c5aa993b | 244 | return (codestream_peek ()); |
c906108c | 245 | else |
c5aa993b | 246 | return (codestream_get ()); |
c906108c SS |
247 | } |
248 | ||
249 | static void | |
fba45db2 | 250 | codestream_seek (CORE_ADDR place) |
c906108c SS |
251 | { |
252 | codestream_next_addr = place / CODESTREAM_BUFSIZ; | |
253 | codestream_next_addr *= CODESTREAM_BUFSIZ; | |
254 | codestream_cnt = 0; | |
255 | codestream_fill (1); | |
c5aa993b | 256 | while (codestream_tell () != place) |
c906108c SS |
257 | codestream_get (); |
258 | } | |
259 | ||
260 | static void | |
fba45db2 | 261 | codestream_read (unsigned char *buf, int count) |
c906108c SS |
262 | { |
263 | unsigned char *p; | |
264 | int i; | |
265 | p = buf; | |
266 | for (i = 0; i < count; i++) | |
267 | *p++ = codestream_get (); | |
268 | } | |
fc338970 | 269 | \f |
c906108c | 270 | |
fc338970 | 271 | /* If the next instruction is a jump, move to its target. */ |
c906108c SS |
272 | |
273 | static void | |
fba45db2 | 274 | i386_follow_jump (void) |
c906108c SS |
275 | { |
276 | unsigned char buf[4]; | |
277 | long delta; | |
278 | ||
279 | int data16; | |
280 | CORE_ADDR pos; | |
281 | ||
282 | pos = codestream_tell (); | |
283 | ||
284 | data16 = 0; | |
285 | if (codestream_peek () == 0x66) | |
286 | { | |
287 | codestream_get (); | |
288 | data16 = 1; | |
289 | } | |
290 | ||
291 | switch (codestream_get ()) | |
292 | { | |
293 | case 0xe9: | |
fc338970 | 294 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
295 | if (data16) |
296 | { | |
297 | codestream_read (buf, 2); | |
298 | delta = extract_signed_integer (buf, 2); | |
299 | ||
fc338970 MK |
300 | /* Include the size of the jmp instruction (including the |
301 | 0x66 prefix). */ | |
c5aa993b | 302 | pos += delta + 4; |
c906108c SS |
303 | } |
304 | else | |
305 | { | |
306 | codestream_read (buf, 4); | |
307 | delta = extract_signed_integer (buf, 4); | |
308 | ||
309 | pos += delta + 5; | |
310 | } | |
311 | break; | |
312 | case 0xeb: | |
fc338970 | 313 | /* Relative jump, disp8 (ignore data16). */ |
c906108c SS |
314 | codestream_read (buf, 1); |
315 | /* Sign-extend it. */ | |
316 | delta = extract_signed_integer (buf, 1); | |
317 | ||
318 | pos += delta + 2; | |
319 | break; | |
320 | } | |
321 | codestream_seek (pos); | |
322 | } | |
323 | ||
fc338970 MK |
324 | /* Find & return the amount a local space allocated, and advance the |
325 | codestream to the first register push (if any). | |
326 | ||
327 | If the entry sequence doesn't make sense, return -1, and leave | |
328 | codestream pointer at a random spot. */ | |
c906108c SS |
329 | |
330 | static long | |
fba45db2 | 331 | i386_get_frame_setup (CORE_ADDR pc) |
c906108c SS |
332 | { |
333 | unsigned char op; | |
334 | ||
335 | codestream_seek (pc); | |
336 | ||
337 | i386_follow_jump (); | |
338 | ||
339 | op = codestream_get (); | |
340 | ||
341 | if (op == 0x58) /* popl %eax */ | |
342 | { | |
fc338970 MK |
343 | /* This function must start with |
344 | ||
345 | popl %eax 0x58 | |
346 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
347 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
348 | ||
349 | (the System V compiler puts out the second `xchg' | |
350 | instruction, and the assembler doesn't try to optimize it, so | |
351 | the 'sib' form gets generated). This sequence is used to get | |
352 | the address of the return buffer for a function that returns | |
353 | a structure. */ | |
c906108c SS |
354 | int pos; |
355 | unsigned char buf[4]; | |
fc338970 MK |
356 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; |
357 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
358 | ||
c906108c SS |
359 | pos = codestream_tell (); |
360 | codestream_read (buf, 4); | |
361 | if (memcmp (buf, proto1, 3) == 0) | |
362 | pos += 3; | |
363 | else if (memcmp (buf, proto2, 4) == 0) | |
364 | pos += 4; | |
365 | ||
366 | codestream_seek (pos); | |
fc338970 | 367 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
368 | } |
369 | ||
370 | if (op == 0x68 || op == 0x6a) | |
371 | { | |
fc338970 MK |
372 | /* This function may start with |
373 | ||
374 | pushl constant | |
375 | call _probe | |
376 | addl $4, %esp | |
377 | ||
378 | followed by | |
379 | ||
380 | pushl %ebp | |
381 | ||
382 | etc. */ | |
c906108c SS |
383 | int pos; |
384 | unsigned char buf[8]; | |
385 | ||
fc338970 | 386 | /* Skip past the `pushl' instruction; it has either a one-byte |
c906108c SS |
387 | or a four-byte operand, depending on the opcode. */ |
388 | pos = codestream_tell (); | |
389 | if (op == 0x68) | |
390 | pos += 4; | |
391 | else | |
392 | pos += 1; | |
393 | codestream_seek (pos); | |
394 | ||
fc338970 MK |
395 | /* Read the following 8 bytes, which should be "call _probe" (6 |
396 | bytes) followed by "addl $4,%esp" (2 bytes). */ | |
c906108c SS |
397 | codestream_read (buf, sizeof (buf)); |
398 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) | |
399 | pos += sizeof (buf); | |
400 | codestream_seek (pos); | |
fc338970 | 401 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
402 | } |
403 | ||
404 | if (op == 0x55) /* pushl %ebp */ | |
c5aa993b | 405 | { |
fc338970 | 406 | /* Check for "movl %esp, %ebp" -- can be written in two ways. */ |
c906108c SS |
407 | switch (codestream_get ()) |
408 | { | |
409 | case 0x8b: | |
410 | if (codestream_get () != 0xec) | |
fc338970 | 411 | return -1; |
c906108c SS |
412 | break; |
413 | case 0x89: | |
414 | if (codestream_get () != 0xe5) | |
fc338970 | 415 | return -1; |
c906108c SS |
416 | break; |
417 | default: | |
fc338970 | 418 | return -1; |
c906108c | 419 | } |
fc338970 MK |
420 | /* Check for stack adjustment |
421 | ||
422 | subl $XXX, %esp | |
423 | ||
424 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
425 | reg, so we don't have to worry about a data16 prefix. */ | |
c906108c SS |
426 | op = codestream_peek (); |
427 | if (op == 0x83) | |
428 | { | |
fc338970 | 429 | /* `subl' with 8 bit immediate. */ |
c906108c SS |
430 | codestream_get (); |
431 | if (codestream_get () != 0xec) | |
fc338970 | 432 | /* Some instruction starting with 0x83 other than `subl'. */ |
c906108c SS |
433 | { |
434 | codestream_seek (codestream_tell () - 2); | |
435 | return 0; | |
436 | } | |
fc338970 MK |
437 | /* `subl' with signed byte immediate (though it wouldn't |
438 | make sense to be negative). */ | |
c5aa993b | 439 | return (codestream_get ()); |
c906108c SS |
440 | } |
441 | else if (op == 0x81) | |
442 | { | |
443 | char buf[4]; | |
fc338970 | 444 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
c5aa993b | 445 | codestream_get (); |
c906108c | 446 | if (codestream_get () != 0xec) |
fc338970 | 447 | /* Some instruction starting with 0x81 other than `subl'. */ |
c906108c SS |
448 | { |
449 | codestream_seek (codestream_tell () - 2); | |
450 | return 0; | |
451 | } | |
fc338970 | 452 | /* It is `subl' with a 32 bit immediate. */ |
c5aa993b | 453 | codestream_read ((unsigned char *) buf, 4); |
c906108c SS |
454 | return extract_signed_integer (buf, 4); |
455 | } | |
456 | else | |
457 | { | |
fc338970 | 458 | return 0; |
c906108c SS |
459 | } |
460 | } | |
461 | else if (op == 0xc8) | |
462 | { | |
463 | char buf[2]; | |
fc338970 | 464 | /* `enter' with 16 bit unsigned immediate. */ |
c5aa993b | 465 | codestream_read ((unsigned char *) buf, 2); |
fc338970 | 466 | codestream_get (); /* Flush final byte of enter instruction. */ |
c906108c SS |
467 | return extract_unsigned_integer (buf, 2); |
468 | } | |
469 | return (-1); | |
470 | } | |
471 | ||
6bff26de MK |
472 | /* Signal trampolines don't have a meaningful frame. The frame |
473 | pointer value we use is actually the frame pointer of the calling | |
474 | frame -- that is, the frame which was in progress when the signal | |
475 | trampoline was entered. GDB mostly treats this frame pointer value | |
476 | as a magic cookie. We detect the case of a signal trampoline by | |
5a203e44 AC |
477 | testing for get_frame_type() == SIGTRAMP_FRAME, which is set based |
478 | on PC_IN_SIGTRAMP. | |
6bff26de MK |
479 | |
480 | When a signal trampoline is invoked from a frameless function, we | |
481 | essentially have two frameless functions in a row. In this case, | |
482 | we use the same magic cookie for three frames in a row. We detect | |
5a203e44 AC |
483 | this case by seeing whether the next frame is a SIGTRAMP_FRAME, |
484 | and, if it does, checking whether the current frame is actually | |
485 | frameless. In this case, we need to get the PC by looking at the | |
486 | SP register value stored in the signal context. | |
6bff26de MK |
487 | |
488 | This should work in most cases except in horrible situations where | |
489 | a signal occurs just as we enter a function but before the frame | |
c0d1d883 MK |
490 | has been set up. Incidentally, that's just what happens when we |
491 | call a function from GDB with a signal pending (there's a test in | |
492 | the testsuite that makes this happen). Therefore we pretend that | |
493 | we have a frameless function if we're stopped at the start of a | |
494 | function. */ | |
6bff26de MK |
495 | |
496 | /* Return non-zero if we're dealing with a frameless signal, that is, | |
497 | a signal trampoline invoked from a frameless function. */ | |
498 | ||
5512c44a | 499 | int |
6bff26de MK |
500 | i386_frameless_signal_p (struct frame_info *frame) |
501 | { | |
5a203e44 | 502 | return (frame->next && get_frame_type (frame->next) == SIGTRAMP_FRAME |
c0d1d883 | 503 | && (frameless_look_for_prologue (frame) |
50abf9e5 | 504 | || get_frame_pc (frame) == get_pc_function_start (get_frame_pc (frame)))); |
6bff26de MK |
505 | } |
506 | ||
c833a37e MK |
507 | /* Return the chain-pointer for FRAME. In the case of the i386, the |
508 | frame's nominal address is the address of a 4-byte word containing | |
509 | the calling frame's address. */ | |
510 | ||
8201327c | 511 | static CORE_ADDR |
c833a37e MK |
512 | i386_frame_chain (struct frame_info *frame) |
513 | { | |
50abf9e5 | 514 | if (pc_in_dummy_frame (get_frame_pc (frame))) |
c0d1d883 MK |
515 | return frame->frame; |
516 | ||
5a203e44 | 517 | if (get_frame_type (frame) == SIGTRAMP_FRAME |
6bff26de | 518 | || i386_frameless_signal_p (frame)) |
c833a37e MK |
519 | return frame->frame; |
520 | ||
50abf9e5 | 521 | if (! inside_entry_file (get_frame_pc (frame))) |
c833a37e MK |
522 | return read_memory_unsigned_integer (frame->frame, 4); |
523 | ||
524 | return 0; | |
525 | } | |
526 | ||
539ffe0b MK |
527 | /* Determine whether the function invocation represented by FRAME does |
528 | not have a from on the stack associated with it. If it does not, | |
529 | return non-zero, otherwise return zero. */ | |
530 | ||
3a1e71e3 | 531 | static int |
539ffe0b MK |
532 | i386_frameless_function_invocation (struct frame_info *frame) |
533 | { | |
5a203e44 | 534 | if (get_frame_type (frame) == SIGTRAMP_FRAME) |
539ffe0b MK |
535 | return 0; |
536 | ||
537 | return frameless_look_for_prologue (frame); | |
538 | } | |
539 | ||
21d0e8a4 MK |
540 | /* Assuming FRAME is for a sigtramp routine, return the saved program |
541 | counter. */ | |
542 | ||
543 | static CORE_ADDR | |
544 | i386_sigtramp_saved_pc (struct frame_info *frame) | |
545 | { | |
546 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
547 | CORE_ADDR addr; | |
548 | ||
549 | addr = tdep->sigcontext_addr (frame); | |
550 | return read_memory_unsigned_integer (addr + tdep->sc_pc_offset, 4); | |
551 | } | |
552 | ||
6bff26de MK |
553 | /* Assuming FRAME is for a sigtramp routine, return the saved stack |
554 | pointer. */ | |
555 | ||
556 | static CORE_ADDR | |
557 | i386_sigtramp_saved_sp (struct frame_info *frame) | |
558 | { | |
559 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
560 | CORE_ADDR addr; | |
561 | ||
562 | addr = tdep->sigcontext_addr (frame); | |
563 | return read_memory_unsigned_integer (addr + tdep->sc_sp_offset, 4); | |
564 | } | |
565 | ||
0d17c81d MK |
566 | /* Return the saved program counter for FRAME. */ |
567 | ||
8201327c | 568 | static CORE_ADDR |
0d17c81d MK |
569 | i386_frame_saved_pc (struct frame_info *frame) |
570 | { | |
50abf9e5 | 571 | if (pc_in_dummy_frame (get_frame_pc (frame))) |
267bf4bb MK |
572 | { |
573 | ULONGEST pc; | |
574 | ||
575 | frame_unwind_unsigned_register (frame, PC_REGNUM, &pc); | |
576 | return pc; | |
577 | } | |
c0d1d883 | 578 | |
5a203e44 | 579 | if (get_frame_type (frame) == SIGTRAMP_FRAME) |
21d0e8a4 | 580 | return i386_sigtramp_saved_pc (frame); |
0d17c81d | 581 | |
6bff26de MK |
582 | if (i386_frameless_signal_p (frame)) |
583 | { | |
584 | CORE_ADDR sp = i386_sigtramp_saved_sp (frame->next); | |
585 | return read_memory_unsigned_integer (sp, 4); | |
586 | } | |
587 | ||
8201327c | 588 | return read_memory_unsigned_integer (frame->frame + 4, 4); |
22797942 AC |
589 | } |
590 | ||
ed84f6c1 MK |
591 | /* Immediately after a function call, return the saved pc. */ |
592 | ||
8201327c | 593 | static CORE_ADDR |
ed84f6c1 MK |
594 | i386_saved_pc_after_call (struct frame_info *frame) |
595 | { | |
5a203e44 | 596 | if (get_frame_type (frame) == SIGTRAMP_FRAME) |
6bff26de MK |
597 | return i386_sigtramp_saved_pc (frame); |
598 | ||
ed84f6c1 MK |
599 | return read_memory_unsigned_integer (read_register (SP_REGNUM), 4); |
600 | } | |
601 | ||
c906108c SS |
602 | /* Return number of args passed to a frame. |
603 | Can return -1, meaning no way to tell. */ | |
604 | ||
3a1e71e3 | 605 | static int |
fba45db2 | 606 | i386_frame_num_args (struct frame_info *fi) |
c906108c SS |
607 | { |
608 | #if 1 | |
609 | return -1; | |
610 | #else | |
611 | /* This loses because not only might the compiler not be popping the | |
fc338970 MK |
612 | args right after the function call, it might be popping args from |
613 | both this call and a previous one, and we would say there are | |
614 | more args than there really are. */ | |
c906108c | 615 | |
c5aa993b JM |
616 | int retpc; |
617 | unsigned char op; | |
c906108c SS |
618 | struct frame_info *pfi; |
619 | ||
fc338970 | 620 | /* On the i386, the instruction following the call could be: |
c906108c SS |
621 | popl %ecx - one arg |
622 | addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits | |
fc338970 | 623 | anything else - zero args. */ |
c906108c SS |
624 | |
625 | int frameless; | |
626 | ||
392a587b | 627 | frameless = FRAMELESS_FUNCTION_INVOCATION (fi); |
c906108c | 628 | if (frameless) |
fc338970 MK |
629 | /* In the absence of a frame pointer, GDB doesn't get correct |
630 | values for nameless arguments. Return -1, so it doesn't print | |
631 | any nameless arguments. */ | |
c906108c SS |
632 | return -1; |
633 | ||
c5aa993b | 634 | pfi = get_prev_frame (fi); |
c906108c SS |
635 | if (pfi == 0) |
636 | { | |
fc338970 MK |
637 | /* NOTE: This can happen if we are looking at the frame for |
638 | main, because FRAME_CHAIN_VALID won't let us go into start. | |
639 | If we have debugging symbols, that's not really a big deal; | |
640 | it just means it will only show as many arguments to main as | |
641 | are declared. */ | |
c906108c SS |
642 | return -1; |
643 | } | |
644 | else | |
645 | { | |
c5aa993b JM |
646 | retpc = pfi->pc; |
647 | op = read_memory_integer (retpc, 1); | |
fc338970 | 648 | if (op == 0x59) /* pop %ecx */ |
c5aa993b | 649 | return 1; |
c906108c SS |
650 | else if (op == 0x83) |
651 | { | |
c5aa993b JM |
652 | op = read_memory_integer (retpc + 1, 1); |
653 | if (op == 0xc4) | |
654 | /* addl $<signed imm 8 bits>, %esp */ | |
655 | return (read_memory_integer (retpc + 2, 1) & 0xff) / 4; | |
c906108c SS |
656 | else |
657 | return 0; | |
658 | } | |
fc338970 MK |
659 | else if (op == 0x81) /* `add' with 32 bit immediate. */ |
660 | { | |
c5aa993b JM |
661 | op = read_memory_integer (retpc + 1, 1); |
662 | if (op == 0xc4) | |
663 | /* addl $<imm 32>, %esp */ | |
664 | return read_memory_integer (retpc + 2, 4) / 4; | |
c906108c SS |
665 | else |
666 | return 0; | |
667 | } | |
668 | else | |
669 | { | |
670 | return 0; | |
671 | } | |
672 | } | |
673 | #endif | |
674 | } | |
675 | ||
fc338970 MK |
676 | /* Parse the first few instructions the function to see what registers |
677 | were stored. | |
678 | ||
679 | We handle these cases: | |
680 | ||
681 | The startup sequence can be at the start of the function, or the | |
682 | function can start with a branch to startup code at the end. | |
683 | ||
684 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
685 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
686 | once used in the System V compiler). | |
687 | ||
688 | Local space is allocated just below the saved %ebp by either the | |
689 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
690 | bit unsigned argument for space to allocate, and the 'addl' | |
691 | instruction could have either a signed byte, or 32 bit immediate. | |
692 | ||
693 | Next, the registers used by this function are pushed. With the | |
694 | System V compiler they will always be in the order: %edi, %esi, | |
695 | %ebx (and sometimes a harmless bug causes it to also save but not | |
696 | restore %eax); however, the code below is willing to see the pushes | |
697 | in any order, and will handle up to 8 of them. | |
698 | ||
699 | If the setup sequence is at the end of the function, then the next | |
700 | instruction will be a branch back to the start. */ | |
c906108c | 701 | |
3a1e71e3 | 702 | static void |
fba45db2 | 703 | i386_frame_init_saved_regs (struct frame_info *fip) |
c906108c SS |
704 | { |
705 | long locals = -1; | |
706 | unsigned char op; | |
fc338970 | 707 | CORE_ADDR addr; |
c906108c SS |
708 | CORE_ADDR pc; |
709 | int i; | |
c5aa993b | 710 | |
b2fb4676 | 711 | if (get_frame_saved_regs (fip)) |
1211c4e4 AC |
712 | return; |
713 | ||
714 | frame_saved_regs_zalloc (fip); | |
c5aa993b | 715 | |
50abf9e5 | 716 | pc = get_pc_function_start (get_frame_pc (fip)); |
c906108c SS |
717 | if (pc != 0) |
718 | locals = i386_get_frame_setup (pc); | |
c5aa993b JM |
719 | |
720 | if (locals >= 0) | |
c906108c | 721 | { |
fc338970 | 722 | addr = fip->frame - 4 - locals; |
c5aa993b | 723 | for (i = 0; i < 8; i++) |
c906108c SS |
724 | { |
725 | op = codestream_get (); | |
726 | if (op < 0x50 || op > 0x57) | |
727 | break; | |
728 | #ifdef I386_REGNO_TO_SYMMETRY | |
729 | /* Dynix uses different internal numbering. Ick. */ | |
b2fb4676 | 730 | get_frame_saved_regs (fip)[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr; |
c906108c | 731 | #else |
b2fb4676 | 732 | get_frame_saved_regs (fip)[op - 0x50] = addr; |
c906108c | 733 | #endif |
fc338970 | 734 | addr -= 4; |
c906108c SS |
735 | } |
736 | } | |
c5aa993b | 737 | |
b2fb4676 AC |
738 | get_frame_saved_regs (fip)[PC_REGNUM] = fip->frame + 4; |
739 | get_frame_saved_regs (fip)[FP_REGNUM] = fip->frame; | |
c906108c SS |
740 | } |
741 | ||
fc338970 | 742 | /* Return PC of first real instruction. */ |
c906108c | 743 | |
3a1e71e3 | 744 | static CORE_ADDR |
93924b6b | 745 | i386_skip_prologue (CORE_ADDR pc) |
c906108c SS |
746 | { |
747 | unsigned char op; | |
748 | int i; | |
c5aa993b | 749 | static unsigned char pic_pat[6] = |
fc338970 MK |
750 | { 0xe8, 0, 0, 0, 0, /* call 0x0 */ |
751 | 0x5b, /* popl %ebx */ | |
c5aa993b | 752 | }; |
c906108c | 753 | CORE_ADDR pos; |
c5aa993b | 754 | |
c906108c SS |
755 | if (i386_get_frame_setup (pc) < 0) |
756 | return (pc); | |
c5aa993b | 757 | |
fc338970 MK |
758 | /* Found valid frame setup -- codestream now points to start of push |
759 | instructions for saving registers. */ | |
c5aa993b | 760 | |
fc338970 | 761 | /* Skip over register saves. */ |
c906108c SS |
762 | for (i = 0; i < 8; i++) |
763 | { | |
764 | op = codestream_peek (); | |
fc338970 | 765 | /* Break if not `pushl' instrunction. */ |
c5aa993b | 766 | if (op < 0x50 || op > 0x57) |
c906108c SS |
767 | break; |
768 | codestream_get (); | |
769 | } | |
770 | ||
fc338970 MK |
771 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
772 | to get the address of the global offset table (GOT) into register | |
773 | %ebx | |
774 | ||
775 | call 0x0 | |
776 | popl %ebx | |
777 | movl %ebx,x(%ebp) (optional) | |
778 | addl y,%ebx | |
779 | ||
c906108c SS |
780 | This code is with the rest of the prologue (at the end of the |
781 | function), so we have to skip it to get to the first real | |
782 | instruction at the start of the function. */ | |
c5aa993b | 783 | |
c906108c SS |
784 | pos = codestream_tell (); |
785 | for (i = 0; i < 6; i++) | |
786 | { | |
787 | op = codestream_get (); | |
c5aa993b | 788 | if (pic_pat[i] != op) |
c906108c SS |
789 | break; |
790 | } | |
791 | if (i == 6) | |
792 | { | |
793 | unsigned char buf[4]; | |
794 | long delta = 6; | |
795 | ||
796 | op = codestream_get (); | |
c5aa993b | 797 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c SS |
798 | { |
799 | op = codestream_get (); | |
fc338970 | 800 | if (op == 0x5d) /* One byte offset from %ebp. */ |
c906108c SS |
801 | { |
802 | delta += 3; | |
803 | codestream_read (buf, 1); | |
804 | } | |
fc338970 | 805 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
c906108c SS |
806 | { |
807 | delta += 6; | |
808 | codestream_read (buf, 4); | |
809 | } | |
fc338970 | 810 | else /* Unexpected instruction. */ |
c5aa993b JM |
811 | delta = -1; |
812 | op = codestream_get (); | |
c906108c | 813 | } |
c5aa993b JM |
814 | /* addl y,%ebx */ |
815 | if (delta > 0 && op == 0x81 && codestream_get () == 0xc3) | |
c906108c | 816 | { |
c5aa993b | 817 | pos += delta + 6; |
c906108c SS |
818 | } |
819 | } | |
820 | codestream_seek (pos); | |
c5aa993b | 821 | |
c906108c | 822 | i386_follow_jump (); |
c5aa993b | 823 | |
c906108c SS |
824 | return (codestream_tell ()); |
825 | } | |
826 | ||
93924b6b MK |
827 | /* Use the program counter to determine the contents and size of a |
828 | breakpoint instruction. Return a pointer to a string of bytes that | |
829 | encode a breakpoint instruction, store the length of the string in | |
830 | *LEN and optionally adjust *PC to point to the correct memory | |
831 | location for inserting the breakpoint. | |
832 | ||
833 | On the i386 we have a single breakpoint that fits in a single byte | |
834 | and can be inserted anywhere. */ | |
835 | ||
836 | static const unsigned char * | |
837 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
838 | { | |
839 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ | |
840 | ||
841 | *len = sizeof (break_insn); | |
842 | return break_insn; | |
843 | } | |
844 | ||
c0d1d883 MK |
845 | /* Push the return address (pointing to the call dummy) onto the stack |
846 | and return the new value for the stack pointer. */ | |
c5aa993b | 847 | |
c0d1d883 MK |
848 | static CORE_ADDR |
849 | i386_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
a7769679 | 850 | { |
c0d1d883 | 851 | char buf[4]; |
a7769679 | 852 | |
c0d1d883 MK |
853 | store_unsigned_integer (buf, 4, CALL_DUMMY_ADDRESS ()); |
854 | write_memory (sp - 4, buf, 4); | |
855 | return sp - 4; | |
a7769679 MK |
856 | } |
857 | ||
3a1e71e3 | 858 | static void |
c0d1d883 | 859 | i386_do_pop_frame (struct frame_info *frame) |
c906108c | 860 | { |
c906108c SS |
861 | CORE_ADDR fp; |
862 | int regnum; | |
00f8375e | 863 | char regbuf[I386_MAX_REGISTER_SIZE]; |
c5aa993b | 864 | |
c193f6ac | 865 | fp = get_frame_base (frame); |
1211c4e4 AC |
866 | i386_frame_init_saved_regs (frame); |
867 | ||
c5aa993b | 868 | for (regnum = 0; regnum < NUM_REGS; regnum++) |
c906108c | 869 | { |
fc338970 | 870 | CORE_ADDR addr; |
b2fb4676 | 871 | addr = get_frame_saved_regs (frame)[regnum]; |
fc338970 | 872 | if (addr) |
c906108c | 873 | { |
fc338970 | 874 | read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum)); |
4caf0990 | 875 | deprecated_write_register_gen (regnum, regbuf); |
c906108c SS |
876 | } |
877 | } | |
878 | write_register (FP_REGNUM, read_memory_integer (fp, 4)); | |
879 | write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); | |
880 | write_register (SP_REGNUM, fp + 8); | |
881 | flush_cached_frames (); | |
882 | } | |
c0d1d883 MK |
883 | |
884 | static void | |
885 | i386_pop_frame (void) | |
886 | { | |
887 | generic_pop_current_frame (i386_do_pop_frame); | |
888 | } | |
fc338970 | 889 | \f |
c906108c | 890 | |
fc338970 MK |
891 | /* Figure out where the longjmp will land. Slurp the args out of the |
892 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c MK |
893 | structure from which we extract the address that we will land at. |
894 | This address is copied into PC. This routine returns true on | |
fc338970 | 895 | success. */ |
c906108c | 896 | |
8201327c MK |
897 | static int |
898 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 899 | { |
8201327c | 900 | char buf[4]; |
c906108c | 901 | CORE_ADDR sp, jb_addr; |
8201327c | 902 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
c906108c | 903 | |
8201327c MK |
904 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
905 | longjmp will land. */ | |
906 | if (jb_pc_offset == -1) | |
c906108c SS |
907 | return 0; |
908 | ||
8201327c MK |
909 | sp = read_register (SP_REGNUM); |
910 | if (target_read_memory (sp + 4, buf, 4)) | |
c906108c SS |
911 | return 0; |
912 | ||
8201327c MK |
913 | jb_addr = extract_address (buf, 4); |
914 | if (target_read_memory (jb_addr + jb_pc_offset, buf, 4)) | |
915 | return 0; | |
c906108c | 916 | |
8201327c | 917 | *pc = extract_address (buf, 4); |
c906108c SS |
918 | return 1; |
919 | } | |
fc338970 | 920 | \f |
c906108c | 921 | |
3a1e71e3 | 922 | static CORE_ADDR |
ea7c478f | 923 | i386_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
22f8ba57 MK |
924 | int struct_return, CORE_ADDR struct_addr) |
925 | { | |
926 | sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr); | |
927 | ||
928 | if (struct_return) | |
929 | { | |
930 | char buf[4]; | |
931 | ||
932 | sp -= 4; | |
933 | store_address (buf, 4, struct_addr); | |
934 | write_memory (sp, buf, 4); | |
935 | } | |
936 | ||
937 | return sp; | |
938 | } | |
939 | ||
3a1e71e3 | 940 | static void |
22f8ba57 MK |
941 | i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) |
942 | { | |
943 | /* Do nothing. Everything was already done by i386_push_arguments. */ | |
944 | } | |
945 | ||
1a309862 MK |
946 | /* These registers are used for returning integers (and on some |
947 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 948 | size and alignment match an integer type). */ |
1a309862 MK |
949 | #define LOW_RETURN_REGNUM 0 /* %eax */ |
950 | #define HIGH_RETURN_REGNUM 2 /* %edx */ | |
951 | ||
952 | /* Extract from an array REGBUF containing the (raw) register state, a | |
953 | function return value of TYPE, and copy that, in virtual format, | |
954 | into VALBUF. */ | |
955 | ||
3a1e71e3 | 956 | static void |
00f8375e | 957 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 958 | void *dst) |
c906108c | 959 | { |
ebba8386 | 960 | bfd_byte *valbuf = dst; |
1a309862 | 961 | int len = TYPE_LENGTH (type); |
00f8375e | 962 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 963 | |
1e8d0a7b MK |
964 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
965 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 966 | { |
00f8375e | 967 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
968 | return; |
969 | } | |
1e8d0a7b MK |
970 | |
971 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 972 | { |
356a6b3e | 973 | if (FP0_REGNUM == 0) |
1a309862 MK |
974 | { |
975 | warning ("Cannot find floating-point return value."); | |
976 | memset (valbuf, 0, len); | |
ef9dff19 | 977 | return; |
1a309862 MK |
978 | } |
979 | ||
c6ba6f0d MK |
980 | /* Floating-point return values can be found in %st(0). Convert |
981 | its contents to the desired type. This is probably not | |
982 | exactly how it would happen on the target itself, but it is | |
983 | the best we can do. */ | |
0818c12a | 984 | regcache_raw_read (regcache, FP0_REGNUM, buf); |
00f8375e | 985 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
986 | } |
987 | else | |
c5aa993b | 988 | { |
d4f3574e SS |
989 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
990 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
991 | ||
992 | if (len <= low_size) | |
00f8375e | 993 | { |
0818c12a | 994 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
995 | memcpy (valbuf, buf, len); |
996 | } | |
d4f3574e SS |
997 | else if (len <= (low_size + high_size)) |
998 | { | |
0818c12a | 999 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1000 | memcpy (valbuf, buf, low_size); |
0818c12a | 1001 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1002 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1003 | } |
1004 | else | |
8e65ff28 AC |
1005 | internal_error (__FILE__, __LINE__, |
1006 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1007 | } |
1008 | } | |
1009 | ||
ef9dff19 MK |
1010 | /* Write into the appropriate registers a function return value stored |
1011 | in VALBUF of type TYPE, given in virtual format. */ | |
1012 | ||
3a1e71e3 | 1013 | static void |
3d7f4f49 MK |
1014 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1015 | const void *valbuf) | |
ef9dff19 MK |
1016 | { |
1017 | int len = TYPE_LENGTH (type); | |
1018 | ||
1e8d0a7b MK |
1019 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1020 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1021 | { |
3d7f4f49 | 1022 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1023 | return; |
1024 | } | |
1e8d0a7b MK |
1025 | |
1026 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1027 | { |
3d7f4f49 | 1028 | ULONGEST fstat; |
c6ba6f0d | 1029 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 1030 | |
356a6b3e | 1031 | if (FP0_REGNUM == 0) |
ef9dff19 MK |
1032 | { |
1033 | warning ("Cannot set floating-point return value."); | |
1034 | return; | |
1035 | } | |
1036 | ||
635b0cc1 MK |
1037 | /* Returning floating-point values is a bit tricky. Apart from |
1038 | storing the return value in %st(0), we have to simulate the | |
1039 | state of the FPU at function return point. */ | |
1040 | ||
c6ba6f0d MK |
1041 | /* Convert the value found in VALBUF to the extended |
1042 | floating-point format used by the FPU. This is probably | |
1043 | not exactly how it would happen on the target itself, but | |
1044 | it is the best we can do. */ | |
1045 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
3d7f4f49 | 1046 | regcache_raw_write (regcache, FP0_REGNUM, buf); |
ccb945b8 | 1047 | |
635b0cc1 MK |
1048 | /* Set the top of the floating-point register stack to 7. The |
1049 | actual value doesn't really matter, but 7 is what a normal | |
1050 | function return would end up with if the program started out | |
1051 | with a freshly initialized FPU. */ | |
3d7f4f49 | 1052 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); |
ccb945b8 | 1053 | fstat |= (7 << 11); |
3d7f4f49 | 1054 | regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); |
ccb945b8 | 1055 | |
635b0cc1 MK |
1056 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1057 | the floating-point register stack to 7, the appropriate value | |
1058 | for the tag word is 0x3fff. */ | |
3d7f4f49 | 1059 | regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1060 | } |
1061 | else | |
1062 | { | |
1063 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
1064 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1065 | ||
1066 | if (len <= low_size) | |
3d7f4f49 | 1067 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1068 | else if (len <= (low_size + high_size)) |
1069 | { | |
3d7f4f49 MK |
1070 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1071 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1072 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1073 | } |
1074 | else | |
8e65ff28 AC |
1075 | internal_error (__FILE__, __LINE__, |
1076 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1077 | } |
1078 | } | |
f7af9647 | 1079 | |
751f1375 MK |
1080 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1081 | address in which a function should return its structure value, as a | |
1082 | CORE_ADDR. */ | |
f7af9647 | 1083 | |
3a1e71e3 | 1084 | static CORE_ADDR |
00f8375e | 1085 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1086 | { |
751f1375 MK |
1087 | ULONGEST addr; |
1088 | ||
1089 | regcache_raw_read_unsigned (regcache, LOW_RETURN_REGNUM, &addr); | |
1090 | return addr; | |
f7af9647 | 1091 | } |
fc338970 | 1092 | \f |
ef9dff19 | 1093 | |
8201327c MK |
1094 | /* This is the variable that is set with "set struct-convention", and |
1095 | its legitimate values. */ | |
1096 | static const char default_struct_convention[] = "default"; | |
1097 | static const char pcc_struct_convention[] = "pcc"; | |
1098 | static const char reg_struct_convention[] = "reg"; | |
1099 | static const char *valid_conventions[] = | |
1100 | { | |
1101 | default_struct_convention, | |
1102 | pcc_struct_convention, | |
1103 | reg_struct_convention, | |
1104 | NULL | |
1105 | }; | |
1106 | static const char *struct_convention = default_struct_convention; | |
1107 | ||
1108 | static int | |
1109 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1110 | { | |
1111 | enum struct_return struct_return; | |
1112 | ||
1113 | if (struct_convention == default_struct_convention) | |
1114 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1115 | else if (struct_convention == pcc_struct_convention) | |
1116 | struct_return = pcc_struct_return; | |
1117 | else | |
1118 | struct_return = reg_struct_return; | |
1119 | ||
1120 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1121 | type); | |
1122 | } | |
1123 | \f | |
1124 | ||
d7a0d72c MK |
1125 | /* Return the GDB type object for the "standard" data type of data in |
1126 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1127 | potentially they could be used for things other than address. */ | |
1128 | ||
3a1e71e3 | 1129 | static struct type * |
d7a0d72c MK |
1130 | i386_register_virtual_type (int regnum) |
1131 | { | |
1132 | if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM) | |
1133 | return lookup_pointer_type (builtin_type_void); | |
1134 | ||
23a34459 | 1135 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1136 | return builtin_type_i387_ext; |
d7a0d72c | 1137 | |
23a34459 | 1138 | if (i386_sse_regnum_p (regnum)) |
3139facc | 1139 | return builtin_type_vec128i; |
d7a0d72c | 1140 | |
23a34459 | 1141 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1142 | return builtin_type_vec64i; |
1143 | ||
d7a0d72c MK |
1144 | return builtin_type_int; |
1145 | } | |
1146 | ||
28fc6740 AC |
1147 | /* Map a cooked register onto a raw register or memory. For the i386, |
1148 | the MMX registers need to be mapped onto floating point registers. */ | |
1149 | ||
1150 | static int | |
1151 | mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) | |
1152 | { | |
1153 | int mmxi; | |
1154 | ULONGEST fstat; | |
1155 | int tos; | |
1156 | int fpi; | |
1157 | mmxi = regnum - MM0_REGNUM; | |
1158 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); | |
1159 | tos = (fstat >> 11) & 0x7; | |
1160 | fpi = (mmxi + tos) % 8; | |
1161 | return (FP0_REGNUM + fpi); | |
1162 | } | |
1163 | ||
1164 | static void | |
1165 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1166 | int regnum, void *buf) | |
1167 | { | |
23a34459 | 1168 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1169 | { |
1170 | char *mmx_buf = alloca (MAX_REGISTER_RAW_SIZE); | |
1171 | int fpnum = mmx_regnum_to_fp_regnum (regcache, regnum); | |
1172 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1173 | /* Extract (always little endian). */ | |
1174 | memcpy (buf, mmx_buf, REGISTER_RAW_SIZE (regnum)); | |
1175 | } | |
1176 | else | |
1177 | regcache_raw_read (regcache, regnum, buf); | |
1178 | } | |
1179 | ||
1180 | static void | |
1181 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1182 | int regnum, const void *buf) | |
1183 | { | |
23a34459 | 1184 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1185 | { |
1186 | char *mmx_buf = alloca (MAX_REGISTER_RAW_SIZE); | |
1187 | int fpnum = mmx_regnum_to_fp_regnum (regcache, regnum); | |
1188 | /* Read ... */ | |
1189 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1190 | /* ... Modify ... (always little endian). */ | |
1191 | memcpy (mmx_buf, buf, REGISTER_RAW_SIZE (regnum)); | |
1192 | /* ... Write. */ | |
1193 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1194 | } | |
1195 | else | |
1196 | regcache_raw_write (regcache, regnum, buf); | |
1197 | } | |
1198 | ||
d7a0d72c MK |
1199 | /* Return true iff register REGNUM's virtual format is different from |
1200 | its raw format. Note that this definition assumes that the host | |
1201 | supports IEEE 32-bit floats, since it doesn't say that SSE | |
1202 | registers need conversion. Even if we can't find a counterexample, | |
1203 | this is still sloppy. */ | |
1204 | ||
3a1e71e3 | 1205 | static int |
d7a0d72c MK |
1206 | i386_register_convertible (int regnum) |
1207 | { | |
23a34459 | 1208 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1209 | } |
1210 | ||
ac27f131 | 1211 | /* Convert data from raw format for register REGNUM in buffer FROM to |
3d261580 | 1212 | virtual format with type TYPE in buffer TO. */ |
ac27f131 | 1213 | |
3a1e71e3 | 1214 | static void |
ac27f131 MK |
1215 | i386_register_convert_to_virtual (int regnum, struct type *type, |
1216 | char *from, char *to) | |
1217 | { | |
23a34459 | 1218 | gdb_assert (i386_fp_regnum_p (regnum)); |
3d261580 MK |
1219 | |
1220 | /* We only support floating-point values. */ | |
8d7f6b4a MK |
1221 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
1222 | { | |
1223 | warning ("Cannot convert floating-point register value " | |
1224 | "to non-floating-point type."); | |
1225 | memset (to, 0, TYPE_LENGTH (type)); | |
1226 | return; | |
1227 | } | |
3d261580 | 1228 | |
c6ba6f0d MK |
1229 | /* Convert to TYPE. This should be a no-op if TYPE is equivalent to |
1230 | the extended floating-point format used by the FPU. */ | |
1231 | convert_typed_floating (from, builtin_type_i387_ext, to, type); | |
ac27f131 MK |
1232 | } |
1233 | ||
1234 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
3d261580 | 1235 | raw format for register REGNUM in buffer TO. */ |
ac27f131 | 1236 | |
3a1e71e3 | 1237 | static void |
ac27f131 MK |
1238 | i386_register_convert_to_raw (struct type *type, int regnum, |
1239 | char *from, char *to) | |
1240 | { | |
23a34459 | 1241 | gdb_assert (i386_fp_regnum_p (regnum)); |
c6ba6f0d MK |
1242 | |
1243 | /* We only support floating-point values. */ | |
1244 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
1245 | { | |
1246 | warning ("Cannot convert non-floating-point type " | |
1247 | "to floating-point register value."); | |
1248 | memset (to, 0, TYPE_LENGTH (type)); | |
1249 | return; | |
1250 | } | |
3d261580 | 1251 | |
c6ba6f0d MK |
1252 | /* Convert from TYPE. This should be a no-op if TYPE is equivalent |
1253 | to the extended floating-point format used by the FPU. */ | |
1254 | convert_typed_floating (from, type, to, builtin_type_i387_ext); | |
ac27f131 | 1255 | } |
ac27f131 | 1256 | \f |
fc338970 | 1257 | |
c906108c | 1258 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1259 | /* SunPRO encodes the static variables. This is not related to C++ |
1260 | mangling, it is done for C too. */ | |
c906108c SS |
1261 | |
1262 | char * | |
fba45db2 | 1263 | sunpro_static_transform_name (char *name) |
c906108c SS |
1264 | { |
1265 | char *p; | |
1266 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1267 | { | |
fc338970 MK |
1268 | /* For file-local statics there will be a period, a bunch of |
1269 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1270 | N_OPT), a period and the name. For function-local statics |
1271 | there will be a bunch of junk (which seems to change the | |
1272 | second character from 'A' to 'B'), a period, the name of the | |
1273 | function, and the name. So just skip everything before the | |
1274 | last period. */ | |
c906108c SS |
1275 | p = strrchr (name, '.'); |
1276 | if (p != NULL) | |
1277 | name = p + 1; | |
1278 | } | |
1279 | return name; | |
1280 | } | |
1281 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1282 | \f |
c906108c | 1283 | |
fc338970 | 1284 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1285 | |
1286 | CORE_ADDR | |
1cce71eb | 1287 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1288 | { |
fc338970 | 1289 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1290 | { |
c5aa993b | 1291 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1292 | struct minimal_symbol *indsym = |
fc338970 | 1293 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
c5aa993b | 1294 | char *symname = indsym ? SYMBOL_NAME (indsym) : 0; |
c906108c | 1295 | |
c5aa993b | 1296 | if (symname) |
c906108c | 1297 | { |
c5aa993b JM |
1298 | if (strncmp (symname, "__imp_", 6) == 0 |
1299 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1300 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1301 | } | |
1302 | } | |
fc338970 | 1303 | return 0; /* Not a trampoline. */ |
c906108c | 1304 | } |
fc338970 MK |
1305 | \f |
1306 | ||
8201327c MK |
1307 | /* Return non-zero if PC and NAME show that we are in a signal |
1308 | trampoline. */ | |
1309 | ||
1310 | static int | |
1311 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1312 | { | |
1313 | return (name && strcmp ("_sigtramp", name) == 0); | |
1314 | } | |
1315 | \f | |
1316 | ||
fc338970 MK |
1317 | /* We have two flavours of disassembly. The machinery on this page |
1318 | deals with switching between those. */ | |
c906108c SS |
1319 | |
1320 | static int | |
5e3397bb | 1321 | i386_print_insn (bfd_vma pc, disassemble_info *info) |
c906108c | 1322 | { |
5e3397bb MK |
1323 | gdb_assert (disassembly_flavor == att_flavor |
1324 | || disassembly_flavor == intel_flavor); | |
1325 | ||
1326 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1327 | constified, cast to prevent a compiler warning. */ | |
1328 | info->disassembler_options = (char *) disassembly_flavor; | |
1329 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1330 | ||
1331 | return print_insn_i386 (pc, info); | |
7a292a7a | 1332 | } |
fc338970 | 1333 | \f |
3ce1502b | 1334 | |
8201327c MK |
1335 | /* There are a few i386 architecture variants that differ only |
1336 | slightly from the generic i386 target. For now, we don't give them | |
1337 | their own source file, but include them here. As a consequence, | |
1338 | they'll always be included. */ | |
3ce1502b | 1339 | |
8201327c | 1340 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1341 | |
8201327c MK |
1342 | static int |
1343 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1344 | { |
8201327c MK |
1345 | return (name && (strcmp ("_sigreturn", name) == 0 |
1346 | || strcmp ("_sigacthandler", name) == 0 | |
1347 | || strcmp ("sigvechandler", name) == 0)); | |
1348 | } | |
d2a7c97a | 1349 | |
21d0e8a4 MK |
1350 | /* Get address of the pushed ucontext (sigcontext) on the stack for |
1351 | all three variants of SVR4 sigtramps. */ | |
3ce1502b | 1352 | |
3a1e71e3 | 1353 | static CORE_ADDR |
21d0e8a4 | 1354 | i386_svr4_sigcontext_addr (struct frame_info *frame) |
8201327c | 1355 | { |
21d0e8a4 | 1356 | int sigcontext_offset = -1; |
8201327c MK |
1357 | char *name = NULL; |
1358 | ||
50abf9e5 | 1359 | find_pc_partial_function (get_frame_pc (frame), &name, NULL, NULL); |
8201327c | 1360 | if (name) |
d2a7c97a | 1361 | { |
8201327c | 1362 | if (strcmp (name, "_sigreturn") == 0) |
21d0e8a4 | 1363 | sigcontext_offset = 132; |
8201327c | 1364 | else if (strcmp (name, "_sigacthandler") == 0) |
21d0e8a4 | 1365 | sigcontext_offset = 80; |
8201327c | 1366 | else if (strcmp (name, "sigvechandler") == 0) |
21d0e8a4 | 1367 | sigcontext_offset = 120; |
8201327c | 1368 | } |
3ce1502b | 1369 | |
21d0e8a4 MK |
1370 | gdb_assert (sigcontext_offset != -1); |
1371 | ||
8201327c | 1372 | if (frame->next) |
21d0e8a4 MK |
1373 | return frame->next->frame + sigcontext_offset; |
1374 | return read_register (SP_REGNUM) + sigcontext_offset; | |
8201327c MK |
1375 | } |
1376 | \f | |
3ce1502b | 1377 | |
8201327c | 1378 | /* DJGPP. */ |
d2a7c97a | 1379 | |
8201327c MK |
1380 | static int |
1381 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1382 | { | |
1383 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1384 | return 0; | |
1385 | } | |
1386 | \f | |
d2a7c97a | 1387 | |
8201327c | 1388 | /* Generic ELF. */ |
d2a7c97a | 1389 | |
8201327c MK |
1390 | void |
1391 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1392 | { | |
1393 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1394 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1395 | } | |
3ce1502b | 1396 | |
8201327c | 1397 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1398 | |
8201327c MK |
1399 | void |
1400 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1401 | { | |
1402 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1403 | |
8201327c MK |
1404 | /* System V Release 4 uses ELF. */ |
1405 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1406 | |
dfe01d39 MK |
1407 | /* System V Release 4 has shared libraries. */ |
1408 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1409 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1410 | ||
8201327c | 1411 | /* FIXME: kettenis/20020511: Why do we override this function here? */ |
b4671f85 | 1412 | set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid); |
3ce1502b | 1413 | |
8201327c | 1414 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 MK |
1415 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
1416 | tdep->sc_pc_offset = 14 * 4; | |
1417 | tdep->sc_sp_offset = 7 * 4; | |
3ce1502b | 1418 | |
8201327c | 1419 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1420 | } |
1421 | ||
8201327c | 1422 | /* DJGPP. */ |
3ce1502b | 1423 | |
3a1e71e3 | 1424 | static void |
8201327c | 1425 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1426 | { |
8201327c | 1427 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1428 | |
8201327c | 1429 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1430 | |
8201327c | 1431 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1432 | } |
1433 | ||
8201327c | 1434 | /* NetWare. */ |
3ce1502b | 1435 | |
3a1e71e3 | 1436 | static void |
8201327c | 1437 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1438 | { |
8201327c | 1439 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1440 | |
8201327c | 1441 | /* FIXME: kettenis/20020511: Why do we override this function here? */ |
b4671f85 | 1442 | set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid); |
8201327c MK |
1443 | |
1444 | tdep->jb_pc_offset = 24; | |
d2a7c97a | 1445 | } |
8201327c | 1446 | \f |
2acceee2 | 1447 | |
38c968cf AC |
1448 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1449 | and "sse". */ | |
1450 | ||
1451 | static struct reggroup *i386_sse_reggroup; | |
1452 | static struct reggroup *i386_mmx_reggroup; | |
1453 | ||
1454 | static void | |
1455 | i386_init_reggroups (void) | |
1456 | { | |
1457 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1458 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1459 | } | |
1460 | ||
1461 | static void | |
1462 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1463 | { | |
1464 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1465 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1466 | reggroup_add (gdbarch, general_reggroup); | |
1467 | reggroup_add (gdbarch, float_reggroup); | |
1468 | reggroup_add (gdbarch, all_reggroup); | |
1469 | reggroup_add (gdbarch, save_reggroup); | |
1470 | reggroup_add (gdbarch, restore_reggroup); | |
1471 | reggroup_add (gdbarch, vector_reggroup); | |
1472 | reggroup_add (gdbarch, system_reggroup); | |
1473 | } | |
1474 | ||
1475 | int | |
1476 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1477 | struct reggroup *group) | |
1478 | { | |
1479 | int sse_regnum_p = (i386_sse_regnum_p (regnum) | |
1480 | || i386_mxcsr_regnum_p (regnum)); | |
1481 | int fp_regnum_p = (i386_fp_regnum_p (regnum) | |
1482 | || i386_fpc_regnum_p (regnum)); | |
1483 | int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); | |
1484 | if (group == i386_mmx_reggroup) | |
1485 | return mmx_regnum_p; | |
1486 | if (group == i386_sse_reggroup) | |
1487 | return sse_regnum_p; | |
1488 | if (group == vector_reggroup) | |
1489 | return (mmx_regnum_p || sse_regnum_p); | |
1490 | if (group == float_reggroup) | |
1491 | return fp_regnum_p; | |
1492 | if (group == general_reggroup) | |
1493 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
1494 | return default_register_reggroup_p (gdbarch, regnum, group); | |
1495 | } | |
1496 | ||
1497 | \f | |
3a1e71e3 | 1498 | static struct gdbarch * |
a62cc96e AC |
1499 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1500 | { | |
cd3c07fc | 1501 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1502 | struct gdbarch *gdbarch; |
1503 | ||
4be87837 DJ |
1504 | /* If there is already a candidate, use it. */ |
1505 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1506 | if (arches != NULL) | |
1507 | return arches->gdbarch; | |
a62cc96e AC |
1508 | |
1509 | /* Allocate space for the new architecture. */ | |
1510 | tdep = XMALLOC (struct gdbarch_tdep); | |
1511 | gdbarch = gdbarch_alloc (&info, tdep); | |
1512 | ||
a5afb99f AC |
1513 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1514 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
1515 | set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default); | |
1516 | ||
8201327c | 1517 | /* The i386 default settings don't include the SSE registers. |
356a6b3e MK |
1518 | FIXME: kettenis/20020614: They do include the FPU registers for |
1519 | now, which probably is not quite right. */ | |
8201327c | 1520 | tdep->num_xmm_regs = 0; |
d2a7c97a | 1521 | |
8201327c MK |
1522 | tdep->jb_pc_offset = -1; |
1523 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1524 | tdep->sigtramp_start = 0; |
1525 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1526 | tdep->sigcontext_addr = NULL; |
8201327c | 1527 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1528 | tdep->sc_sp_offset = -1; |
8201327c | 1529 | |
896fb97d MK |
1530 | /* The format used for `long double' on almost all i386 targets is |
1531 | the i387 extended floating-point format. In fact, of all targets | |
1532 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1533 | on having a `long double' that's not `long' at all. */ | |
1534 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1535 | |
66da5fd8 | 1536 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1537 | bits, a `long double' actually takes up 96, probably to enforce |
1538 | alignment. */ | |
1539 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1540 | ||
356a6b3e MK |
1541 | /* NOTE: tm-i386aix.h, tm-i386bsd.h, tm-i386os9k.h, tm-ptx.h, |
1542 | tm-symmetry.h currently override this. Sigh. */ | |
1543 | set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS); | |
21d0e8a4 | 1544 | |
66da5fd8 MK |
1545 | set_gdbarch_sp_regnum (gdbarch, 4); /* %esp */ |
1546 | set_gdbarch_fp_regnum (gdbarch, 5); /* %ebp */ | |
1547 | set_gdbarch_pc_regnum (gdbarch, 8); /* %eip */ | |
1548 | set_gdbarch_ps_regnum (gdbarch, 9); /* %eflags */ | |
1549 | set_gdbarch_fp0_regnum (gdbarch, 16); /* %st(0) */ | |
356a6b3e MK |
1550 | |
1551 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1552 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1553 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1554 | ||
1555 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1556 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1557 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1558 | ||
1559 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1560 | be in use on any of the supported i386 targets. */ | |
1561 | ||
1562 | set_gdbarch_register_name (gdbarch, i386_register_name); | |
1563 | set_gdbarch_register_size (gdbarch, 4); | |
1564 | set_gdbarch_register_bytes (gdbarch, I386_SIZEOF_GREGS + I386_SIZEOF_FREGS); | |
00f8375e MK |
1565 | set_gdbarch_max_register_raw_size (gdbarch, I386_MAX_REGISTER_SIZE); |
1566 | set_gdbarch_max_register_virtual_size (gdbarch, I386_MAX_REGISTER_SIZE); | |
b6197528 | 1567 | set_gdbarch_register_virtual_type (gdbarch, i386_register_virtual_type); |
356a6b3e | 1568 | |
61113f8b MK |
1569 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1570 | ||
8201327c | 1571 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1572 | |
a62cc96e | 1573 | /* Call dummy code. */ |
c0d1d883 | 1574 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); |
8758dec1 | 1575 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); |
c0d1d883 | 1576 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); |
a62cc96e | 1577 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); |
c0d1d883 | 1578 | set_gdbarch_call_dummy_length (gdbarch, 0); |
a62cc96e | 1579 | set_gdbarch_call_dummy_p (gdbarch, 1); |
c0d1d883 MK |
1580 | set_gdbarch_call_dummy_words (gdbarch, NULL); |
1581 | set_gdbarch_sizeof_call_dummy_words (gdbarch, 0); | |
a62cc96e | 1582 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); |
c0d1d883 | 1583 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); |
a62cc96e | 1584 | |
b6197528 MK |
1585 | set_gdbarch_register_convertible (gdbarch, i386_register_convertible); |
1586 | set_gdbarch_register_convert_to_virtual (gdbarch, | |
1587 | i386_register_convert_to_virtual); | |
1588 | set_gdbarch_register_convert_to_raw (gdbarch, i386_register_convert_to_raw); | |
1589 | ||
8758dec1 MK |
1590 | /* "An argument's size is increased, if necessary, to make it a |
1591 | multiple of [32-bit] words. This may require tail padding, | |
1592 | depending on the size of the argument" -- from the x86 ABI. */ | |
1593 | set_gdbarch_parm_boundary (gdbarch, 32); | |
1594 | ||
00f8375e | 1595 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
fc08ec52 | 1596 | set_gdbarch_push_arguments (gdbarch, i386_push_arguments); |
c0d1d883 MK |
1597 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); |
1598 | set_gdbarch_push_return_address (gdbarch, i386_push_return_address); | |
fc08ec52 MK |
1599 | set_gdbarch_pop_frame (gdbarch, i386_pop_frame); |
1600 | set_gdbarch_store_struct_return (gdbarch, i386_store_struct_return); | |
3d7f4f49 | 1601 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1602 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1603 | i386_extract_struct_value_address); |
8201327c MK |
1604 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1605 | ||
42fdc8df | 1606 | set_gdbarch_frame_init_saved_regs (gdbarch, i386_frame_init_saved_regs); |
93924b6b MK |
1607 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1608 | ||
1609 | /* Stack grows downward. */ | |
1610 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1611 | ||
1612 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1613 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1614 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1615 | |
8201327c MK |
1616 | /* The following redefines make backtracing through sigtramp work. |
1617 | They manufacture a fake sigtramp frame and obtain the saved pc in | |
1618 | sigtramp from the sigcontext structure which is pushed by the | |
1619 | kernel on the user stack, along with a pointer to it. */ | |
1620 | ||
42fdc8df MK |
1621 | set_gdbarch_frame_args_skip (gdbarch, 8); |
1622 | set_gdbarch_frameless_function_invocation (gdbarch, | |
1623 | i386_frameless_function_invocation); | |
8201327c | 1624 | set_gdbarch_frame_chain (gdbarch, i386_frame_chain); |
c0d1d883 | 1625 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); |
8201327c MK |
1626 | set_gdbarch_frame_saved_pc (gdbarch, i386_frame_saved_pc); |
1627 | set_gdbarch_saved_pc_after_call (gdbarch, i386_saved_pc_after_call); | |
42fdc8df | 1628 | set_gdbarch_frame_num_args (gdbarch, i386_frame_num_args); |
8201327c MK |
1629 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1630 | ||
28fc6740 AC |
1631 | /* Wire in the MMX registers. */ |
1632 | set_gdbarch_num_pseudo_regs (gdbarch, mmx_num_regs); | |
1633 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); | |
1634 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1635 | ||
5e3397bb MK |
1636 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1637 | ||
38c968cf AC |
1638 | /* Add the i386 register groups. */ |
1639 | i386_add_reggroups (gdbarch); | |
1640 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1641 | ||
3ce1502b | 1642 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1643 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 1644 | |
a62cc96e AC |
1645 | return gdbarch; |
1646 | } | |
1647 | ||
8201327c MK |
1648 | static enum gdb_osabi |
1649 | i386_coff_osabi_sniffer (bfd *abfd) | |
1650 | { | |
762c5349 MK |
1651 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1652 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1653 | return GDB_OSABI_GO32; |
1654 | ||
1655 | return GDB_OSABI_UNKNOWN; | |
1656 | } | |
1657 | ||
1658 | static enum gdb_osabi | |
1659 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1660 | { | |
1661 | return GDB_OSABI_NETWARE; | |
1662 | } | |
1663 | \f | |
1664 | ||
28e9e0f0 MK |
1665 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1666 | void _initialize_i386_tdep (void); | |
1667 | ||
c906108c | 1668 | void |
fba45db2 | 1669 | _initialize_i386_tdep (void) |
c906108c | 1670 | { |
a62cc96e AC |
1671 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1672 | ||
fc338970 | 1673 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1674 | { |
1675 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1676 | |
917317f4 JM |
1677 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1678 | valid_flavors, | |
1ed2a135 | 1679 | &disassembly_flavor, |
fc338970 MK |
1680 | "\ |
1681 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1682 | and the default value is \"att\".", |
917317f4 | 1683 | &setlist); |
917317f4 JM |
1684 | add_show_from_set (new_cmd, &showlist); |
1685 | } | |
8201327c MK |
1686 | |
1687 | /* Add the variable that controls the convention for returning | |
1688 | structs. */ | |
1689 | { | |
1690 | struct cmd_list_element *new_cmd; | |
1691 | ||
1692 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1693 | valid_conventions, |
8201327c MK |
1694 | &struct_convention, "\ |
1695 | Set the convention for returning small structs, valid values \ | |
1696 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1697 | &setlist); | |
1698 | add_show_from_set (new_cmd, &showlist); | |
1699 | } | |
1700 | ||
1701 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1702 | i386_coff_osabi_sniffer); | |
1703 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1704 | i386_nlm_osabi_sniffer); | |
1705 | ||
05816f70 | 1706 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 1707 | i386_svr4_init_abi); |
05816f70 | 1708 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 1709 | i386_go32_init_abi); |
05816f70 | 1710 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 1711 | i386_nw_init_abi); |
38c968cf AC |
1712 | |
1713 | /* Initialize the i386 specific register groups. */ | |
1714 | i386_init_reggroups (); | |
c906108c | 1715 | } |