Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
acd5c798 MK |
24 | #include "arch-utils.h" |
25 | #include "command.h" | |
26 | #include "dummy-frame.h" | |
27 | #include "doublest.h" | |
28 | #include "floatformat.h" | |
c906108c | 29 | #include "frame.h" |
acd5c798 MK |
30 | #include "frame-base.h" |
31 | #include "frame-unwind.h" | |
c906108c | 32 | #include "inferior.h" |
acd5c798 | 33 | #include "gdbcmd.h" |
c906108c | 34 | #include "gdbcore.h" |
dfe01d39 | 35 | #include "objfiles.h" |
acd5c798 MK |
36 | #include "osabi.h" |
37 | #include "regcache.h" | |
38 | #include "reggroups.h" | |
c0d1d883 | 39 | #include "symfile.h" |
c906108c | 40 | #include "symtab.h" |
acd5c798 | 41 | #include "target.h" |
fd0407d6 | 42 | #include "value.h" |
acd5c798 | 43 | |
3d261580 | 44 | #include "gdb_assert.h" |
acd5c798 | 45 | #include "gdb_string.h" |
3d261580 | 46 | |
d2a7c97a | 47 | #include "i386-tdep.h" |
61113f8b | 48 | #include "i387-tdep.h" |
d2a7c97a | 49 | |
fc633446 MK |
50 | /* Names of the registers. The first 10 registers match the register |
51 | numbering scheme used by GCC for stabs and DWARF. */ | |
c40e1eab | 52 | |
fc633446 MK |
53 | static char *i386_register_names[] = |
54 | { | |
55 | "eax", "ecx", "edx", "ebx", | |
56 | "esp", "ebp", "esi", "edi", | |
57 | "eip", "eflags", "cs", "ss", | |
58 | "ds", "es", "fs", "gs", | |
59 | "st0", "st1", "st2", "st3", | |
60 | "st4", "st5", "st6", "st7", | |
61 | "fctrl", "fstat", "ftag", "fiseg", | |
62 | "fioff", "foseg", "fooff", "fop", | |
63 | "xmm0", "xmm1", "xmm2", "xmm3", | |
64 | "xmm4", "xmm5", "xmm6", "xmm7", | |
65 | "mxcsr" | |
66 | }; | |
67 | ||
c40e1eab MK |
68 | static const int i386_num_register_names = |
69 | (sizeof (i386_register_names) / sizeof (*i386_register_names)); | |
70 | ||
28fc6740 AC |
71 | /* MMX registers. */ |
72 | ||
73 | static char *i386_mmx_names[] = | |
74 | { | |
75 | "mm0", "mm1", "mm2", "mm3", | |
76 | "mm4", "mm5", "mm6", "mm7" | |
77 | }; | |
c40e1eab MK |
78 | |
79 | static const int i386_num_mmx_regs = | |
80 | (sizeof (i386_mmx_names) / sizeof (i386_mmx_names[0])); | |
81 | ||
82 | #define MM0_REGNUM NUM_REGS | |
28fc6740 AC |
83 | |
84 | static int | |
c40e1eab | 85 | i386_mmx_regnum_p (int regnum) |
28fc6740 | 86 | { |
c40e1eab MK |
87 | return (regnum >= MM0_REGNUM |
88 | && regnum < MM0_REGNUM + i386_num_mmx_regs); | |
28fc6740 AC |
89 | } |
90 | ||
23a34459 AC |
91 | /* FP register? */ |
92 | ||
93 | int | |
94 | i386_fp_regnum_p (int regnum) | |
95 | { | |
96 | return (regnum < NUM_REGS | |
c40e1eab | 97 | && (FP0_REGNUM && FP0_REGNUM <= regnum && regnum < FPC_REGNUM)); |
23a34459 AC |
98 | } |
99 | ||
100 | int | |
101 | i386_fpc_regnum_p (int regnum) | |
102 | { | |
103 | return (regnum < NUM_REGS | |
c40e1eab | 104 | && (FPC_REGNUM <= regnum && regnum < XMM0_REGNUM)); |
23a34459 AC |
105 | } |
106 | ||
107 | /* SSE register? */ | |
108 | ||
109 | int | |
110 | i386_sse_regnum_p (int regnum) | |
111 | { | |
112 | return (regnum < NUM_REGS | |
c40e1eab | 113 | && (XMM0_REGNUM <= regnum && regnum < MXCSR_REGNUM)); |
23a34459 AC |
114 | } |
115 | ||
116 | int | |
117 | i386_mxcsr_regnum_p (int regnum) | |
118 | { | |
119 | return (regnum < NUM_REGS | |
c40e1eab | 120 | && regnum == MXCSR_REGNUM); |
23a34459 AC |
121 | } |
122 | ||
fc633446 MK |
123 | /* Return the name of register REG. */ |
124 | ||
fa88f677 | 125 | const char * |
fc633446 MK |
126 | i386_register_name (int reg) |
127 | { | |
23a34459 | 128 | if (i386_mmx_regnum_p (reg)) |
28fc6740 | 129 | return i386_mmx_names[reg - MM0_REGNUM]; |
fc633446 | 130 | |
70913449 MK |
131 | if (reg >= 0 && reg < i386_num_register_names) |
132 | return i386_register_names[reg]; | |
133 | ||
c40e1eab | 134 | return NULL; |
fc633446 MK |
135 | } |
136 | ||
85540d8c MK |
137 | /* Convert stabs register number REG to the appropriate register |
138 | number used by GDB. */ | |
139 | ||
8201327c | 140 | static int |
85540d8c MK |
141 | i386_stab_reg_to_regnum (int reg) |
142 | { | |
143 | /* This implements what GCC calls the "default" register map. */ | |
144 | if (reg >= 0 && reg <= 7) | |
145 | { | |
acd5c798 | 146 | /* General-purpose registers. */ |
85540d8c MK |
147 | return reg; |
148 | } | |
149 | else if (reg >= 12 && reg <= 19) | |
150 | { | |
151 | /* Floating-point registers. */ | |
152 | return reg - 12 + FP0_REGNUM; | |
153 | } | |
154 | else if (reg >= 21 && reg <= 28) | |
155 | { | |
156 | /* SSE registers. */ | |
157 | return reg - 21 + XMM0_REGNUM; | |
158 | } | |
159 | else if (reg >= 29 && reg <= 36) | |
160 | { | |
161 | /* MMX registers. */ | |
7d12f766 | 162 | return reg - 29 + MM0_REGNUM; |
85540d8c MK |
163 | } |
164 | ||
165 | /* This will hopefully provoke a warning. */ | |
166 | return NUM_REGS + NUM_PSEUDO_REGS; | |
167 | } | |
168 | ||
8201327c | 169 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
170 | number used by GDB. */ |
171 | ||
8201327c | 172 | static int |
85540d8c MK |
173 | i386_dwarf_reg_to_regnum (int reg) |
174 | { | |
175 | /* The DWARF register numbering includes %eip and %eflags, and | |
176 | numbers the floating point registers differently. */ | |
177 | if (reg >= 0 && reg <= 9) | |
178 | { | |
acd5c798 | 179 | /* General-purpose registers. */ |
85540d8c MK |
180 | return reg; |
181 | } | |
182 | else if (reg >= 11 && reg <= 18) | |
183 | { | |
184 | /* Floating-point registers. */ | |
185 | return reg - 11 + FP0_REGNUM; | |
186 | } | |
187 | else if (reg >= 21) | |
188 | { | |
189 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
190 | return i386_stab_reg_to_regnum (reg); | |
191 | } | |
192 | ||
193 | /* This will hopefully provoke a warning. */ | |
194 | return NUM_REGS + NUM_PSEUDO_REGS; | |
195 | } | |
fc338970 | 196 | \f |
917317f4 | 197 | |
fc338970 MK |
198 | /* This is the variable that is set with "set disassembly-flavor", and |
199 | its legitimate values. */ | |
53904c9e AC |
200 | static const char att_flavor[] = "att"; |
201 | static const char intel_flavor[] = "intel"; | |
202 | static const char *valid_flavors[] = | |
c5aa993b | 203 | { |
c906108c SS |
204 | att_flavor, |
205 | intel_flavor, | |
206 | NULL | |
207 | }; | |
53904c9e | 208 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 209 | \f |
c906108c | 210 | |
acd5c798 MK |
211 | /* Use the program counter to determine the contents and size of a |
212 | breakpoint instruction. Return a pointer to a string of bytes that | |
213 | encode a breakpoint instruction, store the length of the string in | |
214 | *LEN and optionally adjust *PC to point to the correct memory | |
215 | location for inserting the breakpoint. | |
c906108c | 216 | |
acd5c798 MK |
217 | On the i386 we have a single breakpoint that fits in a single byte |
218 | and can be inserted anywhere. | |
c906108c | 219 | |
acd5c798 MK |
220 | This function is 64-bit safe. */ |
221 | ||
222 | static const unsigned char * | |
223 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
c906108c | 224 | { |
acd5c798 MK |
225 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ |
226 | ||
227 | *len = sizeof (break_insn); | |
228 | return break_insn; | |
c906108c | 229 | } |
fc338970 | 230 | \f |
acd5c798 MK |
231 | #ifdef I386_REGNO_TO_SYMMETRY |
232 | #error "The Sequent Symmetry is no longer supported." | |
233 | #endif | |
c906108c | 234 | |
acd5c798 MK |
235 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
236 | and %esp "belong" to the calling function. Therefore these | |
237 | registers should be saved if they're going to be modified. */ | |
c906108c | 238 | |
acd5c798 MK |
239 | /* The maximum number of saved registers. This should include all |
240 | registers mentioned above, and %eip. */ | |
a3386186 | 241 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
242 | |
243 | struct i386_frame_cache | |
c906108c | 244 | { |
acd5c798 MK |
245 | /* Base address. */ |
246 | CORE_ADDR base; | |
247 | CORE_ADDR sp_offset; | |
248 | CORE_ADDR pc; | |
249 | ||
250 | /* Saved registers. */ | |
251 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
252 | CORE_ADDR saved_sp; | |
253 | int pc_in_eax; | |
254 | ||
255 | /* Stack space reserved for local variables. */ | |
256 | long locals; | |
257 | }; | |
258 | ||
259 | /* Allocate and initialize a frame cache. */ | |
260 | ||
261 | static struct i386_frame_cache * | |
262 | i386_alloc_frame_cache (void) | |
263 | { | |
264 | struct i386_frame_cache *cache; | |
265 | int i; | |
266 | ||
267 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
268 | ||
269 | /* Base address. */ | |
270 | cache->base = 0; | |
271 | cache->sp_offset = -4; | |
272 | cache->pc = 0; | |
273 | ||
274 | /* Saved registers. We initialize these to -1 since zero is a valid | |
275 | offset (that's where %ebp is supposed to be stored). */ | |
276 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
277 | cache->saved_regs[i] = -1; | |
278 | cache->saved_sp = 0; | |
279 | cache->pc_in_eax = 0; | |
280 | ||
281 | /* Frameless until proven otherwise. */ | |
282 | cache->locals = -1; | |
283 | ||
284 | return cache; | |
285 | } | |
c906108c | 286 | |
acd5c798 MK |
287 | /* If the instruction at PC is a jump, return the address of its |
288 | target. Otherwise, return PC. */ | |
c906108c | 289 | |
acd5c798 MK |
290 | static CORE_ADDR |
291 | i386_follow_jump (CORE_ADDR pc) | |
292 | { | |
293 | unsigned char op; | |
294 | long delta = 0; | |
295 | int data16 = 0; | |
c906108c | 296 | |
acd5c798 MK |
297 | op = read_memory_unsigned_integer (pc, 1); |
298 | if (op == 0x66) | |
c906108c | 299 | { |
c906108c | 300 | data16 = 1; |
acd5c798 | 301 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
302 | } |
303 | ||
acd5c798 | 304 | switch (op) |
c906108c SS |
305 | { |
306 | case 0xe9: | |
fc338970 | 307 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
308 | if (data16) |
309 | { | |
acd5c798 | 310 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 311 | |
fc338970 MK |
312 | /* Include the size of the jmp instruction (including the |
313 | 0x66 prefix). */ | |
acd5c798 | 314 | delta += 4; |
c906108c SS |
315 | } |
316 | else | |
317 | { | |
acd5c798 | 318 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 319 | |
acd5c798 MK |
320 | /* Include the size of the jmp instruction. */ |
321 | delta += 5; | |
c906108c SS |
322 | } |
323 | break; | |
324 | case 0xeb: | |
fc338970 | 325 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 326 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 327 | |
acd5c798 | 328 | delta += data16 + 2; |
c906108c SS |
329 | break; |
330 | } | |
c906108c | 331 | |
acd5c798 MK |
332 | return pc + delta; |
333 | } | |
fc338970 | 334 | |
acd5c798 MK |
335 | /* Check whether PC points at a prologue for a function returning a |
336 | structure or union. If so, it updates CACHE and returns the | |
337 | address of the first instruction after the code sequence that | |
338 | removes the "hidden" argument from the stack or CURRENT_PC, | |
339 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 340 | |
acd5c798 MK |
341 | static CORE_ADDR |
342 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
343 | struct i386_frame_cache *cache) | |
c906108c | 344 | { |
acd5c798 MK |
345 | /* Functions that return a structure or union start with: |
346 | ||
347 | popl %eax 0x58 | |
348 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
349 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
350 | ||
351 | (the System V compiler puts out the second `xchg' instruction, | |
352 | and the assembler doesn't try to optimize it, so the 'sib' form | |
353 | gets generated). This sequence is used to get the address of the | |
354 | return buffer for a function that returns a structure. */ | |
355 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; | |
356 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
357 | unsigned char buf[4]; | |
c906108c SS |
358 | unsigned char op; |
359 | ||
acd5c798 MK |
360 | if (current_pc <= pc) |
361 | return pc; | |
362 | ||
363 | op = read_memory_unsigned_integer (pc, 1); | |
c906108c | 364 | |
acd5c798 MK |
365 | if (op != 0x58) /* popl %eax */ |
366 | return pc; | |
c906108c | 367 | |
acd5c798 MK |
368 | read_memory (pc + 1, buf, 4); |
369 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) | |
370 | return pc; | |
c906108c | 371 | |
acd5c798 | 372 | if (current_pc == pc) |
c906108c | 373 | { |
acd5c798 MK |
374 | cache->sp_offset += 4; |
375 | return current_pc; | |
c906108c SS |
376 | } |
377 | ||
acd5c798 | 378 | if (current_pc == pc + 1) |
c906108c | 379 | { |
acd5c798 MK |
380 | cache->pc_in_eax = 1; |
381 | return current_pc; | |
382 | } | |
383 | ||
384 | if (buf[1] == proto1[1]) | |
385 | return pc + 4; | |
386 | else | |
387 | return pc + 5; | |
388 | } | |
389 | ||
390 | static CORE_ADDR | |
391 | i386_skip_probe (CORE_ADDR pc) | |
392 | { | |
393 | /* A function may start with | |
fc338970 | 394 | |
acd5c798 MK |
395 | pushl constant |
396 | call _probe | |
397 | addl $4, %esp | |
fc338970 | 398 | |
acd5c798 MK |
399 | followed by |
400 | ||
401 | pushl %ebp | |
fc338970 | 402 | |
acd5c798 MK |
403 | etc. */ |
404 | unsigned char buf[8]; | |
405 | unsigned char op; | |
fc338970 | 406 | |
acd5c798 MK |
407 | op = read_memory_unsigned_integer (pc, 1); |
408 | ||
409 | if (op == 0x68 || op == 0x6a) | |
410 | { | |
411 | int delta; | |
c906108c | 412 | |
acd5c798 MK |
413 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
414 | four-byte operand, depending on the opcode. */ | |
c906108c | 415 | if (op == 0x68) |
acd5c798 | 416 | delta = 5; |
c906108c | 417 | else |
acd5c798 | 418 | delta = 2; |
c906108c | 419 | |
acd5c798 MK |
420 | /* Read the following 8 bytes, which should be `call _probe' (6 |
421 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
422 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 423 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 424 | pc += delta + sizeof (buf); |
c906108c SS |
425 | } |
426 | ||
acd5c798 MK |
427 | return pc; |
428 | } | |
429 | ||
430 | /* Check whether PC points at a code that sets up a new stack frame. | |
431 | If so, it updates CACHE and returns the address of the first | |
432 | instruction after the sequence that sets removes the "hidden" | |
433 | argument from the stack or CURRENT_PC, whichever is smaller. | |
434 | Otherwise, return PC. */ | |
435 | ||
436 | static CORE_ADDR | |
437 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, | |
438 | struct i386_frame_cache *cache) | |
439 | { | |
440 | unsigned char op; | |
441 | ||
442 | if (current_pc <= pc) | |
443 | return current_pc; | |
444 | ||
445 | op = read_memory_unsigned_integer (pc, 1); | |
446 | ||
c906108c | 447 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 448 | { |
acd5c798 MK |
449 | /* Take into account that we've executed the `pushl %ebp' that |
450 | starts this instruction sequence. */ | |
451 | cache->saved_regs[I386_EBP_REGNUM] = 0; | |
452 | cache->sp_offset += 4; | |
453 | ||
454 | /* If that's all, return now. */ | |
455 | if (current_pc <= pc + 1) | |
456 | return current_pc; | |
457 | ||
458 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ | |
459 | op = read_memory_unsigned_integer (pc + 1, 1); | |
460 | switch (op) | |
c906108c SS |
461 | { |
462 | case 0x8b: | |
acd5c798 MK |
463 | if (read_memory_unsigned_integer (pc + 2, 1) != 0xec) |
464 | return pc + 1; | |
c906108c SS |
465 | break; |
466 | case 0x89: | |
acd5c798 MK |
467 | if (read_memory_unsigned_integer (pc + 2, 1) != 0xe5) |
468 | return pc + 1; | |
c906108c SS |
469 | break; |
470 | default: | |
acd5c798 | 471 | return pc + 1; |
c906108c | 472 | } |
acd5c798 MK |
473 | |
474 | /* OK, we actually have a frame. We just don't know how large it is | |
475 | yet. Set its size to zero. We'll adjust it if necessary. */ | |
476 | cache->locals = 0; | |
477 | ||
478 | /* If that's all, return now. */ | |
479 | if (current_pc <= pc + 3) | |
480 | return current_pc; | |
481 | ||
fc338970 MK |
482 | /* Check for stack adjustment |
483 | ||
acd5c798 | 484 | subl $XXX, %esp |
fc338970 MK |
485 | |
486 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
487 | reg, so we don't have to worry about a data16 prefix. */ | |
acd5c798 | 488 | op = read_memory_unsigned_integer (pc + 3, 1); |
c906108c SS |
489 | if (op == 0x83) |
490 | { | |
fc338970 | 491 | /* `subl' with 8 bit immediate. */ |
acd5c798 | 492 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 493 | /* Some instruction starting with 0x83 other than `subl'. */ |
acd5c798 MK |
494 | return pc + 3; |
495 | ||
496 | /* `subl' with signed byte immediate (though it wouldn't make | |
497 | sense to be negative). */ | |
498 | cache->locals = read_memory_integer (pc + 5, 1); | |
499 | return pc + 6; | |
c906108c SS |
500 | } |
501 | else if (op == 0x81) | |
502 | { | |
fc338970 | 503 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
acd5c798 | 504 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 505 | /* Some instruction starting with 0x81 other than `subl'. */ |
acd5c798 MK |
506 | return pc + 3; |
507 | ||
fc338970 | 508 | /* It is `subl' with a 32 bit immediate. */ |
acd5c798 MK |
509 | cache->locals = read_memory_integer (pc + 5, 4); |
510 | return pc + 9; | |
c906108c SS |
511 | } |
512 | else | |
513 | { | |
acd5c798 MK |
514 | /* Some instruction other than `subl'. */ |
515 | return pc + 3; | |
c906108c SS |
516 | } |
517 | } | |
acd5c798 | 518 | else if (op == 0xc8) /* enter $XXX */ |
c906108c | 519 | { |
acd5c798 MK |
520 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
521 | return pc + 4; | |
c906108c | 522 | } |
21d0e8a4 | 523 | |
acd5c798 | 524 | return pc; |
21d0e8a4 MK |
525 | } |
526 | ||
acd5c798 MK |
527 | /* Check whether PC points at code that saves registers on the stack. |
528 | If so, it updates CACHE and returns the address of the first | |
529 | instruction after the register saves or CURRENT_PC, whichever is | |
530 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
531 | |
532 | static CORE_ADDR | |
acd5c798 MK |
533 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
534 | struct i386_frame_cache *cache) | |
6bff26de | 535 | { |
acd5c798 | 536 | if (cache->locals >= 0) |
267bf4bb | 537 | { |
acd5c798 MK |
538 | CORE_ADDR offset; |
539 | unsigned char op; | |
540 | int i; | |
c0d1d883 | 541 | |
acd5c798 MK |
542 | offset = - 4 - cache->locals; |
543 | for (i = 0; i < 8 && pc < current_pc; i++) | |
544 | { | |
545 | op = read_memory_unsigned_integer (pc, 1); | |
546 | if (op < 0x50 || op > 0x57) | |
547 | break; | |
0d17c81d | 548 | |
acd5c798 MK |
549 | cache->saved_regs[op - 0x50] = offset; |
550 | offset -= 4; | |
551 | pc++; | |
552 | } | |
6bff26de MK |
553 | } |
554 | ||
acd5c798 | 555 | return pc; |
22797942 AC |
556 | } |
557 | ||
acd5c798 MK |
558 | /* Do a full analysis of the prologue at PC and update CACHE |
559 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
560 | address where the analysis stopped. | |
ed84f6c1 | 561 | |
fc338970 MK |
562 | We handle these cases: |
563 | ||
564 | The startup sequence can be at the start of the function, or the | |
565 | function can start with a branch to startup code at the end. | |
566 | ||
567 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
568 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
569 | once used in the System V compiler). | |
570 | ||
571 | Local space is allocated just below the saved %ebp by either the | |
572 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
573 | bit unsigned argument for space to allocate, and the 'addl' | |
574 | instruction could have either a signed byte, or 32 bit immediate. | |
575 | ||
576 | Next, the registers used by this function are pushed. With the | |
577 | System V compiler they will always be in the order: %edi, %esi, | |
578 | %ebx (and sometimes a harmless bug causes it to also save but not | |
579 | restore %eax); however, the code below is willing to see the pushes | |
580 | in any order, and will handle up to 8 of them. | |
581 | ||
582 | If the setup sequence is at the end of the function, then the next | |
583 | instruction will be a branch back to the start. */ | |
c906108c | 584 | |
acd5c798 MK |
585 | static CORE_ADDR |
586 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
587 | struct i386_frame_cache *cache) | |
c906108c | 588 | { |
acd5c798 MK |
589 | pc = i386_follow_jump (pc); |
590 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
591 | pc = i386_skip_probe (pc); | |
592 | pc = i386_analyze_frame_setup (pc, current_pc, cache); | |
593 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
594 | } |
595 | ||
fc338970 | 596 | /* Return PC of first real instruction. */ |
c906108c | 597 | |
3a1e71e3 | 598 | static CORE_ADDR |
acd5c798 | 599 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 600 | { |
c5aa993b | 601 | static unsigned char pic_pat[6] = |
acd5c798 MK |
602 | { |
603 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
604 | 0x5b, /* popl %ebx */ | |
c5aa993b | 605 | }; |
acd5c798 MK |
606 | struct i386_frame_cache cache; |
607 | CORE_ADDR pc; | |
608 | unsigned char op; | |
609 | int i; | |
c5aa993b | 610 | |
acd5c798 MK |
611 | cache.locals = -1; |
612 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
613 | if (cache.locals < 0) | |
614 | return start_pc; | |
c5aa993b | 615 | |
acd5c798 | 616 | /* Found valid frame setup. */ |
c906108c | 617 | |
fc338970 MK |
618 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
619 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
620 | %ebx: |
621 | ||
fc338970 MK |
622 | call 0x0 |
623 | popl %ebx | |
624 | movl %ebx,x(%ebp) (optional) | |
625 | addl y,%ebx | |
626 | ||
c906108c SS |
627 | This code is with the rest of the prologue (at the end of the |
628 | function), so we have to skip it to get to the first real | |
629 | instruction at the start of the function. */ | |
c5aa993b | 630 | |
c906108c SS |
631 | for (i = 0; i < 6; i++) |
632 | { | |
acd5c798 | 633 | op = read_memory_unsigned_integer (pc + i, 1); |
c5aa993b | 634 | if (pic_pat[i] != op) |
c906108c SS |
635 | break; |
636 | } | |
637 | if (i == 6) | |
638 | { | |
acd5c798 MK |
639 | int delta = 6; |
640 | ||
641 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 642 | |
c5aa993b | 643 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 644 | { |
acd5c798 MK |
645 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
646 | ||
fc338970 | 647 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 648 | delta += 3; |
fc338970 | 649 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 650 | delta += 6; |
fc338970 | 651 | else /* Unexpected instruction. */ |
acd5c798 MK |
652 | delta = 0; |
653 | ||
654 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 655 | } |
acd5c798 | 656 | |
c5aa993b | 657 | /* addl y,%ebx */ |
acd5c798 MK |
658 | if (delta > 0 && op == 0x81 |
659 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3); | |
c906108c | 660 | { |
acd5c798 | 661 | pc += delta + 6; |
c906108c SS |
662 | } |
663 | } | |
c5aa993b | 664 | |
acd5c798 | 665 | return i386_follow_jump (pc); |
c906108c SS |
666 | } |
667 | ||
acd5c798 | 668 | /* This function is 64-bit safe. */ |
93924b6b | 669 | |
acd5c798 MK |
670 | static CORE_ADDR |
671 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 672 | { |
acd5c798 MK |
673 | char buf[8]; |
674 | ||
675 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
676 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 677 | } |
acd5c798 | 678 | \f |
93924b6b | 679 | |
acd5c798 | 680 | /* Normal frames. */ |
c5aa993b | 681 | |
acd5c798 MK |
682 | static struct i386_frame_cache * |
683 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 684 | { |
acd5c798 | 685 | struct i386_frame_cache *cache; |
c0d1d883 | 686 | char buf[4]; |
acd5c798 MK |
687 | int i; |
688 | ||
689 | if (*this_cache) | |
690 | return *this_cache; | |
691 | ||
692 | cache = i386_alloc_frame_cache (); | |
693 | *this_cache = cache; | |
694 | ||
695 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
696 | which holds the base address for the current stack frame. | |
697 | However, for functions that don't need it, the frame pointer is | |
698 | optional. For these "frameless" functions the frame pointer is | |
699 | actually the frame pointer of the calling frame. Signal | |
700 | trampolines are just a special case of a "frameless" function. | |
701 | They (usually) share their frame pointer with the frame that was | |
702 | in progress when the signal occurred. */ | |
703 | ||
704 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
705 | cache->base = extract_unsigned_integer (buf, 4); | |
706 | if (cache->base == 0) | |
707 | return cache; | |
708 | ||
709 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
710 | cache->saved_regs[I386_EIP_REGNUM] = 4; | |
711 | ||
712 | cache->pc = frame_func_unwind (next_frame); | |
713 | if (cache->pc != 0) | |
714 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
715 | ||
716 | if (cache->locals < 0) | |
717 | { | |
718 | /* We didn't find a valid frame, which means that CACHE->base | |
719 | currently holds the frame pointer for our calling frame. If | |
720 | we're at the start of a function, or somewhere half-way its | |
721 | prologue, the function's frame probably hasn't been fully | |
722 | setup yet. Try to reconstruct the base address for the stack | |
723 | frame by looking at the stack pointer. For truly "frameless" | |
724 | functions this might work too. */ | |
725 | ||
726 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
727 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
728 | } | |
729 | ||
730 | /* Now that we have the base address for the stack frame we can | |
731 | calculate the value of %esp in the calling frame. */ | |
732 | cache->saved_sp = cache->base + 8; | |
a7769679 | 733 | |
acd5c798 MK |
734 | /* Adjust all the saved registers such that they contain addresses |
735 | instead of offsets. */ | |
736 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
737 | if (cache->saved_regs[i] != -1) | |
738 | cache->saved_regs[i] += cache->base; | |
739 | ||
740 | return cache; | |
a7769679 MK |
741 | } |
742 | ||
3a1e71e3 | 743 | static void |
acd5c798 MK |
744 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
745 | struct frame_id *this_id) | |
c906108c | 746 | { |
acd5c798 MK |
747 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
748 | ||
749 | /* This marks the outermost frame. */ | |
750 | if (cache->base == 0) | |
751 | return; | |
752 | ||
753 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); | |
754 | } | |
755 | ||
756 | static void | |
757 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
758 | int regnum, int *optimizedp, | |
759 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
760 | int *realnump, void *valuep) | |
761 | { | |
762 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
763 | ||
764 | gdb_assert (regnum >= 0); | |
765 | ||
766 | /* The System V ABI says that: | |
767 | ||
768 | "The flags register contains the system flags, such as the | |
769 | direction flag and the carry flag. The direction flag must be | |
770 | set to the forward (that is, zero) direction before entry and | |
771 | upon exit from a function. Other user flags have no specified | |
772 | role in the standard calling sequence and are not preserved." | |
773 | ||
774 | To guarantee the "upon exit" part of that statement we fake a | |
775 | saved flags register that has its direction flag cleared. | |
776 | ||
777 | Note that GCC doesn't seem to rely on the fact that the direction | |
778 | flag is cleared after a function return; it always explicitly | |
779 | clears the flag before operations where it matters. | |
780 | ||
781 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
782 | right thing to do. The way we fake the flags register here makes | |
783 | it impossible to change it. */ | |
784 | ||
785 | if (regnum == I386_EFLAGS_REGNUM) | |
786 | { | |
787 | *optimizedp = 0; | |
788 | *lvalp = not_lval; | |
789 | *addrp = 0; | |
790 | *realnump = -1; | |
791 | if (valuep) | |
792 | { | |
793 | ULONGEST val; | |
c5aa993b | 794 | |
acd5c798 MK |
795 | /* Clear the direction flag. */ |
796 | frame_unwind_unsigned_register (next_frame, PS_REGNUM, &val); | |
797 | val &= ~(1 << 10); | |
798 | store_unsigned_integer (valuep, 4, val); | |
799 | } | |
800 | ||
801 | return; | |
802 | } | |
1211c4e4 | 803 | |
acd5c798 | 804 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 805 | { |
acd5c798 MK |
806 | frame_register_unwind (next_frame, I386_EAX_REGNUM, |
807 | optimizedp, lvalp, addrp, realnump, valuep); | |
808 | return; | |
809 | } | |
810 | ||
811 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
812 | { | |
813 | *optimizedp = 0; | |
814 | *lvalp = not_lval; | |
815 | *addrp = 0; | |
816 | *realnump = -1; | |
817 | if (valuep) | |
c906108c | 818 | { |
acd5c798 MK |
819 | /* Store the value. */ |
820 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 821 | } |
acd5c798 | 822 | return; |
c906108c | 823 | } |
acd5c798 MK |
824 | |
825 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) | |
826 | { | |
827 | *optimizedp = 0; | |
828 | *lvalp = lval_memory; | |
829 | *addrp = cache->saved_regs[regnum]; | |
830 | *realnump = -1; | |
831 | if (valuep) | |
832 | { | |
833 | /* Read the value in from memory. */ | |
834 | read_memory (*addrp, valuep, | |
835 | register_size (current_gdbarch, regnum)); | |
836 | } | |
837 | return; | |
838 | } | |
839 | ||
840 | frame_register_unwind (next_frame, regnum, | |
841 | optimizedp, lvalp, addrp, realnump, valuep); | |
842 | } | |
843 | ||
844 | static const struct frame_unwind i386_frame_unwind = | |
845 | { | |
846 | NORMAL_FRAME, | |
847 | i386_frame_this_id, | |
848 | i386_frame_prev_register | |
849 | }; | |
850 | ||
851 | static const struct frame_unwind * | |
852 | i386_frame_p (CORE_ADDR pc) | |
853 | { | |
854 | return &i386_frame_unwind; | |
855 | } | |
856 | \f | |
857 | ||
858 | /* Signal trampolines. */ | |
859 | ||
860 | static struct i386_frame_cache * | |
861 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
862 | { | |
863 | struct i386_frame_cache *cache; | |
864 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
865 | CORE_ADDR addr; | |
866 | char buf[4]; | |
867 | ||
868 | if (*this_cache) | |
869 | return *this_cache; | |
870 | ||
871 | cache = i386_alloc_frame_cache (); | |
872 | ||
873 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
874 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
875 | ||
876 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
877 | if (tdep->sc_reg_offset) |
878 | { | |
879 | int i; | |
880 | ||
881 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
882 | ||
883 | for (i = 0; i < tdep->sc_num_regs; i++) | |
884 | if (tdep->sc_reg_offset[i] != -1) | |
885 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; | |
886 | } | |
887 | else | |
888 | { | |
889 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; | |
890 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
891 | } | |
acd5c798 MK |
892 | |
893 | *this_cache = cache; | |
894 | return cache; | |
895 | } | |
896 | ||
897 | static void | |
898 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
899 | struct frame_id *this_id) | |
900 | { | |
901 | struct i386_frame_cache *cache = | |
902 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
903 | ||
904 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); | |
905 | } | |
906 | ||
907 | static void | |
908 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
909 | void **this_cache, | |
910 | int regnum, int *optimizedp, | |
911 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
912 | int *realnump, void *valuep) | |
913 | { | |
914 | /* Make sure we've initialized the cache. */ | |
915 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
916 | ||
917 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
918 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 919 | } |
c0d1d883 | 920 | |
acd5c798 MK |
921 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
922 | { | |
923 | SIGTRAMP_FRAME, | |
924 | i386_sigtramp_frame_this_id, | |
925 | i386_sigtramp_frame_prev_register | |
926 | }; | |
927 | ||
928 | static const struct frame_unwind * | |
929 | i386_sigtramp_frame_p (CORE_ADDR pc) | |
930 | { | |
931 | char *name; | |
932 | ||
1c3545ae MK |
933 | /* We shouldn't even bother to try if the OSABI didn't register |
934 | a sigcontext_addr handler. */ | |
935 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
936 | return NULL; | |
937 | ||
acd5c798 MK |
938 | find_pc_partial_function (pc, &name, NULL, NULL); |
939 | if (PC_IN_SIGTRAMP (pc, name)) | |
940 | return &i386_sigtramp_frame_unwind; | |
941 | ||
942 | return NULL; | |
943 | } | |
944 | \f | |
945 | ||
946 | static CORE_ADDR | |
947 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
948 | { | |
949 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
950 | ||
951 | return cache->base; | |
952 | } | |
953 | ||
954 | static const struct frame_base i386_frame_base = | |
955 | { | |
956 | &i386_frame_unwind, | |
957 | i386_frame_base_address, | |
958 | i386_frame_base_address, | |
959 | i386_frame_base_address | |
960 | }; | |
961 | ||
c0d1d883 | 962 | static void |
acd5c798 | 963 | i386_save_dummy_frame_tos (CORE_ADDR sp) |
c0d1d883 | 964 | { |
acd5c798 MK |
965 | generic_save_dummy_frame_tos (sp + 8); |
966 | } | |
967 | ||
968 | static struct frame_id | |
969 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
970 | { | |
971 | char buf[4]; | |
972 | CORE_ADDR fp; | |
973 | ||
974 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
975 | fp = extract_unsigned_integer (buf, 4); | |
976 | ||
977 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); | |
c0d1d883 | 978 | } |
fc338970 | 979 | \f |
c906108c | 980 | |
fc338970 MK |
981 | /* Figure out where the longjmp will land. Slurp the args out of the |
982 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 983 | structure from which we extract the address that we will land at. |
28bcfd30 | 984 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
985 | success. |
986 | ||
987 | This function is 64-bit safe. */ | |
c906108c | 988 | |
8201327c MK |
989 | static int |
990 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 991 | { |
28bcfd30 | 992 | char buf[8]; |
c906108c | 993 | CORE_ADDR sp, jb_addr; |
8201327c | 994 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 995 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 996 | |
8201327c MK |
997 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
998 | longjmp will land. */ | |
999 | if (jb_pc_offset == -1) | |
c906108c SS |
1000 | return 0; |
1001 | ||
8201327c | 1002 | sp = read_register (SP_REGNUM); |
28bcfd30 | 1003 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1004 | return 0; |
1005 | ||
f9d3c2a8 | 1006 | jb_addr = extract_typed_address (buf, builtin_type_void_func_ptr); |
28bcfd30 | 1007 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1008 | return 0; |
c906108c | 1009 | |
f9d3c2a8 | 1010 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1011 | return 1; |
1012 | } | |
fc338970 | 1013 | \f |
c906108c | 1014 | |
3a1e71e3 | 1015 | static CORE_ADDR |
6a65450a AC |
1016 | i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1017 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
1018 | struct value **args, CORE_ADDR sp, int struct_return, | |
1019 | CORE_ADDR struct_addr) | |
22f8ba57 | 1020 | { |
acd5c798 MK |
1021 | char buf[4]; |
1022 | int i; | |
1023 | ||
1024 | /* Push arguments in reverse order. */ | |
1025 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1026 | { |
acd5c798 MK |
1027 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i])); |
1028 | ||
1029 | /* The System V ABI says that: | |
1030 | ||
1031 | "An argument's size is increased, if necessary, to make it a | |
1032 | multiple of [32-bit] words. This may require tail padding, | |
1033 | depending on the size of the argument." | |
1034 | ||
1035 | This makes sure the stack says word-aligned. */ | |
1036 | sp -= (len + 3) & ~3; | |
1037 | write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len); | |
1038 | } | |
22f8ba57 | 1039 | |
acd5c798 MK |
1040 | /* Push value address. */ |
1041 | if (struct_return) | |
1042 | { | |
22f8ba57 | 1043 | sp -= 4; |
fbd9dcd3 | 1044 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1045 | write_memory (sp, buf, 4); |
1046 | } | |
1047 | ||
acd5c798 MK |
1048 | /* Store return address. */ |
1049 | sp -= 4; | |
6a65450a | 1050 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1051 | write_memory (sp, buf, 4); |
1052 | ||
1053 | /* Finally, update the stack pointer... */ | |
1054 | store_unsigned_integer (buf, 4, sp); | |
1055 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1056 | ||
1057 | /* ...and fake a frame pointer. */ | |
1058 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1059 | ||
22f8ba57 MK |
1060 | return sp; |
1061 | } | |
1062 | ||
1a309862 MK |
1063 | /* These registers are used for returning integers (and on some |
1064 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1065 | size and alignment match an integer type). */ |
acd5c798 MK |
1066 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1067 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 MK |
1068 | |
1069 | /* Extract from an array REGBUF containing the (raw) register state, a | |
1070 | function return value of TYPE, and copy that, in virtual format, | |
1071 | into VALBUF. */ | |
1072 | ||
3a1e71e3 | 1073 | static void |
00f8375e | 1074 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 1075 | void *dst) |
c906108c | 1076 | { |
ebba8386 | 1077 | bfd_byte *valbuf = dst; |
1a309862 | 1078 | int len = TYPE_LENGTH (type); |
00f8375e | 1079 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1080 | |
1e8d0a7b MK |
1081 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1082 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1083 | { |
00f8375e | 1084 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1085 | return; |
1086 | } | |
1e8d0a7b MK |
1087 | |
1088 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 1089 | { |
94ea66b3 | 1090 | if (FP0_REGNUM < 0) |
1a309862 MK |
1091 | { |
1092 | warning ("Cannot find floating-point return value."); | |
1093 | memset (valbuf, 0, len); | |
ef9dff19 | 1094 | return; |
1a309862 MK |
1095 | } |
1096 | ||
c6ba6f0d MK |
1097 | /* Floating-point return values can be found in %st(0). Convert |
1098 | its contents to the desired type. This is probably not | |
1099 | exactly how it would happen on the target itself, but it is | |
1100 | the best we can do. */ | |
acd5c798 | 1101 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1102 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1103 | } |
1104 | else | |
c5aa993b | 1105 | { |
d4f3574e SS |
1106 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
1107 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1108 | ||
1109 | if (len <= low_size) | |
00f8375e | 1110 | { |
0818c12a | 1111 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1112 | memcpy (valbuf, buf, len); |
1113 | } | |
d4f3574e SS |
1114 | else if (len <= (low_size + high_size)) |
1115 | { | |
0818c12a | 1116 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1117 | memcpy (valbuf, buf, low_size); |
0818c12a | 1118 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1119 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1120 | } |
1121 | else | |
8e65ff28 AC |
1122 | internal_error (__FILE__, __LINE__, |
1123 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1124 | } |
1125 | } | |
1126 | ||
ef9dff19 MK |
1127 | /* Write into the appropriate registers a function return value stored |
1128 | in VALBUF of type TYPE, given in virtual format. */ | |
1129 | ||
3a1e71e3 | 1130 | static void |
3d7f4f49 MK |
1131 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1132 | const void *valbuf) | |
ef9dff19 MK |
1133 | { |
1134 | int len = TYPE_LENGTH (type); | |
1135 | ||
1e8d0a7b MK |
1136 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1137 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1138 | { |
3d7f4f49 | 1139 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1140 | return; |
1141 | } | |
1e8d0a7b MK |
1142 | |
1143 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1144 | { |
3d7f4f49 | 1145 | ULONGEST fstat; |
c6ba6f0d | 1146 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 1147 | |
94ea66b3 | 1148 | if (FP0_REGNUM < 0) |
ef9dff19 MK |
1149 | { |
1150 | warning ("Cannot set floating-point return value."); | |
1151 | return; | |
1152 | } | |
1153 | ||
635b0cc1 MK |
1154 | /* Returning floating-point values is a bit tricky. Apart from |
1155 | storing the return value in %st(0), we have to simulate the | |
1156 | state of the FPU at function return point. */ | |
1157 | ||
c6ba6f0d MK |
1158 | /* Convert the value found in VALBUF to the extended |
1159 | floating-point format used by the FPU. This is probably | |
1160 | not exactly how it would happen on the target itself, but | |
1161 | it is the best we can do. */ | |
1162 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1163 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1164 | |
635b0cc1 MK |
1165 | /* Set the top of the floating-point register stack to 7. The |
1166 | actual value doesn't really matter, but 7 is what a normal | |
1167 | function return would end up with if the program started out | |
1168 | with a freshly initialized FPU. */ | |
3d7f4f49 | 1169 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); |
ccb945b8 | 1170 | fstat |= (7 << 11); |
3d7f4f49 | 1171 | regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); |
ccb945b8 | 1172 | |
635b0cc1 MK |
1173 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1174 | the floating-point register stack to 7, the appropriate value | |
1175 | for the tag word is 0x3fff. */ | |
3d7f4f49 | 1176 | regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1177 | } |
1178 | else | |
1179 | { | |
1180 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
1181 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1182 | ||
1183 | if (len <= low_size) | |
3d7f4f49 | 1184 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1185 | else if (len <= (low_size + high_size)) |
1186 | { | |
3d7f4f49 MK |
1187 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1188 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1189 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1190 | } |
1191 | else | |
8e65ff28 AC |
1192 | internal_error (__FILE__, __LINE__, |
1193 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1194 | } |
1195 | } | |
f7af9647 | 1196 | |
751f1375 MK |
1197 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1198 | address in which a function should return its structure value, as a | |
1199 | CORE_ADDR. */ | |
f7af9647 | 1200 | |
3a1e71e3 | 1201 | static CORE_ADDR |
00f8375e | 1202 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1203 | { |
acd5c798 | 1204 | char buf[4]; |
751f1375 | 1205 | |
acd5c798 MK |
1206 | regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); |
1207 | return extract_unsigned_integer (buf, 4); | |
f7af9647 | 1208 | } |
fc338970 | 1209 | \f |
ef9dff19 | 1210 | |
8201327c MK |
1211 | /* This is the variable that is set with "set struct-convention", and |
1212 | its legitimate values. */ | |
1213 | static const char default_struct_convention[] = "default"; | |
1214 | static const char pcc_struct_convention[] = "pcc"; | |
1215 | static const char reg_struct_convention[] = "reg"; | |
1216 | static const char *valid_conventions[] = | |
1217 | { | |
1218 | default_struct_convention, | |
1219 | pcc_struct_convention, | |
1220 | reg_struct_convention, | |
1221 | NULL | |
1222 | }; | |
1223 | static const char *struct_convention = default_struct_convention; | |
1224 | ||
1225 | static int | |
1226 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1227 | { | |
1228 | enum struct_return struct_return; | |
1229 | ||
1230 | if (struct_convention == default_struct_convention) | |
1231 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1232 | else if (struct_convention == pcc_struct_convention) | |
1233 | struct_return = pcc_struct_return; | |
1234 | else | |
1235 | struct_return = reg_struct_return; | |
1236 | ||
1237 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1238 | type); | |
1239 | } | |
1240 | \f | |
1241 | ||
d7a0d72c MK |
1242 | /* Return the GDB type object for the "standard" data type of data in |
1243 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1244 | potentially they could be used for things other than address. */ | |
1245 | ||
3a1e71e3 | 1246 | static struct type * |
4e259f09 | 1247 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1248 | { |
acd5c798 MK |
1249 | if (regnum == I386_EIP_REGNUM |
1250 | || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) | |
d7a0d72c MK |
1251 | return lookup_pointer_type (builtin_type_void); |
1252 | ||
23a34459 | 1253 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1254 | return builtin_type_i387_ext; |
d7a0d72c | 1255 | |
23a34459 | 1256 | if (i386_sse_regnum_p (regnum)) |
3139facc | 1257 | return builtin_type_vec128i; |
d7a0d72c | 1258 | |
23a34459 | 1259 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1260 | return builtin_type_vec64i; |
1261 | ||
d7a0d72c MK |
1262 | return builtin_type_int; |
1263 | } | |
1264 | ||
28fc6740 | 1265 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1266 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1267 | |
1268 | static int | |
c86c27af | 1269 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 AC |
1270 | { |
1271 | int mmxi; | |
1272 | ULONGEST fstat; | |
1273 | int tos; | |
1274 | int fpi; | |
c86c27af | 1275 | |
28fc6740 AC |
1276 | mmxi = regnum - MM0_REGNUM; |
1277 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); | |
1278 | tos = (fstat >> 11) & 0x7; | |
1279 | fpi = (mmxi + tos) % 8; | |
c86c27af | 1280 | |
28fc6740 AC |
1281 | return (FP0_REGNUM + fpi); |
1282 | } | |
1283 | ||
1284 | static void | |
1285 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1286 | int regnum, void *buf) | |
1287 | { | |
23a34459 | 1288 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1289 | { |
d9d9c31f | 1290 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1291 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1292 | ||
28fc6740 | 1293 | /* Extract (always little endian). */ |
c86c27af | 1294 | regcache_raw_read (regcache, fpnum, mmx_buf); |
28fc6740 AC |
1295 | memcpy (buf, mmx_buf, REGISTER_RAW_SIZE (regnum)); |
1296 | } | |
1297 | else | |
1298 | regcache_raw_read (regcache, regnum, buf); | |
1299 | } | |
1300 | ||
1301 | static void | |
1302 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1303 | int regnum, const void *buf) | |
1304 | { | |
23a34459 | 1305 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1306 | { |
d9d9c31f | 1307 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1308 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1309 | ||
28fc6740 AC |
1310 | /* Read ... */ |
1311 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1312 | /* ... Modify ... (always little endian). */ | |
1313 | memcpy (mmx_buf, buf, REGISTER_RAW_SIZE (regnum)); | |
1314 | /* ... Write. */ | |
1315 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1316 | } | |
1317 | else | |
1318 | regcache_raw_write (regcache, regnum, buf); | |
1319 | } | |
1320 | ||
d7a0d72c MK |
1321 | /* Return true iff register REGNUM's virtual format is different from |
1322 | its raw format. Note that this definition assumes that the host | |
1323 | supports IEEE 32-bit floats, since it doesn't say that SSE | |
1324 | registers need conversion. Even if we can't find a counterexample, | |
1325 | this is still sloppy. */ | |
1326 | ||
3a1e71e3 | 1327 | static int |
d7a0d72c MK |
1328 | i386_register_convertible (int regnum) |
1329 | { | |
23a34459 | 1330 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1331 | } |
1332 | ||
ac27f131 | 1333 | /* Convert data from raw format for register REGNUM in buffer FROM to |
3d261580 | 1334 | virtual format with type TYPE in buffer TO. */ |
ac27f131 | 1335 | |
3a1e71e3 | 1336 | static void |
ac27f131 MK |
1337 | i386_register_convert_to_virtual (int regnum, struct type *type, |
1338 | char *from, char *to) | |
1339 | { | |
23a34459 | 1340 | gdb_assert (i386_fp_regnum_p (regnum)); |
3d261580 MK |
1341 | |
1342 | /* We only support floating-point values. */ | |
8d7f6b4a MK |
1343 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
1344 | { | |
1345 | warning ("Cannot convert floating-point register value " | |
1346 | "to non-floating-point type."); | |
1347 | memset (to, 0, TYPE_LENGTH (type)); | |
1348 | return; | |
1349 | } | |
3d261580 | 1350 | |
c6ba6f0d MK |
1351 | /* Convert to TYPE. This should be a no-op if TYPE is equivalent to |
1352 | the extended floating-point format used by the FPU. */ | |
1353 | convert_typed_floating (from, builtin_type_i387_ext, to, type); | |
ac27f131 MK |
1354 | } |
1355 | ||
1356 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
3d261580 | 1357 | raw format for register REGNUM in buffer TO. */ |
ac27f131 | 1358 | |
3a1e71e3 | 1359 | static void |
ac27f131 MK |
1360 | i386_register_convert_to_raw (struct type *type, int regnum, |
1361 | char *from, char *to) | |
1362 | { | |
23a34459 | 1363 | gdb_assert (i386_fp_regnum_p (regnum)); |
c6ba6f0d MK |
1364 | |
1365 | /* We only support floating-point values. */ | |
1366 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
1367 | { | |
1368 | warning ("Cannot convert non-floating-point type " | |
1369 | "to floating-point register value."); | |
1370 | memset (to, 0, TYPE_LENGTH (type)); | |
1371 | return; | |
1372 | } | |
3d261580 | 1373 | |
c6ba6f0d MK |
1374 | /* Convert from TYPE. This should be a no-op if TYPE is equivalent |
1375 | to the extended floating-point format used by the FPU. */ | |
1376 | convert_typed_floating (from, type, to, builtin_type_i387_ext); | |
ac27f131 | 1377 | } |
ac27f131 | 1378 | \f |
fc338970 | 1379 | |
c906108c | 1380 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1381 | /* SunPRO encodes the static variables. This is not related to C++ |
1382 | mangling, it is done for C too. */ | |
c906108c SS |
1383 | |
1384 | char * | |
fba45db2 | 1385 | sunpro_static_transform_name (char *name) |
c906108c SS |
1386 | { |
1387 | char *p; | |
1388 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1389 | { | |
fc338970 MK |
1390 | /* For file-local statics there will be a period, a bunch of |
1391 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1392 | N_OPT), a period and the name. For function-local statics |
1393 | there will be a bunch of junk (which seems to change the | |
1394 | second character from 'A' to 'B'), a period, the name of the | |
1395 | function, and the name. So just skip everything before the | |
1396 | last period. */ | |
c906108c SS |
1397 | p = strrchr (name, '.'); |
1398 | if (p != NULL) | |
1399 | name = p + 1; | |
1400 | } | |
1401 | return name; | |
1402 | } | |
1403 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1404 | \f |
c906108c | 1405 | |
fc338970 | 1406 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1407 | |
1408 | CORE_ADDR | |
1cce71eb | 1409 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1410 | { |
fc338970 | 1411 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1412 | { |
c5aa993b | 1413 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1414 | struct minimal_symbol *indsym = |
fc338970 | 1415 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 1416 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 1417 | |
c5aa993b | 1418 | if (symname) |
c906108c | 1419 | { |
c5aa993b JM |
1420 | if (strncmp (symname, "__imp_", 6) == 0 |
1421 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1422 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1423 | } | |
1424 | } | |
fc338970 | 1425 | return 0; /* Not a trampoline. */ |
c906108c | 1426 | } |
fc338970 MK |
1427 | \f |
1428 | ||
8201327c MK |
1429 | /* Return non-zero if PC and NAME show that we are in a signal |
1430 | trampoline. */ | |
1431 | ||
1432 | static int | |
1433 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1434 | { | |
1435 | return (name && strcmp ("_sigtramp", name) == 0); | |
1436 | } | |
1437 | \f | |
1438 | ||
fc338970 MK |
1439 | /* We have two flavours of disassembly. The machinery on this page |
1440 | deals with switching between those. */ | |
c906108c SS |
1441 | |
1442 | static int | |
5e3397bb | 1443 | i386_print_insn (bfd_vma pc, disassemble_info *info) |
c906108c | 1444 | { |
5e3397bb MK |
1445 | gdb_assert (disassembly_flavor == att_flavor |
1446 | || disassembly_flavor == intel_flavor); | |
1447 | ||
1448 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1449 | constified, cast to prevent a compiler warning. */ | |
1450 | info->disassembler_options = (char *) disassembly_flavor; | |
1451 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1452 | ||
1453 | return print_insn_i386 (pc, info); | |
7a292a7a | 1454 | } |
fc338970 | 1455 | \f |
3ce1502b | 1456 | |
8201327c MK |
1457 | /* There are a few i386 architecture variants that differ only |
1458 | slightly from the generic i386 target. For now, we don't give them | |
1459 | their own source file, but include them here. As a consequence, | |
1460 | they'll always be included. */ | |
3ce1502b | 1461 | |
8201327c | 1462 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1463 | |
8201327c MK |
1464 | static int |
1465 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1466 | { |
acd5c798 MK |
1467 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
1468 | currently unknown. */ | |
8201327c MK |
1469 | return (name && (strcmp ("_sigreturn", name) == 0 |
1470 | || strcmp ("_sigacthandler", name) == 0 | |
1471 | || strcmp ("sigvechandler", name) == 0)); | |
1472 | } | |
d2a7c97a | 1473 | |
acd5c798 MK |
1474 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
1475 | routine, return the address of the associated sigcontext (ucontext) | |
1476 | structure. */ | |
3ce1502b | 1477 | |
3a1e71e3 | 1478 | static CORE_ADDR |
acd5c798 | 1479 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 1480 | { |
acd5c798 MK |
1481 | char buf[4]; |
1482 | CORE_ADDR sp; | |
3ce1502b | 1483 | |
acd5c798 MK |
1484 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
1485 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 1486 | |
acd5c798 | 1487 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
1488 | } |
1489 | \f | |
3ce1502b | 1490 | |
8201327c | 1491 | /* DJGPP. */ |
d2a7c97a | 1492 | |
8201327c MK |
1493 | static int |
1494 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1495 | { | |
1496 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1497 | return 0; | |
1498 | } | |
1499 | \f | |
d2a7c97a | 1500 | |
8201327c | 1501 | /* Generic ELF. */ |
d2a7c97a | 1502 | |
8201327c MK |
1503 | void |
1504 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1505 | { | |
1506 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1507 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1508 | } | |
3ce1502b | 1509 | |
8201327c | 1510 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1511 | |
8201327c MK |
1512 | void |
1513 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1514 | { | |
1515 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1516 | |
8201327c MK |
1517 | /* System V Release 4 uses ELF. */ |
1518 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1519 | |
dfe01d39 MK |
1520 | /* System V Release 4 has shared libraries. */ |
1521 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1522 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1523 | ||
8201327c | 1524 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 | 1525 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
1526 | tdep->sc_pc_offset = 36 + 14 * 4; |
1527 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 1528 | |
8201327c | 1529 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1530 | } |
1531 | ||
8201327c | 1532 | /* DJGPP. */ |
3ce1502b | 1533 | |
3a1e71e3 | 1534 | static void |
8201327c | 1535 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1536 | { |
8201327c | 1537 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1538 | |
8201327c | 1539 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1540 | |
8201327c | 1541 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1542 | } |
1543 | ||
8201327c | 1544 | /* NetWare. */ |
3ce1502b | 1545 | |
3a1e71e3 | 1546 | static void |
8201327c | 1547 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1548 | { |
8201327c | 1549 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1550 | |
8201327c | 1551 | tdep->jb_pc_offset = 24; |
d2a7c97a | 1552 | } |
8201327c | 1553 | \f |
2acceee2 | 1554 | |
38c968cf AC |
1555 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1556 | and "sse". */ | |
1557 | ||
1558 | static struct reggroup *i386_sse_reggroup; | |
1559 | static struct reggroup *i386_mmx_reggroup; | |
1560 | ||
1561 | static void | |
1562 | i386_init_reggroups (void) | |
1563 | { | |
1564 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1565 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1566 | } | |
1567 | ||
1568 | static void | |
1569 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1570 | { | |
1571 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1572 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1573 | reggroup_add (gdbarch, general_reggroup); | |
1574 | reggroup_add (gdbarch, float_reggroup); | |
1575 | reggroup_add (gdbarch, all_reggroup); | |
1576 | reggroup_add (gdbarch, save_reggroup); | |
1577 | reggroup_add (gdbarch, restore_reggroup); | |
1578 | reggroup_add (gdbarch, vector_reggroup); | |
1579 | reggroup_add (gdbarch, system_reggroup); | |
1580 | } | |
1581 | ||
1582 | int | |
1583 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1584 | struct reggroup *group) | |
1585 | { | |
1586 | int sse_regnum_p = (i386_sse_regnum_p (regnum) | |
1587 | || i386_mxcsr_regnum_p (regnum)); | |
1588 | int fp_regnum_p = (i386_fp_regnum_p (regnum) | |
1589 | || i386_fpc_regnum_p (regnum)); | |
1590 | int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); | |
acd5c798 | 1591 | |
38c968cf AC |
1592 | if (group == i386_mmx_reggroup) |
1593 | return mmx_regnum_p; | |
1594 | if (group == i386_sse_reggroup) | |
1595 | return sse_regnum_p; | |
1596 | if (group == vector_reggroup) | |
1597 | return (mmx_regnum_p || sse_regnum_p); | |
1598 | if (group == float_reggroup) | |
1599 | return fp_regnum_p; | |
1600 | if (group == general_reggroup) | |
1601 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 1602 | |
38c968cf AC |
1603 | return default_register_reggroup_p (gdbarch, regnum, group); |
1604 | } | |
38c968cf | 1605 | \f |
acd5c798 | 1606 | |
3a1e71e3 | 1607 | static struct gdbarch * |
a62cc96e AC |
1608 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1609 | { | |
cd3c07fc | 1610 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1611 | struct gdbarch *gdbarch; |
1612 | ||
4be87837 DJ |
1613 | /* If there is already a candidate, use it. */ |
1614 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1615 | if (arches != NULL) | |
1616 | return arches->gdbarch; | |
a62cc96e AC |
1617 | |
1618 | /* Allocate space for the new architecture. */ | |
1619 | tdep = XMALLOC (struct gdbarch_tdep); | |
1620 | gdbarch = gdbarch_alloc (&info, tdep); | |
1621 | ||
8201327c | 1622 | /* The i386 default settings don't include the SSE registers. |
356a6b3e MK |
1623 | FIXME: kettenis/20020614: They do include the FPU registers for |
1624 | now, which probably is not quite right. */ | |
8201327c | 1625 | tdep->num_xmm_regs = 0; |
d2a7c97a | 1626 | |
8201327c MK |
1627 | tdep->jb_pc_offset = -1; |
1628 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1629 | tdep->sigtramp_start = 0; |
1630 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1631 | tdep->sigcontext_addr = NULL; |
a3386186 | 1632 | tdep->sc_reg_offset = NULL; |
8201327c | 1633 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1634 | tdep->sc_sp_offset = -1; |
8201327c | 1635 | |
896fb97d MK |
1636 | /* The format used for `long double' on almost all i386 targets is |
1637 | the i387 extended floating-point format. In fact, of all targets | |
1638 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1639 | on having a `long double' that's not `long' at all. */ | |
1640 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1641 | |
66da5fd8 | 1642 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1643 | bits, a `long double' actually takes up 96, probably to enforce |
1644 | alignment. */ | |
1645 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1646 | ||
acd5c798 MK |
1647 | /* The default ABI includes general-purpose registers and |
1648 | floating-point registers. */ | |
356a6b3e | 1649 | set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS); |
acd5c798 MK |
1650 | set_gdbarch_register_name (gdbarch, i386_register_name); |
1651 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 1652 | |
acd5c798 MK |
1653 | /* Register numbers of various important registers. */ |
1654 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
1655 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
1656 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
1657 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e MK |
1658 | |
1659 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1660 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1661 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1662 | ||
1663 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1664 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1665 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1666 | ||
1667 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1668 | be in use on any of the supported i386 targets. */ | |
1669 | ||
61113f8b MK |
1670 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1671 | ||
8201327c | 1672 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1673 | |
a62cc96e | 1674 | /* Call dummy code. */ |
acd5c798 | 1675 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 1676 | |
b6197528 MK |
1677 | set_gdbarch_register_convertible (gdbarch, i386_register_convertible); |
1678 | set_gdbarch_register_convert_to_virtual (gdbarch, | |
1679 | i386_register_convert_to_virtual); | |
1680 | set_gdbarch_register_convert_to_raw (gdbarch, i386_register_convert_to_raw); | |
1681 | ||
00f8375e | 1682 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
3d7f4f49 | 1683 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1684 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1685 | i386_extract_struct_value_address); |
8201327c MK |
1686 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1687 | ||
93924b6b MK |
1688 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1689 | ||
1690 | /* Stack grows downward. */ | |
1691 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1692 | ||
1693 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1694 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1695 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1696 | |
42fdc8df | 1697 | set_gdbarch_frame_args_skip (gdbarch, 8); |
54299a1d | 1698 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); |
8201327c MK |
1699 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1700 | ||
28fc6740 | 1701 | /* Wire in the MMX registers. */ |
0f751ff2 | 1702 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
1703 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
1704 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1705 | ||
5e3397bb MK |
1706 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1707 | ||
acd5c798 MK |
1708 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
1709 | set_gdbarch_save_dummy_frame_tos (gdbarch, i386_save_dummy_frame_tos); | |
1710 | ||
1711 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
1712 | ||
38c968cf AC |
1713 | /* Add the i386 register groups. */ |
1714 | i386_add_reggroups (gdbarch); | |
1715 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1716 | ||
acd5c798 | 1717 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 1718 | |
3ce1502b | 1719 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1720 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 1721 | |
acd5c798 MK |
1722 | frame_unwind_append_predicate (gdbarch, i386_sigtramp_frame_p); |
1723 | frame_unwind_append_predicate (gdbarch, i386_frame_p); | |
1724 | ||
a62cc96e AC |
1725 | return gdbarch; |
1726 | } | |
1727 | ||
8201327c MK |
1728 | static enum gdb_osabi |
1729 | i386_coff_osabi_sniffer (bfd *abfd) | |
1730 | { | |
762c5349 MK |
1731 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1732 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1733 | return GDB_OSABI_GO32; |
1734 | ||
1735 | return GDB_OSABI_UNKNOWN; | |
1736 | } | |
1737 | ||
1738 | static enum gdb_osabi | |
1739 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1740 | { | |
1741 | return GDB_OSABI_NETWARE; | |
1742 | } | |
1743 | \f | |
1744 | ||
28e9e0f0 MK |
1745 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1746 | void _initialize_i386_tdep (void); | |
1747 | ||
c906108c | 1748 | void |
fba45db2 | 1749 | _initialize_i386_tdep (void) |
c906108c | 1750 | { |
a62cc96e AC |
1751 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1752 | ||
fc338970 | 1753 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1754 | { |
1755 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1756 | |
917317f4 JM |
1757 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1758 | valid_flavors, | |
1ed2a135 | 1759 | &disassembly_flavor, |
fc338970 MK |
1760 | "\ |
1761 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1762 | and the default value is \"att\".", |
917317f4 | 1763 | &setlist); |
917317f4 JM |
1764 | add_show_from_set (new_cmd, &showlist); |
1765 | } | |
8201327c MK |
1766 | |
1767 | /* Add the variable that controls the convention for returning | |
1768 | structs. */ | |
1769 | { | |
1770 | struct cmd_list_element *new_cmd; | |
1771 | ||
1772 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1773 | valid_conventions, |
8201327c MK |
1774 | &struct_convention, "\ |
1775 | Set the convention for returning small structs, valid values \ | |
1776 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1777 | &setlist); | |
1778 | add_show_from_set (new_cmd, &showlist); | |
1779 | } | |
1780 | ||
1781 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1782 | i386_coff_osabi_sniffer); | |
1783 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1784 | i386_nlm_osabi_sniffer); | |
1785 | ||
05816f70 | 1786 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 1787 | i386_svr4_init_abi); |
05816f70 | 1788 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 1789 | i386_go32_init_abi); |
05816f70 | 1790 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 1791 | i386_nw_init_abi); |
38c968cf AC |
1792 | |
1793 | /* Initialize the i386 specific register groups. */ | |
1794 | i386_init_reggroups (); | |
c906108c | 1795 | } |