2001-04-19 Andreas Jaeger <aj@suse.de>
[deliverable/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c 1/* Intel 386 target-dependent stuff.
b6ba6518
KB
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001
c906108c
SS
4 Free Software Foundation, Inc.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "gdb_string.h"
25#include "frame.h"
26#include "inferior.h"
27#include "gdbcore.h"
28#include "target.h"
29#include "floatformat.h"
30#include "symtab.h"
31#include "gdbcmd.h"
32#include "command.h"
b4a20239 33#include "arch-utils.h"
4e052eda 34#include "regcache.h"
c906108c 35
917317f4
JM
36/* i386_register_byte[i] is the offset into the register file of the
37 start of register number i. We initialize this from
38 i386_register_raw_size. */
39int i386_register_byte[MAX_NUM_REGS];
40
ceb4951f
JB
41/* i386_register_raw_size[i] is the number of bytes of storage in
42 GDB's register array occupied by register i. */
917317f4
JM
43int i386_register_raw_size[MAX_NUM_REGS] = {
44 4, 4, 4, 4,
45 4, 4, 4, 4,
46 4, 4, 4, 4,
47 4, 4, 4, 4,
48 10, 10, 10, 10,
49 10, 10, 10, 10,
50 4, 4, 4, 4,
51 4, 4, 4, 4,
52 16, 16, 16, 16,
53 16, 16, 16, 16,
54 4
55};
56
57/* i386_register_virtual_size[i] is the size in bytes of the virtual
58 type of register i. */
59int i386_register_virtual_size[MAX_NUM_REGS];
fc338970 60\f
917317f4 61
fc338970
MK
62/* This is the variable that is set with "set disassembly-flavor", and
63 its legitimate values. */
53904c9e
AC
64static const char att_flavor[] = "att";
65static const char intel_flavor[] = "intel";
66static const char *valid_flavors[] =
c5aa993b 67{
c906108c
SS
68 att_flavor,
69 intel_flavor,
70 NULL
71};
53904c9e 72static const char *disassembly_flavor = att_flavor;
c906108c 73
fc338970
MK
74/* This is used to keep the bfd arch_info in sync with the disassembly
75 flavor. */
a14ed312
KB
76static void set_disassembly_flavor_sfunc (char *, int,
77 struct cmd_list_element *);
78static void set_disassembly_flavor (void);
fc338970
MK
79\f
80
81/* Stdio style buffering was used to minimize calls to ptrace, but
82 this buffering did not take into account that the code section
83 being accessed may not be an even number of buffers long (even if
84 the buffer is only sizeof(int) long). In cases where the code
85 section size happened to be a non-integral number of buffers long,
86 attempting to read the last buffer would fail. Simply using
87 target_read_memory and ignoring errors, rather than read_memory, is
88 not the correct solution, since legitimate access errors would then
89 be totally ignored. To properly handle this situation and continue
90 to use buffering would require that this code be able to determine
91 the minimum code section size granularity (not the alignment of the
92 section itself, since the actual failing case that pointed out this
93 problem had a section alignment of 4 but was not a multiple of 4
94 bytes long), on a target by target basis, and then adjust it's
95 buffer size accordingly. This is messy, but potentially feasible.
96 It probably needs the bfd library's help and support. For now, the
97 buffer size is set to 1. (FIXME -fnf) */
98
99#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
c906108c
SS
100static CORE_ADDR codestream_next_addr;
101static CORE_ADDR codestream_addr;
102static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
103static int codestream_off;
104static int codestream_cnt;
105
106#define codestream_tell() (codestream_addr + codestream_off)
fc338970
MK
107#define codestream_peek() \
108 (codestream_cnt == 0 ? \
109 codestream_fill(1) : codestream_buf[codestream_off])
110#define codestream_get() \
111 (codestream_cnt-- == 0 ? \
112 codestream_fill(0) : codestream_buf[codestream_off++])
c906108c 113
c5aa993b 114static unsigned char
fba45db2 115codestream_fill (int peek_flag)
c906108c
SS
116{
117 codestream_addr = codestream_next_addr;
118 codestream_next_addr += CODESTREAM_BUFSIZ;
119 codestream_off = 0;
120 codestream_cnt = CODESTREAM_BUFSIZ;
121 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 122
c906108c 123 if (peek_flag)
c5aa993b 124 return (codestream_peek ());
c906108c 125 else
c5aa993b 126 return (codestream_get ());
c906108c
SS
127}
128
129static void
fba45db2 130codestream_seek (CORE_ADDR place)
c906108c
SS
131{
132 codestream_next_addr = place / CODESTREAM_BUFSIZ;
133 codestream_next_addr *= CODESTREAM_BUFSIZ;
134 codestream_cnt = 0;
135 codestream_fill (1);
c5aa993b 136 while (codestream_tell () != place)
c906108c
SS
137 codestream_get ();
138}
139
140static void
fba45db2 141codestream_read (unsigned char *buf, int count)
c906108c
SS
142{
143 unsigned char *p;
144 int i;
145 p = buf;
146 for (i = 0; i < count; i++)
147 *p++ = codestream_get ();
148}
fc338970 149\f
c906108c 150
fc338970 151/* If the next instruction is a jump, move to its target. */
c906108c
SS
152
153static void
fba45db2 154i386_follow_jump (void)
c906108c
SS
155{
156 unsigned char buf[4];
157 long delta;
158
159 int data16;
160 CORE_ADDR pos;
161
162 pos = codestream_tell ();
163
164 data16 = 0;
165 if (codestream_peek () == 0x66)
166 {
167 codestream_get ();
168 data16 = 1;
169 }
170
171 switch (codestream_get ())
172 {
173 case 0xe9:
fc338970 174 /* Relative jump: if data16 == 0, disp32, else disp16. */
c906108c
SS
175 if (data16)
176 {
177 codestream_read (buf, 2);
178 delta = extract_signed_integer (buf, 2);
179
fc338970
MK
180 /* Include the size of the jmp instruction (including the
181 0x66 prefix). */
c5aa993b 182 pos += delta + 4;
c906108c
SS
183 }
184 else
185 {
186 codestream_read (buf, 4);
187 delta = extract_signed_integer (buf, 4);
188
189 pos += delta + 5;
190 }
191 break;
192 case 0xeb:
fc338970 193 /* Relative jump, disp8 (ignore data16). */
c906108c
SS
194 codestream_read (buf, 1);
195 /* Sign-extend it. */
196 delta = extract_signed_integer (buf, 1);
197
198 pos += delta + 2;
199 break;
200 }
201 codestream_seek (pos);
202}
203
fc338970
MK
204/* Find & return the amount a local space allocated, and advance the
205 codestream to the first register push (if any).
206
207 If the entry sequence doesn't make sense, return -1, and leave
208 codestream pointer at a random spot. */
c906108c
SS
209
210static long
fba45db2 211i386_get_frame_setup (CORE_ADDR pc)
c906108c
SS
212{
213 unsigned char op;
214
215 codestream_seek (pc);
216
217 i386_follow_jump ();
218
219 op = codestream_get ();
220
221 if (op == 0x58) /* popl %eax */
222 {
fc338970
MK
223 /* This function must start with
224
225 popl %eax 0x58
226 xchgl %eax, (%esp) 0x87 0x04 0x24
227 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
228
229 (the System V compiler puts out the second `xchg'
230 instruction, and the assembler doesn't try to optimize it, so
231 the 'sib' form gets generated). This sequence is used to get
232 the address of the return buffer for a function that returns
233 a structure. */
c906108c
SS
234 int pos;
235 unsigned char buf[4];
fc338970
MK
236 static unsigned char proto1[3] = { 0x87, 0x04, 0x24 };
237 static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
238
c906108c
SS
239 pos = codestream_tell ();
240 codestream_read (buf, 4);
241 if (memcmp (buf, proto1, 3) == 0)
242 pos += 3;
243 else if (memcmp (buf, proto2, 4) == 0)
244 pos += 4;
245
246 codestream_seek (pos);
fc338970 247 op = codestream_get (); /* Update next opcode. */
c906108c
SS
248 }
249
250 if (op == 0x68 || op == 0x6a)
251 {
fc338970
MK
252 /* This function may start with
253
254 pushl constant
255 call _probe
256 addl $4, %esp
257
258 followed by
259
260 pushl %ebp
261
262 etc. */
c906108c
SS
263 int pos;
264 unsigned char buf[8];
265
fc338970 266 /* Skip past the `pushl' instruction; it has either a one-byte
c906108c
SS
267 or a four-byte operand, depending on the opcode. */
268 pos = codestream_tell ();
269 if (op == 0x68)
270 pos += 4;
271 else
272 pos += 1;
273 codestream_seek (pos);
274
fc338970
MK
275 /* Read the following 8 bytes, which should be "call _probe" (6
276 bytes) followed by "addl $4,%esp" (2 bytes). */
c906108c
SS
277 codestream_read (buf, sizeof (buf));
278 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
279 pos += sizeof (buf);
280 codestream_seek (pos);
fc338970 281 op = codestream_get (); /* Update next opcode. */
c906108c
SS
282 }
283
284 if (op == 0x55) /* pushl %ebp */
c5aa993b 285 {
fc338970 286 /* Check for "movl %esp, %ebp" -- can be written in two ways. */
c906108c
SS
287 switch (codestream_get ())
288 {
289 case 0x8b:
290 if (codestream_get () != 0xec)
fc338970 291 return -1;
c906108c
SS
292 break;
293 case 0x89:
294 if (codestream_get () != 0xe5)
fc338970 295 return -1;
c906108c
SS
296 break;
297 default:
fc338970 298 return -1;
c906108c 299 }
fc338970
MK
300 /* Check for stack adjustment
301
302 subl $XXX, %esp
303
304 NOTE: You can't subtract a 16 bit immediate from a 32 bit
305 reg, so we don't have to worry about a data16 prefix. */
c906108c
SS
306 op = codestream_peek ();
307 if (op == 0x83)
308 {
fc338970 309 /* `subl' with 8 bit immediate. */
c906108c
SS
310 codestream_get ();
311 if (codestream_get () != 0xec)
fc338970 312 /* Some instruction starting with 0x83 other than `subl'. */
c906108c
SS
313 {
314 codestream_seek (codestream_tell () - 2);
315 return 0;
316 }
fc338970
MK
317 /* `subl' with signed byte immediate (though it wouldn't
318 make sense to be negative). */
c5aa993b 319 return (codestream_get ());
c906108c
SS
320 }
321 else if (op == 0x81)
322 {
323 char buf[4];
fc338970 324 /* Maybe it is `subl' with a 32 bit immedediate. */
c5aa993b 325 codestream_get ();
c906108c 326 if (codestream_get () != 0xec)
fc338970 327 /* Some instruction starting with 0x81 other than `subl'. */
c906108c
SS
328 {
329 codestream_seek (codestream_tell () - 2);
330 return 0;
331 }
fc338970 332 /* It is `subl' with a 32 bit immediate. */
c5aa993b 333 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
334 return extract_signed_integer (buf, 4);
335 }
336 else
337 {
fc338970 338 return 0;
c906108c
SS
339 }
340 }
341 else if (op == 0xc8)
342 {
343 char buf[2];
fc338970 344 /* `enter' with 16 bit unsigned immediate. */
c5aa993b 345 codestream_read ((unsigned char *) buf, 2);
fc338970 346 codestream_get (); /* Flush final byte of enter instruction. */
c906108c
SS
347 return extract_unsigned_integer (buf, 2);
348 }
349 return (-1);
350}
351
c833a37e
MK
352/* Return the chain-pointer for FRAME. In the case of the i386, the
353 frame's nominal address is the address of a 4-byte word containing
354 the calling frame's address. */
355
356CORE_ADDR
357i386_frame_chain (struct frame_info *frame)
358{
359 if (frame->signal_handler_caller)
360 return frame->frame;
361
362 if (! inside_entry_file (frame->pc))
363 return read_memory_unsigned_integer (frame->frame, 4);
364
365 return 0;
366}
367
ed84f6c1
MK
368/* Immediately after a function call, return the saved pc. */
369
370CORE_ADDR
371i386_saved_pc_after_call (struct frame_info *frame)
372{
373 return read_memory_unsigned_integer (read_register (SP_REGNUM), 4);
374}
375
c906108c
SS
376/* Return number of args passed to a frame.
377 Can return -1, meaning no way to tell. */
378
379int
fba45db2 380i386_frame_num_args (struct frame_info *fi)
c906108c
SS
381{
382#if 1
383 return -1;
384#else
385 /* This loses because not only might the compiler not be popping the
fc338970
MK
386 args right after the function call, it might be popping args from
387 both this call and a previous one, and we would say there are
388 more args than there really are. */
c906108c 389
c5aa993b
JM
390 int retpc;
391 unsigned char op;
c906108c
SS
392 struct frame_info *pfi;
393
fc338970 394 /* On the i386, the instruction following the call could be:
c906108c
SS
395 popl %ecx - one arg
396 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
fc338970 397 anything else - zero args. */
c906108c
SS
398
399 int frameless;
400
392a587b 401 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c 402 if (frameless)
fc338970
MK
403 /* In the absence of a frame pointer, GDB doesn't get correct
404 values for nameless arguments. Return -1, so it doesn't print
405 any nameless arguments. */
c906108c
SS
406 return -1;
407
c5aa993b 408 pfi = get_prev_frame (fi);
c906108c
SS
409 if (pfi == 0)
410 {
fc338970
MK
411 /* NOTE: This can happen if we are looking at the frame for
412 main, because FRAME_CHAIN_VALID won't let us go into start.
413 If we have debugging symbols, that's not really a big deal;
414 it just means it will only show as many arguments to main as
415 are declared. */
c906108c
SS
416 return -1;
417 }
418 else
419 {
c5aa993b
JM
420 retpc = pfi->pc;
421 op = read_memory_integer (retpc, 1);
fc338970 422 if (op == 0x59) /* pop %ecx */
c5aa993b 423 return 1;
c906108c
SS
424 else if (op == 0x83)
425 {
c5aa993b
JM
426 op = read_memory_integer (retpc + 1, 1);
427 if (op == 0xc4)
428 /* addl $<signed imm 8 bits>, %esp */
429 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
430 else
431 return 0;
432 }
fc338970
MK
433 else if (op == 0x81) /* `add' with 32 bit immediate. */
434 {
c5aa993b
JM
435 op = read_memory_integer (retpc + 1, 1);
436 if (op == 0xc4)
437 /* addl $<imm 32>, %esp */
438 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
439 else
440 return 0;
441 }
442 else
443 {
444 return 0;
445 }
446 }
447#endif
448}
449
fc338970
MK
450/* Parse the first few instructions the function to see what registers
451 were stored.
452
453 We handle these cases:
454
455 The startup sequence can be at the start of the function, or the
456 function can start with a branch to startup code at the end.
457
458 %ebp can be set up with either the 'enter' instruction, or "pushl
459 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
460 once used in the System V compiler).
461
462 Local space is allocated just below the saved %ebp by either the
463 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
464 bit unsigned argument for space to allocate, and the 'addl'
465 instruction could have either a signed byte, or 32 bit immediate.
466
467 Next, the registers used by this function are pushed. With the
468 System V compiler they will always be in the order: %edi, %esi,
469 %ebx (and sometimes a harmless bug causes it to also save but not
470 restore %eax); however, the code below is willing to see the pushes
471 in any order, and will handle up to 8 of them.
472
473 If the setup sequence is at the end of the function, then the next
474 instruction will be a branch back to the start. */
c906108c
SS
475
476void
fba45db2 477i386_frame_init_saved_regs (struct frame_info *fip)
c906108c
SS
478{
479 long locals = -1;
480 unsigned char op;
481 CORE_ADDR dummy_bottom;
fc338970 482 CORE_ADDR addr;
c906108c
SS
483 CORE_ADDR pc;
484 int i;
c5aa993b 485
1211c4e4
AC
486 if (fip->saved_regs)
487 return;
488
489 frame_saved_regs_zalloc (fip);
c5aa993b 490
fc338970
MK
491 /* If the frame is the end of a dummy, compute where the beginning
492 would be. */
c906108c 493 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 494
fc338970 495 /* Check if the PC points in the stack, in a dummy frame. */
c5aa993b 496 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c 497 {
fc338970
MK
498 /* All registers were saved by push_call_dummy. */
499 addr = fip->frame;
c5aa993b 500 for (i = 0; i < NUM_REGS; i++)
c906108c 501 {
fc338970
MK
502 addr -= REGISTER_RAW_SIZE (i);
503 fip->saved_regs[i] = addr;
c906108c
SS
504 }
505 return;
506 }
c5aa993b 507
c906108c
SS
508 pc = get_pc_function_start (fip->pc);
509 if (pc != 0)
510 locals = i386_get_frame_setup (pc);
c5aa993b
JM
511
512 if (locals >= 0)
c906108c 513 {
fc338970 514 addr = fip->frame - 4 - locals;
c5aa993b 515 for (i = 0; i < 8; i++)
c906108c
SS
516 {
517 op = codestream_get ();
518 if (op < 0x50 || op > 0x57)
519 break;
520#ifdef I386_REGNO_TO_SYMMETRY
521 /* Dynix uses different internal numbering. Ick. */
fc338970 522 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr;
c906108c 523#else
fc338970 524 fip->saved_regs[op - 0x50] = addr;
c906108c 525#endif
fc338970 526 addr -= 4;
c906108c
SS
527 }
528 }
c5aa993b 529
1211c4e4
AC
530 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
531 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
532}
533
fc338970 534/* Return PC of first real instruction. */
c906108c
SS
535
536int
fba45db2 537i386_skip_prologue (int pc)
c906108c
SS
538{
539 unsigned char op;
540 int i;
c5aa993b 541 static unsigned char pic_pat[6] =
fc338970
MK
542 { 0xe8, 0, 0, 0, 0, /* call 0x0 */
543 0x5b, /* popl %ebx */
c5aa993b 544 };
c906108c 545 CORE_ADDR pos;
c5aa993b 546
c906108c
SS
547 if (i386_get_frame_setup (pc) < 0)
548 return (pc);
c5aa993b 549
fc338970
MK
550 /* Found valid frame setup -- codestream now points to start of push
551 instructions for saving registers. */
c5aa993b 552
fc338970 553 /* Skip over register saves. */
c906108c
SS
554 for (i = 0; i < 8; i++)
555 {
556 op = codestream_peek ();
fc338970 557 /* Break if not `pushl' instrunction. */
c5aa993b 558 if (op < 0x50 || op > 0x57)
c906108c
SS
559 break;
560 codestream_get ();
561 }
562
fc338970
MK
563 /* The native cc on SVR4 in -K PIC mode inserts the following code
564 to get the address of the global offset table (GOT) into register
565 %ebx
566
567 call 0x0
568 popl %ebx
569 movl %ebx,x(%ebp) (optional)
570 addl y,%ebx
571
c906108c
SS
572 This code is with the rest of the prologue (at the end of the
573 function), so we have to skip it to get to the first real
574 instruction at the start of the function. */
c5aa993b 575
c906108c
SS
576 pos = codestream_tell ();
577 for (i = 0; i < 6; i++)
578 {
579 op = codestream_get ();
c5aa993b 580 if (pic_pat[i] != op)
c906108c
SS
581 break;
582 }
583 if (i == 6)
584 {
585 unsigned char buf[4];
586 long delta = 6;
587
588 op = codestream_get ();
c5aa993b 589 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
590 {
591 op = codestream_get ();
fc338970 592 if (op == 0x5d) /* One byte offset from %ebp. */
c906108c
SS
593 {
594 delta += 3;
595 codestream_read (buf, 1);
596 }
fc338970 597 else if (op == 0x9d) /* Four byte offset from %ebp. */
c906108c
SS
598 {
599 delta += 6;
600 codestream_read (buf, 4);
601 }
fc338970 602 else /* Unexpected instruction. */
c5aa993b
JM
603 delta = -1;
604 op = codestream_get ();
c906108c 605 }
c5aa993b
JM
606 /* addl y,%ebx */
607 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 608 {
c5aa993b 609 pos += delta + 6;
c906108c
SS
610 }
611 }
612 codestream_seek (pos);
c5aa993b 613
c906108c 614 i386_follow_jump ();
c5aa993b 615
c906108c
SS
616 return (codestream_tell ());
617}
618
619void
fba45db2 620i386_push_dummy_frame (void)
c906108c
SS
621{
622 CORE_ADDR sp = read_register (SP_REGNUM);
623 int regnum;
624 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 625
c906108c
SS
626 sp = push_word (sp, read_register (PC_REGNUM));
627 sp = push_word (sp, read_register (FP_REGNUM));
628 write_register (FP_REGNUM, sp);
629 for (regnum = 0; regnum < NUM_REGS; regnum++)
630 {
631 read_register_gen (regnum, regbuf);
632 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
633 }
634 write_register (SP_REGNUM, sp);
635}
636
a7769679
MK
637/* Insert the (relative) function address into the call sequence
638 stored at DYMMY. */
639
640void
641i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
642 value_ptr *args, struct type *type, int gcc_p)
643{
644 int from, to, delta, loc;
645
646 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
647 from = loc + 5;
648 to = (int)(fun);
649 delta = to - from;
650
651 *((char *)(dummy) + 1) = (delta & 0xff);
652 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
653 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
654 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
655}
656
c906108c 657void
fba45db2 658i386_pop_frame (void)
c906108c
SS
659{
660 struct frame_info *frame = get_current_frame ();
661 CORE_ADDR fp;
662 int regnum;
c906108c 663 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 664
c906108c 665 fp = FRAME_FP (frame);
1211c4e4
AC
666 i386_frame_init_saved_regs (frame);
667
c5aa993b 668 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c 669 {
fc338970
MK
670 CORE_ADDR addr;
671 addr = frame->saved_regs[regnum];
672 if (addr)
c906108c 673 {
fc338970 674 read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum));
c906108c
SS
675 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
676 REGISTER_RAW_SIZE (regnum));
677 }
678 }
679 write_register (FP_REGNUM, read_memory_integer (fp, 4));
680 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
681 write_register (SP_REGNUM, fp + 8);
682 flush_cached_frames ();
683}
fc338970 684\f
c906108c
SS
685
686#ifdef GET_LONGJMP_TARGET
687
fc338970
MK
688/* Figure out where the longjmp will land. Slurp the args out of the
689 stack. We expect the first arg to be a pointer to the jmp_buf
690 structure from which we extract the pc (JB_PC) that we will land
691 at. The pc is copied into PC. This routine returns true on
692 success. */
c906108c
SS
693
694int
fba45db2 695get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
696{
697 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
698 CORE_ADDR sp, jb_addr;
699
700 sp = read_register (SP_REGNUM);
701
fc338970 702 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */
c906108c
SS
703 buf,
704 TARGET_PTR_BIT / TARGET_CHAR_BIT))
705 return 0;
706
707 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
708
709 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
710 TARGET_PTR_BIT / TARGET_CHAR_BIT))
711 return 0;
712
713 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
714
715 return 1;
716}
717
718#endif /* GET_LONGJMP_TARGET */
fc338970 719\f
c906108c 720
22f8ba57
MK
721CORE_ADDR
722i386_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
723 int struct_return, CORE_ADDR struct_addr)
724{
725 sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr);
726
727 if (struct_return)
728 {
729 char buf[4];
730
731 sp -= 4;
732 store_address (buf, 4, struct_addr);
733 write_memory (sp, buf, 4);
734 }
735
736 return sp;
737}
738
739void
740i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
741{
742 /* Do nothing. Everything was already done by i386_push_arguments. */
743}
744
1a309862
MK
745/* These registers are used for returning integers (and on some
746 targets also for returning `struct' and `union' values when their
ef9dff19 747 size and alignment match an integer type). */
1a309862
MK
748#define LOW_RETURN_REGNUM 0 /* %eax */
749#define HIGH_RETURN_REGNUM 2 /* %edx */
750
751/* Extract from an array REGBUF containing the (raw) register state, a
752 function return value of TYPE, and copy that, in virtual format,
753 into VALBUF. */
754
c906108c 755void
1a309862 756i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 757{
1a309862
MK
758 int len = TYPE_LENGTH (type);
759
1e8d0a7b
MK
760 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
761 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
762 {
763 i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf);
764 return;
765 }
1e8d0a7b
MK
766
767 if (TYPE_CODE (type) == TYPE_CODE_FLT)
c906108c 768 {
1a309862
MK
769 if (NUM_FREGS == 0)
770 {
771 warning ("Cannot find floating-point return value.");
772 memset (valbuf, 0, len);
ef9dff19 773 return;
1a309862
MK
774 }
775
776 /* Floating-point return values can be found in %st(0). */
777 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
778 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
779 {
780 /* Copy straight over, but take care of the padding. */
781 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
782 FPU_REG_RAW_SIZE);
783 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
784 }
785 else
786 {
787 /* Convert the extended floating-point number found in
788 %st(0) to the desired type. This is probably not exactly
789 how it would happen on the target itself, but it is the
790 best we can do. */
791 DOUBLEST val;
792 floatformat_to_doublest (&floatformat_i387_ext,
793 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
794 store_floating (valbuf, TYPE_LENGTH (type), val);
795 }
c906108c
SS
796 }
797 else
c5aa993b 798 {
d4f3574e
SS
799 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
800 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
801
802 if (len <= low_size)
1a309862 803 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
d4f3574e
SS
804 else if (len <= (low_size + high_size))
805 {
806 memcpy (valbuf,
1a309862 807 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
d4f3574e 808 memcpy (valbuf + low_size,
1a309862 809 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
d4f3574e
SS
810 }
811 else
8e65ff28
AC
812 internal_error (__FILE__, __LINE__,
813 "Cannot extract return value of %d bytes long.", len);
c906108c
SS
814 }
815}
816
ef9dff19
MK
817/* Write into the appropriate registers a function return value stored
818 in VALBUF of type TYPE, given in virtual format. */
819
820void
821i386_store_return_value (struct type *type, char *valbuf)
822{
823 int len = TYPE_LENGTH (type);
824
1e8d0a7b
MK
825 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
826 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
827 {
828 i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf);
829 return;
830 }
1e8d0a7b
MK
831
832 if (TYPE_CODE (type) == TYPE_CODE_FLT)
ef9dff19
MK
833 {
834 if (NUM_FREGS == 0)
835 {
836 warning ("Cannot set floating-point return value.");
837 return;
838 }
839
840 /* Floating-point return values can be found in %st(0). */
841 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
842 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
843 {
844 /* Copy straight over. */
845 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
846 FPU_REG_RAW_SIZE);
847 }
848 else
849 {
850 char buf[FPU_REG_RAW_SIZE];
851 DOUBLEST val;
852
853 /* Convert the value found in VALBUF to the extended
854 floating point format used by the FPU. This is probably
855 not exactly how it would happen on the target itself, but
856 it is the best we can do. */
857 val = extract_floating (valbuf, TYPE_LENGTH (type));
858 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
859 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
860 FPU_REG_RAW_SIZE);
861 }
862 }
863 else
864 {
865 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
866 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
867
868 if (len <= low_size)
869 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len);
870 else if (len <= (low_size + high_size))
871 {
872 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM),
873 valbuf, low_size);
874 write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM),
875 valbuf + low_size, len - low_size);
876 }
877 else
8e65ff28
AC
878 internal_error (__FILE__, __LINE__,
879 "Cannot store return value of %d bytes long.", len);
ef9dff19
MK
880 }
881}
f7af9647
MK
882
883/* Extract from an array REGBUF containing the (raw) register state
884 the address in which a function should return its structure value,
885 as a CORE_ADDR. */
886
887CORE_ADDR
888i386_extract_struct_value_address (char *regbuf)
889{
890 return extract_address (&regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)],
891 REGISTER_RAW_SIZE (LOW_RETURN_REGNUM));
892}
fc338970 893\f
ef9dff19 894
ac27f131
MK
895/* Convert data from raw format for register REGNUM in buffer FROM to
896 virtual format with type TYPE in buffer TO. In principle both
897 formats are identical except that the virtual format has two extra
898 bytes appended that aren't used. We set these to zero. */
899
900void
901i386_register_convert_to_virtual (int regnum, struct type *type,
902 char *from, char *to)
903{
904 /* Copy straight over, but take care of the padding. */
905 memcpy (to, from, FPU_REG_RAW_SIZE);
906 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
907}
908
909/* Convert data from virtual format with type TYPE in buffer FROM to
910 raw format for register REGNUM in buffer TO. Simply omit the two
911 unused bytes. */
912
913void
914i386_register_convert_to_raw (struct type *type, int regnum,
915 char *from, char *to)
916{
917 memcpy (to, from, FPU_REG_RAW_SIZE);
918}
ac27f131 919\f
fc338970 920
c906108c 921#ifdef I386V4_SIGTRAMP_SAVED_PC
fc338970
MK
922/* Get saved user PC for sigtramp from the pushed ucontext on the
923 stack for all three variants of SVR4 sigtramps. */
c906108c
SS
924
925CORE_ADDR
fba45db2 926i386v4_sigtramp_saved_pc (struct frame_info *frame)
c906108c
SS
927{
928 CORE_ADDR saved_pc_offset = 4;
929 char *name = NULL;
930
931 find_pc_partial_function (frame->pc, &name, NULL, NULL);
932 if (name)
933 {
934 if (STREQ (name, "_sigreturn"))
935 saved_pc_offset = 132 + 14 * 4;
936 else if (STREQ (name, "_sigacthandler"))
937 saved_pc_offset = 80 + 14 * 4;
938 else if (STREQ (name, "sigvechandler"))
939 saved_pc_offset = 120 + 14 * 4;
940 }
941
942 if (frame->next)
943 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
944 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
945}
946#endif /* I386V4_SIGTRAMP_SAVED_PC */
fc338970 947\f
a0b3c4fd 948
c906108c 949#ifdef STATIC_TRANSFORM_NAME
fc338970
MK
950/* SunPRO encodes the static variables. This is not related to C++
951 mangling, it is done for C too. */
c906108c
SS
952
953char *
fba45db2 954sunpro_static_transform_name (char *name)
c906108c
SS
955{
956 char *p;
957 if (IS_STATIC_TRANSFORM_NAME (name))
958 {
fc338970
MK
959 /* For file-local statics there will be a period, a bunch of
960 junk (the contents of which match a string given in the
c5aa993b
JM
961 N_OPT), a period and the name. For function-local statics
962 there will be a bunch of junk (which seems to change the
963 second character from 'A' to 'B'), a period, the name of the
964 function, and the name. So just skip everything before the
965 last period. */
c906108c
SS
966 p = strrchr (name, '.');
967 if (p != NULL)
968 name = p + 1;
969 }
970 return name;
971}
972#endif /* STATIC_TRANSFORM_NAME */
fc338970 973\f
c906108c 974
fc338970 975/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
c906108c
SS
976
977CORE_ADDR
fba45db2 978skip_trampoline_code (CORE_ADDR pc, char *name)
c906108c 979{
fc338970 980 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 981 {
c5aa993b 982 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 983 struct minimal_symbol *indsym =
fc338970 984 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
c5aa993b 985 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 986
c5aa993b 987 if (symname)
c906108c 988 {
c5aa993b
JM
989 if (strncmp (symname, "__imp_", 6) == 0
990 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
991 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
992 }
993 }
fc338970 994 return 0; /* Not a trampoline. */
c906108c 995}
fc338970
MK
996\f
997
998/* We have two flavours of disassembly. The machinery on this page
999 deals with switching between those. */
c906108c
SS
1000
1001static int
fba45db2 1002gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
1003{
1004 if (disassembly_flavor == att_flavor)
1005 return print_insn_i386_att (memaddr, info);
1006 else if (disassembly_flavor == intel_flavor)
1007 return print_insn_i386_intel (memaddr, info);
fc338970
MK
1008 /* Never reached -- disassembly_flavour is always either att_flavor
1009 or intel_flavor. */
e1e9e218 1010 internal_error (__FILE__, __LINE__, "failed internal consistency check");
7a292a7a
SS
1011}
1012
fc338970
MK
1013/* If the disassembly mode is intel, we have to also switch the bfd
1014 mach_type. This function is run in the set disassembly_flavor
7a292a7a
SS
1015 command, and does that. */
1016
1017static void
fba45db2
KB
1018set_disassembly_flavor_sfunc (char *args, int from_tty,
1019 struct cmd_list_element *c)
7a292a7a
SS
1020{
1021 set_disassembly_flavor ();
7a292a7a
SS
1022}
1023
1024static void
fba45db2 1025set_disassembly_flavor (void)
7a292a7a
SS
1026{
1027 if (disassembly_flavor == att_flavor)
1028 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
1029 else if (disassembly_flavor == intel_flavor)
fc338970
MK
1030 set_architecture_from_arch_mach (bfd_arch_i386,
1031 bfd_mach_i386_i386_intel_syntax);
c906108c 1032}
fc338970 1033\f
2acceee2 1034
28e9e0f0
MK
1035/* Provide a prototype to silence -Wmissing-prototypes. */
1036void _initialize_i386_tdep (void);
1037
c906108c 1038void
fba45db2 1039_initialize_i386_tdep (void)
c906108c 1040{
917317f4
JM
1041 /* Initialize the table saying where each register starts in the
1042 register file. */
1043 {
1044 int i, offset;
1045
1046 offset = 0;
1047 for (i = 0; i < MAX_NUM_REGS; i++)
1048 {
1049 i386_register_byte[i] = offset;
1050 offset += i386_register_raw_size[i];
1051 }
1052 }
1053
1054 /* Initialize the table of virtual register sizes. */
1055 {
1056 int i;
1057
1058 for (i = 0; i < MAX_NUM_REGS; i++)
1059 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
1060 }
c5aa993b 1061
c906108c
SS
1062 tm_print_insn = gdb_print_insn_i386;
1063 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1064
fc338970 1065 /* Add the variable that controls the disassembly flavor. */
917317f4
JM
1066 {
1067 struct cmd_list_element *new_cmd;
7a292a7a 1068
917317f4
JM
1069 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1070 valid_flavors,
1ed2a135 1071 &disassembly_flavor,
fc338970
MK
1072 "\
1073Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1074and the default value is \"att\".",
917317f4
JM
1075 &setlist);
1076 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1077 add_show_from_set (new_cmd, &showlist);
1078 }
c5aa993b 1079
7a292a7a 1080 /* Finally, initialize the disassembly flavor to the default given
fc338970 1081 in the disassembly_flavor variable. */
7a292a7a 1082 set_disassembly_flavor ();
c906108c 1083}
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