Commit | Line | Data |
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c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4 | 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. | |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "gdb_string.h" | |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
27 | #include "gdbcore.h" | |
dfe01d39 | 28 | #include "objfiles.h" |
c906108c SS |
29 | #include "target.h" |
30 | #include "floatformat.h" | |
c0d1d883 | 31 | #include "symfile.h" |
c906108c SS |
32 | #include "symtab.h" |
33 | #include "gdbcmd.h" | |
34 | #include "command.h" | |
b4a20239 | 35 | #include "arch-utils.h" |
4e052eda | 36 | #include "regcache.h" |
d16aafd8 | 37 | #include "doublest.h" |
fd0407d6 | 38 | #include "value.h" |
3d261580 | 39 | #include "gdb_assert.h" |
38c968cf | 40 | #include "reggroups.h" |
3d261580 | 41 | |
d2a7c97a | 42 | #include "i386-tdep.h" |
61113f8b | 43 | #include "i387-tdep.h" |
d2a7c97a | 44 | |
fc633446 MK |
45 | /* Names of the registers. The first 10 registers match the register |
46 | numbering scheme used by GCC for stabs and DWARF. */ | |
47 | static char *i386_register_names[] = | |
48 | { | |
49 | "eax", "ecx", "edx", "ebx", | |
50 | "esp", "ebp", "esi", "edi", | |
51 | "eip", "eflags", "cs", "ss", | |
52 | "ds", "es", "fs", "gs", | |
53 | "st0", "st1", "st2", "st3", | |
54 | "st4", "st5", "st6", "st7", | |
55 | "fctrl", "fstat", "ftag", "fiseg", | |
56 | "fioff", "foseg", "fooff", "fop", | |
57 | "xmm0", "xmm1", "xmm2", "xmm3", | |
58 | "xmm4", "xmm5", "xmm6", "xmm7", | |
59 | "mxcsr" | |
60 | }; | |
61 | ||
28fc6740 AC |
62 | /* MMX registers. */ |
63 | ||
64 | static char *i386_mmx_names[] = | |
65 | { | |
66 | "mm0", "mm1", "mm2", "mm3", | |
67 | "mm4", "mm5", "mm6", "mm7" | |
68 | }; | |
69 | static const int mmx_num_regs = (sizeof (i386_mmx_names) | |
70 | / sizeof (i386_mmx_names[0])); | |
71 | #define MM0_REGNUM (NUM_REGS) | |
72 | ||
73 | static int | |
23a34459 | 74 | i386_mmx_regnum_p (int reg) |
28fc6740 AC |
75 | { |
76 | return (reg >= MM0_REGNUM && reg < MM0_REGNUM + mmx_num_regs); | |
77 | } | |
78 | ||
23a34459 AC |
79 | /* FP register? */ |
80 | ||
81 | int | |
82 | i386_fp_regnum_p (int regnum) | |
83 | { | |
84 | return (regnum < NUM_REGS | |
85 | && (FP0_REGNUM && FP0_REGNUM <= (regnum) && (regnum) < FPC_REGNUM)); | |
86 | } | |
87 | ||
88 | int | |
89 | i386_fpc_regnum_p (int regnum) | |
90 | { | |
91 | return (regnum < NUM_REGS | |
92 | && (FPC_REGNUM <= (regnum) && (regnum) < XMM0_REGNUM)); | |
93 | } | |
94 | ||
95 | /* SSE register? */ | |
96 | ||
97 | int | |
98 | i386_sse_regnum_p (int regnum) | |
99 | { | |
100 | return (regnum < NUM_REGS | |
101 | && (XMM0_REGNUM <= (regnum) && (regnum) < MXCSR_REGNUM)); | |
102 | } | |
103 | ||
104 | int | |
105 | i386_mxcsr_regnum_p (int regnum) | |
106 | { | |
107 | return (regnum < NUM_REGS | |
108 | && (regnum == MXCSR_REGNUM)); | |
109 | } | |
110 | ||
fc633446 MK |
111 | /* Return the name of register REG. */ |
112 | ||
fa88f677 | 113 | const char * |
fc633446 MK |
114 | i386_register_name (int reg) |
115 | { | |
116 | if (reg < 0) | |
117 | return NULL; | |
23a34459 | 118 | if (i386_mmx_regnum_p (reg)) |
28fc6740 | 119 | return i386_mmx_names[reg - MM0_REGNUM]; |
fc633446 MK |
120 | if (reg >= sizeof (i386_register_names) / sizeof (*i386_register_names)) |
121 | return NULL; | |
122 | ||
123 | return i386_register_names[reg]; | |
124 | } | |
125 | ||
85540d8c MK |
126 | /* Convert stabs register number REG to the appropriate register |
127 | number used by GDB. */ | |
128 | ||
8201327c | 129 | static int |
85540d8c MK |
130 | i386_stab_reg_to_regnum (int reg) |
131 | { | |
132 | /* This implements what GCC calls the "default" register map. */ | |
133 | if (reg >= 0 && reg <= 7) | |
134 | { | |
135 | /* General registers. */ | |
136 | return reg; | |
137 | } | |
138 | else if (reg >= 12 && reg <= 19) | |
139 | { | |
140 | /* Floating-point registers. */ | |
141 | return reg - 12 + FP0_REGNUM; | |
142 | } | |
143 | else if (reg >= 21 && reg <= 28) | |
144 | { | |
145 | /* SSE registers. */ | |
146 | return reg - 21 + XMM0_REGNUM; | |
147 | } | |
148 | else if (reg >= 29 && reg <= 36) | |
149 | { | |
150 | /* MMX registers. */ | |
7d12f766 | 151 | return reg - 29 + MM0_REGNUM; |
85540d8c MK |
152 | } |
153 | ||
154 | /* This will hopefully provoke a warning. */ | |
155 | return NUM_REGS + NUM_PSEUDO_REGS; | |
156 | } | |
157 | ||
8201327c | 158 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
159 | number used by GDB. */ |
160 | ||
8201327c | 161 | static int |
85540d8c MK |
162 | i386_dwarf_reg_to_regnum (int reg) |
163 | { | |
164 | /* The DWARF register numbering includes %eip and %eflags, and | |
165 | numbers the floating point registers differently. */ | |
166 | if (reg >= 0 && reg <= 9) | |
167 | { | |
168 | /* General registers. */ | |
169 | return reg; | |
170 | } | |
171 | else if (reg >= 11 && reg <= 18) | |
172 | { | |
173 | /* Floating-point registers. */ | |
174 | return reg - 11 + FP0_REGNUM; | |
175 | } | |
176 | else if (reg >= 21) | |
177 | { | |
178 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
179 | return i386_stab_reg_to_regnum (reg); | |
180 | } | |
181 | ||
182 | /* This will hopefully provoke a warning. */ | |
183 | return NUM_REGS + NUM_PSEUDO_REGS; | |
184 | } | |
fc338970 | 185 | \f |
917317f4 | 186 | |
fc338970 MK |
187 | /* This is the variable that is set with "set disassembly-flavor", and |
188 | its legitimate values. */ | |
53904c9e AC |
189 | static const char att_flavor[] = "att"; |
190 | static const char intel_flavor[] = "intel"; | |
191 | static const char *valid_flavors[] = | |
c5aa993b | 192 | { |
c906108c SS |
193 | att_flavor, |
194 | intel_flavor, | |
195 | NULL | |
196 | }; | |
53904c9e | 197 | static const char *disassembly_flavor = att_flavor; |
c906108c | 198 | |
fc338970 MK |
199 | /* Stdio style buffering was used to minimize calls to ptrace, but |
200 | this buffering did not take into account that the code section | |
201 | being accessed may not be an even number of buffers long (even if | |
202 | the buffer is only sizeof(int) long). In cases where the code | |
203 | section size happened to be a non-integral number of buffers long, | |
204 | attempting to read the last buffer would fail. Simply using | |
205 | target_read_memory and ignoring errors, rather than read_memory, is | |
206 | not the correct solution, since legitimate access errors would then | |
207 | be totally ignored. To properly handle this situation and continue | |
208 | to use buffering would require that this code be able to determine | |
209 | the minimum code section size granularity (not the alignment of the | |
210 | section itself, since the actual failing case that pointed out this | |
211 | problem had a section alignment of 4 but was not a multiple of 4 | |
212 | bytes long), on a target by target basis, and then adjust it's | |
213 | buffer size accordingly. This is messy, but potentially feasible. | |
214 | It probably needs the bfd library's help and support. For now, the | |
215 | buffer size is set to 1. (FIXME -fnf) */ | |
216 | ||
217 | #define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */ | |
c906108c SS |
218 | static CORE_ADDR codestream_next_addr; |
219 | static CORE_ADDR codestream_addr; | |
220 | static unsigned char codestream_buf[CODESTREAM_BUFSIZ]; | |
221 | static int codestream_off; | |
222 | static int codestream_cnt; | |
223 | ||
224 | #define codestream_tell() (codestream_addr + codestream_off) | |
fc338970 MK |
225 | #define codestream_peek() \ |
226 | (codestream_cnt == 0 ? \ | |
227 | codestream_fill(1) : codestream_buf[codestream_off]) | |
228 | #define codestream_get() \ | |
229 | (codestream_cnt-- == 0 ? \ | |
230 | codestream_fill(0) : codestream_buf[codestream_off++]) | |
c906108c | 231 | |
c5aa993b | 232 | static unsigned char |
fba45db2 | 233 | codestream_fill (int peek_flag) |
c906108c SS |
234 | { |
235 | codestream_addr = codestream_next_addr; | |
236 | codestream_next_addr += CODESTREAM_BUFSIZ; | |
237 | codestream_off = 0; | |
238 | codestream_cnt = CODESTREAM_BUFSIZ; | |
239 | read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ); | |
c5aa993b | 240 | |
c906108c | 241 | if (peek_flag) |
c5aa993b | 242 | return (codestream_peek ()); |
c906108c | 243 | else |
c5aa993b | 244 | return (codestream_get ()); |
c906108c SS |
245 | } |
246 | ||
247 | static void | |
fba45db2 | 248 | codestream_seek (CORE_ADDR place) |
c906108c SS |
249 | { |
250 | codestream_next_addr = place / CODESTREAM_BUFSIZ; | |
251 | codestream_next_addr *= CODESTREAM_BUFSIZ; | |
252 | codestream_cnt = 0; | |
253 | codestream_fill (1); | |
c5aa993b | 254 | while (codestream_tell () != place) |
c906108c SS |
255 | codestream_get (); |
256 | } | |
257 | ||
258 | static void | |
fba45db2 | 259 | codestream_read (unsigned char *buf, int count) |
c906108c SS |
260 | { |
261 | unsigned char *p; | |
262 | int i; | |
263 | p = buf; | |
264 | for (i = 0; i < count; i++) | |
265 | *p++ = codestream_get (); | |
266 | } | |
fc338970 | 267 | \f |
c906108c | 268 | |
fc338970 | 269 | /* If the next instruction is a jump, move to its target. */ |
c906108c SS |
270 | |
271 | static void | |
fba45db2 | 272 | i386_follow_jump (void) |
c906108c SS |
273 | { |
274 | unsigned char buf[4]; | |
275 | long delta; | |
276 | ||
277 | int data16; | |
278 | CORE_ADDR pos; | |
279 | ||
280 | pos = codestream_tell (); | |
281 | ||
282 | data16 = 0; | |
283 | if (codestream_peek () == 0x66) | |
284 | { | |
285 | codestream_get (); | |
286 | data16 = 1; | |
287 | } | |
288 | ||
289 | switch (codestream_get ()) | |
290 | { | |
291 | case 0xe9: | |
fc338970 | 292 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
293 | if (data16) |
294 | { | |
295 | codestream_read (buf, 2); | |
296 | delta = extract_signed_integer (buf, 2); | |
297 | ||
fc338970 MK |
298 | /* Include the size of the jmp instruction (including the |
299 | 0x66 prefix). */ | |
c5aa993b | 300 | pos += delta + 4; |
c906108c SS |
301 | } |
302 | else | |
303 | { | |
304 | codestream_read (buf, 4); | |
305 | delta = extract_signed_integer (buf, 4); | |
306 | ||
307 | pos += delta + 5; | |
308 | } | |
309 | break; | |
310 | case 0xeb: | |
fc338970 | 311 | /* Relative jump, disp8 (ignore data16). */ |
c906108c SS |
312 | codestream_read (buf, 1); |
313 | /* Sign-extend it. */ | |
314 | delta = extract_signed_integer (buf, 1); | |
315 | ||
316 | pos += delta + 2; | |
317 | break; | |
318 | } | |
319 | codestream_seek (pos); | |
320 | } | |
321 | ||
fc338970 MK |
322 | /* Find & return the amount a local space allocated, and advance the |
323 | codestream to the first register push (if any). | |
324 | ||
325 | If the entry sequence doesn't make sense, return -1, and leave | |
326 | codestream pointer at a random spot. */ | |
c906108c SS |
327 | |
328 | static long | |
fba45db2 | 329 | i386_get_frame_setup (CORE_ADDR pc) |
c906108c SS |
330 | { |
331 | unsigned char op; | |
332 | ||
333 | codestream_seek (pc); | |
334 | ||
335 | i386_follow_jump (); | |
336 | ||
337 | op = codestream_get (); | |
338 | ||
339 | if (op == 0x58) /* popl %eax */ | |
340 | { | |
fc338970 MK |
341 | /* This function must start with |
342 | ||
343 | popl %eax 0x58 | |
344 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
345 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
346 | ||
347 | (the System V compiler puts out the second `xchg' | |
348 | instruction, and the assembler doesn't try to optimize it, so | |
349 | the 'sib' form gets generated). This sequence is used to get | |
350 | the address of the return buffer for a function that returns | |
351 | a structure. */ | |
c906108c SS |
352 | int pos; |
353 | unsigned char buf[4]; | |
fc338970 MK |
354 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; |
355 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
356 | ||
c906108c SS |
357 | pos = codestream_tell (); |
358 | codestream_read (buf, 4); | |
359 | if (memcmp (buf, proto1, 3) == 0) | |
360 | pos += 3; | |
361 | else if (memcmp (buf, proto2, 4) == 0) | |
362 | pos += 4; | |
363 | ||
364 | codestream_seek (pos); | |
fc338970 | 365 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
366 | } |
367 | ||
368 | if (op == 0x68 || op == 0x6a) | |
369 | { | |
fc338970 MK |
370 | /* This function may start with |
371 | ||
372 | pushl constant | |
373 | call _probe | |
374 | addl $4, %esp | |
375 | ||
376 | followed by | |
377 | ||
378 | pushl %ebp | |
379 | ||
380 | etc. */ | |
c906108c SS |
381 | int pos; |
382 | unsigned char buf[8]; | |
383 | ||
fc338970 | 384 | /* Skip past the `pushl' instruction; it has either a one-byte |
c906108c SS |
385 | or a four-byte operand, depending on the opcode. */ |
386 | pos = codestream_tell (); | |
387 | if (op == 0x68) | |
388 | pos += 4; | |
389 | else | |
390 | pos += 1; | |
391 | codestream_seek (pos); | |
392 | ||
fc338970 MK |
393 | /* Read the following 8 bytes, which should be "call _probe" (6 |
394 | bytes) followed by "addl $4,%esp" (2 bytes). */ | |
c906108c SS |
395 | codestream_read (buf, sizeof (buf)); |
396 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) | |
397 | pos += sizeof (buf); | |
398 | codestream_seek (pos); | |
fc338970 | 399 | op = codestream_get (); /* Update next opcode. */ |
c906108c SS |
400 | } |
401 | ||
402 | if (op == 0x55) /* pushl %ebp */ | |
c5aa993b | 403 | { |
fc338970 | 404 | /* Check for "movl %esp, %ebp" -- can be written in two ways. */ |
c906108c SS |
405 | switch (codestream_get ()) |
406 | { | |
407 | case 0x8b: | |
408 | if (codestream_get () != 0xec) | |
fc338970 | 409 | return -1; |
c906108c SS |
410 | break; |
411 | case 0x89: | |
412 | if (codestream_get () != 0xe5) | |
fc338970 | 413 | return -1; |
c906108c SS |
414 | break; |
415 | default: | |
fc338970 | 416 | return -1; |
c906108c | 417 | } |
fc338970 MK |
418 | /* Check for stack adjustment |
419 | ||
420 | subl $XXX, %esp | |
421 | ||
422 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
423 | reg, so we don't have to worry about a data16 prefix. */ | |
c906108c SS |
424 | op = codestream_peek (); |
425 | if (op == 0x83) | |
426 | { | |
fc338970 | 427 | /* `subl' with 8 bit immediate. */ |
c906108c SS |
428 | codestream_get (); |
429 | if (codestream_get () != 0xec) | |
fc338970 | 430 | /* Some instruction starting with 0x83 other than `subl'. */ |
c906108c SS |
431 | { |
432 | codestream_seek (codestream_tell () - 2); | |
433 | return 0; | |
434 | } | |
fc338970 MK |
435 | /* `subl' with signed byte immediate (though it wouldn't |
436 | make sense to be negative). */ | |
c5aa993b | 437 | return (codestream_get ()); |
c906108c SS |
438 | } |
439 | else if (op == 0x81) | |
440 | { | |
441 | char buf[4]; | |
fc338970 | 442 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
c5aa993b | 443 | codestream_get (); |
c906108c | 444 | if (codestream_get () != 0xec) |
fc338970 | 445 | /* Some instruction starting with 0x81 other than `subl'. */ |
c906108c SS |
446 | { |
447 | codestream_seek (codestream_tell () - 2); | |
448 | return 0; | |
449 | } | |
fc338970 | 450 | /* It is `subl' with a 32 bit immediate. */ |
c5aa993b | 451 | codestream_read ((unsigned char *) buf, 4); |
c906108c SS |
452 | return extract_signed_integer (buf, 4); |
453 | } | |
454 | else | |
455 | { | |
fc338970 | 456 | return 0; |
c906108c SS |
457 | } |
458 | } | |
459 | else if (op == 0xc8) | |
460 | { | |
461 | char buf[2]; | |
fc338970 | 462 | /* `enter' with 16 bit unsigned immediate. */ |
c5aa993b | 463 | codestream_read ((unsigned char *) buf, 2); |
fc338970 | 464 | codestream_get (); /* Flush final byte of enter instruction. */ |
c906108c SS |
465 | return extract_unsigned_integer (buf, 2); |
466 | } | |
467 | return (-1); | |
468 | } | |
469 | ||
6bff26de MK |
470 | /* Signal trampolines don't have a meaningful frame. The frame |
471 | pointer value we use is actually the frame pointer of the calling | |
472 | frame -- that is, the frame which was in progress when the signal | |
473 | trampoline was entered. GDB mostly treats this frame pointer value | |
474 | as a magic cookie. We detect the case of a signal trampoline by | |
5a203e44 AC |
475 | testing for get_frame_type() == SIGTRAMP_FRAME, which is set based |
476 | on PC_IN_SIGTRAMP. | |
6bff26de MK |
477 | |
478 | When a signal trampoline is invoked from a frameless function, we | |
479 | essentially have two frameless functions in a row. In this case, | |
480 | we use the same magic cookie for three frames in a row. We detect | |
5a203e44 AC |
481 | this case by seeing whether the next frame is a SIGTRAMP_FRAME, |
482 | and, if it does, checking whether the current frame is actually | |
483 | frameless. In this case, we need to get the PC by looking at the | |
484 | SP register value stored in the signal context. | |
6bff26de MK |
485 | |
486 | This should work in most cases except in horrible situations where | |
487 | a signal occurs just as we enter a function but before the frame | |
c0d1d883 MK |
488 | has been set up. Incidentally, that's just what happens when we |
489 | call a function from GDB with a signal pending (there's a test in | |
490 | the testsuite that makes this happen). Therefore we pretend that | |
491 | we have a frameless function if we're stopped at the start of a | |
492 | function. */ | |
6bff26de MK |
493 | |
494 | /* Return non-zero if we're dealing with a frameless signal, that is, | |
495 | a signal trampoline invoked from a frameless function. */ | |
496 | ||
5512c44a | 497 | int |
6bff26de MK |
498 | i386_frameless_signal_p (struct frame_info *frame) |
499 | { | |
5a203e44 | 500 | return (frame->next && get_frame_type (frame->next) == SIGTRAMP_FRAME |
c0d1d883 MK |
501 | && (frameless_look_for_prologue (frame) |
502 | || frame->pc == get_pc_function_start (frame->pc))); | |
6bff26de MK |
503 | } |
504 | ||
c833a37e MK |
505 | /* Return the chain-pointer for FRAME. In the case of the i386, the |
506 | frame's nominal address is the address of a 4-byte word containing | |
507 | the calling frame's address. */ | |
508 | ||
8201327c | 509 | static CORE_ADDR |
c833a37e MK |
510 | i386_frame_chain (struct frame_info *frame) |
511 | { | |
c0d1d883 MK |
512 | if (PC_IN_CALL_DUMMY (frame->pc, 0, 0)) |
513 | return frame->frame; | |
514 | ||
5a203e44 | 515 | if (get_frame_type (frame) == SIGTRAMP_FRAME |
6bff26de | 516 | || i386_frameless_signal_p (frame)) |
c833a37e MK |
517 | return frame->frame; |
518 | ||
519 | if (! inside_entry_file (frame->pc)) | |
520 | return read_memory_unsigned_integer (frame->frame, 4); | |
521 | ||
522 | return 0; | |
523 | } | |
524 | ||
539ffe0b MK |
525 | /* Determine whether the function invocation represented by FRAME does |
526 | not have a from on the stack associated with it. If it does not, | |
527 | return non-zero, otherwise return zero. */ | |
528 | ||
3a1e71e3 | 529 | static int |
539ffe0b MK |
530 | i386_frameless_function_invocation (struct frame_info *frame) |
531 | { | |
5a203e44 | 532 | if (get_frame_type (frame) == SIGTRAMP_FRAME) |
539ffe0b MK |
533 | return 0; |
534 | ||
535 | return frameless_look_for_prologue (frame); | |
536 | } | |
537 | ||
21d0e8a4 MK |
538 | /* Assuming FRAME is for a sigtramp routine, return the saved program |
539 | counter. */ | |
540 | ||
541 | static CORE_ADDR | |
542 | i386_sigtramp_saved_pc (struct frame_info *frame) | |
543 | { | |
544 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
545 | CORE_ADDR addr; | |
546 | ||
547 | addr = tdep->sigcontext_addr (frame); | |
548 | return read_memory_unsigned_integer (addr + tdep->sc_pc_offset, 4); | |
549 | } | |
550 | ||
6bff26de MK |
551 | /* Assuming FRAME is for a sigtramp routine, return the saved stack |
552 | pointer. */ | |
553 | ||
554 | static CORE_ADDR | |
555 | i386_sigtramp_saved_sp (struct frame_info *frame) | |
556 | { | |
557 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
558 | CORE_ADDR addr; | |
559 | ||
560 | addr = tdep->sigcontext_addr (frame); | |
561 | return read_memory_unsigned_integer (addr + tdep->sc_sp_offset, 4); | |
562 | } | |
563 | ||
0d17c81d MK |
564 | /* Return the saved program counter for FRAME. */ |
565 | ||
8201327c | 566 | static CORE_ADDR |
0d17c81d MK |
567 | i386_frame_saved_pc (struct frame_info *frame) |
568 | { | |
c0d1d883 | 569 | if (PC_IN_CALL_DUMMY (frame->pc, 0, 0)) |
267bf4bb MK |
570 | { |
571 | ULONGEST pc; | |
572 | ||
573 | frame_unwind_unsigned_register (frame, PC_REGNUM, &pc); | |
574 | return pc; | |
575 | } | |
c0d1d883 | 576 | |
5a203e44 | 577 | if (get_frame_type (frame) == SIGTRAMP_FRAME) |
21d0e8a4 | 578 | return i386_sigtramp_saved_pc (frame); |
0d17c81d | 579 | |
6bff26de MK |
580 | if (i386_frameless_signal_p (frame)) |
581 | { | |
582 | CORE_ADDR sp = i386_sigtramp_saved_sp (frame->next); | |
583 | return read_memory_unsigned_integer (sp, 4); | |
584 | } | |
585 | ||
8201327c | 586 | return read_memory_unsigned_integer (frame->frame + 4, 4); |
22797942 AC |
587 | } |
588 | ||
ed84f6c1 MK |
589 | /* Immediately after a function call, return the saved pc. */ |
590 | ||
8201327c | 591 | static CORE_ADDR |
ed84f6c1 MK |
592 | i386_saved_pc_after_call (struct frame_info *frame) |
593 | { | |
5a203e44 | 594 | if (get_frame_type (frame) == SIGTRAMP_FRAME) |
6bff26de MK |
595 | return i386_sigtramp_saved_pc (frame); |
596 | ||
ed84f6c1 MK |
597 | return read_memory_unsigned_integer (read_register (SP_REGNUM), 4); |
598 | } | |
599 | ||
c906108c SS |
600 | /* Return number of args passed to a frame. |
601 | Can return -1, meaning no way to tell. */ | |
602 | ||
3a1e71e3 | 603 | static int |
fba45db2 | 604 | i386_frame_num_args (struct frame_info *fi) |
c906108c SS |
605 | { |
606 | #if 1 | |
607 | return -1; | |
608 | #else | |
609 | /* This loses because not only might the compiler not be popping the | |
fc338970 MK |
610 | args right after the function call, it might be popping args from |
611 | both this call and a previous one, and we would say there are | |
612 | more args than there really are. */ | |
c906108c | 613 | |
c5aa993b JM |
614 | int retpc; |
615 | unsigned char op; | |
c906108c SS |
616 | struct frame_info *pfi; |
617 | ||
fc338970 | 618 | /* On the i386, the instruction following the call could be: |
c906108c SS |
619 | popl %ecx - one arg |
620 | addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits | |
fc338970 | 621 | anything else - zero args. */ |
c906108c SS |
622 | |
623 | int frameless; | |
624 | ||
392a587b | 625 | frameless = FRAMELESS_FUNCTION_INVOCATION (fi); |
c906108c | 626 | if (frameless) |
fc338970 MK |
627 | /* In the absence of a frame pointer, GDB doesn't get correct |
628 | values for nameless arguments. Return -1, so it doesn't print | |
629 | any nameless arguments. */ | |
c906108c SS |
630 | return -1; |
631 | ||
c5aa993b | 632 | pfi = get_prev_frame (fi); |
c906108c SS |
633 | if (pfi == 0) |
634 | { | |
fc338970 MK |
635 | /* NOTE: This can happen if we are looking at the frame for |
636 | main, because FRAME_CHAIN_VALID won't let us go into start. | |
637 | If we have debugging symbols, that's not really a big deal; | |
638 | it just means it will only show as many arguments to main as | |
639 | are declared. */ | |
c906108c SS |
640 | return -1; |
641 | } | |
642 | else | |
643 | { | |
c5aa993b JM |
644 | retpc = pfi->pc; |
645 | op = read_memory_integer (retpc, 1); | |
fc338970 | 646 | if (op == 0x59) /* pop %ecx */ |
c5aa993b | 647 | return 1; |
c906108c SS |
648 | else if (op == 0x83) |
649 | { | |
c5aa993b JM |
650 | op = read_memory_integer (retpc + 1, 1); |
651 | if (op == 0xc4) | |
652 | /* addl $<signed imm 8 bits>, %esp */ | |
653 | return (read_memory_integer (retpc + 2, 1) & 0xff) / 4; | |
c906108c SS |
654 | else |
655 | return 0; | |
656 | } | |
fc338970 MK |
657 | else if (op == 0x81) /* `add' with 32 bit immediate. */ |
658 | { | |
c5aa993b JM |
659 | op = read_memory_integer (retpc + 1, 1); |
660 | if (op == 0xc4) | |
661 | /* addl $<imm 32>, %esp */ | |
662 | return read_memory_integer (retpc + 2, 4) / 4; | |
c906108c SS |
663 | else |
664 | return 0; | |
665 | } | |
666 | else | |
667 | { | |
668 | return 0; | |
669 | } | |
670 | } | |
671 | #endif | |
672 | } | |
673 | ||
fc338970 MK |
674 | /* Parse the first few instructions the function to see what registers |
675 | were stored. | |
676 | ||
677 | We handle these cases: | |
678 | ||
679 | The startup sequence can be at the start of the function, or the | |
680 | function can start with a branch to startup code at the end. | |
681 | ||
682 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
683 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
684 | once used in the System V compiler). | |
685 | ||
686 | Local space is allocated just below the saved %ebp by either the | |
687 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
688 | bit unsigned argument for space to allocate, and the 'addl' | |
689 | instruction could have either a signed byte, or 32 bit immediate. | |
690 | ||
691 | Next, the registers used by this function are pushed. With the | |
692 | System V compiler they will always be in the order: %edi, %esi, | |
693 | %ebx (and sometimes a harmless bug causes it to also save but not | |
694 | restore %eax); however, the code below is willing to see the pushes | |
695 | in any order, and will handle up to 8 of them. | |
696 | ||
697 | If the setup sequence is at the end of the function, then the next | |
698 | instruction will be a branch back to the start. */ | |
c906108c | 699 | |
3a1e71e3 | 700 | static void |
fba45db2 | 701 | i386_frame_init_saved_regs (struct frame_info *fip) |
c906108c SS |
702 | { |
703 | long locals = -1; | |
704 | unsigned char op; | |
fc338970 | 705 | CORE_ADDR addr; |
c906108c SS |
706 | CORE_ADDR pc; |
707 | int i; | |
c5aa993b | 708 | |
1211c4e4 AC |
709 | if (fip->saved_regs) |
710 | return; | |
711 | ||
712 | frame_saved_regs_zalloc (fip); | |
c5aa993b | 713 | |
c906108c SS |
714 | pc = get_pc_function_start (fip->pc); |
715 | if (pc != 0) | |
716 | locals = i386_get_frame_setup (pc); | |
c5aa993b JM |
717 | |
718 | if (locals >= 0) | |
c906108c | 719 | { |
fc338970 | 720 | addr = fip->frame - 4 - locals; |
c5aa993b | 721 | for (i = 0; i < 8; i++) |
c906108c SS |
722 | { |
723 | op = codestream_get (); | |
724 | if (op < 0x50 || op > 0x57) | |
725 | break; | |
726 | #ifdef I386_REGNO_TO_SYMMETRY | |
727 | /* Dynix uses different internal numbering. Ick. */ | |
fc338970 | 728 | fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr; |
c906108c | 729 | #else |
fc338970 | 730 | fip->saved_regs[op - 0x50] = addr; |
c906108c | 731 | #endif |
fc338970 | 732 | addr -= 4; |
c906108c SS |
733 | } |
734 | } | |
c5aa993b | 735 | |
1211c4e4 AC |
736 | fip->saved_regs[PC_REGNUM] = fip->frame + 4; |
737 | fip->saved_regs[FP_REGNUM] = fip->frame; | |
c906108c SS |
738 | } |
739 | ||
fc338970 | 740 | /* Return PC of first real instruction. */ |
c906108c | 741 | |
3a1e71e3 | 742 | static CORE_ADDR |
93924b6b | 743 | i386_skip_prologue (CORE_ADDR pc) |
c906108c SS |
744 | { |
745 | unsigned char op; | |
746 | int i; | |
c5aa993b | 747 | static unsigned char pic_pat[6] = |
fc338970 MK |
748 | { 0xe8, 0, 0, 0, 0, /* call 0x0 */ |
749 | 0x5b, /* popl %ebx */ | |
c5aa993b | 750 | }; |
c906108c | 751 | CORE_ADDR pos; |
c5aa993b | 752 | |
c906108c SS |
753 | if (i386_get_frame_setup (pc) < 0) |
754 | return (pc); | |
c5aa993b | 755 | |
fc338970 MK |
756 | /* Found valid frame setup -- codestream now points to start of push |
757 | instructions for saving registers. */ | |
c5aa993b | 758 | |
fc338970 | 759 | /* Skip over register saves. */ |
c906108c SS |
760 | for (i = 0; i < 8; i++) |
761 | { | |
762 | op = codestream_peek (); | |
fc338970 | 763 | /* Break if not `pushl' instrunction. */ |
c5aa993b | 764 | if (op < 0x50 || op > 0x57) |
c906108c SS |
765 | break; |
766 | codestream_get (); | |
767 | } | |
768 | ||
fc338970 MK |
769 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
770 | to get the address of the global offset table (GOT) into register | |
771 | %ebx | |
772 | ||
773 | call 0x0 | |
774 | popl %ebx | |
775 | movl %ebx,x(%ebp) (optional) | |
776 | addl y,%ebx | |
777 | ||
c906108c SS |
778 | This code is with the rest of the prologue (at the end of the |
779 | function), so we have to skip it to get to the first real | |
780 | instruction at the start of the function. */ | |
c5aa993b | 781 | |
c906108c SS |
782 | pos = codestream_tell (); |
783 | for (i = 0; i < 6; i++) | |
784 | { | |
785 | op = codestream_get (); | |
c5aa993b | 786 | if (pic_pat[i] != op) |
c906108c SS |
787 | break; |
788 | } | |
789 | if (i == 6) | |
790 | { | |
791 | unsigned char buf[4]; | |
792 | long delta = 6; | |
793 | ||
794 | op = codestream_get (); | |
c5aa993b | 795 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c SS |
796 | { |
797 | op = codestream_get (); | |
fc338970 | 798 | if (op == 0x5d) /* One byte offset from %ebp. */ |
c906108c SS |
799 | { |
800 | delta += 3; | |
801 | codestream_read (buf, 1); | |
802 | } | |
fc338970 | 803 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
c906108c SS |
804 | { |
805 | delta += 6; | |
806 | codestream_read (buf, 4); | |
807 | } | |
fc338970 | 808 | else /* Unexpected instruction. */ |
c5aa993b JM |
809 | delta = -1; |
810 | op = codestream_get (); | |
c906108c | 811 | } |
c5aa993b JM |
812 | /* addl y,%ebx */ |
813 | if (delta > 0 && op == 0x81 && codestream_get () == 0xc3) | |
c906108c | 814 | { |
c5aa993b | 815 | pos += delta + 6; |
c906108c SS |
816 | } |
817 | } | |
818 | codestream_seek (pos); | |
c5aa993b | 819 | |
c906108c | 820 | i386_follow_jump (); |
c5aa993b | 821 | |
c906108c SS |
822 | return (codestream_tell ()); |
823 | } | |
824 | ||
93924b6b MK |
825 | /* Use the program counter to determine the contents and size of a |
826 | breakpoint instruction. Return a pointer to a string of bytes that | |
827 | encode a breakpoint instruction, store the length of the string in | |
828 | *LEN and optionally adjust *PC to point to the correct memory | |
829 | location for inserting the breakpoint. | |
830 | ||
831 | On the i386 we have a single breakpoint that fits in a single byte | |
832 | and can be inserted anywhere. */ | |
833 | ||
834 | static const unsigned char * | |
835 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
836 | { | |
837 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ | |
838 | ||
839 | *len = sizeof (break_insn); | |
840 | return break_insn; | |
841 | } | |
842 | ||
c0d1d883 MK |
843 | /* Push the return address (pointing to the call dummy) onto the stack |
844 | and return the new value for the stack pointer. */ | |
c5aa993b | 845 | |
c0d1d883 MK |
846 | static CORE_ADDR |
847 | i386_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
a7769679 | 848 | { |
c0d1d883 | 849 | char buf[4]; |
a7769679 | 850 | |
c0d1d883 MK |
851 | store_unsigned_integer (buf, 4, CALL_DUMMY_ADDRESS ()); |
852 | write_memory (sp - 4, buf, 4); | |
853 | return sp - 4; | |
a7769679 MK |
854 | } |
855 | ||
3a1e71e3 | 856 | static void |
c0d1d883 | 857 | i386_do_pop_frame (struct frame_info *frame) |
c906108c | 858 | { |
c906108c SS |
859 | CORE_ADDR fp; |
860 | int regnum; | |
00f8375e | 861 | char regbuf[I386_MAX_REGISTER_SIZE]; |
c5aa993b | 862 | |
c906108c | 863 | fp = FRAME_FP (frame); |
1211c4e4 AC |
864 | i386_frame_init_saved_regs (frame); |
865 | ||
c5aa993b | 866 | for (regnum = 0; regnum < NUM_REGS; regnum++) |
c906108c | 867 | { |
fc338970 MK |
868 | CORE_ADDR addr; |
869 | addr = frame->saved_regs[regnum]; | |
870 | if (addr) | |
c906108c | 871 | { |
fc338970 | 872 | read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum)); |
4caf0990 | 873 | deprecated_write_register_gen (regnum, regbuf); |
c906108c SS |
874 | } |
875 | } | |
876 | write_register (FP_REGNUM, read_memory_integer (fp, 4)); | |
877 | write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); | |
878 | write_register (SP_REGNUM, fp + 8); | |
879 | flush_cached_frames (); | |
880 | } | |
c0d1d883 MK |
881 | |
882 | static void | |
883 | i386_pop_frame (void) | |
884 | { | |
885 | generic_pop_current_frame (i386_do_pop_frame); | |
886 | } | |
fc338970 | 887 | \f |
c906108c | 888 | |
fc338970 MK |
889 | /* Figure out where the longjmp will land. Slurp the args out of the |
890 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c MK |
891 | structure from which we extract the address that we will land at. |
892 | This address is copied into PC. This routine returns true on | |
fc338970 | 893 | success. */ |
c906108c | 894 | |
8201327c MK |
895 | static int |
896 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 897 | { |
8201327c | 898 | char buf[4]; |
c906108c | 899 | CORE_ADDR sp, jb_addr; |
8201327c | 900 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
c906108c | 901 | |
8201327c MK |
902 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
903 | longjmp will land. */ | |
904 | if (jb_pc_offset == -1) | |
c906108c SS |
905 | return 0; |
906 | ||
8201327c MK |
907 | sp = read_register (SP_REGNUM); |
908 | if (target_read_memory (sp + 4, buf, 4)) | |
c906108c SS |
909 | return 0; |
910 | ||
8201327c MK |
911 | jb_addr = extract_address (buf, 4); |
912 | if (target_read_memory (jb_addr + jb_pc_offset, buf, 4)) | |
913 | return 0; | |
c906108c | 914 | |
8201327c | 915 | *pc = extract_address (buf, 4); |
c906108c SS |
916 | return 1; |
917 | } | |
fc338970 | 918 | \f |
c906108c | 919 | |
3a1e71e3 | 920 | static CORE_ADDR |
ea7c478f | 921 | i386_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
22f8ba57 MK |
922 | int struct_return, CORE_ADDR struct_addr) |
923 | { | |
924 | sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr); | |
925 | ||
926 | if (struct_return) | |
927 | { | |
928 | char buf[4]; | |
929 | ||
930 | sp -= 4; | |
931 | store_address (buf, 4, struct_addr); | |
932 | write_memory (sp, buf, 4); | |
933 | } | |
934 | ||
935 | return sp; | |
936 | } | |
937 | ||
3a1e71e3 | 938 | static void |
22f8ba57 MK |
939 | i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) |
940 | { | |
941 | /* Do nothing. Everything was already done by i386_push_arguments. */ | |
942 | } | |
943 | ||
1a309862 MK |
944 | /* These registers are used for returning integers (and on some |
945 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 946 | size and alignment match an integer type). */ |
1a309862 MK |
947 | #define LOW_RETURN_REGNUM 0 /* %eax */ |
948 | #define HIGH_RETURN_REGNUM 2 /* %edx */ | |
949 | ||
950 | /* Extract from an array REGBUF containing the (raw) register state, a | |
951 | function return value of TYPE, and copy that, in virtual format, | |
952 | into VALBUF. */ | |
953 | ||
3a1e71e3 | 954 | static void |
00f8375e | 955 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 956 | void *dst) |
c906108c | 957 | { |
ebba8386 | 958 | bfd_byte *valbuf = dst; |
1a309862 | 959 | int len = TYPE_LENGTH (type); |
00f8375e | 960 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 961 | |
1e8d0a7b MK |
962 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
963 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 964 | { |
00f8375e | 965 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
966 | return; |
967 | } | |
1e8d0a7b MK |
968 | |
969 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 970 | { |
356a6b3e | 971 | if (FP0_REGNUM == 0) |
1a309862 MK |
972 | { |
973 | warning ("Cannot find floating-point return value."); | |
974 | memset (valbuf, 0, len); | |
ef9dff19 | 975 | return; |
1a309862 MK |
976 | } |
977 | ||
c6ba6f0d MK |
978 | /* Floating-point return values can be found in %st(0). Convert |
979 | its contents to the desired type. This is probably not | |
980 | exactly how it would happen on the target itself, but it is | |
981 | the best we can do. */ | |
0818c12a | 982 | regcache_raw_read (regcache, FP0_REGNUM, buf); |
00f8375e | 983 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
984 | } |
985 | else | |
c5aa993b | 986 | { |
d4f3574e SS |
987 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
988 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
989 | ||
990 | if (len <= low_size) | |
00f8375e | 991 | { |
0818c12a | 992 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
993 | memcpy (valbuf, buf, len); |
994 | } | |
d4f3574e SS |
995 | else if (len <= (low_size + high_size)) |
996 | { | |
0818c12a | 997 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 998 | memcpy (valbuf, buf, low_size); |
0818c12a | 999 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1000 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1001 | } |
1002 | else | |
8e65ff28 AC |
1003 | internal_error (__FILE__, __LINE__, |
1004 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1005 | } |
1006 | } | |
1007 | ||
ef9dff19 MK |
1008 | /* Write into the appropriate registers a function return value stored |
1009 | in VALBUF of type TYPE, given in virtual format. */ | |
1010 | ||
3a1e71e3 | 1011 | static void |
3d7f4f49 MK |
1012 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1013 | const void *valbuf) | |
ef9dff19 MK |
1014 | { |
1015 | int len = TYPE_LENGTH (type); | |
1016 | ||
1e8d0a7b MK |
1017 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1018 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1019 | { |
3d7f4f49 | 1020 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1021 | return; |
1022 | } | |
1e8d0a7b MK |
1023 | |
1024 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1025 | { |
3d7f4f49 | 1026 | ULONGEST fstat; |
c6ba6f0d | 1027 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 1028 | |
356a6b3e | 1029 | if (FP0_REGNUM == 0) |
ef9dff19 MK |
1030 | { |
1031 | warning ("Cannot set floating-point return value."); | |
1032 | return; | |
1033 | } | |
1034 | ||
635b0cc1 MK |
1035 | /* Returning floating-point values is a bit tricky. Apart from |
1036 | storing the return value in %st(0), we have to simulate the | |
1037 | state of the FPU at function return point. */ | |
1038 | ||
c6ba6f0d MK |
1039 | /* Convert the value found in VALBUF to the extended |
1040 | floating-point format used by the FPU. This is probably | |
1041 | not exactly how it would happen on the target itself, but | |
1042 | it is the best we can do. */ | |
1043 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
3d7f4f49 | 1044 | regcache_raw_write (regcache, FP0_REGNUM, buf); |
ccb945b8 | 1045 | |
635b0cc1 MK |
1046 | /* Set the top of the floating-point register stack to 7. The |
1047 | actual value doesn't really matter, but 7 is what a normal | |
1048 | function return would end up with if the program started out | |
1049 | with a freshly initialized FPU. */ | |
3d7f4f49 | 1050 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); |
ccb945b8 | 1051 | fstat |= (7 << 11); |
3d7f4f49 | 1052 | regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); |
ccb945b8 | 1053 | |
635b0cc1 MK |
1054 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1055 | the floating-point register stack to 7, the appropriate value | |
1056 | for the tag word is 0x3fff. */ | |
3d7f4f49 | 1057 | regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1058 | } |
1059 | else | |
1060 | { | |
1061 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
1062 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1063 | ||
1064 | if (len <= low_size) | |
3d7f4f49 | 1065 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1066 | else if (len <= (low_size + high_size)) |
1067 | { | |
3d7f4f49 MK |
1068 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1069 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1070 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1071 | } |
1072 | else | |
8e65ff28 AC |
1073 | internal_error (__FILE__, __LINE__, |
1074 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1075 | } |
1076 | } | |
f7af9647 | 1077 | |
751f1375 MK |
1078 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1079 | address in which a function should return its structure value, as a | |
1080 | CORE_ADDR. */ | |
f7af9647 | 1081 | |
3a1e71e3 | 1082 | static CORE_ADDR |
00f8375e | 1083 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1084 | { |
751f1375 MK |
1085 | ULONGEST addr; |
1086 | ||
1087 | regcache_raw_read_unsigned (regcache, LOW_RETURN_REGNUM, &addr); | |
1088 | return addr; | |
f7af9647 | 1089 | } |
fc338970 | 1090 | \f |
ef9dff19 | 1091 | |
8201327c MK |
1092 | /* This is the variable that is set with "set struct-convention", and |
1093 | its legitimate values. */ | |
1094 | static const char default_struct_convention[] = "default"; | |
1095 | static const char pcc_struct_convention[] = "pcc"; | |
1096 | static const char reg_struct_convention[] = "reg"; | |
1097 | static const char *valid_conventions[] = | |
1098 | { | |
1099 | default_struct_convention, | |
1100 | pcc_struct_convention, | |
1101 | reg_struct_convention, | |
1102 | NULL | |
1103 | }; | |
1104 | static const char *struct_convention = default_struct_convention; | |
1105 | ||
1106 | static int | |
1107 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1108 | { | |
1109 | enum struct_return struct_return; | |
1110 | ||
1111 | if (struct_convention == default_struct_convention) | |
1112 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1113 | else if (struct_convention == pcc_struct_convention) | |
1114 | struct_return = pcc_struct_return; | |
1115 | else | |
1116 | struct_return = reg_struct_return; | |
1117 | ||
1118 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1119 | type); | |
1120 | } | |
1121 | \f | |
1122 | ||
d7a0d72c MK |
1123 | /* Return the GDB type object for the "standard" data type of data in |
1124 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1125 | potentially they could be used for things other than address. */ | |
1126 | ||
3a1e71e3 | 1127 | static struct type * |
d7a0d72c MK |
1128 | i386_register_virtual_type (int regnum) |
1129 | { | |
1130 | if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM) | |
1131 | return lookup_pointer_type (builtin_type_void); | |
1132 | ||
23a34459 | 1133 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1134 | return builtin_type_i387_ext; |
d7a0d72c | 1135 | |
23a34459 | 1136 | if (i386_sse_regnum_p (regnum)) |
3139facc | 1137 | return builtin_type_vec128i; |
d7a0d72c | 1138 | |
23a34459 | 1139 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1140 | return builtin_type_vec64i; |
1141 | ||
d7a0d72c MK |
1142 | return builtin_type_int; |
1143 | } | |
1144 | ||
28fc6740 AC |
1145 | /* Map a cooked register onto a raw register or memory. For the i386, |
1146 | the MMX registers need to be mapped onto floating point registers. */ | |
1147 | ||
1148 | static int | |
1149 | mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) | |
1150 | { | |
1151 | int mmxi; | |
1152 | ULONGEST fstat; | |
1153 | int tos; | |
1154 | int fpi; | |
1155 | mmxi = regnum - MM0_REGNUM; | |
1156 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); | |
1157 | tos = (fstat >> 11) & 0x7; | |
1158 | fpi = (mmxi + tos) % 8; | |
1159 | return (FP0_REGNUM + fpi); | |
1160 | } | |
1161 | ||
1162 | static void | |
1163 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1164 | int regnum, void *buf) | |
1165 | { | |
23a34459 | 1166 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1167 | { |
1168 | char *mmx_buf = alloca (MAX_REGISTER_RAW_SIZE); | |
1169 | int fpnum = mmx_regnum_to_fp_regnum (regcache, regnum); | |
1170 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1171 | /* Extract (always little endian). */ | |
1172 | memcpy (buf, mmx_buf, REGISTER_RAW_SIZE (regnum)); | |
1173 | } | |
1174 | else | |
1175 | regcache_raw_read (regcache, regnum, buf); | |
1176 | } | |
1177 | ||
1178 | static void | |
1179 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1180 | int regnum, const void *buf) | |
1181 | { | |
23a34459 | 1182 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1183 | { |
1184 | char *mmx_buf = alloca (MAX_REGISTER_RAW_SIZE); | |
1185 | int fpnum = mmx_regnum_to_fp_regnum (regcache, regnum); | |
1186 | /* Read ... */ | |
1187 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1188 | /* ... Modify ... (always little endian). */ | |
1189 | memcpy (mmx_buf, buf, REGISTER_RAW_SIZE (regnum)); | |
1190 | /* ... Write. */ | |
1191 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1192 | } | |
1193 | else | |
1194 | regcache_raw_write (regcache, regnum, buf); | |
1195 | } | |
1196 | ||
d7a0d72c MK |
1197 | /* Return true iff register REGNUM's virtual format is different from |
1198 | its raw format. Note that this definition assumes that the host | |
1199 | supports IEEE 32-bit floats, since it doesn't say that SSE | |
1200 | registers need conversion. Even if we can't find a counterexample, | |
1201 | this is still sloppy. */ | |
1202 | ||
3a1e71e3 | 1203 | static int |
d7a0d72c MK |
1204 | i386_register_convertible (int regnum) |
1205 | { | |
23a34459 | 1206 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1207 | } |
1208 | ||
ac27f131 | 1209 | /* Convert data from raw format for register REGNUM in buffer FROM to |
3d261580 | 1210 | virtual format with type TYPE in buffer TO. */ |
ac27f131 | 1211 | |
3a1e71e3 | 1212 | static void |
ac27f131 MK |
1213 | i386_register_convert_to_virtual (int regnum, struct type *type, |
1214 | char *from, char *to) | |
1215 | { | |
23a34459 | 1216 | gdb_assert (i386_fp_regnum_p (regnum)); |
3d261580 MK |
1217 | |
1218 | /* We only support floating-point values. */ | |
8d7f6b4a MK |
1219 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
1220 | { | |
1221 | warning ("Cannot convert floating-point register value " | |
1222 | "to non-floating-point type."); | |
1223 | memset (to, 0, TYPE_LENGTH (type)); | |
1224 | return; | |
1225 | } | |
3d261580 | 1226 | |
c6ba6f0d MK |
1227 | /* Convert to TYPE. This should be a no-op if TYPE is equivalent to |
1228 | the extended floating-point format used by the FPU. */ | |
1229 | convert_typed_floating (from, builtin_type_i387_ext, to, type); | |
ac27f131 MK |
1230 | } |
1231 | ||
1232 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
3d261580 | 1233 | raw format for register REGNUM in buffer TO. */ |
ac27f131 | 1234 | |
3a1e71e3 | 1235 | static void |
ac27f131 MK |
1236 | i386_register_convert_to_raw (struct type *type, int regnum, |
1237 | char *from, char *to) | |
1238 | { | |
23a34459 | 1239 | gdb_assert (i386_fp_regnum_p (regnum)); |
c6ba6f0d MK |
1240 | |
1241 | /* We only support floating-point values. */ | |
1242 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
1243 | { | |
1244 | warning ("Cannot convert non-floating-point type " | |
1245 | "to floating-point register value."); | |
1246 | memset (to, 0, TYPE_LENGTH (type)); | |
1247 | return; | |
1248 | } | |
3d261580 | 1249 | |
c6ba6f0d MK |
1250 | /* Convert from TYPE. This should be a no-op if TYPE is equivalent |
1251 | to the extended floating-point format used by the FPU. */ | |
1252 | convert_typed_floating (from, type, to, builtin_type_i387_ext); | |
ac27f131 | 1253 | } |
ac27f131 | 1254 | \f |
fc338970 | 1255 | |
c906108c | 1256 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1257 | /* SunPRO encodes the static variables. This is not related to C++ |
1258 | mangling, it is done for C too. */ | |
c906108c SS |
1259 | |
1260 | char * | |
fba45db2 | 1261 | sunpro_static_transform_name (char *name) |
c906108c SS |
1262 | { |
1263 | char *p; | |
1264 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1265 | { | |
fc338970 MK |
1266 | /* For file-local statics there will be a period, a bunch of |
1267 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1268 | N_OPT), a period and the name. For function-local statics |
1269 | there will be a bunch of junk (which seems to change the | |
1270 | second character from 'A' to 'B'), a period, the name of the | |
1271 | function, and the name. So just skip everything before the | |
1272 | last period. */ | |
c906108c SS |
1273 | p = strrchr (name, '.'); |
1274 | if (p != NULL) | |
1275 | name = p + 1; | |
1276 | } | |
1277 | return name; | |
1278 | } | |
1279 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1280 | \f |
c906108c | 1281 | |
fc338970 | 1282 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1283 | |
1284 | CORE_ADDR | |
1cce71eb | 1285 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1286 | { |
fc338970 | 1287 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1288 | { |
c5aa993b | 1289 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1290 | struct minimal_symbol *indsym = |
fc338970 | 1291 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
c5aa993b | 1292 | char *symname = indsym ? SYMBOL_NAME (indsym) : 0; |
c906108c | 1293 | |
c5aa993b | 1294 | if (symname) |
c906108c | 1295 | { |
c5aa993b JM |
1296 | if (strncmp (symname, "__imp_", 6) == 0 |
1297 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1298 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1299 | } | |
1300 | } | |
fc338970 | 1301 | return 0; /* Not a trampoline. */ |
c906108c | 1302 | } |
fc338970 MK |
1303 | \f |
1304 | ||
8201327c MK |
1305 | /* Return non-zero if PC and NAME show that we are in a signal |
1306 | trampoline. */ | |
1307 | ||
1308 | static int | |
1309 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1310 | { | |
1311 | return (name && strcmp ("_sigtramp", name) == 0); | |
1312 | } | |
1313 | \f | |
1314 | ||
fc338970 MK |
1315 | /* We have two flavours of disassembly. The machinery on this page |
1316 | deals with switching between those. */ | |
c906108c SS |
1317 | |
1318 | static int | |
5e3397bb | 1319 | i386_print_insn (bfd_vma pc, disassemble_info *info) |
c906108c | 1320 | { |
5e3397bb MK |
1321 | gdb_assert (disassembly_flavor == att_flavor |
1322 | || disassembly_flavor == intel_flavor); | |
1323 | ||
1324 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1325 | constified, cast to prevent a compiler warning. */ | |
1326 | info->disassembler_options = (char *) disassembly_flavor; | |
1327 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1328 | ||
1329 | return print_insn_i386 (pc, info); | |
7a292a7a | 1330 | } |
fc338970 | 1331 | \f |
3ce1502b | 1332 | |
8201327c MK |
1333 | /* There are a few i386 architecture variants that differ only |
1334 | slightly from the generic i386 target. For now, we don't give them | |
1335 | their own source file, but include them here. As a consequence, | |
1336 | they'll always be included. */ | |
3ce1502b | 1337 | |
8201327c | 1338 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1339 | |
8201327c MK |
1340 | static int |
1341 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1342 | { |
8201327c MK |
1343 | return (name && (strcmp ("_sigreturn", name) == 0 |
1344 | || strcmp ("_sigacthandler", name) == 0 | |
1345 | || strcmp ("sigvechandler", name) == 0)); | |
1346 | } | |
d2a7c97a | 1347 | |
21d0e8a4 MK |
1348 | /* Get address of the pushed ucontext (sigcontext) on the stack for |
1349 | all three variants of SVR4 sigtramps. */ | |
3ce1502b | 1350 | |
3a1e71e3 | 1351 | static CORE_ADDR |
21d0e8a4 | 1352 | i386_svr4_sigcontext_addr (struct frame_info *frame) |
8201327c | 1353 | { |
21d0e8a4 | 1354 | int sigcontext_offset = -1; |
8201327c MK |
1355 | char *name = NULL; |
1356 | ||
1357 | find_pc_partial_function (frame->pc, &name, NULL, NULL); | |
1358 | if (name) | |
d2a7c97a | 1359 | { |
8201327c | 1360 | if (strcmp (name, "_sigreturn") == 0) |
21d0e8a4 | 1361 | sigcontext_offset = 132; |
8201327c | 1362 | else if (strcmp (name, "_sigacthandler") == 0) |
21d0e8a4 | 1363 | sigcontext_offset = 80; |
8201327c | 1364 | else if (strcmp (name, "sigvechandler") == 0) |
21d0e8a4 | 1365 | sigcontext_offset = 120; |
8201327c | 1366 | } |
3ce1502b | 1367 | |
21d0e8a4 MK |
1368 | gdb_assert (sigcontext_offset != -1); |
1369 | ||
8201327c | 1370 | if (frame->next) |
21d0e8a4 MK |
1371 | return frame->next->frame + sigcontext_offset; |
1372 | return read_register (SP_REGNUM) + sigcontext_offset; | |
8201327c MK |
1373 | } |
1374 | \f | |
3ce1502b | 1375 | |
8201327c | 1376 | /* DJGPP. */ |
d2a7c97a | 1377 | |
8201327c MK |
1378 | static int |
1379 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1380 | { | |
1381 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1382 | return 0; | |
1383 | } | |
1384 | \f | |
d2a7c97a | 1385 | |
8201327c | 1386 | /* Generic ELF. */ |
d2a7c97a | 1387 | |
8201327c MK |
1388 | void |
1389 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1390 | { | |
1391 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1392 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1393 | } | |
3ce1502b | 1394 | |
8201327c | 1395 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1396 | |
8201327c MK |
1397 | void |
1398 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1399 | { | |
1400 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1401 | |
8201327c MK |
1402 | /* System V Release 4 uses ELF. */ |
1403 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1404 | |
dfe01d39 MK |
1405 | /* System V Release 4 has shared libraries. */ |
1406 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1407 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1408 | ||
8201327c | 1409 | /* FIXME: kettenis/20020511: Why do we override this function here? */ |
b4671f85 | 1410 | set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid); |
3ce1502b | 1411 | |
8201327c | 1412 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 MK |
1413 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
1414 | tdep->sc_pc_offset = 14 * 4; | |
1415 | tdep->sc_sp_offset = 7 * 4; | |
3ce1502b | 1416 | |
8201327c | 1417 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1418 | } |
1419 | ||
8201327c | 1420 | /* DJGPP. */ |
3ce1502b | 1421 | |
3a1e71e3 | 1422 | static void |
8201327c | 1423 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1424 | { |
8201327c | 1425 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1426 | |
8201327c | 1427 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1428 | |
8201327c | 1429 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1430 | } |
1431 | ||
8201327c | 1432 | /* NetWare. */ |
3ce1502b | 1433 | |
3a1e71e3 | 1434 | static void |
8201327c | 1435 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1436 | { |
8201327c | 1437 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1438 | |
8201327c | 1439 | /* FIXME: kettenis/20020511: Why do we override this function here? */ |
b4671f85 | 1440 | set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid); |
8201327c MK |
1441 | |
1442 | tdep->jb_pc_offset = 24; | |
d2a7c97a | 1443 | } |
8201327c | 1444 | \f |
2acceee2 | 1445 | |
38c968cf AC |
1446 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1447 | and "sse". */ | |
1448 | ||
1449 | static struct reggroup *i386_sse_reggroup; | |
1450 | static struct reggroup *i386_mmx_reggroup; | |
1451 | ||
1452 | static void | |
1453 | i386_init_reggroups (void) | |
1454 | { | |
1455 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1456 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1457 | } | |
1458 | ||
1459 | static void | |
1460 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1461 | { | |
1462 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1463 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1464 | reggroup_add (gdbarch, general_reggroup); | |
1465 | reggroup_add (gdbarch, float_reggroup); | |
1466 | reggroup_add (gdbarch, all_reggroup); | |
1467 | reggroup_add (gdbarch, save_reggroup); | |
1468 | reggroup_add (gdbarch, restore_reggroup); | |
1469 | reggroup_add (gdbarch, vector_reggroup); | |
1470 | reggroup_add (gdbarch, system_reggroup); | |
1471 | } | |
1472 | ||
1473 | int | |
1474 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1475 | struct reggroup *group) | |
1476 | { | |
1477 | int sse_regnum_p = (i386_sse_regnum_p (regnum) | |
1478 | || i386_mxcsr_regnum_p (regnum)); | |
1479 | int fp_regnum_p = (i386_fp_regnum_p (regnum) | |
1480 | || i386_fpc_regnum_p (regnum)); | |
1481 | int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); | |
1482 | if (group == i386_mmx_reggroup) | |
1483 | return mmx_regnum_p; | |
1484 | if (group == i386_sse_reggroup) | |
1485 | return sse_regnum_p; | |
1486 | if (group == vector_reggroup) | |
1487 | return (mmx_regnum_p || sse_regnum_p); | |
1488 | if (group == float_reggroup) | |
1489 | return fp_regnum_p; | |
1490 | if (group == general_reggroup) | |
1491 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
1492 | return default_register_reggroup_p (gdbarch, regnum, group); | |
1493 | } | |
1494 | ||
1495 | \f | |
3a1e71e3 | 1496 | static struct gdbarch * |
a62cc96e AC |
1497 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1498 | { | |
cd3c07fc | 1499 | struct gdbarch_tdep *tdep; |
a62cc96e | 1500 | struct gdbarch *gdbarch; |
8201327c | 1501 | enum gdb_osabi osabi = GDB_OSABI_UNKNOWN; |
a62cc96e | 1502 | |
8201327c | 1503 | /* Try to determine the OS ABI of the object we're loading. */ |
3ce1502b | 1504 | if (info.abfd != NULL) |
8201327c | 1505 | osabi = gdbarch_lookup_osabi (info.abfd); |
d2a7c97a | 1506 | |
3ce1502b | 1507 | /* Find a candidate among extant architectures. */ |
d2a7c97a MK |
1508 | for (arches = gdbarch_list_lookup_by_info (arches, &info); |
1509 | arches != NULL; | |
1510 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1511 | { | |
8201327c | 1512 | /* Make sure the OS ABI selection matches. */ |
65d6d66a | 1513 | tdep = gdbarch_tdep (arches->gdbarch); |
8201327c | 1514 | if (tdep && tdep->osabi == osabi) |
65d6d66a | 1515 | return arches->gdbarch; |
d2a7c97a | 1516 | } |
a62cc96e AC |
1517 | |
1518 | /* Allocate space for the new architecture. */ | |
1519 | tdep = XMALLOC (struct gdbarch_tdep); | |
1520 | gdbarch = gdbarch_alloc (&info, tdep); | |
1521 | ||
8201327c MK |
1522 | tdep->osabi = osabi; |
1523 | ||
1524 | /* The i386 default settings don't include the SSE registers. | |
356a6b3e MK |
1525 | FIXME: kettenis/20020614: They do include the FPU registers for |
1526 | now, which probably is not quite right. */ | |
8201327c | 1527 | tdep->num_xmm_regs = 0; |
d2a7c97a | 1528 | |
8201327c MK |
1529 | tdep->jb_pc_offset = -1; |
1530 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1531 | tdep->sigtramp_start = 0; |
1532 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1533 | tdep->sigcontext_addr = NULL; |
8201327c | 1534 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1535 | tdep->sc_sp_offset = -1; |
8201327c | 1536 | |
896fb97d MK |
1537 | /* The format used for `long double' on almost all i386 targets is |
1538 | the i387 extended floating-point format. In fact, of all targets | |
1539 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1540 | on having a `long double' that's not `long' at all. */ | |
1541 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1542 | |
66da5fd8 | 1543 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1544 | bits, a `long double' actually takes up 96, probably to enforce |
1545 | alignment. */ | |
1546 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1547 | ||
356a6b3e MK |
1548 | /* NOTE: tm-i386aix.h, tm-i386bsd.h, tm-i386os9k.h, tm-ptx.h, |
1549 | tm-symmetry.h currently override this. Sigh. */ | |
1550 | set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS); | |
21d0e8a4 | 1551 | |
66da5fd8 MK |
1552 | set_gdbarch_sp_regnum (gdbarch, 4); /* %esp */ |
1553 | set_gdbarch_fp_regnum (gdbarch, 5); /* %ebp */ | |
1554 | set_gdbarch_pc_regnum (gdbarch, 8); /* %eip */ | |
1555 | set_gdbarch_ps_regnum (gdbarch, 9); /* %eflags */ | |
1556 | set_gdbarch_fp0_regnum (gdbarch, 16); /* %st(0) */ | |
356a6b3e MK |
1557 | |
1558 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1559 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1560 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1561 | ||
1562 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1563 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1564 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1565 | ||
1566 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1567 | be in use on any of the supported i386 targets. */ | |
1568 | ||
1569 | set_gdbarch_register_name (gdbarch, i386_register_name); | |
1570 | set_gdbarch_register_size (gdbarch, 4); | |
1571 | set_gdbarch_register_bytes (gdbarch, I386_SIZEOF_GREGS + I386_SIZEOF_FREGS); | |
00f8375e MK |
1572 | set_gdbarch_max_register_raw_size (gdbarch, I386_MAX_REGISTER_SIZE); |
1573 | set_gdbarch_max_register_virtual_size (gdbarch, I386_MAX_REGISTER_SIZE); | |
b6197528 | 1574 | set_gdbarch_register_virtual_type (gdbarch, i386_register_virtual_type); |
356a6b3e | 1575 | |
61113f8b MK |
1576 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1577 | ||
8201327c | 1578 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1579 | |
c0d1d883 | 1580 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); |
a62cc96e AC |
1581 | |
1582 | /* Call dummy code. */ | |
c0d1d883 MK |
1583 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); |
1584 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
8758dec1 | 1585 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); |
c0d1d883 | 1586 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); |
a62cc96e | 1587 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); |
c0d1d883 | 1588 | set_gdbarch_call_dummy_length (gdbarch, 0); |
a62cc96e | 1589 | set_gdbarch_call_dummy_p (gdbarch, 1); |
c0d1d883 MK |
1590 | set_gdbarch_call_dummy_words (gdbarch, NULL); |
1591 | set_gdbarch_sizeof_call_dummy_words (gdbarch, 0); | |
a62cc96e | 1592 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); |
c0d1d883 | 1593 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); |
a62cc96e | 1594 | |
b6197528 MK |
1595 | set_gdbarch_register_convertible (gdbarch, i386_register_convertible); |
1596 | set_gdbarch_register_convert_to_virtual (gdbarch, | |
1597 | i386_register_convert_to_virtual); | |
1598 | set_gdbarch_register_convert_to_raw (gdbarch, i386_register_convert_to_raw); | |
1599 | ||
c0d1d883 | 1600 | set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point); |
a62cc96e | 1601 | |
8758dec1 MK |
1602 | /* "An argument's size is increased, if necessary, to make it a |
1603 | multiple of [32-bit] words. This may require tail padding, | |
1604 | depending on the size of the argument" -- from the x86 ABI. */ | |
1605 | set_gdbarch_parm_boundary (gdbarch, 32); | |
1606 | ||
00f8375e | 1607 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
fc08ec52 | 1608 | set_gdbarch_push_arguments (gdbarch, i386_push_arguments); |
c0d1d883 MK |
1609 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); |
1610 | set_gdbarch_push_return_address (gdbarch, i386_push_return_address); | |
fc08ec52 MK |
1611 | set_gdbarch_pop_frame (gdbarch, i386_pop_frame); |
1612 | set_gdbarch_store_struct_return (gdbarch, i386_store_struct_return); | |
3d7f4f49 | 1613 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1614 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1615 | i386_extract_struct_value_address); |
8201327c MK |
1616 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1617 | ||
42fdc8df | 1618 | set_gdbarch_frame_init_saved_regs (gdbarch, i386_frame_init_saved_regs); |
93924b6b MK |
1619 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1620 | ||
1621 | /* Stack grows downward. */ | |
1622 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1623 | ||
1624 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1625 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1626 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1627 | |
8201327c MK |
1628 | /* The following redefines make backtracing through sigtramp work. |
1629 | They manufacture a fake sigtramp frame and obtain the saved pc in | |
1630 | sigtramp from the sigcontext structure which is pushed by the | |
1631 | kernel on the user stack, along with a pointer to it. */ | |
1632 | ||
42fdc8df MK |
1633 | set_gdbarch_frame_args_skip (gdbarch, 8); |
1634 | set_gdbarch_frameless_function_invocation (gdbarch, | |
1635 | i386_frameless_function_invocation); | |
8201327c | 1636 | set_gdbarch_frame_chain (gdbarch, i386_frame_chain); |
c0d1d883 | 1637 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); |
8201327c MK |
1638 | set_gdbarch_frame_saved_pc (gdbarch, i386_frame_saved_pc); |
1639 | set_gdbarch_saved_pc_after_call (gdbarch, i386_saved_pc_after_call); | |
42fdc8df | 1640 | set_gdbarch_frame_num_args (gdbarch, i386_frame_num_args); |
8201327c MK |
1641 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1642 | ||
28fc6740 AC |
1643 | /* Wire in the MMX registers. */ |
1644 | set_gdbarch_num_pseudo_regs (gdbarch, mmx_num_regs); | |
1645 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); | |
1646 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1647 | ||
5e3397bb MK |
1648 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1649 | ||
38c968cf AC |
1650 | /* Add the i386 register groups. */ |
1651 | i386_add_reggroups (gdbarch); | |
1652 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1653 | ||
3ce1502b | 1654 | /* Hook in ABI-specific overrides, if they have been registered. */ |
8201327c | 1655 | gdbarch_init_osabi (info, gdbarch, osabi); |
3ce1502b | 1656 | |
a62cc96e AC |
1657 | return gdbarch; |
1658 | } | |
1659 | ||
8201327c MK |
1660 | static enum gdb_osabi |
1661 | i386_coff_osabi_sniffer (bfd *abfd) | |
1662 | { | |
762c5349 MK |
1663 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1664 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1665 | return GDB_OSABI_GO32; |
1666 | ||
1667 | return GDB_OSABI_UNKNOWN; | |
1668 | } | |
1669 | ||
1670 | static enum gdb_osabi | |
1671 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1672 | { | |
1673 | return GDB_OSABI_NETWARE; | |
1674 | } | |
1675 | \f | |
1676 | ||
28e9e0f0 MK |
1677 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1678 | void _initialize_i386_tdep (void); | |
1679 | ||
c906108c | 1680 | void |
fba45db2 | 1681 | _initialize_i386_tdep (void) |
c906108c | 1682 | { |
a62cc96e AC |
1683 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1684 | ||
fc338970 | 1685 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1686 | { |
1687 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1688 | |
917317f4 JM |
1689 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1690 | valid_flavors, | |
1ed2a135 | 1691 | &disassembly_flavor, |
fc338970 MK |
1692 | "\ |
1693 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1694 | and the default value is \"att\".", |
917317f4 | 1695 | &setlist); |
917317f4 JM |
1696 | add_show_from_set (new_cmd, &showlist); |
1697 | } | |
8201327c MK |
1698 | |
1699 | /* Add the variable that controls the convention for returning | |
1700 | structs. */ | |
1701 | { | |
1702 | struct cmd_list_element *new_cmd; | |
1703 | ||
1704 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1705 | valid_conventions, |
8201327c MK |
1706 | &struct_convention, "\ |
1707 | Set the convention for returning small structs, valid values \ | |
1708 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1709 | &setlist); | |
1710 | add_show_from_set (new_cmd, &showlist); | |
1711 | } | |
1712 | ||
1713 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1714 | i386_coff_osabi_sniffer); | |
1715 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1716 | i386_nlm_osabi_sniffer); | |
1717 | ||
1718 | gdbarch_register_osabi (bfd_arch_i386, GDB_OSABI_SVR4, | |
1719 | i386_svr4_init_abi); | |
1720 | gdbarch_register_osabi (bfd_arch_i386, GDB_OSABI_GO32, | |
1721 | i386_go32_init_abi); | |
1722 | gdbarch_register_osabi (bfd_arch_i386, GDB_OSABI_NETWARE, | |
1723 | i386_nw_init_abi); | |
38c968cf AC |
1724 | |
1725 | /* Initialize the i386 specific register groups. */ | |
1726 | i386_init_reggroups (); | |
c906108c | 1727 | } |