Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Intel 386 target-dependent stuff. |
349c5d5f AC |
2 | |
3 | Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, | |
4be87837 | 4 | 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
acd5c798 MK |
24 | #include "arch-utils.h" |
25 | #include "command.h" | |
26 | #include "dummy-frame.h" | |
6405b0a6 | 27 | #include "dwarf2-frame.h" |
acd5c798 MK |
28 | #include "doublest.h" |
29 | #include "floatformat.h" | |
c906108c | 30 | #include "frame.h" |
acd5c798 MK |
31 | #include "frame-base.h" |
32 | #include "frame-unwind.h" | |
c906108c | 33 | #include "inferior.h" |
acd5c798 | 34 | #include "gdbcmd.h" |
c906108c | 35 | #include "gdbcore.h" |
dfe01d39 | 36 | #include "objfiles.h" |
acd5c798 MK |
37 | #include "osabi.h" |
38 | #include "regcache.h" | |
39 | #include "reggroups.h" | |
c0d1d883 | 40 | #include "symfile.h" |
c906108c | 41 | #include "symtab.h" |
acd5c798 | 42 | #include "target.h" |
fd0407d6 | 43 | #include "value.h" |
acd5c798 | 44 | |
3d261580 | 45 | #include "gdb_assert.h" |
acd5c798 | 46 | #include "gdb_string.h" |
3d261580 | 47 | |
d2a7c97a | 48 | #include "i386-tdep.h" |
61113f8b | 49 | #include "i387-tdep.h" |
d2a7c97a | 50 | |
fc633446 MK |
51 | /* Names of the registers. The first 10 registers match the register |
52 | numbering scheme used by GCC for stabs and DWARF. */ | |
c40e1eab | 53 | |
fc633446 MK |
54 | static char *i386_register_names[] = |
55 | { | |
56 | "eax", "ecx", "edx", "ebx", | |
57 | "esp", "ebp", "esi", "edi", | |
58 | "eip", "eflags", "cs", "ss", | |
59 | "ds", "es", "fs", "gs", | |
60 | "st0", "st1", "st2", "st3", | |
61 | "st4", "st5", "st6", "st7", | |
62 | "fctrl", "fstat", "ftag", "fiseg", | |
63 | "fioff", "foseg", "fooff", "fop", | |
64 | "xmm0", "xmm1", "xmm2", "xmm3", | |
65 | "xmm4", "xmm5", "xmm6", "xmm7", | |
66 | "mxcsr" | |
67 | }; | |
68 | ||
c40e1eab MK |
69 | static const int i386_num_register_names = |
70 | (sizeof (i386_register_names) / sizeof (*i386_register_names)); | |
71 | ||
28fc6740 AC |
72 | /* MMX registers. */ |
73 | ||
74 | static char *i386_mmx_names[] = | |
75 | { | |
76 | "mm0", "mm1", "mm2", "mm3", | |
77 | "mm4", "mm5", "mm6", "mm7" | |
78 | }; | |
c40e1eab MK |
79 | |
80 | static const int i386_num_mmx_regs = | |
81 | (sizeof (i386_mmx_names) / sizeof (i386_mmx_names[0])); | |
82 | ||
83 | #define MM0_REGNUM NUM_REGS | |
28fc6740 AC |
84 | |
85 | static int | |
c40e1eab | 86 | i386_mmx_regnum_p (int regnum) |
28fc6740 | 87 | { |
c40e1eab MK |
88 | return (regnum >= MM0_REGNUM |
89 | && regnum < MM0_REGNUM + i386_num_mmx_regs); | |
28fc6740 AC |
90 | } |
91 | ||
23a34459 AC |
92 | /* FP register? */ |
93 | ||
94 | int | |
95 | i386_fp_regnum_p (int regnum) | |
96 | { | |
97 | return (regnum < NUM_REGS | |
c40e1eab | 98 | && (FP0_REGNUM && FP0_REGNUM <= regnum && regnum < FPC_REGNUM)); |
23a34459 AC |
99 | } |
100 | ||
101 | int | |
102 | i386_fpc_regnum_p (int regnum) | |
103 | { | |
104 | return (regnum < NUM_REGS | |
c40e1eab | 105 | && (FPC_REGNUM <= regnum && regnum < XMM0_REGNUM)); |
23a34459 AC |
106 | } |
107 | ||
108 | /* SSE register? */ | |
109 | ||
110 | int | |
111 | i386_sse_regnum_p (int regnum) | |
112 | { | |
113 | return (regnum < NUM_REGS | |
c40e1eab | 114 | && (XMM0_REGNUM <= regnum && regnum < MXCSR_REGNUM)); |
23a34459 AC |
115 | } |
116 | ||
117 | int | |
118 | i386_mxcsr_regnum_p (int regnum) | |
119 | { | |
120 | return (regnum < NUM_REGS | |
c40e1eab | 121 | && regnum == MXCSR_REGNUM); |
23a34459 AC |
122 | } |
123 | ||
fc633446 MK |
124 | /* Return the name of register REG. */ |
125 | ||
fa88f677 | 126 | const char * |
fc633446 MK |
127 | i386_register_name (int reg) |
128 | { | |
23a34459 | 129 | if (i386_mmx_regnum_p (reg)) |
28fc6740 | 130 | return i386_mmx_names[reg - MM0_REGNUM]; |
fc633446 | 131 | |
70913449 MK |
132 | if (reg >= 0 && reg < i386_num_register_names) |
133 | return i386_register_names[reg]; | |
134 | ||
c40e1eab | 135 | return NULL; |
fc633446 MK |
136 | } |
137 | ||
85540d8c MK |
138 | /* Convert stabs register number REG to the appropriate register |
139 | number used by GDB. */ | |
140 | ||
8201327c | 141 | static int |
85540d8c MK |
142 | i386_stab_reg_to_regnum (int reg) |
143 | { | |
144 | /* This implements what GCC calls the "default" register map. */ | |
145 | if (reg >= 0 && reg <= 7) | |
146 | { | |
acd5c798 | 147 | /* General-purpose registers. */ |
85540d8c MK |
148 | return reg; |
149 | } | |
150 | else if (reg >= 12 && reg <= 19) | |
151 | { | |
152 | /* Floating-point registers. */ | |
153 | return reg - 12 + FP0_REGNUM; | |
154 | } | |
155 | else if (reg >= 21 && reg <= 28) | |
156 | { | |
157 | /* SSE registers. */ | |
158 | return reg - 21 + XMM0_REGNUM; | |
159 | } | |
160 | else if (reg >= 29 && reg <= 36) | |
161 | { | |
162 | /* MMX registers. */ | |
7d12f766 | 163 | return reg - 29 + MM0_REGNUM; |
85540d8c MK |
164 | } |
165 | ||
166 | /* This will hopefully provoke a warning. */ | |
167 | return NUM_REGS + NUM_PSEUDO_REGS; | |
168 | } | |
169 | ||
8201327c | 170 | /* Convert DWARF register number REG to the appropriate register |
85540d8c MK |
171 | number used by GDB. */ |
172 | ||
8201327c | 173 | static int |
85540d8c MK |
174 | i386_dwarf_reg_to_regnum (int reg) |
175 | { | |
176 | /* The DWARF register numbering includes %eip and %eflags, and | |
177 | numbers the floating point registers differently. */ | |
178 | if (reg >= 0 && reg <= 9) | |
179 | { | |
acd5c798 | 180 | /* General-purpose registers. */ |
85540d8c MK |
181 | return reg; |
182 | } | |
183 | else if (reg >= 11 && reg <= 18) | |
184 | { | |
185 | /* Floating-point registers. */ | |
186 | return reg - 11 + FP0_REGNUM; | |
187 | } | |
188 | else if (reg >= 21) | |
189 | { | |
190 | /* The SSE and MMX registers have identical numbers as in stabs. */ | |
191 | return i386_stab_reg_to_regnum (reg); | |
192 | } | |
193 | ||
194 | /* This will hopefully provoke a warning. */ | |
195 | return NUM_REGS + NUM_PSEUDO_REGS; | |
196 | } | |
fc338970 | 197 | \f |
917317f4 | 198 | |
fc338970 MK |
199 | /* This is the variable that is set with "set disassembly-flavor", and |
200 | its legitimate values. */ | |
53904c9e AC |
201 | static const char att_flavor[] = "att"; |
202 | static const char intel_flavor[] = "intel"; | |
203 | static const char *valid_flavors[] = | |
c5aa993b | 204 | { |
c906108c SS |
205 | att_flavor, |
206 | intel_flavor, | |
207 | NULL | |
208 | }; | |
53904c9e | 209 | static const char *disassembly_flavor = att_flavor; |
acd5c798 | 210 | \f |
c906108c | 211 | |
acd5c798 MK |
212 | /* Use the program counter to determine the contents and size of a |
213 | breakpoint instruction. Return a pointer to a string of bytes that | |
214 | encode a breakpoint instruction, store the length of the string in | |
215 | *LEN and optionally adjust *PC to point to the correct memory | |
216 | location for inserting the breakpoint. | |
c906108c | 217 | |
acd5c798 MK |
218 | On the i386 we have a single breakpoint that fits in a single byte |
219 | and can be inserted anywhere. | |
c906108c | 220 | |
acd5c798 MK |
221 | This function is 64-bit safe. */ |
222 | ||
223 | static const unsigned char * | |
224 | i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) | |
c906108c | 225 | { |
acd5c798 MK |
226 | static unsigned char break_insn[] = { 0xcc }; /* int 3 */ |
227 | ||
228 | *len = sizeof (break_insn); | |
229 | return break_insn; | |
c906108c | 230 | } |
fc338970 | 231 | \f |
acd5c798 MK |
232 | #ifdef I386_REGNO_TO_SYMMETRY |
233 | #error "The Sequent Symmetry is no longer supported." | |
234 | #endif | |
c906108c | 235 | |
acd5c798 MK |
236 | /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi |
237 | and %esp "belong" to the calling function. Therefore these | |
238 | registers should be saved if they're going to be modified. */ | |
c906108c | 239 | |
acd5c798 MK |
240 | /* The maximum number of saved registers. This should include all |
241 | registers mentioned above, and %eip. */ | |
a3386186 | 242 | #define I386_NUM_SAVED_REGS I386_NUM_GREGS |
acd5c798 MK |
243 | |
244 | struct i386_frame_cache | |
c906108c | 245 | { |
acd5c798 MK |
246 | /* Base address. */ |
247 | CORE_ADDR base; | |
248 | CORE_ADDR sp_offset; | |
249 | CORE_ADDR pc; | |
250 | ||
fd13a04a AC |
251 | /* Saved registers. */ |
252 | CORE_ADDR saved_regs[I386_NUM_SAVED_REGS]; | |
acd5c798 MK |
253 | CORE_ADDR saved_sp; |
254 | int pc_in_eax; | |
255 | ||
256 | /* Stack space reserved for local variables. */ | |
257 | long locals; | |
258 | }; | |
259 | ||
260 | /* Allocate and initialize a frame cache. */ | |
261 | ||
262 | static struct i386_frame_cache * | |
fd13a04a | 263 | i386_alloc_frame_cache (void) |
acd5c798 MK |
264 | { |
265 | struct i386_frame_cache *cache; | |
266 | int i; | |
267 | ||
268 | cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); | |
269 | ||
270 | /* Base address. */ | |
271 | cache->base = 0; | |
272 | cache->sp_offset = -4; | |
273 | cache->pc = 0; | |
274 | ||
fd13a04a AC |
275 | /* Saved registers. We initialize these to -1 since zero is a valid |
276 | offset (that's where %ebp is supposed to be stored). */ | |
277 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
278 | cache->saved_regs[i] = -1; | |
acd5c798 MK |
279 | cache->saved_sp = 0; |
280 | cache->pc_in_eax = 0; | |
281 | ||
282 | /* Frameless until proven otherwise. */ | |
283 | cache->locals = -1; | |
284 | ||
285 | return cache; | |
286 | } | |
c906108c | 287 | |
acd5c798 MK |
288 | /* If the instruction at PC is a jump, return the address of its |
289 | target. Otherwise, return PC. */ | |
c906108c | 290 | |
acd5c798 MK |
291 | static CORE_ADDR |
292 | i386_follow_jump (CORE_ADDR pc) | |
293 | { | |
294 | unsigned char op; | |
295 | long delta = 0; | |
296 | int data16 = 0; | |
c906108c | 297 | |
acd5c798 MK |
298 | op = read_memory_unsigned_integer (pc, 1); |
299 | if (op == 0x66) | |
c906108c | 300 | { |
c906108c | 301 | data16 = 1; |
acd5c798 | 302 | op = read_memory_unsigned_integer (pc + 1, 1); |
c906108c SS |
303 | } |
304 | ||
acd5c798 | 305 | switch (op) |
c906108c SS |
306 | { |
307 | case 0xe9: | |
fc338970 | 308 | /* Relative jump: if data16 == 0, disp32, else disp16. */ |
c906108c SS |
309 | if (data16) |
310 | { | |
acd5c798 | 311 | delta = read_memory_integer (pc + 2, 2); |
c906108c | 312 | |
fc338970 MK |
313 | /* Include the size of the jmp instruction (including the |
314 | 0x66 prefix). */ | |
acd5c798 | 315 | delta += 4; |
c906108c SS |
316 | } |
317 | else | |
318 | { | |
acd5c798 | 319 | delta = read_memory_integer (pc + 1, 4); |
c906108c | 320 | |
acd5c798 MK |
321 | /* Include the size of the jmp instruction. */ |
322 | delta += 5; | |
c906108c SS |
323 | } |
324 | break; | |
325 | case 0xeb: | |
fc338970 | 326 | /* Relative jump, disp8 (ignore data16). */ |
acd5c798 | 327 | delta = read_memory_integer (pc + data16 + 1, 1); |
c906108c | 328 | |
acd5c798 | 329 | delta += data16 + 2; |
c906108c SS |
330 | break; |
331 | } | |
c906108c | 332 | |
acd5c798 MK |
333 | return pc + delta; |
334 | } | |
fc338970 | 335 | |
acd5c798 MK |
336 | /* Check whether PC points at a prologue for a function returning a |
337 | structure or union. If so, it updates CACHE and returns the | |
338 | address of the first instruction after the code sequence that | |
339 | removes the "hidden" argument from the stack or CURRENT_PC, | |
340 | whichever is smaller. Otherwise, return PC. */ | |
c906108c | 341 | |
acd5c798 MK |
342 | static CORE_ADDR |
343 | i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, | |
344 | struct i386_frame_cache *cache) | |
c906108c | 345 | { |
acd5c798 MK |
346 | /* Functions that return a structure or union start with: |
347 | ||
348 | popl %eax 0x58 | |
349 | xchgl %eax, (%esp) 0x87 0x04 0x24 | |
350 | or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00 | |
351 | ||
352 | (the System V compiler puts out the second `xchg' instruction, | |
353 | and the assembler doesn't try to optimize it, so the 'sib' form | |
354 | gets generated). This sequence is used to get the address of the | |
355 | return buffer for a function that returns a structure. */ | |
356 | static unsigned char proto1[3] = { 0x87, 0x04, 0x24 }; | |
357 | static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 }; | |
358 | unsigned char buf[4]; | |
c906108c SS |
359 | unsigned char op; |
360 | ||
acd5c798 MK |
361 | if (current_pc <= pc) |
362 | return pc; | |
363 | ||
364 | op = read_memory_unsigned_integer (pc, 1); | |
c906108c | 365 | |
acd5c798 MK |
366 | if (op != 0x58) /* popl %eax */ |
367 | return pc; | |
c906108c | 368 | |
acd5c798 MK |
369 | read_memory (pc + 1, buf, 4); |
370 | if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) | |
371 | return pc; | |
c906108c | 372 | |
acd5c798 | 373 | if (current_pc == pc) |
c906108c | 374 | { |
acd5c798 MK |
375 | cache->sp_offset += 4; |
376 | return current_pc; | |
c906108c SS |
377 | } |
378 | ||
acd5c798 | 379 | if (current_pc == pc + 1) |
c906108c | 380 | { |
acd5c798 MK |
381 | cache->pc_in_eax = 1; |
382 | return current_pc; | |
383 | } | |
384 | ||
385 | if (buf[1] == proto1[1]) | |
386 | return pc + 4; | |
387 | else | |
388 | return pc + 5; | |
389 | } | |
390 | ||
391 | static CORE_ADDR | |
392 | i386_skip_probe (CORE_ADDR pc) | |
393 | { | |
394 | /* A function may start with | |
fc338970 | 395 | |
acd5c798 MK |
396 | pushl constant |
397 | call _probe | |
398 | addl $4, %esp | |
fc338970 | 399 | |
acd5c798 MK |
400 | followed by |
401 | ||
402 | pushl %ebp | |
fc338970 | 403 | |
acd5c798 MK |
404 | etc. */ |
405 | unsigned char buf[8]; | |
406 | unsigned char op; | |
fc338970 | 407 | |
acd5c798 MK |
408 | op = read_memory_unsigned_integer (pc, 1); |
409 | ||
410 | if (op == 0x68 || op == 0x6a) | |
411 | { | |
412 | int delta; | |
c906108c | 413 | |
acd5c798 MK |
414 | /* Skip past the `pushl' instruction; it has either a one-byte or a |
415 | four-byte operand, depending on the opcode. */ | |
c906108c | 416 | if (op == 0x68) |
acd5c798 | 417 | delta = 5; |
c906108c | 418 | else |
acd5c798 | 419 | delta = 2; |
c906108c | 420 | |
acd5c798 MK |
421 | /* Read the following 8 bytes, which should be `call _probe' (6 |
422 | bytes) followed by `addl $4,%esp' (2 bytes). */ | |
423 | read_memory (pc + delta, buf, sizeof (buf)); | |
c906108c | 424 | if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4) |
acd5c798 | 425 | pc += delta + sizeof (buf); |
c906108c SS |
426 | } |
427 | ||
acd5c798 MK |
428 | return pc; |
429 | } | |
430 | ||
431 | /* Check whether PC points at a code that sets up a new stack frame. | |
432 | If so, it updates CACHE and returns the address of the first | |
433 | instruction after the sequence that sets removes the "hidden" | |
434 | argument from the stack or CURRENT_PC, whichever is smaller. | |
435 | Otherwise, return PC. */ | |
436 | ||
437 | static CORE_ADDR | |
438 | i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, | |
439 | struct i386_frame_cache *cache) | |
440 | { | |
441 | unsigned char op; | |
26604a34 | 442 | int skip = 0; |
acd5c798 MK |
443 | |
444 | if (current_pc <= pc) | |
445 | return current_pc; | |
446 | ||
447 | op = read_memory_unsigned_integer (pc, 1); | |
448 | ||
c906108c | 449 | if (op == 0x55) /* pushl %ebp */ |
c5aa993b | 450 | { |
acd5c798 MK |
451 | /* Take into account that we've executed the `pushl %ebp' that |
452 | starts this instruction sequence. */ | |
fd13a04a | 453 | cache->saved_regs[I386_EBP_REGNUM] = 0; |
acd5c798 MK |
454 | cache->sp_offset += 4; |
455 | ||
456 | /* If that's all, return now. */ | |
457 | if (current_pc <= pc + 1) | |
458 | return current_pc; | |
459 | ||
acd5c798 | 460 | op = read_memory_unsigned_integer (pc + 1, 1); |
26604a34 MK |
461 | |
462 | /* Check for some special instructions that might be migrated | |
463 | by GCC into the prologue. We check for | |
464 | ||
465 | xorl %ebx, %ebx | |
466 | xorl %ecx, %ecx | |
467 | xorl %edx, %edx | |
468 | ||
469 | and the equivalent | |
470 | ||
471 | subl %ebx, %ebx | |
472 | subl %ecx, %ecx | |
473 | subl %edx, %edx | |
474 | ||
475 | Make sure we only skip these instructions if we later see the | |
476 | `movl %esp, %ebp' that actually sets up the frame. */ | |
477 | while (op == 0x29 || op == 0x31) | |
478 | { | |
479 | op = read_memory_unsigned_integer (pc + skip + 2, 1); | |
480 | switch (op) | |
481 | { | |
482 | case 0xdb: /* %ebx */ | |
483 | case 0xc9: /* %ecx */ | |
484 | case 0xd2: /* %edx */ | |
485 | skip += 2; | |
486 | break; | |
487 | default: | |
488 | return pc + 1; | |
489 | } | |
490 | ||
491 | op = read_memory_unsigned_integer (pc + skip + 1, 1); | |
492 | } | |
493 | ||
494 | /* Check for `movl %esp, %ebp' -- can be written in two ways. */ | |
acd5c798 | 495 | switch (op) |
c906108c SS |
496 | { |
497 | case 0x8b: | |
26604a34 | 498 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xec) |
acd5c798 | 499 | return pc + 1; |
c906108c SS |
500 | break; |
501 | case 0x89: | |
26604a34 | 502 | if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xe5) |
acd5c798 | 503 | return pc + 1; |
c906108c SS |
504 | break; |
505 | default: | |
acd5c798 | 506 | return pc + 1; |
c906108c | 507 | } |
acd5c798 | 508 | |
26604a34 MK |
509 | /* OK, we actually have a frame. We just don't know how large |
510 | it is yet. Set its size to zero. We'll adjust it if | |
511 | necessary. We also now commit to skipping the special | |
512 | instructions mentioned before. */ | |
acd5c798 | 513 | cache->locals = 0; |
26604a34 | 514 | pc += skip; |
acd5c798 MK |
515 | |
516 | /* If that's all, return now. */ | |
517 | if (current_pc <= pc + 3) | |
518 | return current_pc; | |
519 | ||
fc338970 MK |
520 | /* Check for stack adjustment |
521 | ||
acd5c798 | 522 | subl $XXX, %esp |
fc338970 MK |
523 | |
524 | NOTE: You can't subtract a 16 bit immediate from a 32 bit | |
525 | reg, so we don't have to worry about a data16 prefix. */ | |
acd5c798 | 526 | op = read_memory_unsigned_integer (pc + 3, 1); |
c906108c SS |
527 | if (op == 0x83) |
528 | { | |
fc338970 | 529 | /* `subl' with 8 bit immediate. */ |
acd5c798 | 530 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 531 | /* Some instruction starting with 0x83 other than `subl'. */ |
acd5c798 MK |
532 | return pc + 3; |
533 | ||
534 | /* `subl' with signed byte immediate (though it wouldn't make | |
535 | sense to be negative). */ | |
536 | cache->locals = read_memory_integer (pc + 5, 1); | |
537 | return pc + 6; | |
c906108c SS |
538 | } |
539 | else if (op == 0x81) | |
540 | { | |
fc338970 | 541 | /* Maybe it is `subl' with a 32 bit immedediate. */ |
acd5c798 | 542 | if (read_memory_unsigned_integer (pc + 4, 1) != 0xec) |
fc338970 | 543 | /* Some instruction starting with 0x81 other than `subl'. */ |
acd5c798 MK |
544 | return pc + 3; |
545 | ||
fc338970 | 546 | /* It is `subl' with a 32 bit immediate. */ |
acd5c798 MK |
547 | cache->locals = read_memory_integer (pc + 5, 4); |
548 | return pc + 9; | |
c906108c SS |
549 | } |
550 | else | |
551 | { | |
acd5c798 MK |
552 | /* Some instruction other than `subl'. */ |
553 | return pc + 3; | |
c906108c SS |
554 | } |
555 | } | |
acd5c798 | 556 | else if (op == 0xc8) /* enter $XXX */ |
c906108c | 557 | { |
acd5c798 MK |
558 | cache->locals = read_memory_unsigned_integer (pc + 1, 2); |
559 | return pc + 4; | |
c906108c | 560 | } |
21d0e8a4 | 561 | |
acd5c798 | 562 | return pc; |
21d0e8a4 MK |
563 | } |
564 | ||
acd5c798 MK |
565 | /* Check whether PC points at code that saves registers on the stack. |
566 | If so, it updates CACHE and returns the address of the first | |
567 | instruction after the register saves or CURRENT_PC, whichever is | |
568 | smaller. Otherwise, return PC. */ | |
6bff26de MK |
569 | |
570 | static CORE_ADDR | |
acd5c798 MK |
571 | i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, |
572 | struct i386_frame_cache *cache) | |
6bff26de | 573 | { |
acd5c798 | 574 | if (cache->locals >= 0) |
267bf4bb | 575 | { |
acd5c798 MK |
576 | CORE_ADDR offset; |
577 | unsigned char op; | |
578 | int i; | |
c0d1d883 | 579 | |
acd5c798 MK |
580 | offset = - 4 - cache->locals; |
581 | for (i = 0; i < 8 && pc < current_pc; i++) | |
582 | { | |
583 | op = read_memory_unsigned_integer (pc, 1); | |
584 | if (op < 0x50 || op > 0x57) | |
585 | break; | |
0d17c81d | 586 | |
fd13a04a | 587 | cache->saved_regs[op - 0x50] = offset; |
acd5c798 MK |
588 | offset -= 4; |
589 | pc++; | |
590 | } | |
6bff26de MK |
591 | } |
592 | ||
acd5c798 | 593 | return pc; |
22797942 AC |
594 | } |
595 | ||
acd5c798 MK |
596 | /* Do a full analysis of the prologue at PC and update CACHE |
597 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
598 | address where the analysis stopped. | |
ed84f6c1 | 599 | |
fc338970 MK |
600 | We handle these cases: |
601 | ||
602 | The startup sequence can be at the start of the function, or the | |
603 | function can start with a branch to startup code at the end. | |
604 | ||
605 | %ebp can be set up with either the 'enter' instruction, or "pushl | |
606 | %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was | |
607 | once used in the System V compiler). | |
608 | ||
609 | Local space is allocated just below the saved %ebp by either the | |
610 | 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16 | |
611 | bit unsigned argument for space to allocate, and the 'addl' | |
612 | instruction could have either a signed byte, or 32 bit immediate. | |
613 | ||
614 | Next, the registers used by this function are pushed. With the | |
615 | System V compiler they will always be in the order: %edi, %esi, | |
616 | %ebx (and sometimes a harmless bug causes it to also save but not | |
617 | restore %eax); however, the code below is willing to see the pushes | |
618 | in any order, and will handle up to 8 of them. | |
619 | ||
620 | If the setup sequence is at the end of the function, then the next | |
621 | instruction will be a branch back to the start. */ | |
c906108c | 622 | |
acd5c798 MK |
623 | static CORE_ADDR |
624 | i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
625 | struct i386_frame_cache *cache) | |
c906108c | 626 | { |
acd5c798 MK |
627 | pc = i386_follow_jump (pc); |
628 | pc = i386_analyze_struct_return (pc, current_pc, cache); | |
629 | pc = i386_skip_probe (pc); | |
630 | pc = i386_analyze_frame_setup (pc, current_pc, cache); | |
631 | return i386_analyze_register_saves (pc, current_pc, cache); | |
c906108c SS |
632 | } |
633 | ||
fc338970 | 634 | /* Return PC of first real instruction. */ |
c906108c | 635 | |
3a1e71e3 | 636 | static CORE_ADDR |
acd5c798 | 637 | i386_skip_prologue (CORE_ADDR start_pc) |
c906108c | 638 | { |
c5aa993b | 639 | static unsigned char pic_pat[6] = |
acd5c798 MK |
640 | { |
641 | 0xe8, 0, 0, 0, 0, /* call 0x0 */ | |
642 | 0x5b, /* popl %ebx */ | |
c5aa993b | 643 | }; |
acd5c798 MK |
644 | struct i386_frame_cache cache; |
645 | CORE_ADDR pc; | |
646 | unsigned char op; | |
647 | int i; | |
c5aa993b | 648 | |
acd5c798 MK |
649 | cache.locals = -1; |
650 | pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache); | |
651 | if (cache.locals < 0) | |
652 | return start_pc; | |
c5aa993b | 653 | |
acd5c798 | 654 | /* Found valid frame setup. */ |
c906108c | 655 | |
fc338970 MK |
656 | /* The native cc on SVR4 in -K PIC mode inserts the following code |
657 | to get the address of the global offset table (GOT) into register | |
acd5c798 MK |
658 | %ebx: |
659 | ||
fc338970 MK |
660 | call 0x0 |
661 | popl %ebx | |
662 | movl %ebx,x(%ebp) (optional) | |
663 | addl y,%ebx | |
664 | ||
c906108c SS |
665 | This code is with the rest of the prologue (at the end of the |
666 | function), so we have to skip it to get to the first real | |
667 | instruction at the start of the function. */ | |
c5aa993b | 668 | |
c906108c SS |
669 | for (i = 0; i < 6; i++) |
670 | { | |
acd5c798 | 671 | op = read_memory_unsigned_integer (pc + i, 1); |
c5aa993b | 672 | if (pic_pat[i] != op) |
c906108c SS |
673 | break; |
674 | } | |
675 | if (i == 6) | |
676 | { | |
acd5c798 MK |
677 | int delta = 6; |
678 | ||
679 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 680 | |
c5aa993b | 681 | if (op == 0x89) /* movl %ebx, x(%ebp) */ |
c906108c | 682 | { |
acd5c798 MK |
683 | op = read_memory_unsigned_integer (pc + delta + 1, 1); |
684 | ||
fc338970 | 685 | if (op == 0x5d) /* One byte offset from %ebp. */ |
acd5c798 | 686 | delta += 3; |
fc338970 | 687 | else if (op == 0x9d) /* Four byte offset from %ebp. */ |
acd5c798 | 688 | delta += 6; |
fc338970 | 689 | else /* Unexpected instruction. */ |
acd5c798 MK |
690 | delta = 0; |
691 | ||
692 | op = read_memory_unsigned_integer (pc + delta, 1); | |
c906108c | 693 | } |
acd5c798 | 694 | |
c5aa993b | 695 | /* addl y,%ebx */ |
acd5c798 MK |
696 | if (delta > 0 && op == 0x81 |
697 | && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3); | |
c906108c | 698 | { |
acd5c798 | 699 | pc += delta + 6; |
c906108c SS |
700 | } |
701 | } | |
c5aa993b | 702 | |
acd5c798 | 703 | return i386_follow_jump (pc); |
c906108c SS |
704 | } |
705 | ||
acd5c798 | 706 | /* This function is 64-bit safe. */ |
93924b6b | 707 | |
acd5c798 MK |
708 | static CORE_ADDR |
709 | i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
93924b6b | 710 | { |
acd5c798 MK |
711 | char buf[8]; |
712 | ||
713 | frame_unwind_register (next_frame, PC_REGNUM, buf); | |
714 | return extract_typed_address (buf, builtin_type_void_func_ptr); | |
93924b6b | 715 | } |
acd5c798 | 716 | \f |
93924b6b | 717 | |
acd5c798 | 718 | /* Normal frames. */ |
c5aa993b | 719 | |
acd5c798 MK |
720 | static struct i386_frame_cache * |
721 | i386_frame_cache (struct frame_info *next_frame, void **this_cache) | |
a7769679 | 722 | { |
acd5c798 | 723 | struct i386_frame_cache *cache; |
c0d1d883 | 724 | char buf[4]; |
acd5c798 MK |
725 | int i; |
726 | ||
727 | if (*this_cache) | |
728 | return *this_cache; | |
729 | ||
fd13a04a | 730 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
731 | *this_cache = cache; |
732 | ||
733 | /* In principle, for normal frames, %ebp holds the frame pointer, | |
734 | which holds the base address for the current stack frame. | |
735 | However, for functions that don't need it, the frame pointer is | |
736 | optional. For these "frameless" functions the frame pointer is | |
737 | actually the frame pointer of the calling frame. Signal | |
738 | trampolines are just a special case of a "frameless" function. | |
739 | They (usually) share their frame pointer with the frame that was | |
740 | in progress when the signal occurred. */ | |
741 | ||
742 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
743 | cache->base = extract_unsigned_integer (buf, 4); | |
744 | if (cache->base == 0) | |
745 | return cache; | |
746 | ||
747 | /* For normal frames, %eip is stored at 4(%ebp). */ | |
fd13a04a | 748 | cache->saved_regs[I386_EIP_REGNUM] = 4; |
acd5c798 MK |
749 | |
750 | cache->pc = frame_func_unwind (next_frame); | |
751 | if (cache->pc != 0) | |
752 | i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache); | |
753 | ||
754 | if (cache->locals < 0) | |
755 | { | |
756 | /* We didn't find a valid frame, which means that CACHE->base | |
757 | currently holds the frame pointer for our calling frame. If | |
758 | we're at the start of a function, or somewhere half-way its | |
759 | prologue, the function's frame probably hasn't been fully | |
760 | setup yet. Try to reconstruct the base address for the stack | |
761 | frame by looking at the stack pointer. For truly "frameless" | |
762 | functions this might work too. */ | |
763 | ||
764 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
765 | cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset; | |
766 | } | |
767 | ||
768 | /* Now that we have the base address for the stack frame we can | |
769 | calculate the value of %esp in the calling frame. */ | |
770 | cache->saved_sp = cache->base + 8; | |
a7769679 | 771 | |
acd5c798 MK |
772 | /* Adjust all the saved registers such that they contain addresses |
773 | instead of offsets. */ | |
774 | for (i = 0; i < I386_NUM_SAVED_REGS; i++) | |
fd13a04a AC |
775 | if (cache->saved_regs[i] != -1) |
776 | cache->saved_regs[i] += cache->base; | |
acd5c798 MK |
777 | |
778 | return cache; | |
a7769679 MK |
779 | } |
780 | ||
3a1e71e3 | 781 | static void |
acd5c798 MK |
782 | i386_frame_this_id (struct frame_info *next_frame, void **this_cache, |
783 | struct frame_id *this_id) | |
c906108c | 784 | { |
acd5c798 MK |
785 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); |
786 | ||
787 | /* This marks the outermost frame. */ | |
788 | if (cache->base == 0) | |
789 | return; | |
790 | ||
3e210248 | 791 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
792 | (*this_id) = frame_id_build (cache->base + 8, cache->pc); |
793 | } | |
794 | ||
795 | static void | |
796 | i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
797 | int regnum, int *optimizedp, | |
798 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
799 | int *realnump, void *valuep) | |
800 | { | |
801 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
802 | ||
803 | gdb_assert (regnum >= 0); | |
804 | ||
805 | /* The System V ABI says that: | |
806 | ||
807 | "The flags register contains the system flags, such as the | |
808 | direction flag and the carry flag. The direction flag must be | |
809 | set to the forward (that is, zero) direction before entry and | |
810 | upon exit from a function. Other user flags have no specified | |
811 | role in the standard calling sequence and are not preserved." | |
812 | ||
813 | To guarantee the "upon exit" part of that statement we fake a | |
814 | saved flags register that has its direction flag cleared. | |
815 | ||
816 | Note that GCC doesn't seem to rely on the fact that the direction | |
817 | flag is cleared after a function return; it always explicitly | |
818 | clears the flag before operations where it matters. | |
819 | ||
820 | FIXME: kettenis/20030316: I'm not quite sure whether this is the | |
821 | right thing to do. The way we fake the flags register here makes | |
822 | it impossible to change it. */ | |
823 | ||
824 | if (regnum == I386_EFLAGS_REGNUM) | |
825 | { | |
826 | *optimizedp = 0; | |
827 | *lvalp = not_lval; | |
828 | *addrp = 0; | |
829 | *realnump = -1; | |
830 | if (valuep) | |
831 | { | |
832 | ULONGEST val; | |
c5aa993b | 833 | |
acd5c798 MK |
834 | /* Clear the direction flag. */ |
835 | frame_unwind_unsigned_register (next_frame, PS_REGNUM, &val); | |
836 | val &= ~(1 << 10); | |
837 | store_unsigned_integer (valuep, 4, val); | |
838 | } | |
839 | ||
840 | return; | |
841 | } | |
1211c4e4 | 842 | |
acd5c798 | 843 | if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) |
c906108c | 844 | { |
acd5c798 MK |
845 | frame_register_unwind (next_frame, I386_EAX_REGNUM, |
846 | optimizedp, lvalp, addrp, realnump, valuep); | |
847 | return; | |
848 | } | |
849 | ||
850 | if (regnum == I386_ESP_REGNUM && cache->saved_sp) | |
851 | { | |
852 | *optimizedp = 0; | |
853 | *lvalp = not_lval; | |
854 | *addrp = 0; | |
855 | *realnump = -1; | |
856 | if (valuep) | |
c906108c | 857 | { |
acd5c798 MK |
858 | /* Store the value. */ |
859 | store_unsigned_integer (valuep, 4, cache->saved_sp); | |
c906108c | 860 | } |
acd5c798 | 861 | return; |
c906108c | 862 | } |
acd5c798 | 863 | |
fd13a04a AC |
864 | if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) |
865 | { | |
866 | *optimizedp = 0; | |
867 | *lvalp = lval_memory; | |
868 | *addrp = cache->saved_regs[regnum]; | |
869 | *realnump = -1; | |
870 | if (valuep) | |
871 | { | |
872 | /* Read the value in from memory. */ | |
873 | read_memory (*addrp, valuep, | |
874 | register_size (current_gdbarch, regnum)); | |
875 | } | |
876 | return; | |
877 | } | |
878 | ||
879 | frame_register_unwind (next_frame, regnum, | |
880 | optimizedp, lvalp, addrp, realnump, valuep); | |
acd5c798 MK |
881 | } |
882 | ||
883 | static const struct frame_unwind i386_frame_unwind = | |
884 | { | |
885 | NORMAL_FRAME, | |
886 | i386_frame_this_id, | |
887 | i386_frame_prev_register | |
888 | }; | |
889 | ||
890 | static const struct frame_unwind * | |
336d1bba | 891 | i386_frame_sniffer (struct frame_info *next_frame) |
acd5c798 MK |
892 | { |
893 | return &i386_frame_unwind; | |
894 | } | |
895 | \f | |
896 | ||
897 | /* Signal trampolines. */ | |
898 | ||
899 | static struct i386_frame_cache * | |
900 | i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) | |
901 | { | |
902 | struct i386_frame_cache *cache; | |
903 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
904 | CORE_ADDR addr; | |
905 | char buf[4]; | |
906 | ||
907 | if (*this_cache) | |
908 | return *this_cache; | |
909 | ||
fd13a04a | 910 | cache = i386_alloc_frame_cache (); |
acd5c798 MK |
911 | |
912 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); | |
913 | cache->base = extract_unsigned_integer (buf, 4) - 4; | |
914 | ||
915 | addr = tdep->sigcontext_addr (next_frame); | |
a3386186 MK |
916 | if (tdep->sc_reg_offset) |
917 | { | |
918 | int i; | |
919 | ||
920 | gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); | |
921 | ||
922 | for (i = 0; i < tdep->sc_num_regs; i++) | |
923 | if (tdep->sc_reg_offset[i] != -1) | |
fd13a04a | 924 | cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; |
a3386186 MK |
925 | } |
926 | else | |
927 | { | |
fd13a04a AC |
928 | cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; |
929 | cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; | |
a3386186 | 930 | } |
acd5c798 MK |
931 | |
932 | *this_cache = cache; | |
933 | return cache; | |
934 | } | |
935 | ||
936 | static void | |
937 | i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
938 | struct frame_id *this_id) | |
939 | { | |
940 | struct i386_frame_cache *cache = | |
941 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
942 | ||
3e210248 | 943 | /* See the end of i386_push_dummy_call. */ |
acd5c798 MK |
944 | (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); |
945 | } | |
946 | ||
947 | static void | |
948 | i386_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
949 | void **this_cache, | |
950 | int regnum, int *optimizedp, | |
951 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
952 | int *realnump, void *valuep) | |
953 | { | |
954 | /* Make sure we've initialized the cache. */ | |
955 | i386_sigtramp_frame_cache (next_frame, this_cache); | |
956 | ||
957 | i386_frame_prev_register (next_frame, this_cache, regnum, | |
958 | optimizedp, lvalp, addrp, realnump, valuep); | |
c906108c | 959 | } |
c0d1d883 | 960 | |
acd5c798 MK |
961 | static const struct frame_unwind i386_sigtramp_frame_unwind = |
962 | { | |
963 | SIGTRAMP_FRAME, | |
964 | i386_sigtramp_frame_this_id, | |
965 | i386_sigtramp_frame_prev_register | |
966 | }; | |
967 | ||
968 | static const struct frame_unwind * | |
336d1bba | 969 | i386_sigtramp_frame_sniffer (struct frame_info *next_frame) |
acd5c798 | 970 | { |
336d1bba | 971 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
acd5c798 MK |
972 | char *name; |
973 | ||
1c3545ae MK |
974 | /* We shouldn't even bother to try if the OSABI didn't register |
975 | a sigcontext_addr handler. */ | |
976 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
977 | return NULL; | |
978 | ||
acd5c798 MK |
979 | find_pc_partial_function (pc, &name, NULL, NULL); |
980 | if (PC_IN_SIGTRAMP (pc, name)) | |
981 | return &i386_sigtramp_frame_unwind; | |
982 | ||
983 | return NULL; | |
984 | } | |
985 | \f | |
986 | ||
987 | static CORE_ADDR | |
988 | i386_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
989 | { | |
990 | struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache); | |
991 | ||
992 | return cache->base; | |
993 | } | |
994 | ||
995 | static const struct frame_base i386_frame_base = | |
996 | { | |
997 | &i386_frame_unwind, | |
998 | i386_frame_base_address, | |
999 | i386_frame_base_address, | |
1000 | i386_frame_base_address | |
1001 | }; | |
1002 | ||
acd5c798 MK |
1003 | static struct frame_id |
1004 | i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1005 | { | |
1006 | char buf[4]; | |
1007 | CORE_ADDR fp; | |
1008 | ||
1009 | frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); | |
1010 | fp = extract_unsigned_integer (buf, 4); | |
1011 | ||
3e210248 | 1012 | /* See the end of i386_push_dummy_call. */ |
acd5c798 | 1013 | return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); |
c0d1d883 | 1014 | } |
fc338970 | 1015 | \f |
c906108c | 1016 | |
fc338970 MK |
1017 | /* Figure out where the longjmp will land. Slurp the args out of the |
1018 | stack. We expect the first arg to be a pointer to the jmp_buf | |
8201327c | 1019 | structure from which we extract the address that we will land at. |
28bcfd30 | 1020 | This address is copied into PC. This routine returns non-zero on |
acd5c798 MK |
1021 | success. |
1022 | ||
1023 | This function is 64-bit safe. */ | |
c906108c | 1024 | |
8201327c MK |
1025 | static int |
1026 | i386_get_longjmp_target (CORE_ADDR *pc) | |
c906108c | 1027 | { |
28bcfd30 | 1028 | char buf[8]; |
c906108c | 1029 | CORE_ADDR sp, jb_addr; |
8201327c | 1030 | int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset; |
f9d3c2a8 | 1031 | int len = TYPE_LENGTH (builtin_type_void_func_ptr); |
c906108c | 1032 | |
8201327c MK |
1033 | /* If JB_PC_OFFSET is -1, we have no way to find out where the |
1034 | longjmp will land. */ | |
1035 | if (jb_pc_offset == -1) | |
c906108c SS |
1036 | return 0; |
1037 | ||
8201327c | 1038 | sp = read_register (SP_REGNUM); |
28bcfd30 | 1039 | if (target_read_memory (sp + len, buf, len)) |
c906108c SS |
1040 | return 0; |
1041 | ||
f9d3c2a8 | 1042 | jb_addr = extract_typed_address (buf, builtin_type_void_func_ptr); |
28bcfd30 | 1043 | if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) |
8201327c | 1044 | return 0; |
c906108c | 1045 | |
f9d3c2a8 | 1046 | *pc = extract_typed_address (buf, builtin_type_void_func_ptr); |
c906108c SS |
1047 | return 1; |
1048 | } | |
fc338970 | 1049 | \f |
c906108c | 1050 | |
3a1e71e3 | 1051 | static CORE_ADDR |
6a65450a AC |
1052 | i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1053 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
1054 | struct value **args, CORE_ADDR sp, int struct_return, | |
1055 | CORE_ADDR struct_addr) | |
22f8ba57 | 1056 | { |
acd5c798 MK |
1057 | char buf[4]; |
1058 | int i; | |
1059 | ||
1060 | /* Push arguments in reverse order. */ | |
1061 | for (i = nargs - 1; i >= 0; i--) | |
22f8ba57 | 1062 | { |
acd5c798 MK |
1063 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i])); |
1064 | ||
1065 | /* The System V ABI says that: | |
1066 | ||
1067 | "An argument's size is increased, if necessary, to make it a | |
1068 | multiple of [32-bit] words. This may require tail padding, | |
1069 | depending on the size of the argument." | |
1070 | ||
1071 | This makes sure the stack says word-aligned. */ | |
1072 | sp -= (len + 3) & ~3; | |
1073 | write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len); | |
1074 | } | |
22f8ba57 | 1075 | |
acd5c798 MK |
1076 | /* Push value address. */ |
1077 | if (struct_return) | |
1078 | { | |
22f8ba57 | 1079 | sp -= 4; |
fbd9dcd3 | 1080 | store_unsigned_integer (buf, 4, struct_addr); |
22f8ba57 MK |
1081 | write_memory (sp, buf, 4); |
1082 | } | |
1083 | ||
acd5c798 MK |
1084 | /* Store return address. */ |
1085 | sp -= 4; | |
6a65450a | 1086 | store_unsigned_integer (buf, 4, bp_addr); |
acd5c798 MK |
1087 | write_memory (sp, buf, 4); |
1088 | ||
1089 | /* Finally, update the stack pointer... */ | |
1090 | store_unsigned_integer (buf, 4, sp); | |
1091 | regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); | |
1092 | ||
1093 | /* ...and fake a frame pointer. */ | |
1094 | regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); | |
1095 | ||
3e210248 AC |
1096 | /* MarkK wrote: This "+ 8" is all over the place: |
1097 | (i386_frame_this_id, i386_sigtramp_frame_this_id, | |
1098 | i386_unwind_dummy_id). It's there, since all frame unwinders for | |
1099 | a given target have to agree (within a certain margin) on the | |
1100 | defenition of the stack address of a frame. Otherwise | |
1101 | frame_id_inner() won't work correctly. Since DWARF2/GCC uses the | |
1102 | stack address *before* the function call as a frame's CFA. On | |
1103 | the i386, when %ebp is used as a frame pointer, the offset | |
1104 | between the contents %ebp and the CFA as defined by GCC. */ | |
1105 | return sp + 8; | |
22f8ba57 MK |
1106 | } |
1107 | ||
1a309862 MK |
1108 | /* These registers are used for returning integers (and on some |
1109 | targets also for returning `struct' and `union' values when their | |
ef9dff19 | 1110 | size and alignment match an integer type). */ |
acd5c798 MK |
1111 | #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ |
1112 | #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ | |
1a309862 MK |
1113 | |
1114 | /* Extract from an array REGBUF containing the (raw) register state, a | |
1115 | function return value of TYPE, and copy that, in virtual format, | |
1116 | into VALBUF. */ | |
1117 | ||
3a1e71e3 | 1118 | static void |
00f8375e | 1119 | i386_extract_return_value (struct type *type, struct regcache *regcache, |
ebba8386 | 1120 | void *dst) |
c906108c | 1121 | { |
ebba8386 | 1122 | bfd_byte *valbuf = dst; |
1a309862 | 1123 | int len = TYPE_LENGTH (type); |
00f8375e | 1124 | char buf[I386_MAX_REGISTER_SIZE]; |
1a309862 | 1125 | |
1e8d0a7b MK |
1126 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1127 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1128 | { |
00f8375e | 1129 | i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1130 | return; |
1131 | } | |
1e8d0a7b MK |
1132 | |
1133 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
c906108c | 1134 | { |
94ea66b3 | 1135 | if (FP0_REGNUM < 0) |
1a309862 MK |
1136 | { |
1137 | warning ("Cannot find floating-point return value."); | |
1138 | memset (valbuf, 0, len); | |
ef9dff19 | 1139 | return; |
1a309862 MK |
1140 | } |
1141 | ||
c6ba6f0d MK |
1142 | /* Floating-point return values can be found in %st(0). Convert |
1143 | its contents to the desired type. This is probably not | |
1144 | exactly how it would happen on the target itself, but it is | |
1145 | the best we can do. */ | |
acd5c798 | 1146 | regcache_raw_read (regcache, I386_ST0_REGNUM, buf); |
00f8375e | 1147 | convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type); |
c906108c SS |
1148 | } |
1149 | else | |
c5aa993b | 1150 | { |
d4f3574e SS |
1151 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); |
1152 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1153 | ||
1154 | if (len <= low_size) | |
00f8375e | 1155 | { |
0818c12a | 1156 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e MK |
1157 | memcpy (valbuf, buf, len); |
1158 | } | |
d4f3574e SS |
1159 | else if (len <= (low_size + high_size)) |
1160 | { | |
0818c12a | 1161 | regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); |
00f8375e | 1162 | memcpy (valbuf, buf, low_size); |
0818c12a | 1163 | regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); |
00f8375e | 1164 | memcpy (valbuf + low_size, buf, len - low_size); |
d4f3574e SS |
1165 | } |
1166 | else | |
8e65ff28 AC |
1167 | internal_error (__FILE__, __LINE__, |
1168 | "Cannot extract return value of %d bytes long.", len); | |
c906108c SS |
1169 | } |
1170 | } | |
1171 | ||
ef9dff19 MK |
1172 | /* Write into the appropriate registers a function return value stored |
1173 | in VALBUF of type TYPE, given in virtual format. */ | |
1174 | ||
3a1e71e3 | 1175 | static void |
3d7f4f49 MK |
1176 | i386_store_return_value (struct type *type, struct regcache *regcache, |
1177 | const void *valbuf) | |
ef9dff19 MK |
1178 | { |
1179 | int len = TYPE_LENGTH (type); | |
1180 | ||
1e8d0a7b MK |
1181 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1182 | && TYPE_NFIELDS (type) == 1) | |
3df1b9b4 | 1183 | { |
3d7f4f49 | 1184 | i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); |
3df1b9b4 MK |
1185 | return; |
1186 | } | |
1e8d0a7b MK |
1187 | |
1188 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
ef9dff19 | 1189 | { |
3d7f4f49 | 1190 | ULONGEST fstat; |
c6ba6f0d | 1191 | char buf[FPU_REG_RAW_SIZE]; |
ccb945b8 | 1192 | |
94ea66b3 | 1193 | if (FP0_REGNUM < 0) |
ef9dff19 MK |
1194 | { |
1195 | warning ("Cannot set floating-point return value."); | |
1196 | return; | |
1197 | } | |
1198 | ||
635b0cc1 MK |
1199 | /* Returning floating-point values is a bit tricky. Apart from |
1200 | storing the return value in %st(0), we have to simulate the | |
1201 | state of the FPU at function return point. */ | |
1202 | ||
c6ba6f0d MK |
1203 | /* Convert the value found in VALBUF to the extended |
1204 | floating-point format used by the FPU. This is probably | |
1205 | not exactly how it would happen on the target itself, but | |
1206 | it is the best we can do. */ | |
1207 | convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext); | |
acd5c798 | 1208 | regcache_raw_write (regcache, I386_ST0_REGNUM, buf); |
ccb945b8 | 1209 | |
635b0cc1 MK |
1210 | /* Set the top of the floating-point register stack to 7. The |
1211 | actual value doesn't really matter, but 7 is what a normal | |
1212 | function return would end up with if the program started out | |
1213 | with a freshly initialized FPU. */ | |
3d7f4f49 | 1214 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); |
ccb945b8 | 1215 | fstat |= (7 << 11); |
3d7f4f49 | 1216 | regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); |
ccb945b8 | 1217 | |
635b0cc1 MK |
1218 | /* Mark %st(1) through %st(7) as empty. Since we set the top of |
1219 | the floating-point register stack to 7, the appropriate value | |
1220 | for the tag word is 0x3fff. */ | |
3d7f4f49 | 1221 | regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); |
ef9dff19 MK |
1222 | } |
1223 | else | |
1224 | { | |
1225 | int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); | |
1226 | int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); | |
1227 | ||
1228 | if (len <= low_size) | |
3d7f4f49 | 1229 | regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); |
ef9dff19 MK |
1230 | else if (len <= (low_size + high_size)) |
1231 | { | |
3d7f4f49 MK |
1232 | regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); |
1233 | regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, | |
1234 | len - low_size, (char *) valbuf + low_size); | |
ef9dff19 MK |
1235 | } |
1236 | else | |
8e65ff28 AC |
1237 | internal_error (__FILE__, __LINE__, |
1238 | "Cannot store return value of %d bytes long.", len); | |
ef9dff19 MK |
1239 | } |
1240 | } | |
f7af9647 | 1241 | |
751f1375 MK |
1242 | /* Extract from REGCACHE, which contains the (raw) register state, the |
1243 | address in which a function should return its structure value, as a | |
1244 | CORE_ADDR. */ | |
f7af9647 | 1245 | |
3a1e71e3 | 1246 | static CORE_ADDR |
00f8375e | 1247 | i386_extract_struct_value_address (struct regcache *regcache) |
f7af9647 | 1248 | { |
acd5c798 | 1249 | char buf[4]; |
751f1375 | 1250 | |
acd5c798 MK |
1251 | regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); |
1252 | return extract_unsigned_integer (buf, 4); | |
f7af9647 | 1253 | } |
fc338970 | 1254 | \f |
ef9dff19 | 1255 | |
8201327c MK |
1256 | /* This is the variable that is set with "set struct-convention", and |
1257 | its legitimate values. */ | |
1258 | static const char default_struct_convention[] = "default"; | |
1259 | static const char pcc_struct_convention[] = "pcc"; | |
1260 | static const char reg_struct_convention[] = "reg"; | |
1261 | static const char *valid_conventions[] = | |
1262 | { | |
1263 | default_struct_convention, | |
1264 | pcc_struct_convention, | |
1265 | reg_struct_convention, | |
1266 | NULL | |
1267 | }; | |
1268 | static const char *struct_convention = default_struct_convention; | |
1269 | ||
1270 | static int | |
1271 | i386_use_struct_convention (int gcc_p, struct type *type) | |
1272 | { | |
1273 | enum struct_return struct_return; | |
1274 | ||
1275 | if (struct_convention == default_struct_convention) | |
1276 | struct_return = gdbarch_tdep (current_gdbarch)->struct_return; | |
1277 | else if (struct_convention == pcc_struct_convention) | |
1278 | struct_return = pcc_struct_return; | |
1279 | else | |
1280 | struct_return = reg_struct_return; | |
1281 | ||
1282 | return generic_use_struct_convention (struct_return == reg_struct_return, | |
1283 | type); | |
1284 | } | |
1285 | \f | |
1286 | ||
d7a0d72c MK |
1287 | /* Return the GDB type object for the "standard" data type of data in |
1288 | register REGNUM. Perhaps %esi and %edi should go here, but | |
1289 | potentially they could be used for things other than address. */ | |
1290 | ||
3a1e71e3 | 1291 | static struct type * |
4e259f09 | 1292 | i386_register_type (struct gdbarch *gdbarch, int regnum) |
d7a0d72c | 1293 | { |
acd5c798 MK |
1294 | if (regnum == I386_EIP_REGNUM |
1295 | || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM) | |
d7a0d72c MK |
1296 | return lookup_pointer_type (builtin_type_void); |
1297 | ||
23a34459 | 1298 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1299 | return builtin_type_i387_ext; |
d7a0d72c | 1300 | |
23a34459 | 1301 | if (i386_sse_regnum_p (regnum)) |
3139facc | 1302 | return builtin_type_vec128i; |
d7a0d72c | 1303 | |
23a34459 | 1304 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 AC |
1305 | return builtin_type_vec64i; |
1306 | ||
d7a0d72c MK |
1307 | return builtin_type_int; |
1308 | } | |
1309 | ||
28fc6740 | 1310 | /* Map a cooked register onto a raw register or memory. For the i386, |
acd5c798 | 1311 | the MMX registers need to be mapped onto floating point registers. */ |
28fc6740 AC |
1312 | |
1313 | static int | |
c86c27af | 1314 | i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) |
28fc6740 AC |
1315 | { |
1316 | int mmxi; | |
1317 | ULONGEST fstat; | |
1318 | int tos; | |
1319 | int fpi; | |
c86c27af | 1320 | |
28fc6740 AC |
1321 | mmxi = regnum - MM0_REGNUM; |
1322 | regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); | |
1323 | tos = (fstat >> 11) & 0x7; | |
1324 | fpi = (mmxi + tos) % 8; | |
c86c27af | 1325 | |
28fc6740 AC |
1326 | return (FP0_REGNUM + fpi); |
1327 | } | |
1328 | ||
1329 | static void | |
1330 | i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1331 | int regnum, void *buf) | |
1332 | { | |
23a34459 | 1333 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1334 | { |
d9d9c31f | 1335 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1336 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1337 | ||
28fc6740 | 1338 | /* Extract (always little endian). */ |
c86c27af | 1339 | regcache_raw_read (regcache, fpnum, mmx_buf); |
28fc6740 AC |
1340 | memcpy (buf, mmx_buf, REGISTER_RAW_SIZE (regnum)); |
1341 | } | |
1342 | else | |
1343 | regcache_raw_read (regcache, regnum, buf); | |
1344 | } | |
1345 | ||
1346 | static void | |
1347 | i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1348 | int regnum, const void *buf) | |
1349 | { | |
23a34459 | 1350 | if (i386_mmx_regnum_p (regnum)) |
28fc6740 | 1351 | { |
d9d9c31f | 1352 | char mmx_buf[MAX_REGISTER_SIZE]; |
c86c27af MK |
1353 | int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); |
1354 | ||
28fc6740 AC |
1355 | /* Read ... */ |
1356 | regcache_raw_read (regcache, fpnum, mmx_buf); | |
1357 | /* ... Modify ... (always little endian). */ | |
1358 | memcpy (mmx_buf, buf, REGISTER_RAW_SIZE (regnum)); | |
1359 | /* ... Write. */ | |
1360 | regcache_raw_write (regcache, fpnum, mmx_buf); | |
1361 | } | |
1362 | else | |
1363 | regcache_raw_write (regcache, regnum, buf); | |
1364 | } | |
ff2e87ac AC |
1365 | \f |
1366 | ||
1367 | /* These registers don't have pervasive standard uses. Move them to | |
1368 | i386-tdep.h if necessary. */ | |
1369 | ||
1370 | #define I386_EBX_REGNUM 3 /* %ebx */ | |
1371 | #define I386_ECX_REGNUM 1 /* %ecx */ | |
1372 | #define I386_ESI_REGNUM 6 /* %esi */ | |
1373 | #define I386_EDI_REGNUM 7 /* %edi */ | |
1374 | ||
1375 | /* Return the register number of the register allocated by GCC after | |
1376 | REGNUM, or -1 if there is no such register. */ | |
1377 | ||
1378 | static int | |
1379 | i386_next_regnum (int regnum) | |
1380 | { | |
1381 | /* GCC allocates the registers in the order: | |
1382 | ||
1383 | %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... | |
1384 | ||
1385 | Since storing a variable in %esp doesn't make any sense we return | |
1386 | -1 for %ebp and for %esp itself. */ | |
1387 | static int next_regnum[] = | |
1388 | { | |
1389 | I386_EDX_REGNUM, /* Slot for %eax. */ | |
1390 | I386_EBX_REGNUM, /* Slot for %ecx. */ | |
1391 | I386_ECX_REGNUM, /* Slot for %edx. */ | |
1392 | I386_ESI_REGNUM, /* Slot for %ebx. */ | |
1393 | -1, -1, /* Slots for %esp and %ebp. */ | |
1394 | I386_EDI_REGNUM, /* Slot for %esi. */ | |
1395 | I386_EBP_REGNUM /* Slot for %edi. */ | |
1396 | }; | |
1397 | ||
de5b9bb9 | 1398 | if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) |
ff2e87ac | 1399 | return next_regnum[regnum]; |
28fc6740 | 1400 | |
ff2e87ac AC |
1401 | return -1; |
1402 | } | |
1403 | ||
1404 | /* Return nonzero if a value of type TYPE stored in register REGNUM | |
1405 | needs any special handling. */ | |
d7a0d72c | 1406 | |
3a1e71e3 | 1407 | static int |
ff2e87ac | 1408 | i386_convert_register_p (int regnum, struct type *type) |
d7a0d72c | 1409 | { |
de5b9bb9 MK |
1410 | int len = TYPE_LENGTH (type); |
1411 | ||
ff2e87ac AC |
1412 | /* Values may be spread across multiple registers. Most debugging |
1413 | formats aren't expressive enough to specify the locations, so | |
1414 | some heuristics is involved. Right now we only handle types that | |
de5b9bb9 MK |
1415 | have a length that is a multiple of the word size, since GCC |
1416 | doesn't seem to put any other types into registers. */ | |
1417 | if (len > 4 && len % 4 == 0) | |
1418 | { | |
1419 | int last_regnum = regnum; | |
1420 | ||
1421 | while (len > 4) | |
1422 | { | |
1423 | last_regnum = i386_next_regnum (last_regnum); | |
1424 | len -= 4; | |
1425 | } | |
1426 | ||
1427 | if (last_regnum != -1) | |
1428 | return 1; | |
1429 | } | |
ff2e87ac | 1430 | |
23a34459 | 1431 | return i386_fp_regnum_p (regnum); |
d7a0d72c MK |
1432 | } |
1433 | ||
ff2e87ac AC |
1434 | /* Read a value of type TYPE from register REGNUM in frame FRAME, and |
1435 | return its contents in TO. */ | |
ac27f131 | 1436 | |
3a1e71e3 | 1437 | static void |
ff2e87ac AC |
1438 | i386_register_to_value (struct frame_info *frame, int regnum, |
1439 | struct type *type, void *to) | |
ac27f131 | 1440 | { |
de5b9bb9 MK |
1441 | int len = TYPE_LENGTH (type); |
1442 | char *buf = to; | |
1443 | ||
ff2e87ac AC |
1444 | /* FIXME: kettenis/20030609: What should we do if REGNUM isn't |
1445 | available in FRAME (i.e. if it wasn't saved)? */ | |
3d261580 | 1446 | |
ff2e87ac | 1447 | if (i386_fp_regnum_p (regnum)) |
8d7f6b4a | 1448 | { |
d532c08f MK |
1449 | i387_register_to_value (frame, regnum, type, to); |
1450 | return; | |
8d7f6b4a | 1451 | } |
ff2e87ac | 1452 | |
de5b9bb9 MK |
1453 | /* Read a value spread accross multiple registers. */ |
1454 | ||
1455 | gdb_assert (len > 4 && len % 4 == 0); | |
3d261580 | 1456 | |
de5b9bb9 MK |
1457 | while (len > 0) |
1458 | { | |
1459 | gdb_assert (regnum != -1); | |
1460 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1461 | |
de5b9bb9 MK |
1462 | frame_read_register (frame, regnum, buf); |
1463 | regnum = i386_next_regnum (regnum); | |
1464 | len -= 4; | |
1465 | buf += 4; | |
1466 | } | |
ac27f131 MK |
1467 | } |
1468 | ||
ff2e87ac AC |
1469 | /* Write the contents FROM of a value of type TYPE into register |
1470 | REGNUM in frame FRAME. */ | |
ac27f131 | 1471 | |
3a1e71e3 | 1472 | static void |
ff2e87ac AC |
1473 | i386_value_to_register (struct frame_info *frame, int regnum, |
1474 | struct type *type, const void *from) | |
ac27f131 | 1475 | { |
de5b9bb9 MK |
1476 | int len = TYPE_LENGTH (type); |
1477 | const char *buf = from; | |
1478 | ||
ff2e87ac | 1479 | if (i386_fp_regnum_p (regnum)) |
c6ba6f0d | 1480 | { |
d532c08f MK |
1481 | i387_value_to_register (frame, regnum, type, from); |
1482 | return; | |
1483 | } | |
3d261580 | 1484 | |
de5b9bb9 MK |
1485 | /* Write a value spread accross multiple registers. */ |
1486 | ||
1487 | gdb_assert (len > 4 && len % 4 == 0); | |
ff2e87ac | 1488 | |
de5b9bb9 MK |
1489 | while (len > 0) |
1490 | { | |
1491 | gdb_assert (regnum != -1); | |
1492 | gdb_assert (register_size (current_gdbarch, regnum) == 4); | |
d532c08f | 1493 | |
de5b9bb9 MK |
1494 | put_frame_register (frame, regnum, buf); |
1495 | regnum = i386_next_regnum (regnum); | |
1496 | len -= 4; | |
1497 | buf += 4; | |
1498 | } | |
ac27f131 | 1499 | } |
ff2e87ac AC |
1500 | \f |
1501 | ||
fc338970 | 1502 | |
c906108c | 1503 | #ifdef STATIC_TRANSFORM_NAME |
fc338970 MK |
1504 | /* SunPRO encodes the static variables. This is not related to C++ |
1505 | mangling, it is done for C too. */ | |
c906108c SS |
1506 | |
1507 | char * | |
fba45db2 | 1508 | sunpro_static_transform_name (char *name) |
c906108c SS |
1509 | { |
1510 | char *p; | |
1511 | if (IS_STATIC_TRANSFORM_NAME (name)) | |
1512 | { | |
fc338970 MK |
1513 | /* For file-local statics there will be a period, a bunch of |
1514 | junk (the contents of which match a string given in the | |
c5aa993b JM |
1515 | N_OPT), a period and the name. For function-local statics |
1516 | there will be a bunch of junk (which seems to change the | |
1517 | second character from 'A' to 'B'), a period, the name of the | |
1518 | function, and the name. So just skip everything before the | |
1519 | last period. */ | |
c906108c SS |
1520 | p = strrchr (name, '.'); |
1521 | if (p != NULL) | |
1522 | name = p + 1; | |
1523 | } | |
1524 | return name; | |
1525 | } | |
1526 | #endif /* STATIC_TRANSFORM_NAME */ | |
fc338970 | 1527 | \f |
c906108c | 1528 | |
fc338970 | 1529 | /* Stuff for WIN32 PE style DLL's but is pretty generic really. */ |
c906108c SS |
1530 | |
1531 | CORE_ADDR | |
1cce71eb | 1532 | i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name) |
c906108c | 1533 | { |
fc338970 | 1534 | if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */ |
c906108c | 1535 | { |
c5aa993b | 1536 | unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4); |
c906108c | 1537 | struct minimal_symbol *indsym = |
fc338970 | 1538 | indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; |
645dd519 | 1539 | char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; |
c906108c | 1540 | |
c5aa993b | 1541 | if (symname) |
c906108c | 1542 | { |
c5aa993b JM |
1543 | if (strncmp (symname, "__imp_", 6) == 0 |
1544 | || strncmp (symname, "_imp_", 5) == 0) | |
c906108c SS |
1545 | return name ? 1 : read_memory_unsigned_integer (indirect, 4); |
1546 | } | |
1547 | } | |
fc338970 | 1548 | return 0; /* Not a trampoline. */ |
c906108c | 1549 | } |
fc338970 MK |
1550 | \f |
1551 | ||
8201327c MK |
1552 | /* Return non-zero if PC and NAME show that we are in a signal |
1553 | trampoline. */ | |
1554 | ||
1555 | static int | |
1556 | i386_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1557 | { | |
1558 | return (name && strcmp ("_sigtramp", name) == 0); | |
1559 | } | |
1560 | \f | |
1561 | ||
fc338970 MK |
1562 | /* We have two flavours of disassembly. The machinery on this page |
1563 | deals with switching between those. */ | |
c906108c SS |
1564 | |
1565 | static int | |
5e3397bb | 1566 | i386_print_insn (bfd_vma pc, disassemble_info *info) |
c906108c | 1567 | { |
5e3397bb MK |
1568 | gdb_assert (disassembly_flavor == att_flavor |
1569 | || disassembly_flavor == intel_flavor); | |
1570 | ||
1571 | /* FIXME: kettenis/20020915: Until disassembler_options is properly | |
1572 | constified, cast to prevent a compiler warning. */ | |
1573 | info->disassembler_options = (char *) disassembly_flavor; | |
1574 | info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach; | |
1575 | ||
1576 | return print_insn_i386 (pc, info); | |
7a292a7a | 1577 | } |
fc338970 | 1578 | \f |
3ce1502b | 1579 | |
8201327c MK |
1580 | /* There are a few i386 architecture variants that differ only |
1581 | slightly from the generic i386 target. For now, we don't give them | |
1582 | their own source file, but include them here. As a consequence, | |
1583 | they'll always be included. */ | |
3ce1502b | 1584 | |
8201327c | 1585 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1586 | |
8201327c MK |
1587 | static int |
1588 | i386_svr4_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
d2a7c97a | 1589 | { |
acd5c798 MK |
1590 | /* UnixWare uses _sigacthandler. The origin of the other symbols is |
1591 | currently unknown. */ | |
8201327c MK |
1592 | return (name && (strcmp ("_sigreturn", name) == 0 |
1593 | || strcmp ("_sigacthandler", name) == 0 | |
1594 | || strcmp ("sigvechandler", name) == 0)); | |
1595 | } | |
d2a7c97a | 1596 | |
acd5c798 MK |
1597 | /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp |
1598 | routine, return the address of the associated sigcontext (ucontext) | |
1599 | structure. */ | |
3ce1502b | 1600 | |
3a1e71e3 | 1601 | static CORE_ADDR |
acd5c798 | 1602 | i386_svr4_sigcontext_addr (struct frame_info *next_frame) |
8201327c | 1603 | { |
acd5c798 MK |
1604 | char buf[4]; |
1605 | CORE_ADDR sp; | |
3ce1502b | 1606 | |
acd5c798 MK |
1607 | frame_unwind_register (next_frame, I386_ESP_REGNUM, buf); |
1608 | sp = extract_unsigned_integer (buf, 4); | |
21d0e8a4 | 1609 | |
acd5c798 | 1610 | return read_memory_unsigned_integer (sp + 8, 4); |
8201327c MK |
1611 | } |
1612 | \f | |
3ce1502b | 1613 | |
8201327c | 1614 | /* DJGPP. */ |
d2a7c97a | 1615 | |
8201327c MK |
1616 | static int |
1617 | i386_go32_pc_in_sigtramp (CORE_ADDR pc, char *name) | |
1618 | { | |
1619 | /* DJGPP doesn't have any special frames for signal handlers. */ | |
1620 | return 0; | |
1621 | } | |
1622 | \f | |
d2a7c97a | 1623 | |
8201327c | 1624 | /* Generic ELF. */ |
d2a7c97a | 1625 | |
8201327c MK |
1626 | void |
1627 | i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1628 | { | |
1629 | /* We typically use stabs-in-ELF with the DWARF register numbering. */ | |
1630 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1631 | } | |
3ce1502b | 1632 | |
8201327c | 1633 | /* System V Release 4 (SVR4). */ |
3ce1502b | 1634 | |
8201327c MK |
1635 | void |
1636 | i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1637 | { | |
1638 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3ce1502b | 1639 | |
8201327c MK |
1640 | /* System V Release 4 uses ELF. */ |
1641 | i386_elf_init_abi (info, gdbarch); | |
3ce1502b | 1642 | |
dfe01d39 MK |
1643 | /* System V Release 4 has shared libraries. */ |
1644 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); | |
1645 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | |
1646 | ||
8201327c | 1647 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_svr4_pc_in_sigtramp); |
21d0e8a4 | 1648 | tdep->sigcontext_addr = i386_svr4_sigcontext_addr; |
acd5c798 MK |
1649 | tdep->sc_pc_offset = 36 + 14 * 4; |
1650 | tdep->sc_sp_offset = 36 + 17 * 4; | |
3ce1502b | 1651 | |
8201327c | 1652 | tdep->jb_pc_offset = 20; |
3ce1502b MK |
1653 | } |
1654 | ||
8201327c | 1655 | /* DJGPP. */ |
3ce1502b | 1656 | |
3a1e71e3 | 1657 | static void |
8201327c | 1658 | i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1659 | { |
8201327c | 1660 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1661 | |
8201327c | 1662 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_go32_pc_in_sigtramp); |
3ce1502b | 1663 | |
8201327c | 1664 | tdep->jb_pc_offset = 36; |
3ce1502b MK |
1665 | } |
1666 | ||
8201327c | 1667 | /* NetWare. */ |
3ce1502b | 1668 | |
3a1e71e3 | 1669 | static void |
8201327c | 1670 | i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
3ce1502b | 1671 | { |
8201327c | 1672 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
3ce1502b | 1673 | |
8201327c | 1674 | tdep->jb_pc_offset = 24; |
d2a7c97a | 1675 | } |
8201327c | 1676 | \f |
2acceee2 | 1677 | |
38c968cf AC |
1678 | /* i386 register groups. In addition to the normal groups, add "mmx" |
1679 | and "sse". */ | |
1680 | ||
1681 | static struct reggroup *i386_sse_reggroup; | |
1682 | static struct reggroup *i386_mmx_reggroup; | |
1683 | ||
1684 | static void | |
1685 | i386_init_reggroups (void) | |
1686 | { | |
1687 | i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP); | |
1688 | i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP); | |
1689 | } | |
1690 | ||
1691 | static void | |
1692 | i386_add_reggroups (struct gdbarch *gdbarch) | |
1693 | { | |
1694 | reggroup_add (gdbarch, i386_sse_reggroup); | |
1695 | reggroup_add (gdbarch, i386_mmx_reggroup); | |
1696 | reggroup_add (gdbarch, general_reggroup); | |
1697 | reggroup_add (gdbarch, float_reggroup); | |
1698 | reggroup_add (gdbarch, all_reggroup); | |
1699 | reggroup_add (gdbarch, save_reggroup); | |
1700 | reggroup_add (gdbarch, restore_reggroup); | |
1701 | reggroup_add (gdbarch, vector_reggroup); | |
1702 | reggroup_add (gdbarch, system_reggroup); | |
1703 | } | |
1704 | ||
1705 | int | |
1706 | i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1707 | struct reggroup *group) | |
1708 | { | |
1709 | int sse_regnum_p = (i386_sse_regnum_p (regnum) | |
1710 | || i386_mxcsr_regnum_p (regnum)); | |
1711 | int fp_regnum_p = (i386_fp_regnum_p (regnum) | |
1712 | || i386_fpc_regnum_p (regnum)); | |
1713 | int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); | |
acd5c798 | 1714 | |
38c968cf AC |
1715 | if (group == i386_mmx_reggroup) |
1716 | return mmx_regnum_p; | |
1717 | if (group == i386_sse_reggroup) | |
1718 | return sse_regnum_p; | |
1719 | if (group == vector_reggroup) | |
1720 | return (mmx_regnum_p || sse_regnum_p); | |
1721 | if (group == float_reggroup) | |
1722 | return fp_regnum_p; | |
1723 | if (group == general_reggroup) | |
1724 | return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p); | |
acd5c798 | 1725 | |
38c968cf AC |
1726 | return default_register_reggroup_p (gdbarch, regnum, group); |
1727 | } | |
38c968cf | 1728 | \f |
acd5c798 | 1729 | |
143985b7 | 1730 | /* Get the ith function argument for the current function. */ |
42c466d7 | 1731 | static CORE_ADDR |
143985b7 AF |
1732 | i386_fetch_pointer_argument (struct frame_info *frame, int argi, |
1733 | struct type *type) | |
1734 | { | |
1735 | CORE_ADDR stack; | |
1736 | frame_read_register (frame, SP_REGNUM, &stack); | |
1737 | return read_memory_unsigned_integer (stack + (4 * (argi + 1)), 4); | |
1738 | } | |
1739 | ||
1740 | \f | |
3a1e71e3 | 1741 | static struct gdbarch * |
a62cc96e AC |
1742 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1743 | { | |
cd3c07fc | 1744 | struct gdbarch_tdep *tdep; |
a62cc96e AC |
1745 | struct gdbarch *gdbarch; |
1746 | ||
4be87837 DJ |
1747 | /* If there is already a candidate, use it. */ |
1748 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1749 | if (arches != NULL) | |
1750 | return arches->gdbarch; | |
a62cc96e AC |
1751 | |
1752 | /* Allocate space for the new architecture. */ | |
1753 | tdep = XMALLOC (struct gdbarch_tdep); | |
1754 | gdbarch = gdbarch_alloc (&info, tdep); | |
1755 | ||
8201327c | 1756 | /* The i386 default settings don't include the SSE registers. |
356a6b3e MK |
1757 | FIXME: kettenis/20020614: They do include the FPU registers for |
1758 | now, which probably is not quite right. */ | |
8201327c | 1759 | tdep->num_xmm_regs = 0; |
d2a7c97a | 1760 | |
8201327c MK |
1761 | tdep->jb_pc_offset = -1; |
1762 | tdep->struct_return = pcc_struct_return; | |
8201327c MK |
1763 | tdep->sigtramp_start = 0; |
1764 | tdep->sigtramp_end = 0; | |
21d0e8a4 | 1765 | tdep->sigcontext_addr = NULL; |
a3386186 | 1766 | tdep->sc_reg_offset = NULL; |
8201327c | 1767 | tdep->sc_pc_offset = -1; |
21d0e8a4 | 1768 | tdep->sc_sp_offset = -1; |
8201327c | 1769 | |
896fb97d MK |
1770 | /* The format used for `long double' on almost all i386 targets is |
1771 | the i387 extended floating-point format. In fact, of all targets | |
1772 | in the GCC 2.95 tree, only OSF/1 does it different, and insists | |
1773 | on having a `long double' that's not `long' at all. */ | |
1774 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
21d0e8a4 | 1775 | |
66da5fd8 | 1776 | /* Although the i387 extended floating-point has only 80 significant |
896fb97d MK |
1777 | bits, a `long double' actually takes up 96, probably to enforce |
1778 | alignment. */ | |
1779 | set_gdbarch_long_double_bit (gdbarch, 96); | |
1780 | ||
acd5c798 MK |
1781 | /* The default ABI includes general-purpose registers and |
1782 | floating-point registers. */ | |
356a6b3e | 1783 | set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS); |
acd5c798 MK |
1784 | set_gdbarch_register_name (gdbarch, i386_register_name); |
1785 | set_gdbarch_register_type (gdbarch, i386_register_type); | |
21d0e8a4 | 1786 | |
acd5c798 MK |
1787 | /* Register numbers of various important registers. */ |
1788 | set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ | |
1789 | set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ | |
1790 | set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ | |
1791 | set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ | |
356a6b3e MK |
1792 | |
1793 | /* Use the "default" register numbering scheme for stabs and COFF. */ | |
1794 | set_gdbarch_stab_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1795 | set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_stab_reg_to_regnum); | |
1796 | ||
1797 | /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */ | |
1798 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1799 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_dwarf_reg_to_regnum); | |
1800 | ||
1801 | /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to | |
1802 | be in use on any of the supported i386 targets. */ | |
1803 | ||
61113f8b MK |
1804 | set_gdbarch_print_float_info (gdbarch, i387_print_float_info); |
1805 | ||
8201327c | 1806 | set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); |
96297dab | 1807 | |
a62cc96e | 1808 | /* Call dummy code. */ |
acd5c798 | 1809 | set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); |
a62cc96e | 1810 | |
ff2e87ac AC |
1811 | set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); |
1812 | set_gdbarch_register_to_value (gdbarch, i386_register_to_value); | |
1813 | set_gdbarch_value_to_register (gdbarch, i386_value_to_register); | |
b6197528 | 1814 | |
00f8375e | 1815 | set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); |
3d7f4f49 | 1816 | set_gdbarch_store_return_value (gdbarch, i386_store_return_value); |
00f8375e | 1817 | set_gdbarch_extract_struct_value_address (gdbarch, |
fc08ec52 | 1818 | i386_extract_struct_value_address); |
8201327c MK |
1819 | set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); |
1820 | ||
93924b6b MK |
1821 | set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); |
1822 | ||
1823 | /* Stack grows downward. */ | |
1824 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1825 | ||
1826 | set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); | |
1827 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
1828 | set_gdbarch_function_start_offset (gdbarch, 0); | |
42fdc8df | 1829 | |
42fdc8df | 1830 | set_gdbarch_frame_args_skip (gdbarch, 8); |
8201327c MK |
1831 | set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); |
1832 | ||
28fc6740 | 1833 | /* Wire in the MMX registers. */ |
0f751ff2 | 1834 | set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs); |
28fc6740 AC |
1835 | set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); |
1836 | set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); | |
1837 | ||
5e3397bb MK |
1838 | set_gdbarch_print_insn (gdbarch, i386_print_insn); |
1839 | ||
acd5c798 | 1840 | set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); |
acd5c798 MK |
1841 | |
1842 | set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); | |
1843 | ||
38c968cf AC |
1844 | /* Add the i386 register groups. */ |
1845 | i386_add_reggroups (gdbarch); | |
1846 | set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); | |
1847 | ||
143985b7 AF |
1848 | /* Helper for function argument information. */ |
1849 | set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); | |
1850 | ||
6405b0a6 | 1851 | /* Hook in the DWARF CFI frame unwinder. */ |
336d1bba | 1852 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
6405b0a6 | 1853 | |
acd5c798 | 1854 | frame_base_set_default (gdbarch, &i386_frame_base); |
6c0e89ed | 1855 | |
3ce1502b | 1856 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1857 | gdbarch_init_osabi (info, gdbarch); |
3ce1502b | 1858 | |
336d1bba AC |
1859 | frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer); |
1860 | frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer); | |
acd5c798 | 1861 | |
a62cc96e AC |
1862 | return gdbarch; |
1863 | } | |
1864 | ||
8201327c MK |
1865 | static enum gdb_osabi |
1866 | i386_coff_osabi_sniffer (bfd *abfd) | |
1867 | { | |
762c5349 MK |
1868 | if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 |
1869 | || strcmp (bfd_get_target (abfd), "coff-go32") == 0) | |
8201327c MK |
1870 | return GDB_OSABI_GO32; |
1871 | ||
1872 | return GDB_OSABI_UNKNOWN; | |
1873 | } | |
1874 | ||
1875 | static enum gdb_osabi | |
1876 | i386_nlm_osabi_sniffer (bfd *abfd) | |
1877 | { | |
1878 | return GDB_OSABI_NETWARE; | |
1879 | } | |
1880 | \f | |
1881 | ||
28e9e0f0 MK |
1882 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1883 | void _initialize_i386_tdep (void); | |
1884 | ||
c906108c | 1885 | void |
fba45db2 | 1886 | _initialize_i386_tdep (void) |
c906108c | 1887 | { |
a62cc96e AC |
1888 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); |
1889 | ||
fc338970 | 1890 | /* Add the variable that controls the disassembly flavor. */ |
917317f4 JM |
1891 | { |
1892 | struct cmd_list_element *new_cmd; | |
7a292a7a | 1893 | |
917317f4 JM |
1894 | new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, |
1895 | valid_flavors, | |
1ed2a135 | 1896 | &disassembly_flavor, |
fc338970 MK |
1897 | "\ |
1898 | Set the disassembly flavor, the valid values are \"att\" and \"intel\", \ | |
c906108c | 1899 | and the default value is \"att\".", |
917317f4 | 1900 | &setlist); |
917317f4 JM |
1901 | add_show_from_set (new_cmd, &showlist); |
1902 | } | |
8201327c MK |
1903 | |
1904 | /* Add the variable that controls the convention for returning | |
1905 | structs. */ | |
1906 | { | |
1907 | struct cmd_list_element *new_cmd; | |
1908 | ||
1909 | new_cmd = add_set_enum_cmd ("struct-convention", no_class, | |
5e3397bb | 1910 | valid_conventions, |
8201327c MK |
1911 | &struct_convention, "\ |
1912 | Set the convention for returning small structs, valid values \ | |
1913 | are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".", | |
1914 | &setlist); | |
1915 | add_show_from_set (new_cmd, &showlist); | |
1916 | } | |
1917 | ||
1918 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, | |
1919 | i386_coff_osabi_sniffer); | |
1920 | gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour, | |
1921 | i386_nlm_osabi_sniffer); | |
1922 | ||
05816f70 | 1923 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, |
8201327c | 1924 | i386_svr4_init_abi); |
05816f70 | 1925 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, |
8201327c | 1926 | i386_go32_init_abi); |
05816f70 | 1927 | gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE, |
8201327c | 1928 | i386_nw_init_abi); |
38c968cf AC |
1929 | |
1930 | /* Initialize the i386 specific register groups. */ | |
1931 | i386_init_reggroups (); | |
c906108c | 1932 | } |