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5716833c MK |
1 | /* Target-dependent code for the i386. |
2 | ||
5ae96ec1 MK |
3 | Copyright (C) 2001, 2002, 2003, 2004, 2006 |
4 | Free Software Foundation, Inc. | |
9a82579f JS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
197e01b6 EZ |
20 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
9a82579f JS |
22 | |
23 | #ifndef I386_TDEP_H | |
24 | #define I386_TDEP_H | |
25 | ||
da3331ec | 26 | struct frame_info; |
5716833c MK |
27 | struct gdbarch; |
28 | struct reggroup; | |
c783cbd6 | 29 | struct regset; |
5439edaa | 30 | struct regcache; |
da3331ec | 31 | |
96297dab MK |
32 | /* GDB's i386 target supports both the 32-bit Intel Architecture |
33 | (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses | |
34 | a similar register layout for both. | |
35 | ||
36 | - General purpose registers | |
37 | - FPU data registers | |
38 | - FPU control registers | |
39 | - SSE data registers | |
40 | - SSE control register | |
41 | ||
42 | The general purpose registers for the x86-64 architecture are quite | |
43 | different from IA-32. Therefore, the FP0_REGNUM target macro | |
44 | determines the register number at which the FPU data registers | |
45 | start. The number of FPU data and control registers is the same | |
46 | for both architectures. The number of SSE registers however, | |
47 | differs and is determined by the num_xmm_regs member of `struct | |
48 | gdbarch_tdep'. */ | |
49 | ||
8201327c | 50 | /* Convention for returning structures. */ |
3ce1502b | 51 | |
8201327c MK |
52 | enum struct_return |
53 | { | |
54 | pcc_struct_return, /* Return "short" structures in memory. */ | |
55 | reg_struct_return /* Return "short" structures in registers. */ | |
3ce1502b MK |
56 | }; |
57 | ||
96297dab MK |
58 | /* i386 architecture specific information. */ |
59 | struct gdbarch_tdep | |
60 | { | |
473f17b0 MK |
61 | /* General-purpose registers. */ |
62 | struct regset *gregset; | |
63 | int *gregset_reg_offset; | |
64 | int gregset_num_regs; | |
65 | size_t sizeof_gregset; | |
66 | ||
67 | /* Floating-point registers. */ | |
68 | struct regset *fpregset; | |
69 | size_t sizeof_fpregset; | |
70 | ||
5716833c MK |
71 | /* Register number for %st(0). The register numbers for the other |
72 | registers follow from this one. Set this to -1 to indicate the | |
73 | absence of an FPU. */ | |
74 | int st0_regnum; | |
75 | ||
76 | /* Register number for %mm0. Set this to -1 to indicate the absence | |
77 | of MMX support. */ | |
78 | int mm0_regnum; | |
79 | ||
96297dab MK |
80 | /* Number of SSE registers. */ |
81 | int num_xmm_regs; | |
8201327c MK |
82 | |
83 | /* Offset of saved PC in jmp_buf. */ | |
84 | int jb_pc_offset; | |
85 | ||
86 | /* Convention for returning structures. */ | |
87 | enum struct_return struct_return; | |
88 | ||
8201327c MK |
89 | /* Address range where sigtramp lives. */ |
90 | CORE_ADDR sigtramp_start; | |
91 | CORE_ADDR sigtramp_end; | |
92 | ||
911bc6ee MK |
93 | /* Detect sigtramp. */ |
94 | int (*sigtramp_p) (struct frame_info *); | |
95 | ||
21d0e8a4 MK |
96 | /* Get address of sigcontext for sigtramp. */ |
97 | CORE_ADDR (*sigcontext_addr) (struct frame_info *); | |
98 | ||
a3386186 MK |
99 | /* Offset of registers in `struct sigcontext'. */ |
100 | int *sc_reg_offset; | |
101 | int sc_num_regs; | |
102 | ||
103 | /* Offset of saved PC and SP in `struct sigcontext'. Usage of these | |
104 | is deprecated, please use `sc_reg_offset' instead. */ | |
8201327c | 105 | int sc_pc_offset; |
21d0e8a4 | 106 | int sc_sp_offset; |
96297dab MK |
107 | }; |
108 | ||
109 | /* Floating-point registers. */ | |
110 | ||
96297dab MK |
111 | /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit |
112 | (at most) in the FPU, but are zero-extended to 32 bits in GDB's | |
113 | register cache. */ | |
114 | ||
23a34459 AC |
115 | /* Return non-zero if REGNUM matches the FP register and the FP |
116 | register set is active. */ | |
117 | extern int i386_fp_regnum_p (int regnum); | |
118 | extern int i386_fpc_regnum_p (int regnum); | |
96297dab | 119 | |
a3386186 MK |
120 | /* Register numbers of various important registers. */ |
121 | ||
bcf48cc7 MK |
122 | enum i386_regnum |
123 | { | |
124 | I386_EAX_REGNUM, /* %eax */ | |
125 | I386_ECX_REGNUM, /* %ecx */ | |
126 | I386_EDX_REGNUM, /* %edx */ | |
127 | I386_EBX_REGNUM, /* %ebx */ | |
128 | I386_ESP_REGNUM, /* %esp */ | |
129 | I386_EBP_REGNUM, /* %ebp */ | |
130 | I386_ESI_REGNUM, /* %esi */ | |
131 | I386_EDI_REGNUM, /* %edi */ | |
132 | I386_EIP_REGNUM, /* %eip */ | |
133 | I386_EFLAGS_REGNUM, /* %eflags */ | |
2666fb59 MK |
134 | I386_CS_REGNUM, /* %cs */ |
135 | I386_SS_REGNUM, /* %ss */ | |
e9ff708b AC |
136 | I386_DS_REGNUM, /* %ds */ |
137 | I386_ES_REGNUM, /* %es */ | |
138 | I386_FS_REGNUM, /* %fs */ | |
139 | I386_GS_REGNUM, /* %gs */ | |
140 | I386_ST0_REGNUM /* %st(0) */ | |
bcf48cc7 | 141 | }; |
a3386186 | 142 | |
8201327c MK |
143 | #define I386_NUM_GREGS 16 |
144 | #define I386_NUM_FREGS 16 | |
145 | #define I386_NUM_XREGS 9 | |
146 | ||
147 | #define I386_SSE_NUM_REGS (I386_NUM_GREGS + I386_NUM_FREGS \ | |
148 | + I386_NUM_XREGS) | |
149 | ||
00f8375e MK |
150 | /* Size of the largest register. */ |
151 | #define I386_MAX_REGISTER_SIZE 16 | |
152 | ||
5ae96ec1 MK |
153 | /* Types for i386-specific registers. */ |
154 | extern struct type *i386_eflags_type; | |
155 | extern struct type *i386_mmx_type; | |
156 | extern struct type *i386_sse_type; | |
878d9193 | 157 | extern struct type *i386_mxcsr_type; |
5ae96ec1 | 158 | |
508fbfea MK |
159 | /* Segment selectors. */ |
160 | #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */ | |
161 | #define I386_SEL_UPL 0x0003 /* User Privilige Level. */ | |
162 | #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */ | |
163 | ||
1cce71eb JB |
164 | /* Functions exported from i386-tdep.c. */ |
165 | extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name); | |
166 | ||
f6792ef4 MK |
167 | /* Return the name of register REGNUM. */ |
168 | extern char const *i386_register_name (int regnum); | |
8201327c | 169 | |
38c968cf AC |
170 | /* Return non-zero if REGNUM is a member of the specified group. */ |
171 | extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
172 | struct reggroup *group); | |
173 | ||
20187ed5 MK |
174 | /* Supply register REGNUM from the general-purpose register set REGSET |
175 | to register cache REGCACHE. If REGNUM is -1, do this for all | |
176 | registers in REGSET. */ | |
177 | extern void i386_supply_gregset (const struct regset *regset, | |
178 | struct regcache *regcache, int regnum, | |
179 | const void *gregs, size_t len); | |
3d171c85 MK |
180 | |
181 | /* Collect register REGNUM from the register cache REGCACHE and store | |
182 | it in the buffer specified by GREGS and LEN as described by the | |
183 | general-purpose register set REGSET. If REGNUM is -1, do this for | |
184 | all registers in REGSET. */ | |
185 | extern void i386_collect_gregset (const struct regset *regset, | |
186 | const struct regcache *regcache, | |
187 | int regnum, void *gregs, size_t len); | |
20187ed5 | 188 | |
8446b36a MK |
189 | /* Return the appropriate register set for the core section identified |
190 | by SECT_NAME and SECT_SIZE. */ | |
191 | extern const struct regset * | |
192 | i386_regset_from_core_section (struct gdbarch *gdbarch, | |
193 | const char *sect_name, size_t sect_size); | |
194 | ||
8201327c MK |
195 | /* Initialize a basic ELF architecture variant. */ |
196 | extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *); | |
197 | ||
198 | /* Initialize a SVR4 architecture variant. */ | |
199 | extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *); | |
de0b6abb | 200 | \f |
8201327c | 201 | |
de0b6abb | 202 | /* Functions and variables exported from i386bsd-tdep.c. */ |
8201327c | 203 | |
3cac699e | 204 | extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *); |
5d93ae8c MK |
205 | extern CORE_ADDR i386fbsd_sigtramp_start_addr; |
206 | extern CORE_ADDR i386fbsd_sigtramp_end_addr; | |
207 | extern CORE_ADDR i386obsd_sigtramp_start_addr; | |
208 | extern CORE_ADDR i386obsd_sigtramp_end_addr; | |
de0b6abb MK |
209 | extern int i386fbsd4_sc_reg_offset[]; |
210 | extern int i386fbsd_sc_reg_offset[]; | |
211 | extern int i386nbsd_sc_reg_offset[]; | |
212 | extern int i386obsd_sc_reg_offset[]; | |
213 | extern int i386bsd_sc_reg_offset[]; | |
3ce1502b | 214 | |
96297dab | 215 | #endif /* i386-tdep.h */ |