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5716833c MK |
1 | /* Target-dependent code for the i386. |
2 | ||
5d93ae8c | 3 | Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc. |
9a82579f JS |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #ifndef I386_TDEP_H | |
23 | #define I386_TDEP_H | |
24 | ||
da3331ec | 25 | struct frame_info; |
5716833c MK |
26 | struct gdbarch; |
27 | struct reggroup; | |
c783cbd6 | 28 | struct regset; |
5439edaa | 29 | struct regcache; |
da3331ec | 30 | |
96297dab MK |
31 | /* GDB's i386 target supports both the 32-bit Intel Architecture |
32 | (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses | |
33 | a similar register layout for both. | |
34 | ||
35 | - General purpose registers | |
36 | - FPU data registers | |
37 | - FPU control registers | |
38 | - SSE data registers | |
39 | - SSE control register | |
40 | ||
41 | The general purpose registers for the x86-64 architecture are quite | |
42 | different from IA-32. Therefore, the FP0_REGNUM target macro | |
43 | determines the register number at which the FPU data registers | |
44 | start. The number of FPU data and control registers is the same | |
45 | for both architectures. The number of SSE registers however, | |
46 | differs and is determined by the num_xmm_regs member of `struct | |
47 | gdbarch_tdep'. */ | |
48 | ||
8201327c | 49 | /* Convention for returning structures. */ |
3ce1502b | 50 | |
8201327c MK |
51 | enum struct_return |
52 | { | |
53 | pcc_struct_return, /* Return "short" structures in memory. */ | |
54 | reg_struct_return /* Return "short" structures in registers. */ | |
3ce1502b MK |
55 | }; |
56 | ||
96297dab MK |
57 | /* i386 architecture specific information. */ |
58 | struct gdbarch_tdep | |
59 | { | |
473f17b0 MK |
60 | /* General-purpose registers. */ |
61 | struct regset *gregset; | |
62 | int *gregset_reg_offset; | |
63 | int gregset_num_regs; | |
64 | size_t sizeof_gregset; | |
65 | ||
66 | /* Floating-point registers. */ | |
67 | struct regset *fpregset; | |
68 | size_t sizeof_fpregset; | |
69 | ||
5716833c MK |
70 | /* Register number for %st(0). The register numbers for the other |
71 | registers follow from this one. Set this to -1 to indicate the | |
72 | absence of an FPU. */ | |
73 | int st0_regnum; | |
74 | ||
75 | /* Register number for %mm0. Set this to -1 to indicate the absence | |
76 | of MMX support. */ | |
77 | int mm0_regnum; | |
78 | ||
96297dab MK |
79 | /* Number of SSE registers. */ |
80 | int num_xmm_regs; | |
8201327c MK |
81 | |
82 | /* Offset of saved PC in jmp_buf. */ | |
83 | int jb_pc_offset; | |
84 | ||
85 | /* Convention for returning structures. */ | |
86 | enum struct_return struct_return; | |
87 | ||
8201327c MK |
88 | /* Address range where sigtramp lives. */ |
89 | CORE_ADDR sigtramp_start; | |
90 | CORE_ADDR sigtramp_end; | |
91 | ||
911bc6ee MK |
92 | /* Detect sigtramp. */ |
93 | int (*sigtramp_p) (struct frame_info *); | |
94 | ||
21d0e8a4 MK |
95 | /* Get address of sigcontext for sigtramp. */ |
96 | CORE_ADDR (*sigcontext_addr) (struct frame_info *); | |
97 | ||
a3386186 MK |
98 | /* Offset of registers in `struct sigcontext'. */ |
99 | int *sc_reg_offset; | |
100 | int sc_num_regs; | |
101 | ||
102 | /* Offset of saved PC and SP in `struct sigcontext'. Usage of these | |
103 | is deprecated, please use `sc_reg_offset' instead. */ | |
8201327c | 104 | int sc_pc_offset; |
21d0e8a4 | 105 | int sc_sp_offset; |
96297dab MK |
106 | }; |
107 | ||
108 | /* Floating-point registers. */ | |
109 | ||
96297dab MK |
110 | /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit |
111 | (at most) in the FPU, but are zero-extended to 32 bits in GDB's | |
112 | register cache. */ | |
113 | ||
23a34459 AC |
114 | /* Return non-zero if REGNUM matches the FP register and the FP |
115 | register set is active. */ | |
116 | extern int i386_fp_regnum_p (int regnum); | |
117 | extern int i386_fpc_regnum_p (int regnum); | |
96297dab | 118 | |
a3386186 MK |
119 | /* Register numbers of various important registers. */ |
120 | ||
bcf48cc7 MK |
121 | enum i386_regnum |
122 | { | |
123 | I386_EAX_REGNUM, /* %eax */ | |
124 | I386_ECX_REGNUM, /* %ecx */ | |
125 | I386_EDX_REGNUM, /* %edx */ | |
126 | I386_EBX_REGNUM, /* %ebx */ | |
127 | I386_ESP_REGNUM, /* %esp */ | |
128 | I386_EBP_REGNUM, /* %ebp */ | |
129 | I386_ESI_REGNUM, /* %esi */ | |
130 | I386_EDI_REGNUM, /* %edi */ | |
131 | I386_EIP_REGNUM, /* %eip */ | |
132 | I386_EFLAGS_REGNUM, /* %eflags */ | |
2666fb59 MK |
133 | I386_CS_REGNUM, /* %cs */ |
134 | I386_SS_REGNUM, /* %ss */ | |
e9ff708b AC |
135 | I386_DS_REGNUM, /* %ds */ |
136 | I386_ES_REGNUM, /* %es */ | |
137 | I386_FS_REGNUM, /* %fs */ | |
138 | I386_GS_REGNUM, /* %gs */ | |
139 | I386_ST0_REGNUM /* %st(0) */ | |
bcf48cc7 | 140 | }; |
a3386186 | 141 | |
8201327c MK |
142 | #define I386_NUM_GREGS 16 |
143 | #define I386_NUM_FREGS 16 | |
144 | #define I386_NUM_XREGS 9 | |
145 | ||
146 | #define I386_SSE_NUM_REGS (I386_NUM_GREGS + I386_NUM_FREGS \ | |
147 | + I386_NUM_XREGS) | |
148 | ||
00f8375e MK |
149 | /* Size of the largest register. */ |
150 | #define I386_MAX_REGISTER_SIZE 16 | |
151 | ||
1cce71eb JB |
152 | /* Functions exported from i386-tdep.c. */ |
153 | extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name); | |
154 | ||
f6792ef4 MK |
155 | /* Return the name of register REGNUM. */ |
156 | extern char const *i386_register_name (int regnum); | |
8201327c | 157 | |
38c968cf AC |
158 | /* Return non-zero if REGNUM is a member of the specified group. */ |
159 | extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
160 | struct reggroup *group); | |
161 | ||
20187ed5 MK |
162 | /* Supply register REGNUM from the general-purpose register set REGSET |
163 | to register cache REGCACHE. If REGNUM is -1, do this for all | |
164 | registers in REGSET. */ | |
165 | extern void i386_supply_gregset (const struct regset *regset, | |
166 | struct regcache *regcache, int regnum, | |
167 | const void *gregs, size_t len); | |
3d171c85 MK |
168 | |
169 | /* Collect register REGNUM from the register cache REGCACHE and store | |
170 | it in the buffer specified by GREGS and LEN as described by the | |
171 | general-purpose register set REGSET. If REGNUM is -1, do this for | |
172 | all registers in REGSET. */ | |
173 | extern void i386_collect_gregset (const struct regset *regset, | |
174 | const struct regcache *regcache, | |
175 | int regnum, void *gregs, size_t len); | |
20187ed5 | 176 | |
8446b36a MK |
177 | /* Return the appropriate register set for the core section identified |
178 | by SECT_NAME and SECT_SIZE. */ | |
179 | extern const struct regset * | |
180 | i386_regset_from_core_section (struct gdbarch *gdbarch, | |
181 | const char *sect_name, size_t sect_size); | |
182 | ||
8201327c MK |
183 | /* Initialize a basic ELF architecture variant. */ |
184 | extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *); | |
185 | ||
186 | /* Initialize a SVR4 architecture variant. */ | |
187 | extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *); | |
de0b6abb | 188 | \f |
8201327c | 189 | |
de0b6abb | 190 | /* Functions and variables exported from i386bsd-tdep.c. */ |
8201327c | 191 | |
3cac699e | 192 | extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *); |
5d93ae8c MK |
193 | extern CORE_ADDR i386fbsd_sigtramp_start_addr; |
194 | extern CORE_ADDR i386fbsd_sigtramp_end_addr; | |
195 | extern CORE_ADDR i386obsd_sigtramp_start_addr; | |
196 | extern CORE_ADDR i386obsd_sigtramp_end_addr; | |
de0b6abb MK |
197 | extern int i386fbsd4_sc_reg_offset[]; |
198 | extern int i386fbsd_sc_reg_offset[]; | |
199 | extern int i386nbsd_sc_reg_offset[]; | |
200 | extern int i386obsd_sc_reg_offset[]; | |
201 | extern int i386bsd_sc_reg_offset[]; | |
3ce1502b | 202 | |
96297dab | 203 | #endif /* i386-tdep.h */ |