[deliverable/binutils-gdb.git] / gdb / i386-tdep.h

/* Target-dependent code for the i386.

   Copyright (C) 2001-2013 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef I386_TDEP_H
#define I386_TDEP_H

struct frame_info;
struct gdbarch;
struct reggroup;
struct regset;
struct regcache;

/* GDB's i386 target supports both the 32-bit Intel Architecture
   (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
   a similar register layout for both.

   - General purpose registers
   - FPU data registers
   - FPU control registers
   - SSE data registers
   - SSE control register

   The general purpose registers for the x86-64 architecture are quite
   different from IA-32.  Therefore, gdbarch_fp0_regnum
   determines the register number at which the FPU data registers
   start.  The number of FPU data and control registers is the same
   for both architectures.  The number of SSE registers however,
   differs and is determined by the num_xmm_regs member of `struct
   gdbarch_tdep'.  */

/* Convention for returning structures.  */

enum struct_return
{
  pcc_struct_return,		/* Return "short" structures in memory.  */
  reg_struct_return		/* Return "short" structures in registers.  */
};

/* i386 architecture specific information.  */
struct gdbarch_tdep
{
  /* General-purpose registers.  */
  struct regset *gregset;
  int *gregset_reg_offset;
  int gregset_num_regs;
  size_t sizeof_gregset;

  /* Floating-point registers.  */
  struct regset *fpregset;
  size_t sizeof_fpregset;

  /* XSAVE extended state.  */
  struct regset *xstateregset;

  /* Register number for %st(0).  The register numbers for the other
     registers follow from this one.  Set this to -1 to indicate the
     absence of an FPU.  */
  int st0_regnum;

  /* Number of MMX registers.  */
  int num_mmx_regs;

  /* Register number for %mm0.  Set this to -1 to indicate the absence
     of MMX support.  */
  int mm0_regnum;

  /* Number of pseudo YMM registers.  */
  int num_ymm_regs;

  /* Register number for %ymm0.  Set this to -1 to indicate the absence
     of pseudo YMM register support.  */
  int ymm0_regnum;

  /* Number of byte registers.  */
  int num_byte_regs;

  /* Register pseudo number for %al.  */
  int al_regnum;

  /* Number of pseudo word registers.  */
  int num_word_regs;

  /* Register number for %ax.  */
  int ax_regnum;

  /* Number of pseudo dword registers.  */
  int num_dword_regs;

  /* Register number for %eax.  Set this to -1 to indicate the absence
     of pseudo dword register support.  */
  int eax_regnum;

  /* Number of core registers.  */
  int num_core_regs;

  /* Number of SSE registers.  */
  int num_xmm_regs;

  /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
     register), excluding the x87 bit, which are supported by this GDB.  */

  uint64_t xcr0;

  /* Offset of XCR0 in XSAVE extended state.  */
  int xsave_xcr0_offset;

  /* Register names.  */
  const char **register_names;

  /* Register number for %ymm0h.  Set this to -1 to indicate the absence
     of upper YMM register support.  */
  int ymm0h_regnum;

  /* Upper YMM register names.  Only used for tdesc_numbered_register.  */
  const char **ymmh_register_names;

  /* Register number for %bnd0r.  Set this to -1 to indicate the absence
     bound registers.  */
  int bnd0r_regnum;

  /* Register number for pseudo register %bnd0.  Set this to -1 to indicate the absence
     bound registers.  */
  int bnd0_regnum;

  /* Register number for %bndcfgu. Set this to -1 to indicate the absence
     bound control registers.  */
  int bndcfgu_regnum;

  /* MPX register names.  Only used for tdesc_numbered_register.  */
  const char **mpx_register_names;

  /* Target description.  */
  const struct target_desc *tdesc;

  /* Register group function.  */
  const void *register_reggroup_p;

  /* Offset of saved PC in jmp_buf.  */
  int jb_pc_offset;

  /* Convention for returning structures.  */
  enum struct_return struct_return;

  /* Address range where sigtramp lives.  */
  CORE_ADDR sigtramp_start;
  CORE_ADDR sigtramp_end;

  /* Detect sigtramp.  */
  int (*sigtramp_p) (struct frame_info *);

  /* Get address of sigcontext for sigtramp.  */
  CORE_ADDR (*sigcontext_addr) (struct frame_info *);

  /* Offset of registers in `struct sigcontext'.  */
  int *sc_reg_offset;
  int sc_num_regs;

  /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
     is deprecated, please use `sc_reg_offset' instead.  */
  int sc_pc_offset;
  int sc_sp_offset;

  /* ISA-specific data types.  */
  struct type *i386_mmx_type;
  struct type *i386_ymm_type;
  struct type *i387_ext_type;
  struct type *i386_bnd_type;

  /* Process record/replay target.  */
  /* The map for registers because the AMD64's registers order
     in GDB is not same as I386 instructions.  */
  const int *record_regmap;
  /* Parse intx80 args.  */
  int (*i386_intx80_record) (struct regcache *regcache);
  /* Parse sysenter args.  */
  int (*i386_sysenter_record) (struct regcache *regcache);
  /* Parse syscall args.  */
  int (*i386_syscall_record) (struct regcache *regcache);
};

/* Floating-point registers.  */

/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
   (at most) in the FPU, but are zero-extended to 32 bits in GDB's
   register cache.  */

/* Return non-zero if REGNUM matches the FP register and the FP
   register set is active.  */
extern int i386_fp_regnum_p (struct gdbarch *, int);
extern int i386_fpc_regnum_p (struct gdbarch *, int);

/* Register numbers of various important registers.  */

enum i386_regnum
{
  I386_EAX_REGNUM,		/* %eax */
  I386_ECX_REGNUM,		/* %ecx */
  I386_EDX_REGNUM,		/* %edx */
  I386_EBX_REGNUM,		/* %ebx */
  I386_ESP_REGNUM,		/* %esp */
  I386_EBP_REGNUM,		/* %ebp */
  I386_ESI_REGNUM,		/* %esi */
  I386_EDI_REGNUM,		/* %edi */
  I386_EIP_REGNUM,		/* %eip */
  I386_EFLAGS_REGNUM,		/* %eflags */
  I386_CS_REGNUM,		/* %cs */
  I386_SS_REGNUM,		/* %ss */
  I386_DS_REGNUM,		/* %ds */
  I386_ES_REGNUM,		/* %es */
  I386_FS_REGNUM,		/* %fs */
  I386_GS_REGNUM,		/* %gs */
  I386_ST0_REGNUM,		/* %st(0) */
  I386_MXCSR_REGNUM = 40,	/* %mxcsr */ 
  I386_YMM0H_REGNUM,		/* %ymm0h */
  I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
  I386_BND0R_REGNUM,
  I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
  I386_BNDCFGU_REGNUM,
  I386_BNDSTATUS_REGNUM
};

/* Register numbers of RECORD_REGMAP.  */

enum record_i386_regnum
{
  X86_RECORD_REAX_REGNUM,
  X86_RECORD_RECX_REGNUM,
  X86_RECORD_REDX_REGNUM,
  X86_RECORD_REBX_REGNUM,
  X86_RECORD_RESP_REGNUM,
  X86_RECORD_REBP_REGNUM,
  X86_RECORD_RESI_REGNUM,
  X86_RECORD_REDI_REGNUM,
  X86_RECORD_R8_REGNUM,
  X86_RECORD_R9_REGNUM,
  X86_RECORD_R10_REGNUM,
  X86_RECORD_R11_REGNUM,
  X86_RECORD_R12_REGNUM,
  X86_RECORD_R13_REGNUM,
  X86_RECORD_R14_REGNUM,
  X86_RECORD_R15_REGNUM,
  X86_RECORD_REIP_REGNUM,
  X86_RECORD_EFLAGS_REGNUM,
  X86_RECORD_CS_REGNUM,
  X86_RECORD_SS_REGNUM,
  X86_RECORD_DS_REGNUM,
  X86_RECORD_ES_REGNUM,
  X86_RECORD_FS_REGNUM,
  X86_RECORD_GS_REGNUM,
};

#define I386_NUM_GREGS	16
#define I386_NUM_XREGS  9

#define I386_SSE_NUM_REGS	(I386_MXCSR_REGNUM + 1)
#define I386_AVX_NUM_REGS	(I386_YMM7H_REGNUM + 1)
#define I386_MPX_NUM_REGS	(I386_BNDSTATUS_REGNUM + 1)

/* Size of the largest register.  */
#define I386_MAX_REGISTER_SIZE	16

/* Types for i386-specific registers.  */
extern struct type *i387_ext_type (struct gdbarch *gdbarch);

/* Checks of different pseudo-registers.  */
extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);

extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
					      int regnum);
extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
					       int regnum);

extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
						  struct regcache *regcache,
						  int regnum,
						  struct value *result);

extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
					struct regcache *regcache,
					int regnum, const gdb_byte *buf);

/* Segment selectors.  */
#define I386_SEL_RPL	0x0003  /* Requester's Privilege Level mask.  */
#define I386_SEL_UPL	0x0003	/* User Privilige Level.  */
#define I386_SEL_KPL	0x0000	/* Kernel Privilige Level.  */

/* The length of the longest i386 instruction (according to
   include/asm-i386/kprobes.h in Linux 2.6.  */
#define I386_MAX_INSN_LEN (16)

/* Functions exported from i386-tdep.c.  */
extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
					       CORE_ADDR pc, char *name);
extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
					  CORE_ADDR pc);

/* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
extern int i386_sigtramp_p (struct frame_info *this_frame);

/* Return non-zero if REGNUM is a member of the specified group.  */
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
				     struct reggroup *group);

/* Supply register REGNUM from the general-purpose register set REGSET
   to register cache REGCACHE.  If REGNUM is -1, do this for all
   registers in REGSET.  */
extern void i386_supply_gregset (const struct regset *regset,
				 struct regcache *regcache, int regnum,
				 const void *gregs, size_t len);

/* Collect register REGNUM from the register cache REGCACHE and store
   it in the buffer specified by GREGS and LEN as described by the
   general-purpose register set REGSET.  If REGNUM is -1, do this for
   all registers in REGSET.  */
extern void i386_collect_gregset (const struct regset *regset,
				  const struct regcache *regcache,
				  int regnum, void *gregs, size_t len);

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */
extern const struct regset *
  i386_regset_from_core_section (struct gdbarch *gdbarch,
				 const char *sect_name, size_t sect_size);


extern struct displaced_step_closure *i386_displaced_step_copy_insn
  (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
   struct regcache *regs);
extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
				       struct displaced_step_closure *closure,
				       CORE_ADDR from, CORE_ADDR to,
				       struct regcache *regs);

/* Initialize a basic ELF architecture variant.  */
extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);

/* Initialize a SVR4 architecture variant.  */
extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);

extern int i386_process_record (struct gdbarch *gdbarch,
                                struct regcache *regcache, CORE_ADDR addr);

\f

/* Functions and variables exported from i386bsd-tdep.c.  */

extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
extern CORE_ADDR i386fbsd_sigtramp_start_addr;
extern CORE_ADDR i386fbsd_sigtramp_end_addr;
extern CORE_ADDR i386obsd_sigtramp_start_addr;
extern CORE_ADDR i386obsd_sigtramp_end_addr;
extern int i386fbsd4_sc_reg_offset[];
extern int i386fbsd_sc_reg_offset[];
extern int i386nbsd_sc_reg_offset[];
extern int i386obsd_sc_reg_offset[];
extern int i386bsd_sc_reg_offset[];

/* SystemTap related functions.  */

extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
					const char *s);

extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
					  struct stap_parse_info *p);

#endif /* i386-tdep.h */
Commit	Line	Data
5716833c MK	1	/* Target-dependent code for the i386.
5716833c MK	2
28e7fd62	3	Copyright (C) 2001-2013 Free Software Foundation, Inc.
9a82579f JS	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
a9762ec7	9	the Free Software Foundation; either version 3 of the License, or
9a82579f JS	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
a9762ec7	18	along with this program. If not, see <http://www.gnu.org/licenses/>. */
9a82579f JS	19
	20	#ifndef I386_TDEP_H
	21	#define I386_TDEP_H
	22
da3331ec	23	struct frame_info;
5716833c MK	24	struct gdbarch;
5716833c MK	25	struct reggroup;
c783cbd6	26	struct regset;
5439edaa	27	struct regcache;
da3331ec	28
96297dab MK	29	/* GDB's i386 target supports both the 32-bit Intel Architecture
	30	(IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
	31	a similar register layout for both.
	32
	33	- General purpose registers
	34	- FPU data registers
	35	- FPU control registers
	36	- SSE data registers
	37	- SSE control register
	38
	39	The general purpose registers for the x86-64 architecture are quite
3e8c568d	40	different from IA-32. Therefore, gdbarch_fp0_regnum
96297dab MK	41	determines the register number at which the FPU data registers
	42	start. The number of FPU data and control registers is the same
	43	for both architectures. The number of SSE registers however,
	44	differs and is determined by the num_xmm_regs member of `struct
	45	gdbarch_tdep'. */
	46
8201327c	47	/* Convention for returning structures. */
3ce1502b	48
8201327c MK	49	enum struct_return
	50	{
	51	pcc_struct_return, /* Return "short" structures in memory. */
	52	reg_struct_return /* Return "short" structures in registers. */
3ce1502b MK	53	};
3ce1502b MK	54
96297dab MK	55	/* i386 architecture specific information. */
	56	struct gdbarch_tdep
	57	{
473f17b0 MK	58	/* General-purpose registers. */
	59	struct regset *gregset;
	60	int *gregset_reg_offset;
	61	int gregset_num_regs;
	62	size_t sizeof_gregset;
	63
	64	/* Floating-point registers. */
	65	struct regset *fpregset;
	66	size_t sizeof_fpregset;
	67
c131fcee L	68	/* XSAVE extended state. */
	69	struct regset *xstateregset;
	70
5716833c MK	71	/* Register number for %st(0). The register numbers for the other
	72	registers follow from this one. Set this to -1 to indicate the
	73	absence of an FPU. */
	74	int st0_regnum;
	75
1ba53b71 L	76	/* Number of MMX registers. */
	77	int num_mmx_regs;
	78
5716833c MK	79	/* Register number for %mm0. Set this to -1 to indicate the absence
	80	of MMX support. */
	81	int mm0_regnum;
	82
c131fcee L	83	/* Number of pseudo YMM registers. */
	84	int num_ymm_regs;
	85
	86	/* Register number for %ymm0. Set this to -1 to indicate the absence
	87	of pseudo YMM register support. */
	88	int ymm0_regnum;
	89
1ba53b71 L	90	/* Number of byte registers. */
	91	int num_byte_regs;
	92
	93	/* Register pseudo number for %al. */
	94	int al_regnum;
	95
	96	/* Number of pseudo word registers. */
	97	int num_word_regs;
	98
	99	/* Register number for %ax. */
	100	int ax_regnum;
	101
	102	/* Number of pseudo dword registers. */
	103	int num_dword_regs;
	104
	105	/* Register number for %eax. Set this to -1 to indicate the absence
	106	of pseudo dword register support. */
	107	int eax_regnum;
	108
90884b2b L	109	/* Number of core registers. */
	110	int num_core_regs;
	111
96297dab MK	112	/* Number of SSE registers. */
96297dab MK	113	int num_xmm_regs;
8201327c	114
c131fcee	115	/* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
1777feb0 MS	116	register), excluding the x87 bit, which are supported by this GDB. */
1777feb0 MS	117
c131fcee L	118	uint64_t xcr0;
	119
	120	/* Offset of XCR0 in XSAVE extended state. */
	121	int xsave_xcr0_offset;
	122
90884b2b L	123	/* Register names. */
	124	const char **register_names;
	125
c131fcee L	126	/* Register number for %ymm0h. Set this to -1 to indicate the absence
	127	of upper YMM register support. */
	128	int ymm0h_regnum;
	129
	130	/* Upper YMM register names. Only used for tdesc_numbered_register. */
	131	const char **ymmh_register_names;
	132
1dbcd68c WT	133	/* Register number for %bnd0r. Set this to -1 to indicate the absence
	134	bound registers. */
	135	int bnd0r_regnum;
	136
	137	/* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
	138	bound registers. */
	139	int bnd0_regnum;
	140
	141	/* Register number for %bndcfgu. Set this to -1 to indicate the absence
	142	bound control registers. */
	143	int bndcfgu_regnum;
	144
	145	/* MPX register names. Only used for tdesc_numbered_register. */
	146	const char **mpx_register_names;
	147
90884b2b L	148	/* Target description. */
	149	const struct target_desc *tdesc;
	150
	151	/* Register group function. */
	152	const void *register_reggroup_p;
	153
8201327c MK	154	/* Offset of saved PC in jmp_buf. */
	155	int jb_pc_offset;
	156
	157	/* Convention for returning structures. */
	158	enum struct_return struct_return;
	159
8201327c MK	160	/* Address range where sigtramp lives. */
	161	CORE_ADDR sigtramp_start;
	162	CORE_ADDR sigtramp_end;
	163
911bc6ee MK	164	/* Detect sigtramp. */
	165	int (sigtramp_p) (struct frame_info );
	166
21d0e8a4 MK	167	/* Get address of sigcontext for sigtramp. */
	168	CORE_ADDR (sigcontext_addr) (struct frame_info );
	169
a3386186 MK	170	/* Offset of registers in `struct sigcontext'. */
	171	int *sc_reg_offset;
	172	int sc_num_regs;
	173
	174	/* Offset of saved PC and SP in `struct sigcontext'. Usage of these
	175	is deprecated, please use `sc_reg_offset' instead. */
8201327c	176	int sc_pc_offset;
21d0e8a4	177	int sc_sp_offset;
794ac428 UW	178
	179	/* ISA-specific data types. */
	180	struct type *i386_mmx_type;
c131fcee	181	struct type *i386_ymm_type;
27067745	182	struct type *i387_ext_type;
1dbcd68c	183	struct type *i386_bnd_type;
7ad10968 HZ	184
7ad10968 HZ	185	/* Process record/replay target. */
cf648174 HZ	186	/* The map for registers because the AMD64's registers order
	187	in GDB is not same as I386 instructions. */
	188	const int *record_regmap;
7ad10968 HZ	189	/* Parse intx80 args. */
	190	int (i386_intx80_record) (struct regcache regcache);
	191	/* Parse sysenter args. */
	192	int (i386_sysenter_record) (struct regcache regcache);
cf648174 HZ	193	/* Parse syscall args. */
cf648174 HZ	194	int (i386_syscall_record) (struct regcache regcache);
96297dab MK	195	};
	196
	197	/* Floating-point registers. */
	198
96297dab MK	199	/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
	200	(at most) in the FPU, but are zero-extended to 32 bits in GDB's
	201	register cache. */
	202
23a34459 AC	203	/* Return non-zero if REGNUM matches the FP register and the FP
23a34459 AC	204	register set is active. */
20a6ec49 MD	205	extern int i386_fp_regnum_p (struct gdbarch *, int);
20a6ec49 MD	206	extern int i386_fpc_regnum_p (struct gdbarch *, int);
96297dab	207
a3386186 MK	208	/* Register numbers of various important registers. */
a3386186 MK	209
bcf48cc7 MK	210	enum i386_regnum
	211	{
	212	I386_EAX_REGNUM, /* %eax */
	213	I386_ECX_REGNUM, /* %ecx */
	214	I386_EDX_REGNUM, /* %edx */
	215	I386_EBX_REGNUM, /* %ebx */
	216	I386_ESP_REGNUM, /* %esp */
	217	I386_EBP_REGNUM, /* %ebp */
	218	I386_ESI_REGNUM, /* %esi */
	219	I386_EDI_REGNUM, /* %edi */
	220	I386_EIP_REGNUM, /* %eip */
	221	I386_EFLAGS_REGNUM, /* %eflags */
2666fb59 MK	222	I386_CS_REGNUM, /* %cs */
2666fb59 MK	223	I386_SS_REGNUM, /* %ss */
e9ff708b AC	224	I386_DS_REGNUM, /* %ds */
	225	I386_ES_REGNUM, /* %es */
	226	I386_FS_REGNUM, /* %fs */
	227	I386_GS_REGNUM, /* %gs */
90884b2b	228	I386_ST0_REGNUM, /* %st(0) */
c131fcee L	229	I386_MXCSR_REGNUM = 40, /* %mxcsr */
c131fcee L	230	I386_YMM0H_REGNUM, /* %ymm0h */
1dbcd68c WT	231	I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
	232	I386_BND0R_REGNUM,
	233	I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
	234	I386_BNDCFGU_REGNUM,
	235	I386_BNDSTATUS_REGNUM
bcf48cc7	236	};
a3386186	237
cf648174 HZ	238	/* Register numbers of RECORD_REGMAP. */
	239
	240	enum record_i386_regnum
	241	{
	242	X86_RECORD_REAX_REGNUM,
	243	X86_RECORD_RECX_REGNUM,
	244	X86_RECORD_REDX_REGNUM,
	245	X86_RECORD_REBX_REGNUM,
	246	X86_RECORD_RESP_REGNUM,
	247	X86_RECORD_REBP_REGNUM,
	248	X86_RECORD_RESI_REGNUM,
	249	X86_RECORD_REDI_REGNUM,
	250	X86_RECORD_R8_REGNUM,
	251	X86_RECORD_R9_REGNUM,
	252	X86_RECORD_R10_REGNUM,
	253	X86_RECORD_R11_REGNUM,
	254	X86_RECORD_R12_REGNUM,
	255	X86_RECORD_R13_REGNUM,
	256	X86_RECORD_R14_REGNUM,
	257	X86_RECORD_R15_REGNUM,
	258	X86_RECORD_REIP_REGNUM,
	259	X86_RECORD_EFLAGS_REGNUM,
	260	X86_RECORD_CS_REGNUM,
	261	X86_RECORD_SS_REGNUM,
	262	X86_RECORD_DS_REGNUM,
	263	X86_RECORD_ES_REGNUM,
	264	X86_RECORD_FS_REGNUM,
	265	X86_RECORD_GS_REGNUM,
	266	};
	267
8201327c	268	#define I386_NUM_GREGS 16
8201327c MK	269	#define I386_NUM_XREGS 9
8201327c MK	270
90884b2b	271	#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
c131fcee	272	#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
1dbcd68c	273	#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
8201327c	274
00f8375e MK	275	/* Size of the largest register. */
	276	#define I386_MAX_REGISTER_SIZE 16
	277
5ae96ec1	278	/* Types for i386-specific registers. */
27067745	279	extern struct type i387_ext_type (struct gdbarch gdbarch);
794ac428	280
1ba53b71 L	281	/* Checks of different pseudo-registers. */
	282	extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
	283	extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
	284	extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
c131fcee L	285	extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
c131fcee L	286	extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
1dbcd68c	287	extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
1ba53b71 L	288
	289	extern const char i386_pseudo_register_name (struct gdbarch gdbarch,
	290	int regnum);
fff4548b MK	291	extern struct type i386_pseudo_register_type (struct gdbarch gdbarch,
fff4548b MK	292	int regnum);
1ba53b71	293
3543a589 TT	294	extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
	295	struct regcache *regcache,
	296	int regnum,
	297	struct value *result);
	298
1ba53b71 L	299	extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
	300	struct regcache *regcache,
	301	int regnum, const gdb_byte *buf);
	302
508fbfea MK	303	/* Segment selectors. */
508fbfea MK	304	#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
1777feb0 MS	305	#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
1777feb0 MS	306	#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
508fbfea	307
237fc4c9 PA	308	/* The length of the longest i386 instruction (according to
	309	include/asm-i386/kprobes.h in Linux 2.6. */
	310	#define I386_MAX_INSN_LEN (16)
	311
1cce71eb	312	/* Functions exported from i386-tdep.c. */
e17a4113 UW	313	extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
e17a4113 UW	314	CORE_ADDR pc, char *name);
1777feb0 MS	315	extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
1777feb0 MS	316	CORE_ADDR pc);
1cce71eb	317
4bd207ef TG	318	/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
	319	extern int i386_sigtramp_p (struct frame_info *this_frame);
	320
38c968cf AC	321	/* Return non-zero if REGNUM is a member of the specified group. */
	322	extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
	323	struct reggroup *group);
	324
20187ed5 MK	325	/* Supply register REGNUM from the general-purpose register set REGSET
	326	to register cache REGCACHE. If REGNUM is -1, do this for all
	327	registers in REGSET. */
	328	extern void i386_supply_gregset (const struct regset *regset,
	329	struct regcache *regcache, int regnum,
	330	const void *gregs, size_t len);
3d171c85 MK	331
	332	/* Collect register REGNUM from the register cache REGCACHE and store
	333	it in the buffer specified by GREGS and LEN as described by the
	334	general-purpose register set REGSET. If REGNUM is -1, do this for
	335	all registers in REGSET. */
	336	extern void i386_collect_gregset (const struct regset *regset,
	337	const struct regcache *regcache,
	338	int regnum, void *gregs, size_t len);
20187ed5	339
8446b36a MK	340	/* Return the appropriate register set for the core section identified
	341	by SECT_NAME and SECT_SIZE. */
	342	extern const struct regset *
	343	i386_regset_from_core_section (struct gdbarch *gdbarch,
	344	const char *sect_name, size_t sect_size);
	345
237fc4c9	346
b55078be DE	347	extern struct displaced_step_closure *i386_displaced_step_copy_insn
	348	(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
	349	struct regcache *regs);
237fc4c9 PA	350	extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
	351	struct displaced_step_closure *closure,
	352	CORE_ADDR from, CORE_ADDR to,
	353	struct regcache *regs);
	354
8201327c MK	355	/* Initialize a basic ELF architecture variant. */
	356	extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
	357
	358	/* Initialize a SVR4 architecture variant. */
	359	extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
a6b808b4 HZ	360
	361	extern int i386_process_record (struct gdbarch *gdbarch,
	362	struct regcache *regcache, CORE_ADDR addr);
55aa24fb	363
de0b6abb	364	\f
8201327c	365
de0b6abb	366	/* Functions and variables exported from i386bsd-tdep.c. */
8201327c	367
3cac699e	368	extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
5d93ae8c MK	369	extern CORE_ADDR i386fbsd_sigtramp_start_addr;
	370	extern CORE_ADDR i386fbsd_sigtramp_end_addr;
	371	extern CORE_ADDR i386obsd_sigtramp_start_addr;
	372	extern CORE_ADDR i386obsd_sigtramp_end_addr;
de0b6abb MK	373	extern int i386fbsd4_sc_reg_offset[];
	374	extern int i386fbsd_sc_reg_offset[];
	375	extern int i386nbsd_sc_reg_offset[];
	376	extern int i386obsd_sc_reg_offset[];
	377	extern int i386bsd_sc_reg_offset[];
3ce1502b	378
55aa24fb SDJ	379	/* SystemTap related functions. */
	380
	381	extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
	382	const char *s);
	383
	384	extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
	385	struct stap_parse_info *p);
	386
96297dab	387	#endif /* i386-tdep.h */