Remove spurious gdb/ ...
[deliverable/binutils-gdb.git] / gdb / i387-tdep.c
CommitLineData
c906108c 1/* Intel 387 floating point stuff.
38edeab8 2
6aba47ca 3 Copyright (C) 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001,
0fb0cc75 4 2002, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
c5aa993b 11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b 18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
20
21#include "defs.h"
786a90bb
MK
22#include "doublest.h"
23#include "floatformat.h"
c906108c 24#include "frame.h"
786a90bb 25#include "gdbcore.h"
c906108c
SS
26#include "inferior.h"
27#include "language.h"
4e052eda 28#include "regcache.h"
786a90bb
MK
29#include "value.h"
30
d0df8472 31#include "gdb_assert.h"
309367d4 32#include "gdb_string.h"
c906108c 33
9a82579f 34#include "i386-tdep.h"
42c466d7 35#include "i387-tdep.h"
c906108c 36
de57eccd 37/* Print the floating point number specified by RAW. */
786a90bb 38
de57eccd 39static void
27067745
UW
40print_i387_value (struct gdbarch *gdbarch,
41 const gdb_byte *raw, struct ui_file *file)
de57eccd
JM
42{
43 DOUBLEST value;
4583280c
MK
44
45 /* Using extract_typed_floating here might affect the representation
46 of certain numbers such as NaNs, even if GDB is running natively.
47 This is fine since our caller already detects such special
48 numbers and we print the hexadecimal representation anyway. */
27067745 49 value = extract_typed_floating (raw, i387_ext_type (gdbarch));
de57eccd
JM
50
51 /* We try to print 19 digits. The last digit may or may not contain
52 garbage, but we'd better print one too many. We need enough room
53 to print the value, 1 position for the sign, 1 for the decimal
54 point, 19 for the digits and 6 for the exponent adds up to 27. */
55#ifdef PRINTF_HAS_LONG_DOUBLE
61113f8b 56 fprintf_filtered (file, " %-+27.19Lg", (long double) value);
de57eccd 57#else
61113f8b 58 fprintf_filtered (file, " %-+27.19g", (double) value);
de57eccd
JM
59#endif
60}
61
62/* Print the classification for the register contents RAW. */
786a90bb 63
de57eccd 64static void
27067745
UW
65print_i387_ext (struct gdbarch *gdbarch,
66 const gdb_byte *raw, struct ui_file *file)
de57eccd
JM
67{
68 int sign;
69 int integer;
70 unsigned int exponent;
71 unsigned long fraction[2];
72
73 sign = raw[9] & 0x80;
74 integer = raw[7] & 0x80;
75 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
76 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
77 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
78 | (raw[5] << 8) | raw[4]);
79
80 if (exponent == 0x7fff && integer)
81 {
82 if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000)
83 /* Infinity. */
61113f8b 84 fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
de57eccd
JM
85 else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
86 /* Real Indefinite (QNaN). */
61113f8b 87 fputs_unfiltered (" Real Indefinite (QNaN)", file);
de57eccd
JM
88 else if (fraction[1] & 0x40000000)
89 /* QNaN. */
61113f8b 90 fputs_filtered (" QNaN", file);
de57eccd
JM
91 else
92 /* SNaN. */
61113f8b 93 fputs_filtered (" SNaN", file);
de57eccd
JM
94 }
95 else if (exponent < 0x7fff && exponent > 0x0000 && integer)
96 /* Normal. */
27067745 97 print_i387_value (gdbarch, raw, file);
de57eccd
JM
98 else if (exponent == 0x0000)
99 {
100 /* Denormal or zero. */
27067745 101 print_i387_value (gdbarch, raw, file);
de57eccd
JM
102
103 if (integer)
104 /* Pseudo-denormal. */
61113f8b 105 fputs_filtered (" Pseudo-denormal", file);
de57eccd
JM
106 else if (fraction[0] || fraction[1])
107 /* Denormal. */
61113f8b 108 fputs_filtered (" Denormal", file);
de57eccd
JM
109 }
110 else
111 /* Unsupported. */
61113f8b 112 fputs_filtered (" Unsupported", file);
de57eccd
JM
113}
114
115/* Print the status word STATUS. */
786a90bb 116
de57eccd 117static void
61113f8b 118print_i387_status_word (unsigned int status, struct ui_file *file)
de57eccd 119{
61113f8b 120 fprintf_filtered (file, "Status Word: %s",
bb599908 121 hex_string_custom (status, 4));
61113f8b
MK
122 fputs_filtered (" ", file);
123 fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " ");
124 fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " ");
125 fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " ");
126 fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " ");
127 fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " ");
128 fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " ");
129 fputs_filtered (" ", file);
130 fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " ");
131 fputs_filtered (" ", file);
132 fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " ");
133 fputs_filtered (" ", file);
134 fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " ");
135 fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " ");
136 fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " ");
137 fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " ");
138
139 fputs_filtered ("\n", file);
140
141 fprintf_filtered (file,
142 " TOP: %d\n", ((status >> 11) & 7));
de57eccd
JM
143}
144
145/* Print the control word CONTROL. */
786a90bb 146
de57eccd 147static void
61113f8b 148print_i387_control_word (unsigned int control, struct ui_file *file)
de57eccd 149{
61113f8b 150 fprintf_filtered (file, "Control Word: %s",
bb599908 151 hex_string_custom (control, 4));
61113f8b
MK
152 fputs_filtered (" ", file);
153 fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " ");
154 fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " ");
155 fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " ");
156 fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " ");
157 fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " ");
158 fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " ");
de57eccd 159
61113f8b 160 fputs_filtered ("\n", file);
de57eccd 161
61113f8b 162 fputs_filtered (" PC: ", file);
de57eccd
JM
163 switch ((control >> 8) & 3)
164 {
165 case 0:
61113f8b 166 fputs_filtered ("Single Precision (24-bits)\n", file);
de57eccd
JM
167 break;
168 case 1:
61113f8b 169 fputs_filtered ("Reserved\n", file);
de57eccd
JM
170 break;
171 case 2:
61113f8b 172 fputs_filtered ("Double Precision (53-bits)\n", file);
de57eccd
JM
173 break;
174 case 3:
61113f8b 175 fputs_filtered ("Extended Precision (64-bits)\n", file);
de57eccd
JM
176 break;
177 }
178
61113f8b 179 fputs_filtered (" RC: ", file);
de57eccd
JM
180 switch ((control >> 10) & 3)
181 {
182 case 0:
61113f8b 183 fputs_filtered ("Round to nearest\n", file);
de57eccd
JM
184 break;
185 case 1:
61113f8b 186 fputs_filtered ("Round down\n", file);
de57eccd
JM
187 break;
188 case 2:
61113f8b 189 fputs_filtered ("Round up\n", file);
de57eccd
JM
190 break;
191 case 3:
61113f8b 192 fputs_filtered ("Round toward zero\n", file);
de57eccd
JM
193 break;
194 }
195}
196
9b949a49 197/* Print out the i387 floating point state. Note that we ignore FRAME
7d8d2918
MK
198 in the code below. That's OK since floating-point registers are
199 never saved on the stack. */
200
de57eccd 201void
61113f8b 202i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
8e186fd6 203 struct frame_info *frame, const char *args)
de57eccd 204{
5716833c 205 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
b4ad899f 206 gdb_byte buf[4];
1d70089a
MK
207 ULONGEST fctrl;
208 ULONGEST fstat;
209 ULONGEST ftag;
210 ULONGEST fiseg;
211 ULONGEST fioff;
212 ULONGEST foseg;
213 ULONGEST fooff;
214 ULONGEST fop;
de57eccd
JM
215 int fpreg;
216 int top;
217
5716833c
MK
218 gdb_assert (gdbarch == get_frame_arch (frame));
219
20a6ec49
MD
220 fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep));
221 fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep));
222 ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep));
223 fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep));
224 fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep));
225 foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep));
226 fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep));
227 fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep));
1d70089a 228
de57eccd
JM
229 top = ((fstat >> 11) & 7);
230
231 for (fpreg = 7; fpreg >= 0; fpreg--)
232 {
b4ad899f 233 gdb_byte raw[I386_MAX_REGISTER_SIZE];
de57eccd
JM
234 int tag = (ftag >> (fpreg * 2)) & 3;
235 int i;
236
61113f8b 237 fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg);
de57eccd
JM
238
239 switch (tag)
240 {
241 case 0:
61113f8b 242 fputs_filtered ("Valid ", file);
de57eccd
JM
243 break;
244 case 1:
61113f8b 245 fputs_filtered ("Zero ", file);
de57eccd
JM
246 break;
247 case 2:
61113f8b 248 fputs_filtered ("Special ", file);
de57eccd
JM
249 break;
250 case 3:
61113f8b 251 fputs_filtered ("Empty ", file);
de57eccd
JM
252 break;
253 }
254
20a6ec49
MD
255 get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep),
256 raw);
de57eccd 257
61113f8b 258 fputs_filtered ("0x", file);
de57eccd 259 for (i = 9; i >= 0; i--)
61113f8b 260 fprintf_filtered (file, "%02x", raw[i]);
de57eccd
JM
261
262 if (tag != 3)
27067745 263 print_i387_ext (gdbarch, raw, file);
de57eccd 264
61113f8b 265 fputs_filtered ("\n", file);
de57eccd
JM
266 }
267
f16a25ae 268 fputs_filtered ("\n", file);
de57eccd 269
61113f8b
MK
270 print_i387_status_word (fstat, file);
271 print_i387_control_word (fctrl, file);
272 fprintf_filtered (file, "Tag Word: %s\n",
bb599908 273 hex_string_custom (ftag, 4));
61113f8b 274 fprintf_filtered (file, "Instruction Pointer: %s:",
bb599908
PH
275 hex_string_custom (fiseg, 2));
276 fprintf_filtered (file, "%s\n", hex_string_custom (fioff, 8));
61113f8b 277 fprintf_filtered (file, "Operand Pointer: %s:",
bb599908
PH
278 hex_string_custom (foseg, 2));
279 fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8));
61113f8b 280 fprintf_filtered (file, "Opcode: %s\n",
bb599908 281 hex_string_custom (fop ? (fop | 0xd800) : 0, 4));
de57eccd 282}
d532c08f
MK
283\f
284
83acabca
DJ
285/* Return nonzero if a value of type TYPE stored in register REGNUM
286 needs any special handling. */
287
288int
0abe36f5 289i387_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type)
83acabca 290{
20a6ec49 291 if (i386_fp_regnum_p (gdbarch, regnum))
83acabca
DJ
292 {
293 /* Floating point registers must be converted unless we are
294 accessing them in their hardware type. */
27067745 295 if (type == i387_ext_type (gdbarch))
83acabca
DJ
296 return 0;
297 else
298 return 1;
299 }
300
301 return 0;
302}
303
d532c08f
MK
304/* Read a value of type TYPE from register REGNUM in frame FRAME, and
305 return its contents in TO. */
306
307void
308i387_register_to_value (struct frame_info *frame, int regnum,
42835c2b 309 struct type *type, gdb_byte *to)
d532c08f 310{
27067745 311 struct gdbarch *gdbarch = get_frame_arch (frame);
b4ad899f 312 gdb_byte from[I386_MAX_REGISTER_SIZE];
d532c08f 313
27067745 314 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
d532c08f
MK
315
316 /* We only support floating-point values. */
317 if (TYPE_CODE (type) != TYPE_CODE_FLT)
318 {
8a3fe4f8
AC
319 warning (_("Cannot convert floating-point register value "
320 "to non-floating-point type."));
d532c08f
MK
321 return;
322 }
323
83acabca 324 /* Convert to TYPE. */
192285c6 325 get_frame_register (frame, regnum, from);
27067745 326 convert_typed_floating (from, i387_ext_type (gdbarch), to, type);
d532c08f
MK
327}
328
329/* Write the contents FROM of a value of type TYPE into register
330 REGNUM in frame FRAME. */
331
332void
333i387_value_to_register (struct frame_info *frame, int regnum,
42835c2b 334 struct type *type, const gdb_byte *from)
d532c08f 335{
27067745 336 struct gdbarch *gdbarch = get_frame_arch (frame);
b4ad899f 337 gdb_byte to[I386_MAX_REGISTER_SIZE];
d532c08f 338
27067745 339 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
d532c08f
MK
340
341 /* We only support floating-point values. */
342 if (TYPE_CODE (type) != TYPE_CODE_FLT)
343 {
8a3fe4f8
AC
344 warning (_("Cannot convert non-floating-point type "
345 "to floating-point register value."));
d532c08f
MK
346 return;
347 }
348
83acabca 349 /* Convert from TYPE. */
27067745 350 convert_typed_floating (from, type, to, i387_ext_type (gdbarch));
d532c08f
MK
351 put_frame_register (frame, regnum, to);
352}
353\f
e750d25e 354
786a90bb 355/* Handle FSAVE and FXSAVE formats. */
e750d25e
JT
356
357/* At fsave_offset[REGNUM] you'll find the offset to the location in
358 the data structure used by the "fsave" instruction where GDB
359 register REGNUM is stored. */
360
361static int fsave_offset[] =
362{
5716833c
MK
363 28 + 0 * 10, /* %st(0) ... */
364 28 + 1 * 10,
365 28 + 2 * 10,
366 28 + 3 * 10,
367 28 + 4 * 10,
368 28 + 5 * 10,
369 28 + 6 * 10,
370 28 + 7 * 10, /* ... %st(7). */
371 0, /* `fctrl' (16 bits). */
372 4, /* `fstat' (16 bits). */
373 8, /* `ftag' (16 bits). */
374 16, /* `fiseg' (16 bits). */
375 12, /* `fioff'. */
376 24, /* `foseg' (16 bits). */
377 20, /* `fooff'. */
378 18 /* `fop' (bottom 11 bits). */
e750d25e
JT
379};
380
20a6ec49
MD
381#define FSAVE_ADDR(tdep, fsave, regnum) \
382 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
e750d25e
JT
383\f
384
41d041d6
MK
385/* Fill register REGNUM in REGCACHE with the appropriate value from
386 *FSAVE. This function masks off any of the reserved bits in
387 *FSAVE. */
e750d25e
JT
388
389void
41d041d6 390i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
e750d25e 391{
e17a4113
UW
392 struct gdbarch *gdbarch = get_regcache_arch (regcache);
393 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
394 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b4ad899f 395 const gdb_byte *regs = fsave;
e750d25e
JT
396 int i;
397
5716833c
MK
398 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
399
20a6ec49 400 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
ed504bdf
MK
401 if (regnum == -1 || regnum == i)
402 {
403 if (fsave == NULL)
404 {
5716833c
MK
405 regcache_raw_supply (regcache, i, NULL);
406 continue;
ed504bdf
MK
407 }
408
409 /* Most of the FPU control registers occupy only 16 bits in the
410 fsave area. Give those a special treatment. */
20a6ec49
MD
411 if (i >= I387_FCTRL_REGNUM (tdep)
412 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
ed504bdf 413 {
b4ad899f 414 gdb_byte val[4];
ed504bdf 415
20a6ec49 416 memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
ed504bdf 417 val[2] = val[3] = 0;
20a6ec49 418 if (i == I387_FOP_REGNUM (tdep))
ed504bdf 419 val[1] &= ((1 << 3) - 1);
5716833c 420 regcache_raw_supply (regcache, i, val);
ed504bdf
MK
421 }
422 else
20a6ec49 423 regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
ed504bdf 424 }
b87bc0d8
MK
425
426 /* Provide dummy values for the SSE registers. */
20a6ec49 427 for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
b87bc0d8
MK
428 if (regnum == -1 || regnum == i)
429 regcache_raw_supply (regcache, i, NULL);
20a6ec49 430 if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
b87bc0d8 431 {
b4ad899f 432 gdb_byte buf[4];
b87bc0d8 433
e17a4113 434 store_unsigned_integer (buf, 4, byte_order, 0x1f80);
20a6ec49 435 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
b87bc0d8 436 }
e750d25e
JT
437}
438
439/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
63b6c53f
MK
440 with the value from REGCACHE. If REGNUM is -1, do this for all
441 registers. This function doesn't touch any of the reserved bits in
442 *FSAVE. */
e750d25e
JT
443
444void
63b6c53f 445i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
e750d25e 446{
e071d1f6 447 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
b4ad899f 448 gdb_byte *regs = fsave;
e750d25e
JT
449 int i;
450
5716833c
MK
451 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
452
20a6ec49 453 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
e750d25e
JT
454 if (regnum == -1 || regnum == i)
455 {
456 /* Most of the FPU control registers occupy only 16 bits in
457 the fsave area. Give those a special treatment. */
20a6ec49
MD
458 if (i >= I387_FCTRL_REGNUM (tdep)
459 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
e750d25e 460 {
b4ad899f 461 gdb_byte buf[4];
e750d25e 462
5716833c 463 regcache_raw_collect (regcache, i, buf);
e750d25e 464
20a6ec49 465 if (i == I387_FOP_REGNUM (tdep))
e750d25e
JT
466 {
467 /* The opcode occupies only 11 bits. Make sure we
468 don't touch the other bits. */
469 buf[1] &= ((1 << 3) - 1);
20a6ec49 470 buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
e750d25e 471 }
20a6ec49 472 memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
e750d25e
JT
473 }
474 else
20a6ec49 475 regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
e750d25e
JT
476 }
477}
478\f
479
480/* At fxsave_offset[REGNUM] you'll find the offset to the location in
481 the data structure used by the "fxsave" instruction where GDB
482 register REGNUM is stored. */
483
484static int fxsave_offset[] =
485{
5716833c 486 32, /* %st(0) through ... */
e750d25e
JT
487 48,
488 64,
489 80,
490 96,
491 112,
492 128,
5716833c
MK
493 144, /* ... %st(7) (80 bits each). */
494 0, /* `fctrl' (16 bits). */
495 2, /* `fstat' (16 bits). */
496 4, /* `ftag' (16 bits). */
497 12, /* `fiseg' (16 bits). */
498 8, /* `fioff'. */
499 20, /* `foseg' (16 bits). */
500 16, /* `fooff'. */
501 6, /* `fop' (bottom 11 bits). */
502 160 + 0 * 16, /* %xmm0 through ... */
04c8243f
MK
503 160 + 1 * 16,
504 160 + 2 * 16,
505 160 + 3 * 16,
506 160 + 4 * 16,
507 160 + 5 * 16,
508 160 + 6 * 16,
509 160 + 7 * 16,
510 160 + 8 * 16,
511 160 + 9 * 16,
512 160 + 10 * 16,
513 160 + 11 * 16,
514 160 + 12 * 16,
515 160 + 13 * 16,
516 160 + 14 * 16,
5716833c 517 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
e750d25e
JT
518};
519
20a6ec49
MD
520#define FXSAVE_ADDR(tdep, fxsave, regnum) \
521 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
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522
523/* We made an unfortunate choice in putting %mxcsr after the SSE
524 registers %xmm0-%xmm7 instead of before, since it makes supporting
525 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
526 don't include the offset for %mxcsr here above. */
527
528#define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
e750d25e 529
b4ad899f 530static int i387_tag (const gdb_byte *raw);
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531\f
532
41d041d6 533/* Fill register REGNUM in REGCACHE with the appropriate
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534 floating-point or SSE register value from *FXSAVE. This function
535 masks off any of the reserved bits in *FXSAVE. */
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536
537void
41d041d6 538i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
e750d25e 539{
41d041d6 540 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
b4ad899f 541 const gdb_byte *regs = fxsave;
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542 int i;
543
544 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
545 gdb_assert (tdep->num_xmm_regs > 0);
dff95cc7 546
20a6ec49 547 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
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548 if (regnum == -1 || regnum == i)
549 {
5716833c 550 if (regs == NULL)
ed504bdf 551 {
5716833c 552 regcache_raw_supply (regcache, i, NULL);
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553 continue;
554 }
932bb524 555
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556 /* Most of the FPU control registers occupy only 16 bits in
557 the fxsave area. Give those a special treatment. */
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558 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
559 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
ed504bdf 560 {
b4ad899f 561 gdb_byte val[4];
ed504bdf 562
20a6ec49 563 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
ed504bdf 564 val[2] = val[3] = 0;
20a6ec49 565 if (i == I387_FOP_REGNUM (tdep))
ed504bdf 566 val[1] &= ((1 << 3) - 1);
20a6ec49 567 else if (i== I387_FTAG_REGNUM (tdep))
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568 {
569 /* The fxsave area contains a simplified version of
570 the tag word. We have to look at the actual 80-bit
571 FP data to recreate the traditional i387 tag word. */
572
573 unsigned long ftag = 0;
574 int fpreg;
575 int top;
576
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577 top = ((FXSAVE_ADDR (tdep, regs,
578 I387_FSTAT_REGNUM (tdep)))[1] >> 3);
5716833c 579 top &= 0x7;
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580
581 for (fpreg = 7; fpreg >= 0; fpreg--)
582 {
583 int tag;
584
585 if (val[0] & (1 << fpreg))
586 {
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587 int regnum = (fpreg + 8 - top) % 8
588 + I387_ST0_REGNUM (tdep);
589 tag = i387_tag (FXSAVE_ADDR (tdep, regs, regnum));
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590 }
591 else
592 tag = 3; /* Empty */
593
594 ftag |= tag << (2 * fpreg);
595 }
596 val[0] = ftag & 0xff;
597 val[1] = (ftag >> 8) & 0xff;
598 }
5716833c 599 regcache_raw_supply (regcache, i, val);
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600 }
601 else
20a6ec49 602 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
ed504bdf 603 }
5716833c 604
20a6ec49 605 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
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606 {
607 if (regs == NULL)
20a6ec49 608 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
5716833c 609 else
20a6ec49 610 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
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611 FXSAVE_MXCSR_ADDR (regs));
612 }
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613}
614
615/* Fill register REGNUM (if it is a floating-point or SSE register) in
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616 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
617 all registers. This function doesn't touch any of the reserved
618 bits in *FXSAVE. */
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619
620void
80571bff 621i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
e750d25e 622{
e071d1f6 623 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
b4ad899f 624 gdb_byte *regs = fxsave;
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625 int i;
626
627 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
628 gdb_assert (tdep->num_xmm_regs > 0);
dff95cc7 629
20a6ec49 630 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
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631 if (regnum == -1 || regnum == i)
632 {
633 /* Most of the FPU control registers occupy only 16 bits in
634 the fxsave area. Give those a special treatment. */
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635 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
636 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
e750d25e 637 {
b4ad899f 638 gdb_byte buf[4];
e750d25e 639
5716833c 640 regcache_raw_collect (regcache, i, buf);
e750d25e 641
20a6ec49 642 if (i == I387_FOP_REGNUM (tdep))
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643 {
644 /* The opcode occupies only 11 bits. Make sure we
645 don't touch the other bits. */
646 buf[1] &= ((1 << 3) - 1);
20a6ec49 647 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
e750d25e 648 }
20a6ec49 649 else if (i == I387_FTAG_REGNUM (tdep))
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650 {
651 /* Converting back is much easier. */
652
653 unsigned short ftag;
654 int fpreg;
655
656 ftag = (buf[1] << 8) | buf[0];
657 buf[0] = 0;
658 buf[1] = 0;
659
660 for (fpreg = 7; fpreg >= 0; fpreg--)
661 {
662 int tag = (ftag >> (fpreg * 2)) & 3;
663
664 if (tag != 3)
665 buf[0] |= (1 << fpreg);
666 }
667 }
20a6ec49 668 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
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669 }
670 else
20a6ec49 671 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
e750d25e 672 }
5716833c 673
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674 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
675 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
5716833c 676 FXSAVE_MXCSR_ADDR (regs));
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677}
678
679/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
680 *RAW. */
681
682static int
b4ad899f 683i387_tag (const gdb_byte *raw)
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684{
685 int integer;
686 unsigned int exponent;
687 unsigned long fraction[2];
688
689 integer = raw[7] & 0x80;
690 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
691 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
692 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
693 | (raw[5] << 8) | raw[4]);
694
695 if (exponent == 0x7fff)
696 {
697 /* Special. */
698 return (2);
699 }
700 else if (exponent == 0x0000)
701 {
702 if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
703 {
704 /* Zero. */
705 return (1);
706 }
707 else
708 {
709 /* Special. */
710 return (2);
711 }
712 }
713 else
714 {
715 if (integer)
716 {
717 /* Valid. */
718 return (0);
719 }
720 else
721 {
722 /* Special. */
723 return (2);
724 }
725 }
726}
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727
728/* Prepare the FPU stack in REGCACHE for a function return. */
729
730void
731i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
732{
733 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
734 ULONGEST fstat;
735
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736 /* Set the top of the floating-point register stack to 7. The
737 actual value doesn't really matter, but 7 is what a normal
738 function return would end up with if the program started out with
739 a freshly initialized FPU. */
20a6ec49 740 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
efb1c01c 741 fstat |= (7 << 11);
20a6ec49 742 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
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743
744 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
745 floating-point register stack to 7, the appropriate value for the
746 tag word is 0x3fff. */
20a6ec49 747 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
efb1c01c 748
efb1c01c 749}
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