* gdb.base/help.exp: Allow Win32 child process.
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
ca557f44 2
51603483 3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
16461d7d
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
fd0407d6 30#include "value.h"
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31
32#include "objfiles.h"
33#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 34#include "elf-bfd.h"
16461d7d 35
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36/* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47/* An enumeration of the different IA-64 instruction types. */
48
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49typedef enum instruction_type
50{
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59} instruction_type;
60
61/* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76#define SLOT_MULTIPLIER 1
77
78/* Length in bytes of an instruction bundle */
79
80#define BUNDLE_LEN 16
81
d7fa2ae2 82/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 83extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 84extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 85
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86static gdbarch_init_ftype ia64_gdbarch_init;
87
88static gdbarch_register_name_ftype ia64_register_name;
89static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92static gdbarch_register_byte_ftype ia64_register_byte;
93static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94static gdbarch_frame_chain_ftype ia64_frame_chain;
16461d7d 95static gdbarch_skip_prologue_ftype ia64_skip_prologue;
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96static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
97static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
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98static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
99static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
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100static gdbarch_store_struct_return_ftype ia64_store_struct_return;
101static gdbarch_push_arguments_ftype ia64_push_arguments;
102static gdbarch_push_return_address_ftype ia64_push_return_address;
16461d7d 103static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 104static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 105static struct type *is_float_or_hfa_type (struct type *t);
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106
107static int ia64_num_regs = 590;
108
109static int pc_regnum = IA64_IP_REGNUM;
110static int sp_regnum = IA64_GR12_REGNUM;
111static int fp_regnum = IA64_VFP_REGNUM;
112static int lr_regnum = IA64_VRAP_REGNUM;
113
114static LONGEST ia64_call_dummy_words[] = {0};
115
116/* Array of register names; There should be ia64_num_regs strings in
117 the initializer. */
118
119static char *ia64_register_names[] =
120{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
121 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
122 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
123 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
124 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
125 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
126 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
127 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
128 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
129 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
130 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
131 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
132 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
133 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
134 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
135 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
136
137 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
138 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
139 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
140 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
141 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
142 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
143 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
144 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
145 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
146 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
147 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
148 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
149 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
150 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
151 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
152 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
153
154 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
155 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
156 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
157 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
158 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
159 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
160 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
161 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
162
163 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
164
165 "vfp", "vrap",
166
167 "pr", "ip", "psr", "cfm",
168
169 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
170 "", "", "", "", "", "", "", "",
171 "rsc", "bsp", "bspstore", "rnat",
172 "", "fcr", "", "",
173 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
174 "ccv", "", "", "", "unat", "", "", "",
175 "fpsr", "", "", "", "itc",
176 "", "", "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "", "",
178 "pfs", "lc", "ec",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "",
186 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
187 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
188 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
189 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
190 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
191 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
192 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
193 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
194 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
195 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
196 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
197 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
198 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
199 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
200 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
201 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
202};
203
204struct frame_extra_info
244bc108
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205 {
206 CORE_ADDR bsp; /* points at r32 for the current frame */
207 CORE_ADDR cfm; /* cfm value for current frame */
208 int sof; /* Size of frame (decoded from cfm value) */
209 int sol; /* Size of locals (decoded from cfm value) */
210 CORE_ADDR after_prologue;
211 /* Address of first instruction after the last
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212 prologue instruction; Note that there may
213 be instructions from the function's body
214 intermingled with the prologue. */
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215 int mem_stack_frame_size;
216 /* Size of the memory stack frame (may be zero),
16461d7d 217 or -1 if it has not been determined yet. */
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218 int fp_reg; /* Register number (if any) used a frame pointer
219 for this frame. 0 if no register is being used
16461d7d 220 as the frame pointer. */
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221 };
222
223struct gdbarch_tdep
224 {
225 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 226 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
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227 etc. */
228 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
229 /* OS specific function which, given a frame address
230 and register number, returns the offset to the
231 given register from the start of the frame. */
698cb3f0 232 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
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233 };
234
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235#define SIGCONTEXT_REGISTER_ADDRESS \
236 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
237#define FIND_GLOBAL_POINTER \
238 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d 239
fa88f677 240static const char *
16461d7d
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241ia64_register_name (int reg)
242{
243 return ia64_register_names[reg];
244}
245
246int
247ia64_register_raw_size (int reg)
248{
249 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
250}
251
252int
253ia64_register_virtual_size (int reg)
254{
255 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
256}
257
258/* Return true iff register N's virtual format is different from
259 its raw format. */
260int
261ia64_register_convertible (int nr)
262{
263 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
264}
265
266const struct floatformat floatformat_ia64_ext =
267{
268 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
269 floatformat_intbit_yes
270};
271
272void
273ia64_register_convert_to_virtual (int regnum, struct type *type,
274 char *from, char *to)
275{
276 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
277 {
278 DOUBLEST val;
279 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
280 store_floating(to, TYPE_LENGTH(type), val);
281 }
282 else
283 error("ia64_register_convert_to_virtual called with non floating point register number");
284}
285
286void
287ia64_register_convert_to_raw (struct type *type, int regnum,
288 char *from, char *to)
289{
290 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
291 {
292 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
293 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
294 }
295 else
296 error("ia64_register_convert_to_raw called with non floating point register number");
297}
298
299struct type *
300ia64_register_virtual_type (int reg)
301{
302 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
303 return builtin_type_long_double;
304 else
305 return builtin_type_long;
306}
307
308int
309ia64_register_byte (int reg)
310{
311 return (8 * reg) +
312 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
313}
314
244bc108
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315/* Read the given register from a sigcontext structure in the
316 specified frame. */
317
318static CORE_ADDR
319read_sigcontext_register (struct frame_info *frame, int regnum)
320{
321 CORE_ADDR regaddr;
322
323 if (frame == NULL)
8e65ff28
AC
324 internal_error (__FILE__, __LINE__,
325 "read_sigcontext_register: NULL frame");
5a203e44 326 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
8e65ff28 327 internal_error (__FILE__, __LINE__,
5a203e44 328 "read_sigcontext_register: frame not a signal trampoline");
244bc108 329 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC
330 internal_error (__FILE__, __LINE__,
331 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108 332
1e2330ba 333 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
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334 if (regaddr)
335 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
336 else
8e65ff28
AC
337 internal_error (__FILE__, __LINE__,
338 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
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339}
340
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341/* Extract ``len'' bits from an instruction bundle starting at
342 bit ``from''. */
343
244bc108 344static long long
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345extract_bit_field (char *bundle, int from, int len)
346{
347 long long result = 0LL;
348 int to = from + len;
349 int from_byte = from / 8;
350 int to_byte = to / 8;
351 unsigned char *b = (unsigned char *) bundle;
352 unsigned char c;
353 int lshift;
354 int i;
355
356 c = b[from_byte];
357 if (from_byte == to_byte)
358 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
359 result = c >> (from % 8);
360 lshift = 8 - (from % 8);
361
362 for (i = from_byte+1; i < to_byte; i++)
363 {
364 result |= ((long long) b[i]) << lshift;
365 lshift += 8;
366 }
367
368 if (from_byte < to_byte && (to % 8 != 0))
369 {
370 c = b[to_byte];
371 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
372 result |= ((long long) c) << lshift;
373 }
374
375 return result;
376}
377
378/* Replace the specified bits in an instruction bundle */
379
244bc108 380static void
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381replace_bit_field (char *bundle, long long val, int from, int len)
382{
383 int to = from + len;
384 int from_byte = from / 8;
385 int to_byte = to / 8;
386 unsigned char *b = (unsigned char *) bundle;
387 unsigned char c;
388
389 if (from_byte == to_byte)
390 {
391 unsigned char left, right;
392 c = b[from_byte];
393 left = (c >> (to % 8)) << (to % 8);
394 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
395 c = (unsigned char) (val & 0xff);
396 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
397 c |= right | left;
398 b[from_byte] = c;
399 }
400 else
401 {
402 int i;
403 c = b[from_byte];
404 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
405 c = c | (val << (from % 8));
406 b[from_byte] = c;
407 val >>= 8 - from % 8;
408
409 for (i = from_byte+1; i < to_byte; i++)
410 {
411 c = val & 0xff;
412 val >>= 8;
413 b[i] = c;
414 }
415
416 if (to % 8 != 0)
417 {
418 unsigned char cv = (unsigned char) val;
419 c = b[to_byte];
420 c = c >> (to % 8) << (to % 8);
421 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
422 b[to_byte] = c;
423 }
424 }
425}
426
427/* Return the contents of slot N (for N = 0, 1, or 2) in
428 and instruction bundle */
429
244bc108 430static long long
2fc3ac7e 431slotN_contents (char *bundle, int slotnum)
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432{
433 return extract_bit_field (bundle, 5+41*slotnum, 41);
434}
435
436/* Store an instruction in an instruction bundle */
437
244bc108 438static void
2fc3ac7e 439replace_slotN_contents (char *bundle, long long instr, int slotnum)
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440{
441 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
442}
443
64a5b29c 444static enum instruction_type template_encoding_table[32][3] =
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445{
446 { M, I, I }, /* 00 */
447 { M, I, I }, /* 01 */
448 { M, I, I }, /* 02 */
449 { M, I, I }, /* 03 */
450 { M, L, X }, /* 04 */
451 { M, L, X }, /* 05 */
452 { undefined, undefined, undefined }, /* 06 */
453 { undefined, undefined, undefined }, /* 07 */
454 { M, M, I }, /* 08 */
455 { M, M, I }, /* 09 */
456 { M, M, I }, /* 0A */
457 { M, M, I }, /* 0B */
458 { M, F, I }, /* 0C */
459 { M, F, I }, /* 0D */
460 { M, M, F }, /* 0E */
461 { M, M, F }, /* 0F */
462 { M, I, B }, /* 10 */
463 { M, I, B }, /* 11 */
464 { M, B, B }, /* 12 */
465 { M, B, B }, /* 13 */
466 { undefined, undefined, undefined }, /* 14 */
467 { undefined, undefined, undefined }, /* 15 */
468 { B, B, B }, /* 16 */
469 { B, B, B }, /* 17 */
470 { M, M, B }, /* 18 */
471 { M, M, B }, /* 19 */
472 { undefined, undefined, undefined }, /* 1A */
473 { undefined, undefined, undefined }, /* 1B */
474 { M, F, B }, /* 1C */
475 { M, F, B }, /* 1D */
476 { undefined, undefined, undefined }, /* 1E */
477 { undefined, undefined, undefined }, /* 1F */
478};
479
480/* Fetch and (partially) decode an instruction at ADDR and return the
481 address of the next instruction to fetch. */
482
483static CORE_ADDR
484fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
485{
486 char bundle[BUNDLE_LEN];
487 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
488 long long template;
489 int val;
490
c26e1c2b
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491 /* Warn about slot numbers greater than 2. We used to generate
492 an error here on the assumption that the user entered an invalid
493 address. But, sometimes GDB itself requests an invalid address.
494 This can (easily) happen when execution stops in a function for
495 which there are no symbols. The prologue scanner will attempt to
496 find the beginning of the function - if the nearest symbol
497 happens to not be aligned on a bundle boundary (16 bytes), the
498 resulting starting address will cause GDB to think that the slot
499 number is too large.
500
501 So we warn about it and set the slot number to zero. It is
502 not necessarily a fatal condition, particularly if debugging
503 at the assembly language level. */
16461d7d 504 if (slotnum > 2)
c26e1c2b
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505 {
506 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
507 "Using slot 0 instead");
508 slotnum = 0;
509 }
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510
511 addr &= ~0x0f;
512
513 val = target_read_memory (addr, bundle, BUNDLE_LEN);
514
515 if (val != 0)
516 return 0;
517
518 *instr = slotN_contents (bundle, slotnum);
519 template = extract_bit_field (bundle, 0, 5);
520 *it = template_encoding_table[(int)template][slotnum];
521
64a5b29c 522 if (slotnum == 2 || (slotnum == 1 && *it == L))
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KB
523 addr += 16;
524 else
525 addr += (slotnum + 1) * SLOT_MULTIPLIER;
526
527 return addr;
528}
529
530/* There are 5 different break instructions (break.i, break.b,
531 break.m, break.f, and break.x), but they all have the same
532 encoding. (The five bit template in the low five bits of the
533 instruction bundle distinguishes one from another.)
534
535 The runtime architecture manual specifies that break instructions
536 used for debugging purposes must have the upper two bits of the 21
537 bit immediate set to a 0 and a 1 respectively. A breakpoint
538 instruction encodes the most significant bit of its 21 bit
539 immediate at bit 36 of the 41 bit instruction. The penultimate msb
540 is at bit 25 which leads to the pattern below.
541
542 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
543 it turns out that 0x80000 was used as the syscall break in the early
544 simulators. So I changed the pattern slightly to do "break.i 0x080001"
545 instead. But that didn't work either (I later found out that this
546 pattern was used by the simulator that I was using.) So I ended up
547 using the pattern seen below. */
548
549#if 0
550#define BREAKPOINT 0x00002000040LL
551#endif
552#define BREAKPOINT 0x00003333300LL
553
554static int
555ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
556{
557 char bundle[BUNDLE_LEN];
558 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
559 long long instr;
560 int val;
126fa72d 561 int template;
16461d7d
KB
562
563 if (slotnum > 2)
564 error("Can't insert breakpoint for slot numbers greater than 2.");
565
566 addr &= ~0x0f;
567
568 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
569
570 /* Check for L type instruction in 2nd slot, if present then
571 bump up the slot number to the 3rd slot */
572 template = extract_bit_field (bundle, 0, 5);
573 if (slotnum == 1 && template_encoding_table[template][1] == L)
574 {
575 slotnum = 2;
576 }
577
16461d7d
KB
578 instr = slotN_contents (bundle, slotnum);
579 memcpy(contents_cache, &instr, sizeof(instr));
580 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
581 if (val == 0)
582 target_write_memory (addr, bundle, BUNDLE_LEN);
583
584 return val;
585}
586
587static int
588ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
589{
590 char bundle[BUNDLE_LEN];
591 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
592 long long instr;
593 int val;
126fa72d 594 int template;
16461d7d
KB
595
596 addr &= ~0x0f;
597
598 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
599
600 /* Check for L type instruction in 2nd slot, if present then
601 bump up the slot number to the 3rd slot */
602 template = extract_bit_field (bundle, 0, 5);
603 if (slotnum == 1 && template_encoding_table[template][1] == L)
604 {
605 slotnum = 2;
606 }
607
16461d7d
KB
608 memcpy (&instr, contents_cache, sizeof instr);
609 replace_slotN_contents (bundle, instr, slotnum);
610 if (val == 0)
611 target_write_memory (addr, bundle, BUNDLE_LEN);
612
613 return val;
614}
615
616/* We don't really want to use this, but remote.c needs to call it in order
617 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 618const unsigned char *
fba45db2 619ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB
620{
621 static unsigned char breakpoint[] =
622 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
623 *lenptr = sizeof (breakpoint);
624#if 0
625 *pcptr &= ~0x0f;
626#endif
627 return breakpoint;
628}
629
630CORE_ADDR
39f77062 631ia64_read_pc (ptid_t ptid)
16461d7d 632{
39f77062
KB
633 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
634 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB
635 int slot_num = (psr_value >> 41) & 3;
636
637 return pc_value | (slot_num * SLOT_MULTIPLIER);
638}
639
640void
39f77062 641ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB
642{
643 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 644 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB
645 psr_value &= ~(3LL << 41);
646 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
647
648 new_pc &= ~0xfLL;
649
39f77062
KB
650 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
651 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB
652}
653
654#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
655
656/* Returns the address of the slot that's NSLOTS slots away from
657 the address ADDR. NSLOTS may be positive or negative. */
658static CORE_ADDR
659rse_address_add(CORE_ADDR addr, int nslots)
660{
661 CORE_ADDR new_addr;
662 int mandatory_nat_slots = nslots / 63;
663 int direction = nslots < 0 ? -1 : 1;
664
665 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
666
667 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
668 new_addr += 8 * direction;
669
670 if (IS_NaT_COLLECTION_ADDR(new_addr))
671 new_addr += 8 * direction;
672
673 return new_addr;
674}
675
676/* The IA-64 frame chain is a bit odd. We won't always have a frame
677 pointer, so we use the SP value as the FP for the purpose of
678 creating a frame. There is sometimes a register (not fixed) which
679 is used as a frame pointer. When this register exists, it is not
680 especially hard to determine which one is being used. It isn't
681 even really hard to compute the frame chain, but it can be
682 computationally expensive. So, instead of making life difficult
683 (and slow), we pick a more convenient representation of the frame
8227c0ff
AC
684 chain, knowing that we'll have to make some small adjustments in
685 other places. (E.g, note that read_fp() is actually read_sp() in
686 ia64_gdbarch_init() below.)
16461d7d
KB
687
688 Okay, so what is the frame chain exactly? It'll be the SP value
689 at the time that the function in question was entered.
690
691 Note that this *should* actually the frame pointer for the current
692 function! But as I note above, if we were to attempt to find the
693 address of the beginning of the previous frame, we'd waste a lot
694 of cycles for no good reason. So instead, we simply choose to
695 represent the frame chain as the end of the previous frame instead
696 of the beginning. */
697
698CORE_ADDR
699ia64_frame_chain (struct frame_info *frame)
700{
5a203e44 701 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 702 return read_sigcontext_register (frame, sp_regnum);
1e2330ba
AC
703 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
704 get_frame_base (frame),
705 get_frame_base (frame)))
706 return get_frame_base (frame);
16461d7d 707 else
244bc108 708 {
f30ee0bc 709 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
710 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
711 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
244bc108 712 else
1e2330ba 713 return (get_frame_base (frame)
da50a4b7 714 + get_frame_extra_info (frame)->mem_stack_frame_size);
244bc108 715 }
16461d7d
KB
716}
717
718CORE_ADDR
719ia64_frame_saved_pc (struct frame_info *frame)
720{
5a203e44 721 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 722 return read_sigcontext_register (frame, pc_regnum);
1e2330ba
AC
723 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
724 get_frame_base (frame),
725 get_frame_base (frame)))
726 return deprecated_read_register_dummy (get_frame_pc (frame),
727 get_frame_base (frame), pc_regnum);
244bc108
KB
728 else
729 {
f30ee0bc 730 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d 731
b2fb4676
AC
732 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
733 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
11c02a10
AC
734 else if (get_next_frame (frame)
735 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
736 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
244bc108
KB
737 else /* either frameless, or not far enough along in the prologue... */
738 return ia64_saved_pc_after_call (frame);
739 }
16461d7d
KB
740}
741
58ab00f9
KB
742/* Limit the number of skipped non-prologue instructions since examining
743 of the prologue is expensive. */
744static int max_skip_non_prologue_insns = 10;
745
746/* Given PC representing the starting address of a function, and
747 LIM_PC which is the (sloppy) limit to which to scan when looking
748 for a prologue, attempt to further refine this limit by using
749 the line data in the symbol table. If successful, a better guess
750 on where the prologue ends is returned, otherwise the previous
751 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
752 which will be set to indicate whether the returned limit may be
753 used with no further scanning in the event that the function is
754 frameless. */
755
756static CORE_ADDR
757refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
758{
759 struct symtab_and_line prologue_sal;
760 CORE_ADDR start_pc = pc;
761
762 /* Start off not trusting the limit. */
763 *trust_limit = 0;
764
765 prologue_sal = find_pc_line (pc, 0);
766 if (prologue_sal.line != 0)
767 {
768 int i;
769 CORE_ADDR addr = prologue_sal.end;
770
771 /* Handle the case in which compiler's optimizer/scheduler
772 has moved instructions into the prologue. We scan ahead
773 in the function looking for address ranges whose corresponding
774 line number is less than or equal to the first one that we
775 found for the function. (It can be less than when the
776 scheduler puts a body instruction before the first prologue
777 instruction.) */
778 for (i = 2 * max_skip_non_prologue_insns;
779 i > 0 && (lim_pc == 0 || addr < lim_pc);
780 i--)
781 {
782 struct symtab_and_line sal;
783
784 sal = find_pc_line (addr, 0);
785 if (sal.line == 0)
786 break;
787 if (sal.line <= prologue_sal.line
788 && sal.symtab == prologue_sal.symtab)
789 {
790 prologue_sal = sal;
791 }
792 addr = sal.end;
793 }
794
795 if (lim_pc == 0 || prologue_sal.end < lim_pc)
796 {
797 lim_pc = prologue_sal.end;
798 if (start_pc == get_pc_function_start (lim_pc))
799 *trust_limit = 1;
800 }
801 }
802 return lim_pc;
803}
804
16461d7d
KB
805#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
806 || (8 <= (_regnum_) && (_regnum_) <= 11) \
807 || (14 <= (_regnum_) && (_regnum_) <= 31))
808#define imm9(_instr_) \
809 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
810 | (((_instr_) & 0x00008000000LL) >> 20) \
811 | (((_instr_) & 0x00000001fc0LL) >> 6))
812
813static CORE_ADDR
814examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
815{
816 CORE_ADDR next_pc;
817 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB
818 instruction_type it;
819 long long instr;
820 int do_fsr_stuff = 0;
821
822 int cfm_reg = 0;
823 int ret_reg = 0;
824 int fp_reg = 0;
825 int unat_save_reg = 0;
826 int pr_save_reg = 0;
827 int mem_stack_frame_size = 0;
828 int spill_reg = 0;
829 CORE_ADDR spill_addr = 0;
0927a22b
KB
830 char instores[8];
831 char infpstores[8];
58ab00f9 832 int trust_limit;
0927a22b
KB
833
834 memset (instores, 0, sizeof instores);
835 memset (infpstores, 0, sizeof infpstores);
16461d7d 836
b2fb4676 837 if (frame && !get_frame_saved_regs (frame))
16461d7d
KB
838 {
839 frame_saved_regs_zalloc (frame);
840 do_fsr_stuff = 1;
841 }
842
843 if (frame
844 && !do_fsr_stuff
da50a4b7
AC
845 && get_frame_extra_info (frame)->after_prologue != 0
846 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
847 return get_frame_extra_info (frame)->after_prologue;
16461d7d 848
58ab00f9
KB
849 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
850
16461d7d
KB
851 /* Must start with an alloc instruction */
852 next_pc = fetch_instruction (pc, &it, &instr);
853 if (pc < lim_pc && next_pc
854 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
855 {
856 /* alloc */
857 int sor = (int) ((instr & 0x00078000000LL) >> 27);
858 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
859 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
860 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
861 we could compare against the size given to us via the cfm as
862 either a sanity check or possibly to see if the frame has been
863 changed by a later alloc instruction... */
864 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
865 cfm_reg = rN;
866 last_prologue_pc = next_pc;
867 pc = next_pc;
868 }
869 else
58ab00f9
KB
870 {
871 pc = lim_pc; /* Frameless: We're done early. */
872 if (trust_limit)
873 last_prologue_pc = lim_pc;
874 }
16461d7d
KB
875
876 /* Loop, looking for prologue instructions, keeping track of
877 where preserved registers were spilled. */
878 while (pc < lim_pc)
879 {
880 next_pc = fetch_instruction (pc, &it, &instr);
881 if (next_pc == 0)
882 break;
883
902d7086
KB
884 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
885 || ((instr & 0x3fLL) != 0LL))
0927a22b 886 {
902d7086
KB
887 /* Exit loop upon hitting a non-nop branch instruction
888 or a predicated instruction. */
0927a22b
KB
889 break;
890 }
891 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB
892 {
893 /* Move from BR */
894 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
895 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
896 int qp = (int) (instr & 0x0000000003f);
897
898 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
899 {
900 ret_reg = rN;
901 last_prologue_pc = next_pc;
902 }
903 }
904 else if ((it == I || it == M)
905 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
906 {
907 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
908 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
909 | ((instr & 0x001f8000000LL) >> 20)
910 | ((instr & 0x000000fe000LL) >> 13));
911 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
912 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
913 int qp = (int) (instr & 0x0000000003fLL);
914
915 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
916 {
917 /* mov rN, r12 */
918 fp_reg = rN;
919 last_prologue_pc = next_pc;
920 }
921 else if (qp == 0 && rN == 12 && rM == 12)
922 {
923 /* adds r12, -mem_stack_frame_size, r12 */
924 mem_stack_frame_size -= imm;
925 last_prologue_pc = next_pc;
926 }
927 else if (qp == 0 && rN == 2
928 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
929 {
930 /* adds r2, spilloffset, rFramePointer
931 or
932 adds r2, spilloffset, r12
933
934 Get ready for stf.spill or st8.spill instructions.
935 The address to start spilling at is loaded into r2.
936 FIXME: Why r2? That's what gcc currently uses; it
937 could well be different for other compilers. */
938
939 /* Hmm... whether or not this will work will depend on
940 where the pc is. If it's still early in the prologue
941 this'll be wrong. FIXME */
1e2330ba 942 spill_addr = (frame ? get_frame_base (frame) : 0)
16461d7d
KB
943 + (rM == 12 ? 0 : mem_stack_frame_size)
944 + imm;
945 spill_reg = rN;
946 last_prologue_pc = next_pc;
947 }
948 }
949 else if (it == M
950 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
951 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
952 {
953 /* stf.spill [rN] = fM, imm9
954 or
955 stf.spill [rN] = fM */
956
957 int imm = imm9(instr);
958 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
959 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
960 int qp = (int) (instr & 0x0000000003fLL);
961 if (qp == 0 && rN == spill_reg && spill_addr != 0
962 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
963 {
964 if (do_fsr_stuff)
b2fb4676 965 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d
KB
966
967 if ((instr & 0x1efc0000000) == 0x0eec0000000)
968 spill_addr += imm;
969 else
970 spill_addr = 0; /* last one; must be done */
971 last_prologue_pc = next_pc;
972 }
973 }
974 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
975 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
976 {
977 /* mov.m rN = arM
978 or
979 mov.i rN = arM */
980
981 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
982 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
983 int qp = (int) (instr & 0x0000000003fLL);
984 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
985 {
986 /* We have something like "mov.m r3 = ar.unat". Remember the
987 r3 (or whatever) and watch for a store of this register... */
988 unat_save_reg = rN;
989 last_prologue_pc = next_pc;
990 }
991 }
992 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
993 {
994 /* mov rN = pr */
995 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
996 int qp = (int) (instr & 0x0000000003fLL);
997 if (qp == 0 && isScratch (rN))
998 {
999 pr_save_reg = rN;
1000 last_prologue_pc = next_pc;
1001 }
1002 }
1003 else if (it == M
1004 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1005 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1006 {
1007 /* st8 [rN] = rM
1008 or
1009 st8 [rN] = rM, imm9 */
1010 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1011 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1012 int qp = (int) (instr & 0x0000000003fLL);
1013 if (qp == 0 && rN == spill_reg && spill_addr != 0
1014 && (rM == unat_save_reg || rM == pr_save_reg))
1015 {
1016 /* We've found a spill of either the UNAT register or the PR
1017 register. (Well, not exactly; what we've actually found is
1018 a spill of the register that UNAT or PR was moved to).
1019 Record that fact and move on... */
1020 if (rM == unat_save_reg)
1021 {
1022 /* Track UNAT register */
1023 if (do_fsr_stuff)
b2fb4676 1024 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB
1025 unat_save_reg = 0;
1026 }
1027 else
1028 {
1029 /* Track PR register */
1030 if (do_fsr_stuff)
b2fb4676 1031 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB
1032 pr_save_reg = 0;
1033 }
1034 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1035 /* st8 [rN] = rM, imm9 */
1036 spill_addr += imm9(instr);
1037 else
1038 spill_addr = 0; /* must be done spilling */
1039 last_prologue_pc = next_pc;
1040 }
0927a22b
KB
1041 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1042 {
1043 /* Allow up to one store of each input register. */
1044 instores[rM-32] = 1;
1045 last_prologue_pc = next_pc;
1046 }
1047 }
1048 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1049 {
1050 /* One of
1051 st1 [rN] = rM
1052 st2 [rN] = rM
1053 st4 [rN] = rM
1054 st8 [rN] = rM
1055 Note that the st8 case is handled in the clause above.
1056
1057 Advance over stores of input registers. One store per input
1058 register is permitted. */
1059 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1060 int qp = (int) (instr & 0x0000000003fLL);
1061 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1062 {
1063 instores[rM-32] = 1;
1064 last_prologue_pc = next_pc;
1065 }
1066 }
1067 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1068 {
1069 /* Either
1070 stfs [rN] = fM
1071 or
1072 stfd [rN] = fM
1073
1074 Advance over stores of floating point input registers. Again
1075 one store per register is permitted */
1076 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1077 int qp = (int) (instr & 0x0000000003fLL);
1078 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1079 {
1080 infpstores[fM-8] = 1;
1081 last_prologue_pc = next_pc;
1082 }
16461d7d
KB
1083 }
1084 else if (it == M
1085 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1086 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1087 {
1088 /* st8.spill [rN] = rM
1089 or
1090 st8.spill [rN] = rM, imm9 */
1091 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1092 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1093 int qp = (int) (instr & 0x0000000003fLL);
1094 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1095 {
1096 /* We've found a spill of one of the preserved general purpose
1097 regs. Record the spill address and advance the spill
1098 register if appropriate. */
1099 if (do_fsr_stuff)
b2fb4676 1100 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB
1101 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1102 /* st8.spill [rN] = rM, imm9 */
1103 spill_addr += imm9(instr);
1104 else
1105 spill_addr = 0; /* Done spilling */
1106 last_prologue_pc = next_pc;
1107 }
1108 }
16461d7d
KB
1109
1110 pc = next_pc;
1111 }
1112
1113 if (do_fsr_stuff) {
1114 int i;
1115 CORE_ADDR addr;
3a854e23
KB
1116 int sor, rrb_gr;
1117
1118 /* Extract the size of the rotating portion of the stack
1119 frame and the register rename base from the current
1120 frame marker. */
da50a4b7
AC
1121 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1122 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
16461d7d 1123
da50a4b7
AC
1124 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1125 i < get_frame_extra_info (frame)->sof;
16461d7d
KB
1126 i++, addr += 8)
1127 {
1128 if (IS_NaT_COLLECTION_ADDR (addr))
1129 {
1130 addr += 8;
1131 }
3a854e23 1132 if (i < sor)
b2fb4676 1133 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
3a854e23
KB
1134 = addr;
1135 else
b2fb4676 1136 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB
1137
1138 if (i+32 == cfm_reg)
b2fb4676 1139 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
16461d7d 1140 if (i+32 == ret_reg)
b2fb4676 1141 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
16461d7d 1142 if (i+32 == fp_reg)
b2fb4676 1143 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
16461d7d
KB
1144 }
1145 }
1146
da50a4b7
AC
1147 if (frame && get_frame_extra_info (frame))
1148 {
1149 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1150 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1151 get_frame_extra_info (frame)->fp_reg = fp_reg;
1152 }
16461d7d
KB
1153
1154 return last_prologue_pc;
1155}
1156
1157CORE_ADDR
1158ia64_skip_prologue (CORE_ADDR pc)
1159{
1160 return examine_prologue (pc, pc+1024, 0);
1161}
1162
1163void
1164ia64_frame_init_saved_regs (struct frame_info *frame)
1165{
b2fb4676 1166 if (get_frame_saved_regs (frame))
16461d7d
KB
1167 return;
1168
5a203e44 1169 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
244bc108
KB
1170 {
1171 int regno;
16461d7d 1172
244bc108 1173 frame_saved_regs_zalloc (frame);
16461d7d 1174
b2fb4676 1175 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1e2330ba 1176 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
b2fb4676 1177 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1e2330ba 1178 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
b2fb4676 1179 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1e2330ba 1180 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
244bc108 1181#if 0
b2fb4676 1182 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
244bc108
KB
1183 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1184#endif
b2fb4676 1185 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1e2330ba 1186 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
b2fb4676 1187 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1e2330ba 1188 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
b2fb4676 1189 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1e2330ba 1190 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
b2fb4676 1191 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1e2330ba 1192 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
b2fb4676 1193 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1e2330ba 1194 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
b2fb4676 1195 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1e2330ba 1196 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
244bc108
KB
1197 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1198 if (regno != sp_regnum)
b2fb4676 1199 get_frame_saved_regs (frame)[regno] =
1e2330ba 1200 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1201 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1202 get_frame_saved_regs (frame)[regno] =
1e2330ba 1203 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1204 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1205 get_frame_saved_regs (frame)[regno] =
1e2330ba 1206 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
16461d7d
KB
1207 }
1208 else
1209 {
244bc108 1210 CORE_ADDR func_start;
16461d7d 1211
50abf9e5
AC
1212 func_start = get_pc_function_start (get_frame_pc (frame));
1213 examine_prologue (func_start, get_frame_pc (frame), frame);
244bc108 1214 }
16461d7d
KB
1215}
1216
1217void
1218ia64_get_saved_register (char *raw_buffer,
1219 int *optimized,
1220 CORE_ADDR *addrp,
1221 struct frame_info *frame,
1222 int regnum,
1223 enum lval_type *lval)
1224{
244bc108 1225 int is_dummy_frame;
16461d7d
KB
1226
1227 if (!target_has_registers)
1228 error ("No registers.");
1229
1230 if (optimized != NULL)
1231 *optimized = 0;
244bc108
KB
1232
1233 if (addrp != NULL)
1234 *addrp = 0;
1235
1236 if (lval != NULL)
1237 *lval = not_lval;
1238
1e2330ba
AC
1239 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1240 get_frame_base (frame),
1241 get_frame_base (frame));
244bc108 1242
11c02a10 1243 if (regnum == SP_REGNUM && get_next_frame (frame))
16461d7d
KB
1244 {
1245 /* Handle SP values for all frames but the topmost. */
1e2330ba
AC
1246 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1247 get_frame_base (frame));
16461d7d
KB
1248 }
1249 else if (regnum == IA64_BSP_REGNUM)
1250 {
16461d7d 1251 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
da50a4b7 1252 get_frame_extra_info (frame)->bsp);
16461d7d
KB
1253 }
1254 else if (regnum == IA64_VFP_REGNUM)
1255 {
1256 /* If the function in question uses an automatic register (r32-r127)
1257 for the frame pointer, it'll be found by ia64_find_saved_register()
1258 above. If the function lacks one of these frame pointers, we can
1259 still provide a value since we know the size of the frame */
1e2330ba 1260 CORE_ADDR vfp = (get_frame_base (frame)
da50a4b7 1261 + get_frame_extra_info (frame)->mem_stack_frame_size);
16461d7d
KB
1262 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1263 }
1264 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1265 {
2fc3ac7e 1266 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1267 int pr_optim;
1268 enum lval_type pr_lval;
1269 CORE_ADDR pr_addr;
1270 int prN_val;
1271 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1272 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB
1273 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1274 {
1275 /* Fetch predicate register rename base from current frame
1276 marker for this frame. */
da50a4b7 1277 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
3a854e23
KB
1278
1279 /* Adjust the register number to account for register rotation. */
1280 regnum = IA64_PR16_REGNUM
1281 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1282 }
16461d7d
KB
1283 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1284 regnum - IA64_PR0_REGNUM, 1);
1285 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB
1286 }
1287 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1288 {
2fc3ac7e 1289 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1290 int unat_optim;
1291 enum lval_type unat_lval;
1292 CORE_ADDR unat_addr;
1293 int unatN_val;
1294 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1295 frame, IA64_UNAT_REGNUM, &unat_lval);
1296 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1297 regnum - IA64_NAT0_REGNUM, 1);
1298 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1299 unatN_val);
16461d7d
KB
1300 }
1301 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1302 {
1303 int natval = 0;
1304 /* Find address of general register corresponding to nat bit we're
1305 interested in. */
244bc108
KB
1306 CORE_ADDR gr_addr = 0;
1307
1308 if (!is_dummy_frame)
1309 {
f30ee0bc 1310 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
1311 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1312 + IA64_GR0_REGNUM];
244bc108 1313 }
16461d7d
KB
1314 if (gr_addr)
1315 {
1316 /* Compute address of nat collection bits */
1317 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1318 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1319 CORE_ADDR nat_collection;
1320 int nat_bit;
1321 /* If our nat collection address is bigger than bsp, we have to get
1322 the nat collection from rnat. Otherwise, we fetch the nat
1323 collection from the computed address. */
1324 if (nat_addr >= bsp)
1325 nat_collection = read_register (IA64_RNAT_REGNUM);
1326 else
1327 nat_collection = read_memory_integer (nat_addr, 8);
1328 nat_bit = (gr_addr >> 3) & 0x3f;
1329 natval = (nat_collection >> nat_bit) & 1;
1330 }
1331 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB
1332 }
1333 else if (regnum == IA64_IP_REGNUM)
1334 {
1335 CORE_ADDR pc;
11c02a10 1336 if (get_next_frame (frame))
244bc108
KB
1337 {
1338 /* FIXME: Set *addrp, *lval when possible. */
11c02a10 1339 pc = ia64_frame_saved_pc (get_next_frame (frame));
244bc108
KB
1340 }
1341 else
1342 {
1343 pc = read_pc ();
1344 }
1345 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1346 }
1347 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1348 {
1349 CORE_ADDR addr = 0;
1350 if (!is_dummy_frame)
1351 {
f30ee0bc 1352 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676 1353 addr = get_frame_saved_regs (frame)[regnum];
244bc108
KB
1354 }
1355
1356 if (addr != 0)
1357 {
1358 if (lval != NULL)
1359 *lval = lval_memory;
1360 if (addrp != NULL)
1361 *addrp = addr;
1362 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1363 }
1364 else
1365 {
1366 /* r32 - r127 must be fetchable via memory. If they aren't,
1367 then the register is unavailable */
1368 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1369 }
16461d7d
KB
1370 }
1371 else
1372 {
3a854e23
KB
1373 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1374 {
1375 /* Fetch floating point register rename base from current
1376 frame marker for this frame. */
da50a4b7 1377 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
3a854e23
KB
1378
1379 /* Adjust the floating point register number to account for
1380 register rotation. */
1381 regnum = IA64_FR32_REGNUM
1382 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1383 }
1384
bdcdd535
AC
1385 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1386 frame, regnum, lval);
16461d7d 1387 }
16461d7d
KB
1388}
1389
1390/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1391 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1392 and TYPE is the type (which is known to be struct, union or array). */
1393int
1394ia64_use_struct_convention (int gcc_p, struct type *type)
1395{
64a5b29c
KB
1396 struct type *float_elt_type;
1397
1398 /* HFAs are structures (or arrays) consisting entirely of floating
1399 point values of the same length. Up to 8 of these are returned
1400 in registers. Don't use the struct convention when this is the
1401 case. */
1402 float_elt_type = is_float_or_hfa_type (type);
1403 if (float_elt_type != NULL
1404 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1405 return 0;
1406
1407 /* Other structs of length 32 or less are returned in r8-r11.
1408 Don't use the struct convention for those either. */
16461d7d
KB
1409 return TYPE_LENGTH (type) > 32;
1410}
1411
1412void
1413ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1414{
64a5b29c
KB
1415 struct type *float_elt_type;
1416
1417 float_elt_type = is_float_or_hfa_type (type);
1418 if (float_elt_type != NULL)
1419 {
1420 int offset = 0;
1421 int regnum = IA64_FR8_REGNUM;
1422 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1423
1424 while (n-- > 0)
1425 {
1426 ia64_register_convert_to_virtual (regnum, float_elt_type,
1427 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1428 offset += TYPE_LENGTH (float_elt_type);
1429 regnum++;
1430 }
1431 }
16461d7d 1432 else
64a5b29c
KB
1433 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1434 TYPE_LENGTH (type));
16461d7d
KB
1435}
1436
1437/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1438 like this is necessary though since the IA-64 calling conventions specify
1439 that r8 is not preserved. */
1440static CORE_ADDR struct_return_address;
1441
1442CORE_ADDR
1443ia64_extract_struct_value_address (char *regbuf)
1444{
1445 /* FIXME: See above. */
1446 return struct_return_address;
1447}
1448
1449void
1450ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1451{
1452 /* FIXME: See above. */
1453 /* Note that most of the work was done in ia64_push_arguments() */
1454 struct_return_address = addr;
1455}
1456
1457int
1458ia64_frameless_function_invocation (struct frame_info *frame)
1459{
f30ee0bc 1460 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
da50a4b7 1461 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
16461d7d
KB
1462}
1463
1464CORE_ADDR
1465ia64_saved_pc_after_call (struct frame_info *frame)
1466{
1467 return read_register (IA64_BR0_REGNUM);
1468}
1469
1470CORE_ADDR
1471ia64_frame_args_address (struct frame_info *frame)
1472{
1473 /* frame->frame points at the SP for this frame; But we want the start
1474 of the frame, not the end. Calling frame chain will get his for us. */
1475 return ia64_frame_chain (frame);
1476}
1477
1478CORE_ADDR
1479ia64_frame_locals_address (struct frame_info *frame)
1480{
1481 /* frame->frame points at the SP for this frame; But we want the start
1482 of the frame, not the end. Calling frame chain will get his for us. */
1483 return ia64_frame_chain (frame);
1484}
1485
1486void
1487ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1488{
1489 CORE_ADDR bsp, cfm;
11c02a10
AC
1490 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1491 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1492 get_frame_base (get_next_frame (frame)),
1493 get_frame_base (get_next_frame (frame))));
16461d7d 1494
a00a19e9 1495 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
16461d7d 1496
11c02a10 1497 if (get_next_frame (frame) == 0)
16461d7d
KB
1498 {
1499 bsp = read_register (IA64_BSP_REGNUM);
1500 cfm = read_register (IA64_CFM_REGNUM);
1501
1502 }
11c02a10 1503 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
244bc108 1504 {
11c02a10
AC
1505 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1506 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
244bc108
KB
1507 }
1508 else if (next_frame_is_call_dummy)
1509 {
11c02a10
AC
1510 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1511 get_frame_base (get_next_frame (frame)),
135c175f 1512 IA64_BSP_REGNUM);
11c02a10
AC
1513 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1514 get_frame_base (get_next_frame (frame)),
135c175f 1515 IA64_CFM_REGNUM);
244bc108 1516 }
16461d7d
KB
1517 else
1518 {
11c02a10 1519 struct frame_info *frn = get_next_frame (frame);
16461d7d 1520
f30ee0bc 1521 DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
16461d7d 1522
b2fb4676
AC
1523 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1524 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
11c02a10
AC
1525 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1526 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1527 else if (get_next_frame (frn)
1528 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1529 get_frame_base (get_next_frame (frn)),
1530 get_frame_base (get_next_frame (frn))))
1531 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1532 get_frame_base (get_next_frame (frn)),
135c175f 1533 IA64_PFS_REGNUM);
16461d7d 1534 else
76d689a6 1535 cfm = read_register (IA64_PFS_REGNUM);
16461d7d 1536
da50a4b7 1537 bsp = get_frame_extra_info (frn)->bsp;
16461d7d 1538 }
da50a4b7
AC
1539 get_frame_extra_info (frame)->cfm = cfm;
1540 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1541 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
11c02a10
AC
1542 if (get_next_frame (frame) == 0
1543 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
244bc108 1544 || next_frame_is_call_dummy)
da50a4b7
AC
1545 get_frame_extra_info (frame)->bsp =
1546 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
16461d7d 1547 else
da50a4b7
AC
1548 get_frame_extra_info (frame)->bsp =
1549 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
16461d7d 1550
da50a4b7
AC
1551 get_frame_extra_info (frame)->after_prologue = 0;
1552 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1553 get_frame_extra_info (frame)->fp_reg = 0;
16461d7d
KB
1554}
1555
64a5b29c
KB
1556static int
1557is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1558{
1559 switch (TYPE_CODE (t))
1560 {
1561 case TYPE_CODE_FLT:
1562 if (*etp)
1563 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1564 else
1565 {
1566 *etp = t;
1567 return 1;
1568 }
1569 break;
1570 case TYPE_CODE_ARRAY:
98f96ba1
KB
1571 return
1572 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1573 etp);
64a5b29c
KB
1574 break;
1575 case TYPE_CODE_STRUCT:
1576 {
1577 int i;
1578
1579 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB
1580 if (!is_float_or_hfa_type_recurse
1581 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB
1582 return 0;
1583 return 1;
1584 }
1585 break;
1586 default:
1587 return 0;
1588 break;
1589 }
1590}
1591
1592/* Determine if the given type is one of the floating point types or
1593 and HFA (which is a struct, array, or combination thereof whose
1594 bottom-most elements are all of the same floating point type.) */
1595
1596static struct type *
1597is_float_or_hfa_type (struct type *t)
1598{
1599 struct type *et = 0;
1600
1601 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1602}
1603
1604
98f96ba1
KB
1605/* Return 1 if the alignment of T is such that the next even slot
1606 should be used. Return 0, if the next available slot should
1607 be used. (See section 8.5.1 of the IA-64 Software Conventions
1608 and Runtime manual.) */
1609
1610static int
1611slot_alignment_is_next_even (struct type *t)
1612{
1613 switch (TYPE_CODE (t))
1614 {
1615 case TYPE_CODE_INT:
1616 case TYPE_CODE_FLT:
1617 if (TYPE_LENGTH (t) > 8)
1618 return 1;
1619 else
1620 return 0;
1621 case TYPE_CODE_ARRAY:
1622 return
1623 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1624 case TYPE_CODE_STRUCT:
1625 {
1626 int i;
1627
1628 for (i = 0; i < TYPE_NFIELDS (t); i++)
1629 if (slot_alignment_is_next_even
1630 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1631 return 1;
1632 return 0;
1633 }
1634 default:
1635 return 0;
1636 }
1637}
1638
64a5b29c
KB
1639/* Attempt to find (and return) the global pointer for the given
1640 function.
1641
1642 This is a rather nasty bit of code searchs for the .dynamic section
1643 in the objfile corresponding to the pc of the function we're trying
1644 to call. Once it finds the addresses at which the .dynamic section
1645 lives in the child process, it scans the Elf64_Dyn entries for a
1646 DT_PLTGOT tag. If it finds one of these, the corresponding
1647 d_un.d_ptr value is the global pointer. */
1648
1649static CORE_ADDR
698cb3f0 1650generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1651{
76d689a6 1652 struct obj_section *faddr_sect;
64a5b29c 1653
76d689a6
KB
1654 faddr_sect = find_pc_section (faddr);
1655 if (faddr_sect != NULL)
64a5b29c
KB
1656 {
1657 struct obj_section *osect;
1658
76d689a6 1659 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1660 {
1661 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1662 break;
1663 }
1664
76d689a6 1665 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1666 {
1667 CORE_ADDR addr;
1668
1669 addr = osect->addr;
1670 while (addr < osect->endaddr)
1671 {
1672 int status;
1673 LONGEST tag;
1674 char buf[8];
1675
1676 status = target_read_memory (addr, buf, sizeof (buf));
1677 if (status != 0)
1678 break;
1679 tag = extract_signed_integer (buf, sizeof (buf));
1680
1681 if (tag == DT_PLTGOT)
1682 {
1683 CORE_ADDR global_pointer;
1684
1685 status = target_read_memory (addr + 8, buf, sizeof (buf));
1686 if (status != 0)
1687 break;
1688 global_pointer = extract_address (buf, sizeof (buf));
1689
1690 /* The payoff... */
1691 return global_pointer;
1692 }
1693
1694 if (tag == DT_NULL)
1695 break;
1696
1697 addr += 16;
1698 }
1699 }
1700 }
1701 return 0;
1702}
1703
1704/* Given a function's address, attempt to find (and return) the
1705 corresponding (canonical) function descriptor. Return 0 if
1706 not found. */
1707static CORE_ADDR
1708find_extant_func_descr (CORE_ADDR faddr)
1709{
76d689a6 1710 struct obj_section *faddr_sect;
64a5b29c
KB
1711
1712 /* Return early if faddr is already a function descriptor */
76d689a6
KB
1713 faddr_sect = find_pc_section (faddr);
1714 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB
1715 return faddr;
1716
76d689a6 1717 if (faddr_sect != NULL)
64a5b29c 1718 {
76d689a6
KB
1719 struct obj_section *osect;
1720 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1721 {
1722 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1723 break;
1724 }
1725
76d689a6 1726 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1727 {
1728 CORE_ADDR addr;
1729
1730 addr = osect->addr;
1731 while (addr < osect->endaddr)
1732 {
1733 int status;
1734 LONGEST faddr2;
1735 char buf[8];
1736
1737 status = target_read_memory (addr, buf, sizeof (buf));
1738 if (status != 0)
1739 break;
1740 faddr2 = extract_signed_integer (buf, sizeof (buf));
1741
1742 if (faddr == faddr2)
1743 return addr;
1744
1745 addr += 16;
1746 }
1747 }
1748 }
1749 return 0;
1750}
1751
1752/* Attempt to find a function descriptor corresponding to the
1753 given address. If none is found, construct one on the
1754 stack using the address at fdaptr */
1755
1756static CORE_ADDR
1757find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1758{
1759 CORE_ADDR fdesc;
1760
1761 fdesc = find_extant_func_descr (faddr);
1762
1763 if (fdesc == 0)
1764 {
1765 CORE_ADDR global_pointer;
1766 char buf[16];
1767
1768 fdesc = *fdaptr;
1769 *fdaptr += 16;
1770
698cb3f0 1771 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB
1772
1773 if (global_pointer == 0)
1774 global_pointer = read_register (IA64_GR1_REGNUM);
1775
1776 store_address (buf, 8, faddr);
1777 store_address (buf + 8, 8, global_pointer);
1778
1779 write_memory (fdesc, buf, 16);
1780 }
1781
1782 return fdesc;
1783}
16461d7d
KB
1784
1785CORE_ADDR
ea7c478f 1786ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB
1787 int struct_return, CORE_ADDR struct_addr)
1788{
1789 int argno;
ea7c478f 1790 struct value *arg;
16461d7d
KB
1791 struct type *type;
1792 int len, argoffset;
64a5b29c 1793 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1794 int floatreg;
64a5b29c 1795 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB
1796
1797 nslots = 0;
64a5b29c 1798 nfuncargs = 0;
16461d7d
KB
1799 /* Count the number of slots needed for the arguments */
1800 for (argno = 0; argno < nargs; argno++)
1801 {
1802 arg = args[argno];
1803 type = check_typedef (VALUE_TYPE (arg));
1804 len = TYPE_LENGTH (type);
1805
98f96ba1 1806 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB
1807 nslots++;
1808
64a5b29c
KB
1809 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1810 nfuncargs++;
1811
16461d7d
KB
1812 nslots += (len + 7) / 8;
1813 }
1814
64a5b29c 1815 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB
1816 rseslots = (nslots > 8) ? 8 : nslots;
1817 memslots = nslots - rseslots;
1818
64a5b29c 1819 /* Allocate a new RSE frame */
16461d7d
KB
1820 cfm = read_register (IA64_CFM_REGNUM);
1821
1822 bsp = read_register (IA64_BSP_REGNUM);
1823 bsp = rse_address_add (bsp, cfm & 0x7f);
1824 new_bsp = rse_address_add (bsp, rseslots);
1825 write_register (IA64_BSP_REGNUM, new_bsp);
1826
1827 pfs = read_register (IA64_PFS_REGNUM);
1828 pfs &= 0xc000000000000000LL;
1829 pfs |= (cfm & 0xffffffffffffLL);
1830 write_register (IA64_PFS_REGNUM, pfs);
1831
1832 cfm &= 0xc000000000000000LL;
1833 cfm |= rseslots;
1834 write_register (IA64_CFM_REGNUM, cfm);
1835
64a5b29c
KB
1836 /* We will attempt to find function descriptors in the .opd segment,
1837 but if we can't we'll construct them ourselves. That being the
1838 case, we'll need to reserve space on the stack for them. */
1839 funcdescaddr = sp - nfuncargs * 16;
1840 funcdescaddr &= ~0xfLL;
1841
1842 /* Adjust the stack pointer to it's new value. The calling conventions
1843 require us to have 16 bytes of scratch, plus whatever space is
1844 necessary for the memory slots and our function descriptors */
1845 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB
1846 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1847
64a5b29c
KB
1848 /* Place the arguments where they belong. The arguments will be
1849 either placed in the RSE backing store or on the memory stack.
1850 In addition, floating point arguments or HFAs are placed in
1851 floating point registers. */
16461d7d
KB
1852 slotnum = 0;
1853 floatreg = IA64_FR8_REGNUM;
1854 for (argno = 0; argno < nargs; argno++)
1855 {
64a5b29c
KB
1856 struct type *float_elt_type;
1857
16461d7d
KB
1858 arg = args[argno];
1859 type = check_typedef (VALUE_TYPE (arg));
1860 len = TYPE_LENGTH (type);
64a5b29c
KB
1861
1862 /* Special handling for function parameters */
1863 if (len == 8
1864 && TYPE_CODE (type) == TYPE_CODE_PTR
1865 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1866 {
1867 char val_buf[8];
1868
1869 store_address (val_buf, 8,
1870 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1871 &funcdescaddr));
1872 if (slotnum < rseslots)
1873 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1874 else
1875 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1876 slotnum++;
1877 continue;
1878 }
1879
1880 /* Normal slots */
98f96ba1
KB
1881
1882 /* Skip odd slot if necessary... */
1883 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1884 slotnum++;
98f96ba1 1885
16461d7d
KB
1886 argoffset = 0;
1887 while (len > 0)
1888 {
1889 char val_buf[8];
1890
1891 memset (val_buf, 0, 8);
1892 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1893
1894 if (slotnum < rseslots)
1895 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1896 else
1897 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1898
1899 argoffset += 8;
1900 len -= 8;
1901 slotnum++;
1902 }
64a5b29c
KB
1903
1904 /* Handle floating point types (including HFAs) */
1905 float_elt_type = is_float_or_hfa_type (type);
1906 if (float_elt_type != NULL)
1907 {
1908 argoffset = 0;
1909 len = TYPE_LENGTH (type);
1910 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1911 {
1912 ia64_register_convert_to_raw (
1913 float_elt_type,
1914 floatreg,
1915 VALUE_CONTENTS (arg) + argoffset,
524d7c18 1916 &deprecated_registers[REGISTER_BYTE (floatreg)]);
64a5b29c
KB
1917 floatreg++;
1918 argoffset += TYPE_LENGTH (float_elt_type);
1919 len -= TYPE_LENGTH (float_elt_type);
1920 }
16461d7d
KB
1921 }
1922 }
1923
64a5b29c 1924 /* Store the struct return value in r8 if necessary. */
16461d7d
KB
1925 if (struct_return)
1926 {
524d7c18 1927 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
16461d7d
KB
1928 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1929 struct_addr);
1930 }
1931
64a5b29c 1932 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB
1933 target_store_registers (-1);
1934
1935 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1936 to be defined to call generic_save_dummy_frame_tos(). But at the
1937 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1938 I chose to put this call here instead of using the old mechanisms.
1939 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1940 line
1941
1942 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1943
1944 to ia64_gdbarch_init() and remove the line below. */
1945 generic_save_dummy_frame_tos (sp);
1946
1947 return sp;
1948}
1949
1950CORE_ADDR
1951ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1952{
698cb3f0 1953 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1954
64a5b29c
KB
1955 if (global_pointer != 0)
1956 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB
1957
1958 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1959 return sp;
1960}
1961
1962void
1963ia64_store_return_value (struct type *type, char *valbuf)
1964{
1965 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1966 {
1967 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
524d7c18 1968 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
16461d7d
KB
1969 target_store_registers (IA64_FR8_REGNUM);
1970 }
1971 else
73937e03
AC
1972 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1973 valbuf, TYPE_LENGTH (type));
16461d7d
KB
1974}
1975
1976void
1977ia64_pop_frame (void)
1978{
1979 generic_pop_current_frame (ia64_pop_frame_regular);
1980}
1981
1982static void
1983ia64_pop_frame_regular (struct frame_info *frame)
1984{
1985 int regno;
1986 CORE_ADDR bsp, cfm, pfs;
1987
f30ee0bc 1988 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d
KB
1989
1990 for (regno = 0; regno < ia64_num_regs; regno++)
1991 {
b2fb4676 1992 if (get_frame_saved_regs (frame)[regno]
16461d7d
KB
1993 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1994 && regno != pc_regnum
1995 && regno != sp_regnum
1996 && regno != IA64_PFS_REGNUM
1997 && regno != IA64_CFM_REGNUM
1998 && regno != IA64_BSP_REGNUM
1999 && regno != IA64_BSPSTORE_REGNUM)
2000 {
2001 write_register (regno,
b2fb4676 2002 read_memory_integer (get_frame_saved_regs (frame)[regno],
16461d7d
KB
2003 REGISTER_RAW_SIZE (regno)));
2004 }
2005 }
2006
2007 write_register (sp_regnum, FRAME_CHAIN (frame));
8bedc050 2008 write_pc (DEPRECATED_FRAME_SAVED_PC (frame));
16461d7d
KB
2009
2010 cfm = read_register (IA64_CFM_REGNUM);
2011
b2fb4676 2012 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
16461d7d 2013 {
b2fb4676 2014 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
16461d7d
KB
2015 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2016 }
2017 else
2018 pfs = read_register (IA64_PFS_REGNUM);
2019
2020 /* Compute the new bsp by *adding* the difference between the
2021 size of the frame and the size of the locals (both wrt the
2022 frame that we're going back to). This seems kind of strange,
2023 especially since it seems like we ought to be subtracting the
ca557f44 2024 size of the locals... and we should; but the Linux kernel
16461d7d
KB
2025 wants bsp to be set at the end of all used registers. It's
2026 likely that this code will need to be revised to accomodate
2027 other operating systems. */
da50a4b7 2028 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
16461d7d
KB
2029 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2030 write_register (IA64_BSP_REGNUM, bsp);
2031
2032 /* FIXME: What becomes of the epilog count in the PFS? */
2033 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2034 write_register (IA64_CFM_REGNUM, cfm);
2035
2036 flush_cached_frames ();
2037}
2038
2039static void
2040ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2041 CORE_ADDR *targ_addr, int *targ_len)
2042{
2043 *targ_addr = memaddr;
2044 *targ_len = nr_bytes;
2045}
2046
244bc108
KB
2047static void
2048process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2049{
2050 int *os_ident_ptr = obj;
2051 const char *name;
2052 unsigned int sectsize;
2053
2054 name = bfd_get_section_name (abfd, sect);
2055 sectsize = bfd_section_size (abfd, sect);
2056 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2057 {
2058 unsigned int name_length, data_length, note_type;
2059 char *note = alloca (sectsize);
2060
2061 bfd_get_section_contents (abfd, sect, note,
2062 (file_ptr) 0, (bfd_size_type) sectsize);
2063
2064 name_length = bfd_h_get_32 (abfd, note);
2065 data_length = bfd_h_get_32 (abfd, note + 4);
2066 note_type = bfd_h_get_32 (abfd, note + 8);
2067
2068 if (name_length == 4 && data_length == 16 && note_type == 1
2069 && strcmp (note + 12, "GNU") == 0)
2070 {
2071 int os_number = bfd_h_get_32 (abfd, note + 16);
2072
2073 /* The case numbers are from abi-tags in glibc */
2074 switch (os_number)
2075 {
2076 case 0 :
2077 *os_ident_ptr = ELFOSABI_LINUX;
2078 break;
244bc108
KB
2079 case 1 :
2080 *os_ident_ptr = ELFOSABI_HURD;
2081 break;
2082 case 2 :
2083 *os_ident_ptr = ELFOSABI_SOLARIS;
2084 break;
244bc108 2085 default :
8e65ff28
AC
2086 internal_error (__FILE__, __LINE__,
2087 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB
2088 break;
2089 }
2090 }
2091 }
2092}
2093
16461d7d
KB
2094static struct gdbarch *
2095ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2096{
2097 struct gdbarch *gdbarch;
244bc108
KB
2098 struct gdbarch_tdep *tdep;
2099 int os_ident;
2100
2101 if (info.abfd != NULL
2102 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2103 {
2104 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2105
ca557f44
AC
2106 /* If os_ident is 0, it is not necessarily the case that we're
2107 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2108 GNU/Linux uses a note section to record OS/ABI info, but
2109 leaves e_ident[EI_OSABI] zero. So we have to check for note
2110 sections too. */
244bc108
KB
2111 if (os_ident == 0)
2112 {
2113 bfd_map_over_sections (info.abfd,
2114 process_note_abi_tag_sections,
2115 &os_ident);
2116 }
2117 }
2118 else
2119 os_ident = -1;
16461d7d 2120
244bc108
KB
2121 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2122 arches != NULL;
2123 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2124 {
57bc8964
KB
2125 tdep = gdbarch_tdep (arches->gdbarch);
2126 if (tdep &&tdep->os_ident == os_ident)
2127 return arches->gdbarch;
244bc108 2128 }
16461d7d 2129
244bc108
KB
2130 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2131 gdbarch = gdbarch_alloc (&info, tdep);
2132 tdep->os_ident = os_ident;
2133
a5afb99f
AC
2134 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2135 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2136 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
d7fa2ae2
KB
2137
2138 /* Set the method of obtaining the sigcontext addresses at which
2139 registers are saved. The method of checking to see if
2140 native_find_global_pointer is nonzero to indicate that we're
2141 on AIX is kind of hokey, but I can't think of a better way
2142 to do it. */
244bc108
KB
2143 if (os_ident == ELFOSABI_LINUX)
2144 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB
2145 else if (native_find_global_pointer != 0)
2146 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB
2147 else
2148 tdep->sigcontext_register_address = 0;
16461d7d 2149
ca557f44
AC
2150 /* We know that GNU/Linux won't have to resort to the
2151 native_find_global_pointer hackery. But that's the only one we
2152 know about so far, so if native_find_global_pointer is set to
2153 something non-zero, then use it. Otherwise fall back to using
2154 generic_elf_find_global_pointer. This arrangement should (in
2155 theory) allow us to cross debug GNU/Linux binaries from an AIX
2156 machine. */
698cb3f0
KB
2157 if (os_ident == ELFOSABI_LINUX)
2158 tdep->find_global_pointer = generic_elf_find_global_pointer;
2159 else if (native_find_global_pointer != 0)
2160 tdep->find_global_pointer = native_find_global_pointer;
2161 else
2162 tdep->find_global_pointer = generic_elf_find_global_pointer;
2163
16461d7d
KB
2164 set_gdbarch_short_bit (gdbarch, 16);
2165 set_gdbarch_int_bit (gdbarch, 32);
2166 set_gdbarch_long_bit (gdbarch, 64);
2167 set_gdbarch_long_long_bit (gdbarch, 64);
2168 set_gdbarch_float_bit (gdbarch, 32);
2169 set_gdbarch_double_bit (gdbarch, 64);
2170 set_gdbarch_long_double_bit (gdbarch, 64);
2171 set_gdbarch_ptr_bit (gdbarch, 64);
2172
2173 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2174 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2175 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2176 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2177 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB
2178
2179 set_gdbarch_register_name (gdbarch, ia64_register_name);
2180 set_gdbarch_register_size (gdbarch, 8);
2181 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2182 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2183 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
a0ed5532 2184 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 16);
16461d7d 2185 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
a0ed5532 2186 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 16);
16461d7d
KB
2187 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2188
2189 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2190
2191 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2192 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2193
2194 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2195
2196 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
8bedc050 2197 set_gdbarch_deprecated_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
16461d7d 2198
f30ee0bc 2199 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
129c1cd6 2200 set_gdbarch_deprecated_get_saved_register (gdbarch, ia64_get_saved_register);
16461d7d
KB
2201
2202 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2203 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2204 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2205
2206 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
26e9b323 2207 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
16461d7d
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2208
2209 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
ebba8386 2210 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
26e9b323 2211 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
16461d7d
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2212
2213 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2214 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2215 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2216 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2217 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2218
2219 /* Settings for calling functions in the inferior. */
16461d7d
KB
2220 set_gdbarch_call_dummy_length (gdbarch, 0);
2221 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2222 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
749b82f6 2223 set_gdbarch_deprecated_pop_frame (gdbarch, ia64_pop_frame);
16461d7d
KB
2224
2225 set_gdbarch_call_dummy_p (gdbarch, 1);
2226 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2227 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2228 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
e9582e71 2229 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
16461d7d
KB
2230 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2231 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2232
2233 /* We won't necessarily have a frame pointer and even if we do,
2234 it winds up being extraordinarly messy when attempting to find
2235 the frame chain. So for the purposes of creating frames (which
2236 is all read_fp() is used for), simply use the stack pointer value
2237 instead. */
2238 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
16461d7d
KB
2239
2240 /* Settings that should be unnecessary. */
2241 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2242
2243 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2244 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2245
16461d7d
KB
2246 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2247 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2248 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
16461d7d 2249 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
16461d7d
KB
2250 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2251
2252 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2253 set_gdbarch_function_start_offset (gdbarch, 0);
4156bb53 2254 set_gdbarch_frame_args_skip (gdbarch, 0);
16461d7d
KB
2255
2256 set_gdbarch_remote_translate_xfer_address (
2257 gdbarch, ia64_remote_translate_xfer_address);
2258
2259 return gdbarch;
2260}
2261
2262void
2263_initialize_ia64_tdep (void)
2264{
2265 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2266
2267 tm_print_insn = print_insn_ia64;
2268 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2269}
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