2003-03-01 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
ca557f44 2
51603483 3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
16461d7d
KB
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
fd0407d6 30#include "value.h"
16461d7d
KB
31
32#include "objfiles.h"
33#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 34#include "elf-bfd.h"
16461d7d 35
698cb3f0
KB
36/* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47/* An enumeration of the different IA-64 instruction types. */
48
16461d7d
KB
49typedef enum instruction_type
50{
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59} instruction_type;
60
61/* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76#define SLOT_MULTIPLIER 1
77
78/* Length in bytes of an instruction bundle */
79
80#define BUNDLE_LEN 16
81
d7fa2ae2 82/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 83extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 84extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 85
16461d7d
KB
86static gdbarch_init_ftype ia64_gdbarch_init;
87
88static gdbarch_register_name_ftype ia64_register_name;
89static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92static gdbarch_register_byte_ftype ia64_register_byte;
93static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94static gdbarch_frame_chain_ftype ia64_frame_chain;
95static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
96static gdbarch_skip_prologue_ftype ia64_skip_prologue;
97static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
98static gdbarch_get_saved_register_ftype ia64_get_saved_register;
26e9b323
AC
99static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
100static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
16461d7d
KB
101static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
102static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
16461d7d
KB
103static gdbarch_store_struct_return_ftype ia64_store_struct_return;
104static gdbarch_push_arguments_ftype ia64_push_arguments;
105static gdbarch_push_return_address_ftype ia64_push_return_address;
106static gdbarch_pop_frame_ftype ia64_pop_frame;
107static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 108static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 109static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB
110
111static int ia64_num_regs = 590;
112
113static int pc_regnum = IA64_IP_REGNUM;
114static int sp_regnum = IA64_GR12_REGNUM;
115static int fp_regnum = IA64_VFP_REGNUM;
116static int lr_regnum = IA64_VRAP_REGNUM;
117
118static LONGEST ia64_call_dummy_words[] = {0};
119
120/* Array of register names; There should be ia64_num_regs strings in
121 the initializer. */
122
123static char *ia64_register_names[] =
124{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
125 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
126 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
127 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
128 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
129 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
130 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
131 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
132 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
133 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
134 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
135 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
136 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
137 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
138 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
139 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
140
141 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
142 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
143 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
144 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
145 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
146 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
147 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
148 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
149 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
150 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
151 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
152 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
153 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
154 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
155 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
156 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
157
158 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
159 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
160 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
161 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
162 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
163 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
164 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
165 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
166
167 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
168
169 "vfp", "vrap",
170
171 "pr", "ip", "psr", "cfm",
172
173 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
174 "", "", "", "", "", "", "", "",
175 "rsc", "bsp", "bspstore", "rnat",
176 "", "fcr", "", "",
177 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
178 "ccv", "", "", "", "unat", "", "", "",
179 "fpsr", "", "", "", "itc",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "",
182 "pfs", "lc", "ec",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "",
190 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
191 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
192 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
193 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
194 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
195 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
196 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
197 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
198 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
199 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
200 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
201 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
202 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
203 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
204 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
205 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
206};
207
208struct frame_extra_info
244bc108
KB
209 {
210 CORE_ADDR bsp; /* points at r32 for the current frame */
211 CORE_ADDR cfm; /* cfm value for current frame */
212 int sof; /* Size of frame (decoded from cfm value) */
213 int sol; /* Size of locals (decoded from cfm value) */
214 CORE_ADDR after_prologue;
215 /* Address of first instruction after the last
16461d7d
KB
216 prologue instruction; Note that there may
217 be instructions from the function's body
218 intermingled with the prologue. */
244bc108
KB
219 int mem_stack_frame_size;
220 /* Size of the memory stack frame (may be zero),
16461d7d 221 or -1 if it has not been determined yet. */
244bc108
KB
222 int fp_reg; /* Register number (if any) used a frame pointer
223 for this frame. 0 if no register is being used
16461d7d 224 as the frame pointer. */
244bc108
KB
225 };
226
227struct gdbarch_tdep
228 {
229 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 230 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
KB
231 etc. */
232 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
233 /* OS specific function which, given a frame address
234 and register number, returns the offset to the
235 given register from the start of the frame. */
698cb3f0 236 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
KB
237 };
238
698cb3f0
KB
239#define SIGCONTEXT_REGISTER_ADDRESS \
240 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
241#define FIND_GLOBAL_POINTER \
242 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d 243
fa88f677 244static const char *
16461d7d
KB
245ia64_register_name (int reg)
246{
247 return ia64_register_names[reg];
248}
249
250int
251ia64_register_raw_size (int reg)
252{
253 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
254}
255
256int
257ia64_register_virtual_size (int reg)
258{
259 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
260}
261
262/* Return true iff register N's virtual format is different from
263 its raw format. */
264int
265ia64_register_convertible (int nr)
266{
267 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
268}
269
270const struct floatformat floatformat_ia64_ext =
271{
272 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
273 floatformat_intbit_yes
274};
275
276void
277ia64_register_convert_to_virtual (int regnum, struct type *type,
278 char *from, char *to)
279{
280 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
281 {
282 DOUBLEST val;
283 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
284 store_floating(to, TYPE_LENGTH(type), val);
285 }
286 else
287 error("ia64_register_convert_to_virtual called with non floating point register number");
288}
289
290void
291ia64_register_convert_to_raw (struct type *type, int regnum,
292 char *from, char *to)
293{
294 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
295 {
296 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
297 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
298 }
299 else
300 error("ia64_register_convert_to_raw called with non floating point register number");
301}
302
303struct type *
304ia64_register_virtual_type (int reg)
305{
306 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
307 return builtin_type_long_double;
308 else
309 return builtin_type_long;
310}
311
312int
313ia64_register_byte (int reg)
314{
315 return (8 * reg) +
316 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
317}
318
244bc108
KB
319/* Read the given register from a sigcontext structure in the
320 specified frame. */
321
322static CORE_ADDR
323read_sigcontext_register (struct frame_info *frame, int regnum)
324{
325 CORE_ADDR regaddr;
326
327 if (frame == NULL)
8e65ff28
AC
328 internal_error (__FILE__, __LINE__,
329 "read_sigcontext_register: NULL frame");
5a203e44 330 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
8e65ff28 331 internal_error (__FILE__, __LINE__,
5a203e44 332 "read_sigcontext_register: frame not a signal trampoline");
244bc108 333 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC
334 internal_error (__FILE__, __LINE__,
335 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108 336
1e2330ba 337 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
244bc108
KB
338 if (regaddr)
339 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
340 else
8e65ff28
AC
341 internal_error (__FILE__, __LINE__,
342 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
KB
343}
344
16461d7d
KB
345/* Extract ``len'' bits from an instruction bundle starting at
346 bit ``from''. */
347
244bc108 348static long long
16461d7d
KB
349extract_bit_field (char *bundle, int from, int len)
350{
351 long long result = 0LL;
352 int to = from + len;
353 int from_byte = from / 8;
354 int to_byte = to / 8;
355 unsigned char *b = (unsigned char *) bundle;
356 unsigned char c;
357 int lshift;
358 int i;
359
360 c = b[from_byte];
361 if (from_byte == to_byte)
362 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
363 result = c >> (from % 8);
364 lshift = 8 - (from % 8);
365
366 for (i = from_byte+1; i < to_byte; i++)
367 {
368 result |= ((long long) b[i]) << lshift;
369 lshift += 8;
370 }
371
372 if (from_byte < to_byte && (to % 8 != 0))
373 {
374 c = b[to_byte];
375 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
376 result |= ((long long) c) << lshift;
377 }
378
379 return result;
380}
381
382/* Replace the specified bits in an instruction bundle */
383
244bc108 384static void
16461d7d
KB
385replace_bit_field (char *bundle, long long val, int from, int len)
386{
387 int to = from + len;
388 int from_byte = from / 8;
389 int to_byte = to / 8;
390 unsigned char *b = (unsigned char *) bundle;
391 unsigned char c;
392
393 if (from_byte == to_byte)
394 {
395 unsigned char left, right;
396 c = b[from_byte];
397 left = (c >> (to % 8)) << (to % 8);
398 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
399 c = (unsigned char) (val & 0xff);
400 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
401 c |= right | left;
402 b[from_byte] = c;
403 }
404 else
405 {
406 int i;
407 c = b[from_byte];
408 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
409 c = c | (val << (from % 8));
410 b[from_byte] = c;
411 val >>= 8 - from % 8;
412
413 for (i = from_byte+1; i < to_byte; i++)
414 {
415 c = val & 0xff;
416 val >>= 8;
417 b[i] = c;
418 }
419
420 if (to % 8 != 0)
421 {
422 unsigned char cv = (unsigned char) val;
423 c = b[to_byte];
424 c = c >> (to % 8) << (to % 8);
425 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
426 b[to_byte] = c;
427 }
428 }
429}
430
431/* Return the contents of slot N (for N = 0, 1, or 2) in
432 and instruction bundle */
433
244bc108 434static long long
2fc3ac7e 435slotN_contents (char *bundle, int slotnum)
16461d7d
KB
436{
437 return extract_bit_field (bundle, 5+41*slotnum, 41);
438}
439
440/* Store an instruction in an instruction bundle */
441
244bc108 442static void
2fc3ac7e 443replace_slotN_contents (char *bundle, long long instr, int slotnum)
16461d7d
KB
444{
445 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
446}
447
64a5b29c 448static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB
449{
450 { M, I, I }, /* 00 */
451 { M, I, I }, /* 01 */
452 { M, I, I }, /* 02 */
453 { M, I, I }, /* 03 */
454 { M, L, X }, /* 04 */
455 { M, L, X }, /* 05 */
456 { undefined, undefined, undefined }, /* 06 */
457 { undefined, undefined, undefined }, /* 07 */
458 { M, M, I }, /* 08 */
459 { M, M, I }, /* 09 */
460 { M, M, I }, /* 0A */
461 { M, M, I }, /* 0B */
462 { M, F, I }, /* 0C */
463 { M, F, I }, /* 0D */
464 { M, M, F }, /* 0E */
465 { M, M, F }, /* 0F */
466 { M, I, B }, /* 10 */
467 { M, I, B }, /* 11 */
468 { M, B, B }, /* 12 */
469 { M, B, B }, /* 13 */
470 { undefined, undefined, undefined }, /* 14 */
471 { undefined, undefined, undefined }, /* 15 */
472 { B, B, B }, /* 16 */
473 { B, B, B }, /* 17 */
474 { M, M, B }, /* 18 */
475 { M, M, B }, /* 19 */
476 { undefined, undefined, undefined }, /* 1A */
477 { undefined, undefined, undefined }, /* 1B */
478 { M, F, B }, /* 1C */
479 { M, F, B }, /* 1D */
480 { undefined, undefined, undefined }, /* 1E */
481 { undefined, undefined, undefined }, /* 1F */
482};
483
484/* Fetch and (partially) decode an instruction at ADDR and return the
485 address of the next instruction to fetch. */
486
487static CORE_ADDR
488fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
489{
490 char bundle[BUNDLE_LEN];
491 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
492 long long template;
493 int val;
494
c26e1c2b
KB
495 /* Warn about slot numbers greater than 2. We used to generate
496 an error here on the assumption that the user entered an invalid
497 address. But, sometimes GDB itself requests an invalid address.
498 This can (easily) happen when execution stops in a function for
499 which there are no symbols. The prologue scanner will attempt to
500 find the beginning of the function - if the nearest symbol
501 happens to not be aligned on a bundle boundary (16 bytes), the
502 resulting starting address will cause GDB to think that the slot
503 number is too large.
504
505 So we warn about it and set the slot number to zero. It is
506 not necessarily a fatal condition, particularly if debugging
507 at the assembly language level. */
16461d7d 508 if (slotnum > 2)
c26e1c2b
KB
509 {
510 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
511 "Using slot 0 instead");
512 slotnum = 0;
513 }
16461d7d
KB
514
515 addr &= ~0x0f;
516
517 val = target_read_memory (addr, bundle, BUNDLE_LEN);
518
519 if (val != 0)
520 return 0;
521
522 *instr = slotN_contents (bundle, slotnum);
523 template = extract_bit_field (bundle, 0, 5);
524 *it = template_encoding_table[(int)template][slotnum];
525
64a5b29c 526 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB
527 addr += 16;
528 else
529 addr += (slotnum + 1) * SLOT_MULTIPLIER;
530
531 return addr;
532}
533
534/* There are 5 different break instructions (break.i, break.b,
535 break.m, break.f, and break.x), but they all have the same
536 encoding. (The five bit template in the low five bits of the
537 instruction bundle distinguishes one from another.)
538
539 The runtime architecture manual specifies that break instructions
540 used for debugging purposes must have the upper two bits of the 21
541 bit immediate set to a 0 and a 1 respectively. A breakpoint
542 instruction encodes the most significant bit of its 21 bit
543 immediate at bit 36 of the 41 bit instruction. The penultimate msb
544 is at bit 25 which leads to the pattern below.
545
546 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
547 it turns out that 0x80000 was used as the syscall break in the early
548 simulators. So I changed the pattern slightly to do "break.i 0x080001"
549 instead. But that didn't work either (I later found out that this
550 pattern was used by the simulator that I was using.) So I ended up
551 using the pattern seen below. */
552
553#if 0
554#define BREAKPOINT 0x00002000040LL
555#endif
556#define BREAKPOINT 0x00003333300LL
557
558static int
559ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
560{
561 char bundle[BUNDLE_LEN];
562 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
563 long long instr;
564 int val;
126fa72d 565 int template;
16461d7d
KB
566
567 if (slotnum > 2)
568 error("Can't insert breakpoint for slot numbers greater than 2.");
569
570 addr &= ~0x0f;
571
572 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
573
574 /* Check for L type instruction in 2nd slot, if present then
575 bump up the slot number to the 3rd slot */
576 template = extract_bit_field (bundle, 0, 5);
577 if (slotnum == 1 && template_encoding_table[template][1] == L)
578 {
579 slotnum = 2;
580 }
581
16461d7d
KB
582 instr = slotN_contents (bundle, slotnum);
583 memcpy(contents_cache, &instr, sizeof(instr));
584 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
585 if (val == 0)
586 target_write_memory (addr, bundle, BUNDLE_LEN);
587
588 return val;
589}
590
591static int
592ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
593{
594 char bundle[BUNDLE_LEN];
595 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
596 long long instr;
597 int val;
126fa72d 598 int template;
16461d7d
KB
599
600 addr &= ~0x0f;
601
602 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
603
604 /* Check for L type instruction in 2nd slot, if present then
605 bump up the slot number to the 3rd slot */
606 template = extract_bit_field (bundle, 0, 5);
607 if (slotnum == 1 && template_encoding_table[template][1] == L)
608 {
609 slotnum = 2;
610 }
611
16461d7d
KB
612 memcpy (&instr, contents_cache, sizeof instr);
613 replace_slotN_contents (bundle, instr, slotnum);
614 if (val == 0)
615 target_write_memory (addr, bundle, BUNDLE_LEN);
616
617 return val;
618}
619
620/* We don't really want to use this, but remote.c needs to call it in order
621 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 622const unsigned char *
fba45db2 623ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB
624{
625 static unsigned char breakpoint[] =
626 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
627 *lenptr = sizeof (breakpoint);
628#if 0
629 *pcptr &= ~0x0f;
630#endif
631 return breakpoint;
632}
633
634CORE_ADDR
39f77062 635ia64_read_pc (ptid_t ptid)
16461d7d 636{
39f77062
KB
637 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
638 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB
639 int slot_num = (psr_value >> 41) & 3;
640
641 return pc_value | (slot_num * SLOT_MULTIPLIER);
642}
643
644void
39f77062 645ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB
646{
647 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 648 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB
649 psr_value &= ~(3LL << 41);
650 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
651
652 new_pc &= ~0xfLL;
653
39f77062
KB
654 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
655 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB
656}
657
658#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
659
660/* Returns the address of the slot that's NSLOTS slots away from
661 the address ADDR. NSLOTS may be positive or negative. */
662static CORE_ADDR
663rse_address_add(CORE_ADDR addr, int nslots)
664{
665 CORE_ADDR new_addr;
666 int mandatory_nat_slots = nslots / 63;
667 int direction = nslots < 0 ? -1 : 1;
668
669 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
670
671 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
672 new_addr += 8 * direction;
673
674 if (IS_NaT_COLLECTION_ADDR(new_addr))
675 new_addr += 8 * direction;
676
677 return new_addr;
678}
679
680/* The IA-64 frame chain is a bit odd. We won't always have a frame
681 pointer, so we use the SP value as the FP for the purpose of
682 creating a frame. There is sometimes a register (not fixed) which
683 is used as a frame pointer. When this register exists, it is not
684 especially hard to determine which one is being used. It isn't
685 even really hard to compute the frame chain, but it can be
686 computationally expensive. So, instead of making life difficult
687 (and slow), we pick a more convenient representation of the frame
8227c0ff
AC
688 chain, knowing that we'll have to make some small adjustments in
689 other places. (E.g, note that read_fp() is actually read_sp() in
690 ia64_gdbarch_init() below.)
16461d7d
KB
691
692 Okay, so what is the frame chain exactly? It'll be the SP value
693 at the time that the function in question was entered.
694
695 Note that this *should* actually the frame pointer for the current
696 function! But as I note above, if we were to attempt to find the
697 address of the beginning of the previous frame, we'd waste a lot
698 of cycles for no good reason. So instead, we simply choose to
699 represent the frame chain as the end of the previous frame instead
700 of the beginning. */
701
702CORE_ADDR
703ia64_frame_chain (struct frame_info *frame)
704{
5a203e44 705 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 706 return read_sigcontext_register (frame, sp_regnum);
1e2330ba
AC
707 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
708 get_frame_base (frame),
709 get_frame_base (frame)))
710 return get_frame_base (frame);
16461d7d 711 else
244bc108
KB
712 {
713 FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
714 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
715 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
244bc108 716 else
1e2330ba 717 return (get_frame_base (frame)
da50a4b7 718 + get_frame_extra_info (frame)->mem_stack_frame_size);
244bc108 719 }
16461d7d
KB
720}
721
722CORE_ADDR
723ia64_frame_saved_pc (struct frame_info *frame)
724{
5a203e44 725 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 726 return read_sigcontext_register (frame, pc_regnum);
1e2330ba
AC
727 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
728 get_frame_base (frame),
729 get_frame_base (frame)))
730 return deprecated_read_register_dummy (get_frame_pc (frame),
731 get_frame_base (frame), pc_regnum);
244bc108
KB
732 else
733 {
734 FRAME_INIT_SAVED_REGS (frame);
16461d7d 735
b2fb4676
AC
736 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
737 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
11c02a10
AC
738 else if (get_next_frame (frame)
739 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
740 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
244bc108
KB
741 else /* either frameless, or not far enough along in the prologue... */
742 return ia64_saved_pc_after_call (frame);
743 }
16461d7d
KB
744}
745
58ab00f9
KB
746/* Limit the number of skipped non-prologue instructions since examining
747 of the prologue is expensive. */
748static int max_skip_non_prologue_insns = 10;
749
750/* Given PC representing the starting address of a function, and
751 LIM_PC which is the (sloppy) limit to which to scan when looking
752 for a prologue, attempt to further refine this limit by using
753 the line data in the symbol table. If successful, a better guess
754 on where the prologue ends is returned, otherwise the previous
755 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
756 which will be set to indicate whether the returned limit may be
757 used with no further scanning in the event that the function is
758 frameless. */
759
760static CORE_ADDR
761refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
762{
763 struct symtab_and_line prologue_sal;
764 CORE_ADDR start_pc = pc;
765
766 /* Start off not trusting the limit. */
767 *trust_limit = 0;
768
769 prologue_sal = find_pc_line (pc, 0);
770 if (prologue_sal.line != 0)
771 {
772 int i;
773 CORE_ADDR addr = prologue_sal.end;
774
775 /* Handle the case in which compiler's optimizer/scheduler
776 has moved instructions into the prologue. We scan ahead
777 in the function looking for address ranges whose corresponding
778 line number is less than or equal to the first one that we
779 found for the function. (It can be less than when the
780 scheduler puts a body instruction before the first prologue
781 instruction.) */
782 for (i = 2 * max_skip_non_prologue_insns;
783 i > 0 && (lim_pc == 0 || addr < lim_pc);
784 i--)
785 {
786 struct symtab_and_line sal;
787
788 sal = find_pc_line (addr, 0);
789 if (sal.line == 0)
790 break;
791 if (sal.line <= prologue_sal.line
792 && sal.symtab == prologue_sal.symtab)
793 {
794 prologue_sal = sal;
795 }
796 addr = sal.end;
797 }
798
799 if (lim_pc == 0 || prologue_sal.end < lim_pc)
800 {
801 lim_pc = prologue_sal.end;
802 if (start_pc == get_pc_function_start (lim_pc))
803 *trust_limit = 1;
804 }
805 }
806 return lim_pc;
807}
808
16461d7d
KB
809#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
810 || (8 <= (_regnum_) && (_regnum_) <= 11) \
811 || (14 <= (_regnum_) && (_regnum_) <= 31))
812#define imm9(_instr_) \
813 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
814 | (((_instr_) & 0x00008000000LL) >> 20) \
815 | (((_instr_) & 0x00000001fc0LL) >> 6))
816
817static CORE_ADDR
818examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
819{
820 CORE_ADDR next_pc;
821 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB
822 instruction_type it;
823 long long instr;
824 int do_fsr_stuff = 0;
825
826 int cfm_reg = 0;
827 int ret_reg = 0;
828 int fp_reg = 0;
829 int unat_save_reg = 0;
830 int pr_save_reg = 0;
831 int mem_stack_frame_size = 0;
832 int spill_reg = 0;
833 CORE_ADDR spill_addr = 0;
0927a22b
KB
834 char instores[8];
835 char infpstores[8];
58ab00f9 836 int trust_limit;
0927a22b
KB
837
838 memset (instores, 0, sizeof instores);
839 memset (infpstores, 0, sizeof infpstores);
16461d7d 840
b2fb4676 841 if (frame && !get_frame_saved_regs (frame))
16461d7d
KB
842 {
843 frame_saved_regs_zalloc (frame);
844 do_fsr_stuff = 1;
845 }
846
847 if (frame
848 && !do_fsr_stuff
da50a4b7
AC
849 && get_frame_extra_info (frame)->after_prologue != 0
850 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
851 return get_frame_extra_info (frame)->after_prologue;
16461d7d 852
58ab00f9
KB
853 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
854
16461d7d
KB
855 /* Must start with an alloc instruction */
856 next_pc = fetch_instruction (pc, &it, &instr);
857 if (pc < lim_pc && next_pc
858 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
859 {
860 /* alloc */
861 int sor = (int) ((instr & 0x00078000000LL) >> 27);
862 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
863 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
864 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
865 we could compare against the size given to us via the cfm as
866 either a sanity check or possibly to see if the frame has been
867 changed by a later alloc instruction... */
868 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
869 cfm_reg = rN;
870 last_prologue_pc = next_pc;
871 pc = next_pc;
872 }
873 else
58ab00f9
KB
874 {
875 pc = lim_pc; /* Frameless: We're done early. */
876 if (trust_limit)
877 last_prologue_pc = lim_pc;
878 }
16461d7d
KB
879
880 /* Loop, looking for prologue instructions, keeping track of
881 where preserved registers were spilled. */
882 while (pc < lim_pc)
883 {
884 next_pc = fetch_instruction (pc, &it, &instr);
885 if (next_pc == 0)
886 break;
887
902d7086
KB
888 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
889 || ((instr & 0x3fLL) != 0LL))
0927a22b 890 {
902d7086
KB
891 /* Exit loop upon hitting a non-nop branch instruction
892 or a predicated instruction. */
0927a22b
KB
893 break;
894 }
895 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB
896 {
897 /* Move from BR */
898 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
899 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
900 int qp = (int) (instr & 0x0000000003f);
901
902 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
903 {
904 ret_reg = rN;
905 last_prologue_pc = next_pc;
906 }
907 }
908 else if ((it == I || it == M)
909 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
910 {
911 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
912 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
913 | ((instr & 0x001f8000000LL) >> 20)
914 | ((instr & 0x000000fe000LL) >> 13));
915 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
916 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
917 int qp = (int) (instr & 0x0000000003fLL);
918
919 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
920 {
921 /* mov rN, r12 */
922 fp_reg = rN;
923 last_prologue_pc = next_pc;
924 }
925 else if (qp == 0 && rN == 12 && rM == 12)
926 {
927 /* adds r12, -mem_stack_frame_size, r12 */
928 mem_stack_frame_size -= imm;
929 last_prologue_pc = next_pc;
930 }
931 else if (qp == 0 && rN == 2
932 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
933 {
934 /* adds r2, spilloffset, rFramePointer
935 or
936 adds r2, spilloffset, r12
937
938 Get ready for stf.spill or st8.spill instructions.
939 The address to start spilling at is loaded into r2.
940 FIXME: Why r2? That's what gcc currently uses; it
941 could well be different for other compilers. */
942
943 /* Hmm... whether or not this will work will depend on
944 where the pc is. If it's still early in the prologue
945 this'll be wrong. FIXME */
1e2330ba 946 spill_addr = (frame ? get_frame_base (frame) : 0)
16461d7d
KB
947 + (rM == 12 ? 0 : mem_stack_frame_size)
948 + imm;
949 spill_reg = rN;
950 last_prologue_pc = next_pc;
951 }
952 }
953 else if (it == M
954 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
955 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
956 {
957 /* stf.spill [rN] = fM, imm9
958 or
959 stf.spill [rN] = fM */
960
961 int imm = imm9(instr);
962 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
963 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
964 int qp = (int) (instr & 0x0000000003fLL);
965 if (qp == 0 && rN == spill_reg && spill_addr != 0
966 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
967 {
968 if (do_fsr_stuff)
b2fb4676 969 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d
KB
970
971 if ((instr & 0x1efc0000000) == 0x0eec0000000)
972 spill_addr += imm;
973 else
974 spill_addr = 0; /* last one; must be done */
975 last_prologue_pc = next_pc;
976 }
977 }
978 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
979 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
980 {
981 /* mov.m rN = arM
982 or
983 mov.i rN = arM */
984
985 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
986 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
987 int qp = (int) (instr & 0x0000000003fLL);
988 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
989 {
990 /* We have something like "mov.m r3 = ar.unat". Remember the
991 r3 (or whatever) and watch for a store of this register... */
992 unat_save_reg = rN;
993 last_prologue_pc = next_pc;
994 }
995 }
996 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
997 {
998 /* mov rN = pr */
999 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1000 int qp = (int) (instr & 0x0000000003fLL);
1001 if (qp == 0 && isScratch (rN))
1002 {
1003 pr_save_reg = rN;
1004 last_prologue_pc = next_pc;
1005 }
1006 }
1007 else if (it == M
1008 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1009 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1010 {
1011 /* st8 [rN] = rM
1012 or
1013 st8 [rN] = rM, imm9 */
1014 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1015 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1016 int qp = (int) (instr & 0x0000000003fLL);
1017 if (qp == 0 && rN == spill_reg && spill_addr != 0
1018 && (rM == unat_save_reg || rM == pr_save_reg))
1019 {
1020 /* We've found a spill of either the UNAT register or the PR
1021 register. (Well, not exactly; what we've actually found is
1022 a spill of the register that UNAT or PR was moved to).
1023 Record that fact and move on... */
1024 if (rM == unat_save_reg)
1025 {
1026 /* Track UNAT register */
1027 if (do_fsr_stuff)
b2fb4676 1028 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB
1029 unat_save_reg = 0;
1030 }
1031 else
1032 {
1033 /* Track PR register */
1034 if (do_fsr_stuff)
b2fb4676 1035 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB
1036 pr_save_reg = 0;
1037 }
1038 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1039 /* st8 [rN] = rM, imm9 */
1040 spill_addr += imm9(instr);
1041 else
1042 spill_addr = 0; /* must be done spilling */
1043 last_prologue_pc = next_pc;
1044 }
0927a22b
KB
1045 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1046 {
1047 /* Allow up to one store of each input register. */
1048 instores[rM-32] = 1;
1049 last_prologue_pc = next_pc;
1050 }
1051 }
1052 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1053 {
1054 /* One of
1055 st1 [rN] = rM
1056 st2 [rN] = rM
1057 st4 [rN] = rM
1058 st8 [rN] = rM
1059 Note that the st8 case is handled in the clause above.
1060
1061 Advance over stores of input registers. One store per input
1062 register is permitted. */
1063 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1064 int qp = (int) (instr & 0x0000000003fLL);
1065 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1066 {
1067 instores[rM-32] = 1;
1068 last_prologue_pc = next_pc;
1069 }
1070 }
1071 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1072 {
1073 /* Either
1074 stfs [rN] = fM
1075 or
1076 stfd [rN] = fM
1077
1078 Advance over stores of floating point input registers. Again
1079 one store per register is permitted */
1080 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1081 int qp = (int) (instr & 0x0000000003fLL);
1082 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1083 {
1084 infpstores[fM-8] = 1;
1085 last_prologue_pc = next_pc;
1086 }
16461d7d
KB
1087 }
1088 else if (it == M
1089 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1090 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1091 {
1092 /* st8.spill [rN] = rM
1093 or
1094 st8.spill [rN] = rM, imm9 */
1095 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1096 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1097 int qp = (int) (instr & 0x0000000003fLL);
1098 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1099 {
1100 /* We've found a spill of one of the preserved general purpose
1101 regs. Record the spill address and advance the spill
1102 register if appropriate. */
1103 if (do_fsr_stuff)
b2fb4676 1104 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB
1105 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1106 /* st8.spill [rN] = rM, imm9 */
1107 spill_addr += imm9(instr);
1108 else
1109 spill_addr = 0; /* Done spilling */
1110 last_prologue_pc = next_pc;
1111 }
1112 }
16461d7d
KB
1113
1114 pc = next_pc;
1115 }
1116
1117 if (do_fsr_stuff) {
1118 int i;
1119 CORE_ADDR addr;
3a854e23
KB
1120 int sor, rrb_gr;
1121
1122 /* Extract the size of the rotating portion of the stack
1123 frame and the register rename base from the current
1124 frame marker. */
da50a4b7
AC
1125 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1126 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
16461d7d 1127
da50a4b7
AC
1128 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1129 i < get_frame_extra_info (frame)->sof;
16461d7d
KB
1130 i++, addr += 8)
1131 {
1132 if (IS_NaT_COLLECTION_ADDR (addr))
1133 {
1134 addr += 8;
1135 }
3a854e23 1136 if (i < sor)
b2fb4676 1137 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
3a854e23
KB
1138 = addr;
1139 else
b2fb4676 1140 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB
1141
1142 if (i+32 == cfm_reg)
b2fb4676 1143 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
16461d7d 1144 if (i+32 == ret_reg)
b2fb4676 1145 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
16461d7d 1146 if (i+32 == fp_reg)
b2fb4676 1147 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
16461d7d
KB
1148 }
1149 }
1150
da50a4b7
AC
1151 if (frame && get_frame_extra_info (frame))
1152 {
1153 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1154 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1155 get_frame_extra_info (frame)->fp_reg = fp_reg;
1156 }
16461d7d
KB
1157
1158 return last_prologue_pc;
1159}
1160
1161CORE_ADDR
1162ia64_skip_prologue (CORE_ADDR pc)
1163{
1164 return examine_prologue (pc, pc+1024, 0);
1165}
1166
1167void
1168ia64_frame_init_saved_regs (struct frame_info *frame)
1169{
b2fb4676 1170 if (get_frame_saved_regs (frame))
16461d7d
KB
1171 return;
1172
5a203e44 1173 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
244bc108
KB
1174 {
1175 int regno;
16461d7d 1176
244bc108 1177 frame_saved_regs_zalloc (frame);
16461d7d 1178
b2fb4676 1179 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1e2330ba 1180 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
b2fb4676 1181 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1e2330ba 1182 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
b2fb4676 1183 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1e2330ba 1184 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
244bc108 1185#if 0
b2fb4676 1186 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
244bc108
KB
1187 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1188#endif
b2fb4676 1189 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1e2330ba 1190 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
b2fb4676 1191 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1e2330ba 1192 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
b2fb4676 1193 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1e2330ba 1194 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
b2fb4676 1195 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1e2330ba 1196 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
b2fb4676 1197 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1e2330ba 1198 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
b2fb4676 1199 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1e2330ba 1200 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
244bc108
KB
1201 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1202 if (regno != sp_regnum)
b2fb4676 1203 get_frame_saved_regs (frame)[regno] =
1e2330ba 1204 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1205 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1206 get_frame_saved_regs (frame)[regno] =
1e2330ba 1207 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1208 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1209 get_frame_saved_regs (frame)[regno] =
1e2330ba 1210 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
16461d7d
KB
1211 }
1212 else
1213 {
244bc108 1214 CORE_ADDR func_start;
16461d7d 1215
50abf9e5
AC
1216 func_start = get_pc_function_start (get_frame_pc (frame));
1217 examine_prologue (func_start, get_frame_pc (frame), frame);
244bc108 1218 }
16461d7d
KB
1219}
1220
1221void
1222ia64_get_saved_register (char *raw_buffer,
1223 int *optimized,
1224 CORE_ADDR *addrp,
1225 struct frame_info *frame,
1226 int regnum,
1227 enum lval_type *lval)
1228{
244bc108 1229 int is_dummy_frame;
16461d7d
KB
1230
1231 if (!target_has_registers)
1232 error ("No registers.");
1233
1234 if (optimized != NULL)
1235 *optimized = 0;
244bc108
KB
1236
1237 if (addrp != NULL)
1238 *addrp = 0;
1239
1240 if (lval != NULL)
1241 *lval = not_lval;
1242
1e2330ba
AC
1243 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1244 get_frame_base (frame),
1245 get_frame_base (frame));
244bc108 1246
11c02a10 1247 if (regnum == SP_REGNUM && get_next_frame (frame))
16461d7d
KB
1248 {
1249 /* Handle SP values for all frames but the topmost. */
1e2330ba
AC
1250 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1251 get_frame_base (frame));
16461d7d
KB
1252 }
1253 else if (regnum == IA64_BSP_REGNUM)
1254 {
16461d7d 1255 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
da50a4b7 1256 get_frame_extra_info (frame)->bsp);
16461d7d
KB
1257 }
1258 else if (regnum == IA64_VFP_REGNUM)
1259 {
1260 /* If the function in question uses an automatic register (r32-r127)
1261 for the frame pointer, it'll be found by ia64_find_saved_register()
1262 above. If the function lacks one of these frame pointers, we can
1263 still provide a value since we know the size of the frame */
1e2330ba 1264 CORE_ADDR vfp = (get_frame_base (frame)
da50a4b7 1265 + get_frame_extra_info (frame)->mem_stack_frame_size);
16461d7d
KB
1266 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1267 }
1268 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1269 {
2fc3ac7e 1270 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1271 int pr_optim;
1272 enum lval_type pr_lval;
1273 CORE_ADDR pr_addr;
1274 int prN_val;
1275 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1276 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB
1277 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1278 {
1279 /* Fetch predicate register rename base from current frame
1280 marker for this frame. */
da50a4b7 1281 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
3a854e23
KB
1282
1283 /* Adjust the register number to account for register rotation. */
1284 regnum = IA64_PR16_REGNUM
1285 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1286 }
16461d7d
KB
1287 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1288 regnum - IA64_PR0_REGNUM, 1);
1289 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB
1290 }
1291 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1292 {
2fc3ac7e 1293 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1294 int unat_optim;
1295 enum lval_type unat_lval;
1296 CORE_ADDR unat_addr;
1297 int unatN_val;
1298 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1299 frame, IA64_UNAT_REGNUM, &unat_lval);
1300 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1301 regnum - IA64_NAT0_REGNUM, 1);
1302 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1303 unatN_val);
16461d7d
KB
1304 }
1305 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1306 {
1307 int natval = 0;
1308 /* Find address of general register corresponding to nat bit we're
1309 interested in. */
244bc108
KB
1310 CORE_ADDR gr_addr = 0;
1311
1312 if (!is_dummy_frame)
1313 {
1314 FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
1315 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1316 + IA64_GR0_REGNUM];
244bc108 1317 }
16461d7d
KB
1318 if (gr_addr)
1319 {
1320 /* Compute address of nat collection bits */
1321 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1322 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1323 CORE_ADDR nat_collection;
1324 int nat_bit;
1325 /* If our nat collection address is bigger than bsp, we have to get
1326 the nat collection from rnat. Otherwise, we fetch the nat
1327 collection from the computed address. */
1328 if (nat_addr >= bsp)
1329 nat_collection = read_register (IA64_RNAT_REGNUM);
1330 else
1331 nat_collection = read_memory_integer (nat_addr, 8);
1332 nat_bit = (gr_addr >> 3) & 0x3f;
1333 natval = (nat_collection >> nat_bit) & 1;
1334 }
1335 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB
1336 }
1337 else if (regnum == IA64_IP_REGNUM)
1338 {
1339 CORE_ADDR pc;
11c02a10 1340 if (get_next_frame (frame))
244bc108
KB
1341 {
1342 /* FIXME: Set *addrp, *lval when possible. */
11c02a10 1343 pc = ia64_frame_saved_pc (get_next_frame (frame));
244bc108
KB
1344 }
1345 else
1346 {
1347 pc = read_pc ();
1348 }
1349 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1350 }
1351 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1352 {
1353 CORE_ADDR addr = 0;
1354 if (!is_dummy_frame)
1355 {
1356 FRAME_INIT_SAVED_REGS (frame);
b2fb4676 1357 addr = get_frame_saved_regs (frame)[regnum];
244bc108
KB
1358 }
1359
1360 if (addr != 0)
1361 {
1362 if (lval != NULL)
1363 *lval = lval_memory;
1364 if (addrp != NULL)
1365 *addrp = addr;
1366 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1367 }
1368 else
1369 {
1370 /* r32 - r127 must be fetchable via memory. If they aren't,
1371 then the register is unavailable */
1372 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1373 }
16461d7d
KB
1374 }
1375 else
1376 {
3a854e23
KB
1377 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1378 {
1379 /* Fetch floating point register rename base from current
1380 frame marker for this frame. */
da50a4b7 1381 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
3a854e23
KB
1382
1383 /* Adjust the floating point register number to account for
1384 register rotation. */
1385 regnum = IA64_FR32_REGNUM
1386 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1387 }
1388
bdcdd535
AC
1389 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1390 frame, regnum, lval);
16461d7d 1391 }
16461d7d
KB
1392}
1393
1394/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1395 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1396 and TYPE is the type (which is known to be struct, union or array). */
1397int
1398ia64_use_struct_convention (int gcc_p, struct type *type)
1399{
64a5b29c
KB
1400 struct type *float_elt_type;
1401
1402 /* HFAs are structures (or arrays) consisting entirely of floating
1403 point values of the same length. Up to 8 of these are returned
1404 in registers. Don't use the struct convention when this is the
1405 case. */
1406 float_elt_type = is_float_or_hfa_type (type);
1407 if (float_elt_type != NULL
1408 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1409 return 0;
1410
1411 /* Other structs of length 32 or less are returned in r8-r11.
1412 Don't use the struct convention for those either. */
16461d7d
KB
1413 return TYPE_LENGTH (type) > 32;
1414}
1415
1416void
1417ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1418{
64a5b29c
KB
1419 struct type *float_elt_type;
1420
1421 float_elt_type = is_float_or_hfa_type (type);
1422 if (float_elt_type != NULL)
1423 {
1424 int offset = 0;
1425 int regnum = IA64_FR8_REGNUM;
1426 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1427
1428 while (n-- > 0)
1429 {
1430 ia64_register_convert_to_virtual (regnum, float_elt_type,
1431 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1432 offset += TYPE_LENGTH (float_elt_type);
1433 regnum++;
1434 }
1435 }
16461d7d 1436 else
64a5b29c
KB
1437 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1438 TYPE_LENGTH (type));
16461d7d
KB
1439}
1440
1441/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1442 like this is necessary though since the IA-64 calling conventions specify
1443 that r8 is not preserved. */
1444static CORE_ADDR struct_return_address;
1445
1446CORE_ADDR
1447ia64_extract_struct_value_address (char *regbuf)
1448{
1449 /* FIXME: See above. */
1450 return struct_return_address;
1451}
1452
1453void
1454ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1455{
1456 /* FIXME: See above. */
1457 /* Note that most of the work was done in ia64_push_arguments() */
1458 struct_return_address = addr;
1459}
1460
1461int
1462ia64_frameless_function_invocation (struct frame_info *frame)
1463{
fbad0893 1464 FRAME_INIT_SAVED_REGS (frame);
da50a4b7 1465 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
16461d7d
KB
1466}
1467
1468CORE_ADDR
1469ia64_saved_pc_after_call (struct frame_info *frame)
1470{
1471 return read_register (IA64_BR0_REGNUM);
1472}
1473
1474CORE_ADDR
1475ia64_frame_args_address (struct frame_info *frame)
1476{
1477 /* frame->frame points at the SP for this frame; But we want the start
1478 of the frame, not the end. Calling frame chain will get his for us. */
1479 return ia64_frame_chain (frame);
1480}
1481
1482CORE_ADDR
1483ia64_frame_locals_address (struct frame_info *frame)
1484{
1485 /* frame->frame points at the SP for this frame; But we want the start
1486 of the frame, not the end. Calling frame chain will get his for us. */
1487 return ia64_frame_chain (frame);
1488}
1489
1490void
1491ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1492{
1493 CORE_ADDR bsp, cfm;
11c02a10
AC
1494 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1495 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1496 get_frame_base (get_next_frame (frame)),
1497 get_frame_base (get_next_frame (frame))));
16461d7d 1498
a00a19e9 1499 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
16461d7d 1500
11c02a10 1501 if (get_next_frame (frame) == 0)
16461d7d
KB
1502 {
1503 bsp = read_register (IA64_BSP_REGNUM);
1504 cfm = read_register (IA64_CFM_REGNUM);
1505
1506 }
11c02a10 1507 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
244bc108 1508 {
11c02a10
AC
1509 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1510 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
244bc108
KB
1511 }
1512 else if (next_frame_is_call_dummy)
1513 {
11c02a10
AC
1514 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1515 get_frame_base (get_next_frame (frame)),
135c175f 1516 IA64_BSP_REGNUM);
11c02a10
AC
1517 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1518 get_frame_base (get_next_frame (frame)),
135c175f 1519 IA64_CFM_REGNUM);
244bc108 1520 }
16461d7d
KB
1521 else
1522 {
11c02a10 1523 struct frame_info *frn = get_next_frame (frame);
16461d7d
KB
1524
1525 FRAME_INIT_SAVED_REGS (frn);
1526
b2fb4676
AC
1527 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1528 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
11c02a10
AC
1529 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1530 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1531 else if (get_next_frame (frn)
1532 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1533 get_frame_base (get_next_frame (frn)),
1534 get_frame_base (get_next_frame (frn))))
1535 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1536 get_frame_base (get_next_frame (frn)),
135c175f 1537 IA64_PFS_REGNUM);
16461d7d 1538 else
76d689a6 1539 cfm = read_register (IA64_PFS_REGNUM);
16461d7d 1540
da50a4b7 1541 bsp = get_frame_extra_info (frn)->bsp;
16461d7d 1542 }
da50a4b7
AC
1543 get_frame_extra_info (frame)->cfm = cfm;
1544 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1545 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
11c02a10
AC
1546 if (get_next_frame (frame) == 0
1547 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
244bc108 1548 || next_frame_is_call_dummy)
da50a4b7
AC
1549 get_frame_extra_info (frame)->bsp =
1550 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
16461d7d 1551 else
da50a4b7
AC
1552 get_frame_extra_info (frame)->bsp =
1553 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
16461d7d 1554
da50a4b7
AC
1555 get_frame_extra_info (frame)->after_prologue = 0;
1556 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1557 get_frame_extra_info (frame)->fp_reg = 0;
16461d7d
KB
1558}
1559
64a5b29c
KB
1560static int
1561is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1562{
1563 switch (TYPE_CODE (t))
1564 {
1565 case TYPE_CODE_FLT:
1566 if (*etp)
1567 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1568 else
1569 {
1570 *etp = t;
1571 return 1;
1572 }
1573 break;
1574 case TYPE_CODE_ARRAY:
98f96ba1
KB
1575 return
1576 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1577 etp);
64a5b29c
KB
1578 break;
1579 case TYPE_CODE_STRUCT:
1580 {
1581 int i;
1582
1583 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB
1584 if (!is_float_or_hfa_type_recurse
1585 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB
1586 return 0;
1587 return 1;
1588 }
1589 break;
1590 default:
1591 return 0;
1592 break;
1593 }
1594}
1595
1596/* Determine if the given type is one of the floating point types or
1597 and HFA (which is a struct, array, or combination thereof whose
1598 bottom-most elements are all of the same floating point type.) */
1599
1600static struct type *
1601is_float_or_hfa_type (struct type *t)
1602{
1603 struct type *et = 0;
1604
1605 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1606}
1607
1608
98f96ba1
KB
1609/* Return 1 if the alignment of T is such that the next even slot
1610 should be used. Return 0, if the next available slot should
1611 be used. (See section 8.5.1 of the IA-64 Software Conventions
1612 and Runtime manual.) */
1613
1614static int
1615slot_alignment_is_next_even (struct type *t)
1616{
1617 switch (TYPE_CODE (t))
1618 {
1619 case TYPE_CODE_INT:
1620 case TYPE_CODE_FLT:
1621 if (TYPE_LENGTH (t) > 8)
1622 return 1;
1623 else
1624 return 0;
1625 case TYPE_CODE_ARRAY:
1626 return
1627 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1628 case TYPE_CODE_STRUCT:
1629 {
1630 int i;
1631
1632 for (i = 0; i < TYPE_NFIELDS (t); i++)
1633 if (slot_alignment_is_next_even
1634 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1635 return 1;
1636 return 0;
1637 }
1638 default:
1639 return 0;
1640 }
1641}
1642
64a5b29c
KB
1643/* Attempt to find (and return) the global pointer for the given
1644 function.
1645
1646 This is a rather nasty bit of code searchs for the .dynamic section
1647 in the objfile corresponding to the pc of the function we're trying
1648 to call. Once it finds the addresses at which the .dynamic section
1649 lives in the child process, it scans the Elf64_Dyn entries for a
1650 DT_PLTGOT tag. If it finds one of these, the corresponding
1651 d_un.d_ptr value is the global pointer. */
1652
1653static CORE_ADDR
698cb3f0 1654generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1655{
76d689a6 1656 struct obj_section *faddr_sect;
64a5b29c 1657
76d689a6
KB
1658 faddr_sect = find_pc_section (faddr);
1659 if (faddr_sect != NULL)
64a5b29c
KB
1660 {
1661 struct obj_section *osect;
1662
76d689a6 1663 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1664 {
1665 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1666 break;
1667 }
1668
76d689a6 1669 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1670 {
1671 CORE_ADDR addr;
1672
1673 addr = osect->addr;
1674 while (addr < osect->endaddr)
1675 {
1676 int status;
1677 LONGEST tag;
1678 char buf[8];
1679
1680 status = target_read_memory (addr, buf, sizeof (buf));
1681 if (status != 0)
1682 break;
1683 tag = extract_signed_integer (buf, sizeof (buf));
1684
1685 if (tag == DT_PLTGOT)
1686 {
1687 CORE_ADDR global_pointer;
1688
1689 status = target_read_memory (addr + 8, buf, sizeof (buf));
1690 if (status != 0)
1691 break;
1692 global_pointer = extract_address (buf, sizeof (buf));
1693
1694 /* The payoff... */
1695 return global_pointer;
1696 }
1697
1698 if (tag == DT_NULL)
1699 break;
1700
1701 addr += 16;
1702 }
1703 }
1704 }
1705 return 0;
1706}
1707
1708/* Given a function's address, attempt to find (and return) the
1709 corresponding (canonical) function descriptor. Return 0 if
1710 not found. */
1711static CORE_ADDR
1712find_extant_func_descr (CORE_ADDR faddr)
1713{
76d689a6 1714 struct obj_section *faddr_sect;
64a5b29c
KB
1715
1716 /* Return early if faddr is already a function descriptor */
76d689a6
KB
1717 faddr_sect = find_pc_section (faddr);
1718 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB
1719 return faddr;
1720
76d689a6 1721 if (faddr_sect != NULL)
64a5b29c 1722 {
76d689a6
KB
1723 struct obj_section *osect;
1724 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1725 {
1726 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1727 break;
1728 }
1729
76d689a6 1730 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1731 {
1732 CORE_ADDR addr;
1733
1734 addr = osect->addr;
1735 while (addr < osect->endaddr)
1736 {
1737 int status;
1738 LONGEST faddr2;
1739 char buf[8];
1740
1741 status = target_read_memory (addr, buf, sizeof (buf));
1742 if (status != 0)
1743 break;
1744 faddr2 = extract_signed_integer (buf, sizeof (buf));
1745
1746 if (faddr == faddr2)
1747 return addr;
1748
1749 addr += 16;
1750 }
1751 }
1752 }
1753 return 0;
1754}
1755
1756/* Attempt to find a function descriptor corresponding to the
1757 given address. If none is found, construct one on the
1758 stack using the address at fdaptr */
1759
1760static CORE_ADDR
1761find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1762{
1763 CORE_ADDR fdesc;
1764
1765 fdesc = find_extant_func_descr (faddr);
1766
1767 if (fdesc == 0)
1768 {
1769 CORE_ADDR global_pointer;
1770 char buf[16];
1771
1772 fdesc = *fdaptr;
1773 *fdaptr += 16;
1774
698cb3f0 1775 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB
1776
1777 if (global_pointer == 0)
1778 global_pointer = read_register (IA64_GR1_REGNUM);
1779
1780 store_address (buf, 8, faddr);
1781 store_address (buf + 8, 8, global_pointer);
1782
1783 write_memory (fdesc, buf, 16);
1784 }
1785
1786 return fdesc;
1787}
16461d7d
KB
1788
1789CORE_ADDR
ea7c478f 1790ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB
1791 int struct_return, CORE_ADDR struct_addr)
1792{
1793 int argno;
ea7c478f 1794 struct value *arg;
16461d7d
KB
1795 struct type *type;
1796 int len, argoffset;
64a5b29c 1797 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1798 int floatreg;
64a5b29c 1799 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB
1800
1801 nslots = 0;
64a5b29c 1802 nfuncargs = 0;
16461d7d
KB
1803 /* Count the number of slots needed for the arguments */
1804 for (argno = 0; argno < nargs; argno++)
1805 {
1806 arg = args[argno];
1807 type = check_typedef (VALUE_TYPE (arg));
1808 len = TYPE_LENGTH (type);
1809
98f96ba1 1810 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB
1811 nslots++;
1812
64a5b29c
KB
1813 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1814 nfuncargs++;
1815
16461d7d
KB
1816 nslots += (len + 7) / 8;
1817 }
1818
64a5b29c 1819 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB
1820 rseslots = (nslots > 8) ? 8 : nslots;
1821 memslots = nslots - rseslots;
1822
64a5b29c 1823 /* Allocate a new RSE frame */
16461d7d
KB
1824 cfm = read_register (IA64_CFM_REGNUM);
1825
1826 bsp = read_register (IA64_BSP_REGNUM);
1827 bsp = rse_address_add (bsp, cfm & 0x7f);
1828 new_bsp = rse_address_add (bsp, rseslots);
1829 write_register (IA64_BSP_REGNUM, new_bsp);
1830
1831 pfs = read_register (IA64_PFS_REGNUM);
1832 pfs &= 0xc000000000000000LL;
1833 pfs |= (cfm & 0xffffffffffffLL);
1834 write_register (IA64_PFS_REGNUM, pfs);
1835
1836 cfm &= 0xc000000000000000LL;
1837 cfm |= rseslots;
1838 write_register (IA64_CFM_REGNUM, cfm);
1839
64a5b29c
KB
1840 /* We will attempt to find function descriptors in the .opd segment,
1841 but if we can't we'll construct them ourselves. That being the
1842 case, we'll need to reserve space on the stack for them. */
1843 funcdescaddr = sp - nfuncargs * 16;
1844 funcdescaddr &= ~0xfLL;
1845
1846 /* Adjust the stack pointer to it's new value. The calling conventions
1847 require us to have 16 bytes of scratch, plus whatever space is
1848 necessary for the memory slots and our function descriptors */
1849 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB
1850 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1851
64a5b29c
KB
1852 /* Place the arguments where they belong. The arguments will be
1853 either placed in the RSE backing store or on the memory stack.
1854 In addition, floating point arguments or HFAs are placed in
1855 floating point registers. */
16461d7d
KB
1856 slotnum = 0;
1857 floatreg = IA64_FR8_REGNUM;
1858 for (argno = 0; argno < nargs; argno++)
1859 {
64a5b29c
KB
1860 struct type *float_elt_type;
1861
16461d7d
KB
1862 arg = args[argno];
1863 type = check_typedef (VALUE_TYPE (arg));
1864 len = TYPE_LENGTH (type);
64a5b29c
KB
1865
1866 /* Special handling for function parameters */
1867 if (len == 8
1868 && TYPE_CODE (type) == TYPE_CODE_PTR
1869 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1870 {
1871 char val_buf[8];
1872
1873 store_address (val_buf, 8,
1874 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1875 &funcdescaddr));
1876 if (slotnum < rseslots)
1877 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1878 else
1879 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1880 slotnum++;
1881 continue;
1882 }
1883
1884 /* Normal slots */
98f96ba1
KB
1885
1886 /* Skip odd slot if necessary... */
1887 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1888 slotnum++;
98f96ba1 1889
16461d7d
KB
1890 argoffset = 0;
1891 while (len > 0)
1892 {
1893 char val_buf[8];
1894
1895 memset (val_buf, 0, 8);
1896 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1897
1898 if (slotnum < rseslots)
1899 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1900 else
1901 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1902
1903 argoffset += 8;
1904 len -= 8;
1905 slotnum++;
1906 }
64a5b29c
KB
1907
1908 /* Handle floating point types (including HFAs) */
1909 float_elt_type = is_float_or_hfa_type (type);
1910 if (float_elt_type != NULL)
1911 {
1912 argoffset = 0;
1913 len = TYPE_LENGTH (type);
1914 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1915 {
1916 ia64_register_convert_to_raw (
1917 float_elt_type,
1918 floatreg,
1919 VALUE_CONTENTS (arg) + argoffset,
524d7c18 1920 &deprecated_registers[REGISTER_BYTE (floatreg)]);
64a5b29c
KB
1921 floatreg++;
1922 argoffset += TYPE_LENGTH (float_elt_type);
1923 len -= TYPE_LENGTH (float_elt_type);
1924 }
16461d7d
KB
1925 }
1926 }
1927
64a5b29c 1928 /* Store the struct return value in r8 if necessary. */
16461d7d
KB
1929 if (struct_return)
1930 {
524d7c18 1931 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
16461d7d
KB
1932 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1933 struct_addr);
1934 }
1935
64a5b29c 1936 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB
1937 target_store_registers (-1);
1938
1939 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1940 to be defined to call generic_save_dummy_frame_tos(). But at the
1941 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1942 I chose to put this call here instead of using the old mechanisms.
1943 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1944 line
1945
1946 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1947
1948 to ia64_gdbarch_init() and remove the line below. */
1949 generic_save_dummy_frame_tos (sp);
1950
1951 return sp;
1952}
1953
1954CORE_ADDR
1955ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1956{
698cb3f0 1957 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1958
64a5b29c
KB
1959 if (global_pointer != 0)
1960 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB
1961
1962 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1963 return sp;
1964}
1965
1966void
1967ia64_store_return_value (struct type *type, char *valbuf)
1968{
1969 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1970 {
1971 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
524d7c18 1972 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
16461d7d
KB
1973 target_store_registers (IA64_FR8_REGNUM);
1974 }
1975 else
73937e03
AC
1976 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1977 valbuf, TYPE_LENGTH (type));
16461d7d
KB
1978}
1979
1980void
1981ia64_pop_frame (void)
1982{
1983 generic_pop_current_frame (ia64_pop_frame_regular);
1984}
1985
1986static void
1987ia64_pop_frame_regular (struct frame_info *frame)
1988{
1989 int regno;
1990 CORE_ADDR bsp, cfm, pfs;
1991
1992 FRAME_INIT_SAVED_REGS (frame);
1993
1994 for (regno = 0; regno < ia64_num_regs; regno++)
1995 {
b2fb4676 1996 if (get_frame_saved_regs (frame)[regno]
16461d7d
KB
1997 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1998 && regno != pc_regnum
1999 && regno != sp_regnum
2000 && regno != IA64_PFS_REGNUM
2001 && regno != IA64_CFM_REGNUM
2002 && regno != IA64_BSP_REGNUM
2003 && regno != IA64_BSPSTORE_REGNUM)
2004 {
2005 write_register (regno,
b2fb4676 2006 read_memory_integer (get_frame_saved_regs (frame)[regno],
16461d7d
KB
2007 REGISTER_RAW_SIZE (regno)));
2008 }
2009 }
2010
2011 write_register (sp_regnum, FRAME_CHAIN (frame));
2012 write_pc (FRAME_SAVED_PC (frame));
2013
2014 cfm = read_register (IA64_CFM_REGNUM);
2015
b2fb4676 2016 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
16461d7d 2017 {
b2fb4676 2018 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
16461d7d
KB
2019 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2020 }
2021 else
2022 pfs = read_register (IA64_PFS_REGNUM);
2023
2024 /* Compute the new bsp by *adding* the difference between the
2025 size of the frame and the size of the locals (both wrt the
2026 frame that we're going back to). This seems kind of strange,
2027 especially since it seems like we ought to be subtracting the
ca557f44 2028 size of the locals... and we should; but the Linux kernel
16461d7d
KB
2029 wants bsp to be set at the end of all used registers. It's
2030 likely that this code will need to be revised to accomodate
2031 other operating systems. */
da50a4b7 2032 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
16461d7d
KB
2033 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2034 write_register (IA64_BSP_REGNUM, bsp);
2035
2036 /* FIXME: What becomes of the epilog count in the PFS? */
2037 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2038 write_register (IA64_CFM_REGNUM, cfm);
2039
2040 flush_cached_frames ();
2041}
2042
2043static void
2044ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2045 CORE_ADDR *targ_addr, int *targ_len)
2046{
2047 *targ_addr = memaddr;
2048 *targ_len = nr_bytes;
2049}
2050
244bc108
KB
2051static void
2052process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2053{
2054 int *os_ident_ptr = obj;
2055 const char *name;
2056 unsigned int sectsize;
2057
2058 name = bfd_get_section_name (abfd, sect);
2059 sectsize = bfd_section_size (abfd, sect);
2060 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2061 {
2062 unsigned int name_length, data_length, note_type;
2063 char *note = alloca (sectsize);
2064
2065 bfd_get_section_contents (abfd, sect, note,
2066 (file_ptr) 0, (bfd_size_type) sectsize);
2067
2068 name_length = bfd_h_get_32 (abfd, note);
2069 data_length = bfd_h_get_32 (abfd, note + 4);
2070 note_type = bfd_h_get_32 (abfd, note + 8);
2071
2072 if (name_length == 4 && data_length == 16 && note_type == 1
2073 && strcmp (note + 12, "GNU") == 0)
2074 {
2075 int os_number = bfd_h_get_32 (abfd, note + 16);
2076
2077 /* The case numbers are from abi-tags in glibc */
2078 switch (os_number)
2079 {
2080 case 0 :
2081 *os_ident_ptr = ELFOSABI_LINUX;
2082 break;
244bc108
KB
2083 case 1 :
2084 *os_ident_ptr = ELFOSABI_HURD;
2085 break;
2086 case 2 :
2087 *os_ident_ptr = ELFOSABI_SOLARIS;
2088 break;
244bc108 2089 default :
8e65ff28
AC
2090 internal_error (__FILE__, __LINE__,
2091 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB
2092 break;
2093 }
2094 }
2095 }
2096}
2097
16461d7d
KB
2098static struct gdbarch *
2099ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2100{
2101 struct gdbarch *gdbarch;
244bc108
KB
2102 struct gdbarch_tdep *tdep;
2103 int os_ident;
2104
2105 if (info.abfd != NULL
2106 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2107 {
2108 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2109
ca557f44
AC
2110 /* If os_ident is 0, it is not necessarily the case that we're
2111 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2112 GNU/Linux uses a note section to record OS/ABI info, but
2113 leaves e_ident[EI_OSABI] zero. So we have to check for note
2114 sections too. */
244bc108
KB
2115 if (os_ident == 0)
2116 {
2117 bfd_map_over_sections (info.abfd,
2118 process_note_abi_tag_sections,
2119 &os_ident);
2120 }
2121 }
2122 else
2123 os_ident = -1;
16461d7d 2124
244bc108
KB
2125 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2126 arches != NULL;
2127 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2128 {
57bc8964
KB
2129 tdep = gdbarch_tdep (arches->gdbarch);
2130 if (tdep &&tdep->os_ident == os_ident)
2131 return arches->gdbarch;
244bc108 2132 }
16461d7d 2133
244bc108
KB
2134 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2135 gdbarch = gdbarch_alloc (&info, tdep);
2136 tdep->os_ident = os_ident;
2137
a5afb99f
AC
2138 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2139 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2140 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
d7fa2ae2
KB
2141
2142 /* Set the method of obtaining the sigcontext addresses at which
2143 registers are saved. The method of checking to see if
2144 native_find_global_pointer is nonzero to indicate that we're
2145 on AIX is kind of hokey, but I can't think of a better way
2146 to do it. */
244bc108
KB
2147 if (os_ident == ELFOSABI_LINUX)
2148 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB
2149 else if (native_find_global_pointer != 0)
2150 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB
2151 else
2152 tdep->sigcontext_register_address = 0;
16461d7d 2153
ca557f44
AC
2154 /* We know that GNU/Linux won't have to resort to the
2155 native_find_global_pointer hackery. But that's the only one we
2156 know about so far, so if native_find_global_pointer is set to
2157 something non-zero, then use it. Otherwise fall back to using
2158 generic_elf_find_global_pointer. This arrangement should (in
2159 theory) allow us to cross debug GNU/Linux binaries from an AIX
2160 machine. */
698cb3f0
KB
2161 if (os_ident == ELFOSABI_LINUX)
2162 tdep->find_global_pointer = generic_elf_find_global_pointer;
2163 else if (native_find_global_pointer != 0)
2164 tdep->find_global_pointer = native_find_global_pointer;
2165 else
2166 tdep->find_global_pointer = generic_elf_find_global_pointer;
2167
16461d7d
KB
2168 set_gdbarch_short_bit (gdbarch, 16);
2169 set_gdbarch_int_bit (gdbarch, 32);
2170 set_gdbarch_long_bit (gdbarch, 64);
2171 set_gdbarch_long_long_bit (gdbarch, 64);
2172 set_gdbarch_float_bit (gdbarch, 32);
2173 set_gdbarch_double_bit (gdbarch, 64);
2174 set_gdbarch_long_double_bit (gdbarch, 64);
2175 set_gdbarch_ptr_bit (gdbarch, 64);
2176
2177 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2178 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2179 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2180 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2181 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB
2182
2183 set_gdbarch_register_name (gdbarch, ia64_register_name);
2184 set_gdbarch_register_size (gdbarch, 8);
2185 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2186 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2187 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2188 set_gdbarch_max_register_raw_size (gdbarch, 16);
2189 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2190 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2191 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2192
2193 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2194
2195 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2196 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2197
2198 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2199
2200 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
16461d7d
KB
2201 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2202
2203 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2204 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2205
2206 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2207 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2208 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2209
2210 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
26e9b323 2211 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
16461d7d
KB
2212
2213 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
ebba8386 2214 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
26e9b323 2215 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
16461d7d
KB
2216
2217 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2218 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2219 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2220 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2221 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2222
2223 /* Settings for calling functions in the inferior. */
16461d7d
KB
2224 set_gdbarch_call_dummy_length (gdbarch, 0);
2225 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2226 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2227 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2228
2229 set_gdbarch_call_dummy_p (gdbarch, 1);
2230 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2231 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2232 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
e9582e71 2233 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
16461d7d
KB
2234 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2235 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2236
2237 /* We won't necessarily have a frame pointer and even if we do,
2238 it winds up being extraordinarly messy when attempting to find
2239 the frame chain. So for the purposes of creating frames (which
2240 is all read_fp() is used for), simply use the stack pointer value
2241 instead. */
2242 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
16461d7d
KB
2243
2244 /* Settings that should be unnecessary. */
2245 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2246
2247 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2248 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2249
16461d7d
KB
2250 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2251 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2252 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
16461d7d 2253 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
16461d7d
KB
2254 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2255
2256 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2257 set_gdbarch_function_start_offset (gdbarch, 0);
4156bb53 2258 set_gdbarch_frame_args_skip (gdbarch, 0);
16461d7d
KB
2259
2260 set_gdbarch_remote_translate_xfer_address (
2261 gdbarch, ia64_remote_translate_xfer_address);
2262
2263 return gdbarch;
2264}
2265
2266void
2267_initialize_ia64_tdep (void)
2268{
2269 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2270
2271 tm_print_insn = print_insn_ia64;
2272 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2273}
This page took 0.41509 seconds and 4 git commands to generate.