2003-01-09 Andrew Cagney <ac131313@redhat.com>
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
ca557f44 2
51603483 3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
16461d7d
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
fd0407d6 30#include "value.h"
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31
32#include "objfiles.h"
33#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 34#include "elf-bfd.h"
16461d7d 35
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36/* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47/* An enumeration of the different IA-64 instruction types. */
48
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49typedef enum instruction_type
50{
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59} instruction_type;
60
61/* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76#define SLOT_MULTIPLIER 1
77
78/* Length in bytes of an instruction bundle */
79
80#define BUNDLE_LEN 16
81
d7fa2ae2 82/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 83extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 84extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 85
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86static gdbarch_init_ftype ia64_gdbarch_init;
87
88static gdbarch_register_name_ftype ia64_register_name;
89static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92static gdbarch_register_byte_ftype ia64_register_byte;
93static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94static gdbarch_frame_chain_ftype ia64_frame_chain;
95static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
96static gdbarch_skip_prologue_ftype ia64_skip_prologue;
97static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
98static gdbarch_get_saved_register_ftype ia64_get_saved_register;
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99static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
100static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
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101static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
102static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
103static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
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104static gdbarch_store_struct_return_ftype ia64_store_struct_return;
105static gdbarch_push_arguments_ftype ia64_push_arguments;
106static gdbarch_push_return_address_ftype ia64_push_return_address;
107static gdbarch_pop_frame_ftype ia64_pop_frame;
108static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 109static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 110static struct type *is_float_or_hfa_type (struct type *t);
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111
112static int ia64_num_regs = 590;
113
114static int pc_regnum = IA64_IP_REGNUM;
115static int sp_regnum = IA64_GR12_REGNUM;
116static int fp_regnum = IA64_VFP_REGNUM;
117static int lr_regnum = IA64_VRAP_REGNUM;
118
119static LONGEST ia64_call_dummy_words[] = {0};
120
121/* Array of register names; There should be ia64_num_regs strings in
122 the initializer. */
123
124static char *ia64_register_names[] =
125{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
126 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
127 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
128 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
129 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
130 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
131 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
132 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
133 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
134 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
135 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
136 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
137 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
138 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
139 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
140 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
141
142 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
143 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
144 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
145 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
146 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
147 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
148 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
149 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
150 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
151 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
152 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
153 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
154 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
155 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
156 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
157 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
158
159 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
160 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
161 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
162 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
163 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
164 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
165 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
166 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
167
168 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
169
170 "vfp", "vrap",
171
172 "pr", "ip", "psr", "cfm",
173
174 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
175 "", "", "", "", "", "", "", "",
176 "rsc", "bsp", "bspstore", "rnat",
177 "", "fcr", "", "",
178 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
179 "ccv", "", "", "", "unat", "", "", "",
180 "fpsr", "", "", "", "itc",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "",
183 "pfs", "lc", "ec",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "", "", "",
190 "",
191 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
192 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
193 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
194 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
195 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
196 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
197 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
198 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
199 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
200 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
201 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
202 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
203 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
204 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
205 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
206 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
207};
208
209struct frame_extra_info
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210 {
211 CORE_ADDR bsp; /* points at r32 for the current frame */
212 CORE_ADDR cfm; /* cfm value for current frame */
213 int sof; /* Size of frame (decoded from cfm value) */
214 int sol; /* Size of locals (decoded from cfm value) */
215 CORE_ADDR after_prologue;
216 /* Address of first instruction after the last
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217 prologue instruction; Note that there may
218 be instructions from the function's body
219 intermingled with the prologue. */
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220 int mem_stack_frame_size;
221 /* Size of the memory stack frame (may be zero),
16461d7d 222 or -1 if it has not been determined yet. */
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223 int fp_reg; /* Register number (if any) used a frame pointer
224 for this frame. 0 if no register is being used
16461d7d 225 as the frame pointer. */
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226 };
227
228struct gdbarch_tdep
229 {
230 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 231 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
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232 etc. */
233 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
234 /* OS specific function which, given a frame address
235 and register number, returns the offset to the
236 given register from the start of the frame. */
698cb3f0 237 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
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238 };
239
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240#define SIGCONTEXT_REGISTER_ADDRESS \
241 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
242#define FIND_GLOBAL_POINTER \
243 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d 244
fa88f677 245static const char *
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246ia64_register_name (int reg)
247{
248 return ia64_register_names[reg];
249}
250
251int
252ia64_register_raw_size (int reg)
253{
254 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
255}
256
257int
258ia64_register_virtual_size (int reg)
259{
260 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
261}
262
263/* Return true iff register N's virtual format is different from
264 its raw format. */
265int
266ia64_register_convertible (int nr)
267{
268 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
269}
270
271const struct floatformat floatformat_ia64_ext =
272{
273 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
274 floatformat_intbit_yes
275};
276
277void
278ia64_register_convert_to_virtual (int regnum, struct type *type,
279 char *from, char *to)
280{
281 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
282 {
283 DOUBLEST val;
284 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
285 store_floating(to, TYPE_LENGTH(type), val);
286 }
287 else
288 error("ia64_register_convert_to_virtual called with non floating point register number");
289}
290
291void
292ia64_register_convert_to_raw (struct type *type, int regnum,
293 char *from, char *to)
294{
295 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
296 {
297 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
298 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
299 }
300 else
301 error("ia64_register_convert_to_raw called with non floating point register number");
302}
303
304struct type *
305ia64_register_virtual_type (int reg)
306{
307 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
308 return builtin_type_long_double;
309 else
310 return builtin_type_long;
311}
312
313int
314ia64_register_byte (int reg)
315{
316 return (8 * reg) +
317 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
318}
319
244bc108
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320/* Read the given register from a sigcontext structure in the
321 specified frame. */
322
323static CORE_ADDR
324read_sigcontext_register (struct frame_info *frame, int regnum)
325{
326 CORE_ADDR regaddr;
327
328 if (frame == NULL)
8e65ff28
AC
329 internal_error (__FILE__, __LINE__,
330 "read_sigcontext_register: NULL frame");
5a203e44 331 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
8e65ff28 332 internal_error (__FILE__, __LINE__,
5a203e44 333 "read_sigcontext_register: frame not a signal trampoline");
244bc108 334 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
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AC
335 internal_error (__FILE__, __LINE__,
336 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108 337
1e2330ba 338 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
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339 if (regaddr)
340 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
341 else
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AC
342 internal_error (__FILE__, __LINE__,
343 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
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344}
345
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346/* Extract ``len'' bits from an instruction bundle starting at
347 bit ``from''. */
348
244bc108 349static long long
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350extract_bit_field (char *bundle, int from, int len)
351{
352 long long result = 0LL;
353 int to = from + len;
354 int from_byte = from / 8;
355 int to_byte = to / 8;
356 unsigned char *b = (unsigned char *) bundle;
357 unsigned char c;
358 int lshift;
359 int i;
360
361 c = b[from_byte];
362 if (from_byte == to_byte)
363 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
364 result = c >> (from % 8);
365 lshift = 8 - (from % 8);
366
367 for (i = from_byte+1; i < to_byte; i++)
368 {
369 result |= ((long long) b[i]) << lshift;
370 lshift += 8;
371 }
372
373 if (from_byte < to_byte && (to % 8 != 0))
374 {
375 c = b[to_byte];
376 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
377 result |= ((long long) c) << lshift;
378 }
379
380 return result;
381}
382
383/* Replace the specified bits in an instruction bundle */
384
244bc108 385static void
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386replace_bit_field (char *bundle, long long val, int from, int len)
387{
388 int to = from + len;
389 int from_byte = from / 8;
390 int to_byte = to / 8;
391 unsigned char *b = (unsigned char *) bundle;
392 unsigned char c;
393
394 if (from_byte == to_byte)
395 {
396 unsigned char left, right;
397 c = b[from_byte];
398 left = (c >> (to % 8)) << (to % 8);
399 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
400 c = (unsigned char) (val & 0xff);
401 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
402 c |= right | left;
403 b[from_byte] = c;
404 }
405 else
406 {
407 int i;
408 c = b[from_byte];
409 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
410 c = c | (val << (from % 8));
411 b[from_byte] = c;
412 val >>= 8 - from % 8;
413
414 for (i = from_byte+1; i < to_byte; i++)
415 {
416 c = val & 0xff;
417 val >>= 8;
418 b[i] = c;
419 }
420
421 if (to % 8 != 0)
422 {
423 unsigned char cv = (unsigned char) val;
424 c = b[to_byte];
425 c = c >> (to % 8) << (to % 8);
426 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
427 b[to_byte] = c;
428 }
429 }
430}
431
432/* Return the contents of slot N (for N = 0, 1, or 2) in
433 and instruction bundle */
434
244bc108 435static long long
2fc3ac7e 436slotN_contents (char *bundle, int slotnum)
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437{
438 return extract_bit_field (bundle, 5+41*slotnum, 41);
439}
440
441/* Store an instruction in an instruction bundle */
442
244bc108 443static void
2fc3ac7e 444replace_slotN_contents (char *bundle, long long instr, int slotnum)
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445{
446 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
447}
448
64a5b29c 449static enum instruction_type template_encoding_table[32][3] =
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450{
451 { M, I, I }, /* 00 */
452 { M, I, I }, /* 01 */
453 { M, I, I }, /* 02 */
454 { M, I, I }, /* 03 */
455 { M, L, X }, /* 04 */
456 { M, L, X }, /* 05 */
457 { undefined, undefined, undefined }, /* 06 */
458 { undefined, undefined, undefined }, /* 07 */
459 { M, M, I }, /* 08 */
460 { M, M, I }, /* 09 */
461 { M, M, I }, /* 0A */
462 { M, M, I }, /* 0B */
463 { M, F, I }, /* 0C */
464 { M, F, I }, /* 0D */
465 { M, M, F }, /* 0E */
466 { M, M, F }, /* 0F */
467 { M, I, B }, /* 10 */
468 { M, I, B }, /* 11 */
469 { M, B, B }, /* 12 */
470 { M, B, B }, /* 13 */
471 { undefined, undefined, undefined }, /* 14 */
472 { undefined, undefined, undefined }, /* 15 */
473 { B, B, B }, /* 16 */
474 { B, B, B }, /* 17 */
475 { M, M, B }, /* 18 */
476 { M, M, B }, /* 19 */
477 { undefined, undefined, undefined }, /* 1A */
478 { undefined, undefined, undefined }, /* 1B */
479 { M, F, B }, /* 1C */
480 { M, F, B }, /* 1D */
481 { undefined, undefined, undefined }, /* 1E */
482 { undefined, undefined, undefined }, /* 1F */
483};
484
485/* Fetch and (partially) decode an instruction at ADDR and return the
486 address of the next instruction to fetch. */
487
488static CORE_ADDR
489fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
490{
491 char bundle[BUNDLE_LEN];
492 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
493 long long template;
494 int val;
495
c26e1c2b
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496 /* Warn about slot numbers greater than 2. We used to generate
497 an error here on the assumption that the user entered an invalid
498 address. But, sometimes GDB itself requests an invalid address.
499 This can (easily) happen when execution stops in a function for
500 which there are no symbols. The prologue scanner will attempt to
501 find the beginning of the function - if the nearest symbol
502 happens to not be aligned on a bundle boundary (16 bytes), the
503 resulting starting address will cause GDB to think that the slot
504 number is too large.
505
506 So we warn about it and set the slot number to zero. It is
507 not necessarily a fatal condition, particularly if debugging
508 at the assembly language level. */
16461d7d 509 if (slotnum > 2)
c26e1c2b
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510 {
511 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
512 "Using slot 0 instead");
513 slotnum = 0;
514 }
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515
516 addr &= ~0x0f;
517
518 val = target_read_memory (addr, bundle, BUNDLE_LEN);
519
520 if (val != 0)
521 return 0;
522
523 *instr = slotN_contents (bundle, slotnum);
524 template = extract_bit_field (bundle, 0, 5);
525 *it = template_encoding_table[(int)template][slotnum];
526
64a5b29c 527 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB
528 addr += 16;
529 else
530 addr += (slotnum + 1) * SLOT_MULTIPLIER;
531
532 return addr;
533}
534
535/* There are 5 different break instructions (break.i, break.b,
536 break.m, break.f, and break.x), but they all have the same
537 encoding. (The five bit template in the low five bits of the
538 instruction bundle distinguishes one from another.)
539
540 The runtime architecture manual specifies that break instructions
541 used for debugging purposes must have the upper two bits of the 21
542 bit immediate set to a 0 and a 1 respectively. A breakpoint
543 instruction encodes the most significant bit of its 21 bit
544 immediate at bit 36 of the 41 bit instruction. The penultimate msb
545 is at bit 25 which leads to the pattern below.
546
547 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
548 it turns out that 0x80000 was used as the syscall break in the early
549 simulators. So I changed the pattern slightly to do "break.i 0x080001"
550 instead. But that didn't work either (I later found out that this
551 pattern was used by the simulator that I was using.) So I ended up
552 using the pattern seen below. */
553
554#if 0
555#define BREAKPOINT 0x00002000040LL
556#endif
557#define BREAKPOINT 0x00003333300LL
558
559static int
560ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
561{
562 char bundle[BUNDLE_LEN];
563 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
564 long long instr;
565 int val;
126fa72d 566 int template;
16461d7d
KB
567
568 if (slotnum > 2)
569 error("Can't insert breakpoint for slot numbers greater than 2.");
570
571 addr &= ~0x0f;
572
573 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
574
575 /* Check for L type instruction in 2nd slot, if present then
576 bump up the slot number to the 3rd slot */
577 template = extract_bit_field (bundle, 0, 5);
578 if (slotnum == 1 && template_encoding_table[template][1] == L)
579 {
580 slotnum = 2;
581 }
582
16461d7d
KB
583 instr = slotN_contents (bundle, slotnum);
584 memcpy(contents_cache, &instr, sizeof(instr));
585 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
586 if (val == 0)
587 target_write_memory (addr, bundle, BUNDLE_LEN);
588
589 return val;
590}
591
592static int
593ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
594{
595 char bundle[BUNDLE_LEN];
596 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
597 long long instr;
598 int val;
126fa72d 599 int template;
16461d7d
KB
600
601 addr &= ~0x0f;
602
603 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
604
605 /* Check for L type instruction in 2nd slot, if present then
606 bump up the slot number to the 3rd slot */
607 template = extract_bit_field (bundle, 0, 5);
608 if (slotnum == 1 && template_encoding_table[template][1] == L)
609 {
610 slotnum = 2;
611 }
612
16461d7d
KB
613 memcpy (&instr, contents_cache, sizeof instr);
614 replace_slotN_contents (bundle, instr, slotnum);
615 if (val == 0)
616 target_write_memory (addr, bundle, BUNDLE_LEN);
617
618 return val;
619}
620
621/* We don't really want to use this, but remote.c needs to call it in order
622 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 623const unsigned char *
fba45db2 624ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB
625{
626 static unsigned char breakpoint[] =
627 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
628 *lenptr = sizeof (breakpoint);
629#if 0
630 *pcptr &= ~0x0f;
631#endif
632 return breakpoint;
633}
634
635CORE_ADDR
39f77062 636ia64_read_pc (ptid_t ptid)
16461d7d 637{
39f77062
KB
638 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
639 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB
640 int slot_num = (psr_value >> 41) & 3;
641
642 return pc_value | (slot_num * SLOT_MULTIPLIER);
643}
644
645void
39f77062 646ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB
647{
648 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 649 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB
650 psr_value &= ~(3LL << 41);
651 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
652
653 new_pc &= ~0xfLL;
654
39f77062
KB
655 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
656 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB
657}
658
659#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
660
661/* Returns the address of the slot that's NSLOTS slots away from
662 the address ADDR. NSLOTS may be positive or negative. */
663static CORE_ADDR
664rse_address_add(CORE_ADDR addr, int nslots)
665{
666 CORE_ADDR new_addr;
667 int mandatory_nat_slots = nslots / 63;
668 int direction = nslots < 0 ? -1 : 1;
669
670 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
671
672 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
673 new_addr += 8 * direction;
674
675 if (IS_NaT_COLLECTION_ADDR(new_addr))
676 new_addr += 8 * direction;
677
678 return new_addr;
679}
680
681/* The IA-64 frame chain is a bit odd. We won't always have a frame
682 pointer, so we use the SP value as the FP for the purpose of
683 creating a frame. There is sometimes a register (not fixed) which
684 is used as a frame pointer. When this register exists, it is not
685 especially hard to determine which one is being used. It isn't
686 even really hard to compute the frame chain, but it can be
687 computationally expensive. So, instead of making life difficult
688 (and slow), we pick a more convenient representation of the frame
8227c0ff
AC
689 chain, knowing that we'll have to make some small adjustments in
690 other places. (E.g, note that read_fp() is actually read_sp() in
691 ia64_gdbarch_init() below.)
16461d7d
KB
692
693 Okay, so what is the frame chain exactly? It'll be the SP value
694 at the time that the function in question was entered.
695
696 Note that this *should* actually the frame pointer for the current
697 function! But as I note above, if we were to attempt to find the
698 address of the beginning of the previous frame, we'd waste a lot
699 of cycles for no good reason. So instead, we simply choose to
700 represent the frame chain as the end of the previous frame instead
701 of the beginning. */
702
703CORE_ADDR
704ia64_frame_chain (struct frame_info *frame)
705{
5a203e44 706 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 707 return read_sigcontext_register (frame, sp_regnum);
1e2330ba
AC
708 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
709 get_frame_base (frame),
710 get_frame_base (frame)))
711 return get_frame_base (frame);
16461d7d 712 else
244bc108
KB
713 {
714 FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
715 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
716 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
244bc108 717 else
1e2330ba 718 return (get_frame_base (frame)
da50a4b7 719 + get_frame_extra_info (frame)->mem_stack_frame_size);
244bc108 720 }
16461d7d
KB
721}
722
723CORE_ADDR
724ia64_frame_saved_pc (struct frame_info *frame)
725{
5a203e44 726 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 727 return read_sigcontext_register (frame, pc_regnum);
1e2330ba
AC
728 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
729 get_frame_base (frame),
730 get_frame_base (frame)))
731 return deprecated_read_register_dummy (get_frame_pc (frame),
732 get_frame_base (frame), pc_regnum);
244bc108
KB
733 else
734 {
735 FRAME_INIT_SAVED_REGS (frame);
16461d7d 736
b2fb4676
AC
737 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
738 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
11c02a10
AC
739 else if (get_next_frame (frame)
740 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
741 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
244bc108
KB
742 else /* either frameless, or not far enough along in the prologue... */
743 return ia64_saved_pc_after_call (frame);
744 }
16461d7d
KB
745}
746
58ab00f9
KB
747/* Limit the number of skipped non-prologue instructions since examining
748 of the prologue is expensive. */
749static int max_skip_non_prologue_insns = 10;
750
751/* Given PC representing the starting address of a function, and
752 LIM_PC which is the (sloppy) limit to which to scan when looking
753 for a prologue, attempt to further refine this limit by using
754 the line data in the symbol table. If successful, a better guess
755 on where the prologue ends is returned, otherwise the previous
756 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
757 which will be set to indicate whether the returned limit may be
758 used with no further scanning in the event that the function is
759 frameless. */
760
761static CORE_ADDR
762refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
763{
764 struct symtab_and_line prologue_sal;
765 CORE_ADDR start_pc = pc;
766
767 /* Start off not trusting the limit. */
768 *trust_limit = 0;
769
770 prologue_sal = find_pc_line (pc, 0);
771 if (prologue_sal.line != 0)
772 {
773 int i;
774 CORE_ADDR addr = prologue_sal.end;
775
776 /* Handle the case in which compiler's optimizer/scheduler
777 has moved instructions into the prologue. We scan ahead
778 in the function looking for address ranges whose corresponding
779 line number is less than or equal to the first one that we
780 found for the function. (It can be less than when the
781 scheduler puts a body instruction before the first prologue
782 instruction.) */
783 for (i = 2 * max_skip_non_prologue_insns;
784 i > 0 && (lim_pc == 0 || addr < lim_pc);
785 i--)
786 {
787 struct symtab_and_line sal;
788
789 sal = find_pc_line (addr, 0);
790 if (sal.line == 0)
791 break;
792 if (sal.line <= prologue_sal.line
793 && sal.symtab == prologue_sal.symtab)
794 {
795 prologue_sal = sal;
796 }
797 addr = sal.end;
798 }
799
800 if (lim_pc == 0 || prologue_sal.end < lim_pc)
801 {
802 lim_pc = prologue_sal.end;
803 if (start_pc == get_pc_function_start (lim_pc))
804 *trust_limit = 1;
805 }
806 }
807 return lim_pc;
808}
809
16461d7d
KB
810#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
811 || (8 <= (_regnum_) && (_regnum_) <= 11) \
812 || (14 <= (_regnum_) && (_regnum_) <= 31))
813#define imm9(_instr_) \
814 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
815 | (((_instr_) & 0x00008000000LL) >> 20) \
816 | (((_instr_) & 0x00000001fc0LL) >> 6))
817
818static CORE_ADDR
819examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
820{
821 CORE_ADDR next_pc;
822 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB
823 instruction_type it;
824 long long instr;
825 int do_fsr_stuff = 0;
826
827 int cfm_reg = 0;
828 int ret_reg = 0;
829 int fp_reg = 0;
830 int unat_save_reg = 0;
831 int pr_save_reg = 0;
832 int mem_stack_frame_size = 0;
833 int spill_reg = 0;
834 CORE_ADDR spill_addr = 0;
0927a22b
KB
835 char instores[8];
836 char infpstores[8];
58ab00f9 837 int trust_limit;
0927a22b
KB
838
839 memset (instores, 0, sizeof instores);
840 memset (infpstores, 0, sizeof infpstores);
16461d7d 841
b2fb4676 842 if (frame && !get_frame_saved_regs (frame))
16461d7d
KB
843 {
844 frame_saved_regs_zalloc (frame);
845 do_fsr_stuff = 1;
846 }
847
848 if (frame
849 && !do_fsr_stuff
da50a4b7
AC
850 && get_frame_extra_info (frame)->after_prologue != 0
851 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
852 return get_frame_extra_info (frame)->after_prologue;
16461d7d 853
58ab00f9
KB
854 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
855
16461d7d
KB
856 /* Must start with an alloc instruction */
857 next_pc = fetch_instruction (pc, &it, &instr);
858 if (pc < lim_pc && next_pc
859 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
860 {
861 /* alloc */
862 int sor = (int) ((instr & 0x00078000000LL) >> 27);
863 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
864 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
865 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
866 we could compare against the size given to us via the cfm as
867 either a sanity check or possibly to see if the frame has been
868 changed by a later alloc instruction... */
869 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
870 cfm_reg = rN;
871 last_prologue_pc = next_pc;
872 pc = next_pc;
873 }
874 else
58ab00f9
KB
875 {
876 pc = lim_pc; /* Frameless: We're done early. */
877 if (trust_limit)
878 last_prologue_pc = lim_pc;
879 }
16461d7d
KB
880
881 /* Loop, looking for prologue instructions, keeping track of
882 where preserved registers were spilled. */
883 while (pc < lim_pc)
884 {
885 next_pc = fetch_instruction (pc, &it, &instr);
886 if (next_pc == 0)
887 break;
888
902d7086
KB
889 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
890 || ((instr & 0x3fLL) != 0LL))
0927a22b 891 {
902d7086
KB
892 /* Exit loop upon hitting a non-nop branch instruction
893 or a predicated instruction. */
0927a22b
KB
894 break;
895 }
896 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB
897 {
898 /* Move from BR */
899 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
900 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
901 int qp = (int) (instr & 0x0000000003f);
902
903 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
904 {
905 ret_reg = rN;
906 last_prologue_pc = next_pc;
907 }
908 }
909 else if ((it == I || it == M)
910 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
911 {
912 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
913 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
914 | ((instr & 0x001f8000000LL) >> 20)
915 | ((instr & 0x000000fe000LL) >> 13));
916 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
917 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
918 int qp = (int) (instr & 0x0000000003fLL);
919
920 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
921 {
922 /* mov rN, r12 */
923 fp_reg = rN;
924 last_prologue_pc = next_pc;
925 }
926 else if (qp == 0 && rN == 12 && rM == 12)
927 {
928 /* adds r12, -mem_stack_frame_size, r12 */
929 mem_stack_frame_size -= imm;
930 last_prologue_pc = next_pc;
931 }
932 else if (qp == 0 && rN == 2
933 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
934 {
935 /* adds r2, spilloffset, rFramePointer
936 or
937 adds r2, spilloffset, r12
938
939 Get ready for stf.spill or st8.spill instructions.
940 The address to start spilling at is loaded into r2.
941 FIXME: Why r2? That's what gcc currently uses; it
942 could well be different for other compilers. */
943
944 /* Hmm... whether or not this will work will depend on
945 where the pc is. If it's still early in the prologue
946 this'll be wrong. FIXME */
1e2330ba 947 spill_addr = (frame ? get_frame_base (frame) : 0)
16461d7d
KB
948 + (rM == 12 ? 0 : mem_stack_frame_size)
949 + imm;
950 spill_reg = rN;
951 last_prologue_pc = next_pc;
952 }
953 }
954 else if (it == M
955 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
956 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
957 {
958 /* stf.spill [rN] = fM, imm9
959 or
960 stf.spill [rN] = fM */
961
962 int imm = imm9(instr);
963 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
964 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
965 int qp = (int) (instr & 0x0000000003fLL);
966 if (qp == 0 && rN == spill_reg && spill_addr != 0
967 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
968 {
969 if (do_fsr_stuff)
b2fb4676 970 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d
KB
971
972 if ((instr & 0x1efc0000000) == 0x0eec0000000)
973 spill_addr += imm;
974 else
975 spill_addr = 0; /* last one; must be done */
976 last_prologue_pc = next_pc;
977 }
978 }
979 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
980 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
981 {
982 /* mov.m rN = arM
983 or
984 mov.i rN = arM */
985
986 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
987 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
988 int qp = (int) (instr & 0x0000000003fLL);
989 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
990 {
991 /* We have something like "mov.m r3 = ar.unat". Remember the
992 r3 (or whatever) and watch for a store of this register... */
993 unat_save_reg = rN;
994 last_prologue_pc = next_pc;
995 }
996 }
997 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
998 {
999 /* mov rN = pr */
1000 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1001 int qp = (int) (instr & 0x0000000003fLL);
1002 if (qp == 0 && isScratch (rN))
1003 {
1004 pr_save_reg = rN;
1005 last_prologue_pc = next_pc;
1006 }
1007 }
1008 else if (it == M
1009 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1010 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1011 {
1012 /* st8 [rN] = rM
1013 or
1014 st8 [rN] = rM, imm9 */
1015 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1016 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1017 int qp = (int) (instr & 0x0000000003fLL);
1018 if (qp == 0 && rN == spill_reg && spill_addr != 0
1019 && (rM == unat_save_reg || rM == pr_save_reg))
1020 {
1021 /* We've found a spill of either the UNAT register or the PR
1022 register. (Well, not exactly; what we've actually found is
1023 a spill of the register that UNAT or PR was moved to).
1024 Record that fact and move on... */
1025 if (rM == unat_save_reg)
1026 {
1027 /* Track UNAT register */
1028 if (do_fsr_stuff)
b2fb4676 1029 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB
1030 unat_save_reg = 0;
1031 }
1032 else
1033 {
1034 /* Track PR register */
1035 if (do_fsr_stuff)
b2fb4676 1036 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB
1037 pr_save_reg = 0;
1038 }
1039 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1040 /* st8 [rN] = rM, imm9 */
1041 spill_addr += imm9(instr);
1042 else
1043 spill_addr = 0; /* must be done spilling */
1044 last_prologue_pc = next_pc;
1045 }
0927a22b
KB
1046 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1047 {
1048 /* Allow up to one store of each input register. */
1049 instores[rM-32] = 1;
1050 last_prologue_pc = next_pc;
1051 }
1052 }
1053 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1054 {
1055 /* One of
1056 st1 [rN] = rM
1057 st2 [rN] = rM
1058 st4 [rN] = rM
1059 st8 [rN] = rM
1060 Note that the st8 case is handled in the clause above.
1061
1062 Advance over stores of input registers. One store per input
1063 register is permitted. */
1064 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1065 int qp = (int) (instr & 0x0000000003fLL);
1066 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1067 {
1068 instores[rM-32] = 1;
1069 last_prologue_pc = next_pc;
1070 }
1071 }
1072 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1073 {
1074 /* Either
1075 stfs [rN] = fM
1076 or
1077 stfd [rN] = fM
1078
1079 Advance over stores of floating point input registers. Again
1080 one store per register is permitted */
1081 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1082 int qp = (int) (instr & 0x0000000003fLL);
1083 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1084 {
1085 infpstores[fM-8] = 1;
1086 last_prologue_pc = next_pc;
1087 }
16461d7d
KB
1088 }
1089 else if (it == M
1090 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1091 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1092 {
1093 /* st8.spill [rN] = rM
1094 or
1095 st8.spill [rN] = rM, imm9 */
1096 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1097 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1098 int qp = (int) (instr & 0x0000000003fLL);
1099 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1100 {
1101 /* We've found a spill of one of the preserved general purpose
1102 regs. Record the spill address and advance the spill
1103 register if appropriate. */
1104 if (do_fsr_stuff)
b2fb4676 1105 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB
1106 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1107 /* st8.spill [rN] = rM, imm9 */
1108 spill_addr += imm9(instr);
1109 else
1110 spill_addr = 0; /* Done spilling */
1111 last_prologue_pc = next_pc;
1112 }
1113 }
16461d7d
KB
1114
1115 pc = next_pc;
1116 }
1117
1118 if (do_fsr_stuff) {
1119 int i;
1120 CORE_ADDR addr;
3a854e23
KB
1121 int sor, rrb_gr;
1122
1123 /* Extract the size of the rotating portion of the stack
1124 frame and the register rename base from the current
1125 frame marker. */
da50a4b7
AC
1126 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1127 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
16461d7d 1128
da50a4b7
AC
1129 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1130 i < get_frame_extra_info (frame)->sof;
16461d7d
KB
1131 i++, addr += 8)
1132 {
1133 if (IS_NaT_COLLECTION_ADDR (addr))
1134 {
1135 addr += 8;
1136 }
3a854e23 1137 if (i < sor)
b2fb4676 1138 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
3a854e23
KB
1139 = addr;
1140 else
b2fb4676 1141 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB
1142
1143 if (i+32 == cfm_reg)
b2fb4676 1144 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
16461d7d 1145 if (i+32 == ret_reg)
b2fb4676 1146 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
16461d7d 1147 if (i+32 == fp_reg)
b2fb4676 1148 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
16461d7d
KB
1149 }
1150 }
1151
da50a4b7
AC
1152 if (frame && get_frame_extra_info (frame))
1153 {
1154 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1155 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1156 get_frame_extra_info (frame)->fp_reg = fp_reg;
1157 }
16461d7d
KB
1158
1159 return last_prologue_pc;
1160}
1161
1162CORE_ADDR
1163ia64_skip_prologue (CORE_ADDR pc)
1164{
1165 return examine_prologue (pc, pc+1024, 0);
1166}
1167
1168void
1169ia64_frame_init_saved_regs (struct frame_info *frame)
1170{
b2fb4676 1171 if (get_frame_saved_regs (frame))
16461d7d
KB
1172 return;
1173
5a203e44 1174 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
244bc108
KB
1175 {
1176 int regno;
16461d7d 1177
244bc108 1178 frame_saved_regs_zalloc (frame);
16461d7d 1179
b2fb4676 1180 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1e2330ba 1181 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
b2fb4676 1182 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1e2330ba 1183 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
b2fb4676 1184 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1e2330ba 1185 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
244bc108 1186#if 0
b2fb4676 1187 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
244bc108
KB
1188 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1189#endif
b2fb4676 1190 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1e2330ba 1191 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
b2fb4676 1192 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1e2330ba 1193 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
b2fb4676 1194 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1e2330ba 1195 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
b2fb4676 1196 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1e2330ba 1197 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
b2fb4676 1198 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1e2330ba 1199 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
b2fb4676 1200 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1e2330ba 1201 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
244bc108
KB
1202 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1203 if (regno != sp_regnum)
b2fb4676 1204 get_frame_saved_regs (frame)[regno] =
1e2330ba 1205 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1206 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1207 get_frame_saved_regs (frame)[regno] =
1e2330ba 1208 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1209 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1210 get_frame_saved_regs (frame)[regno] =
1e2330ba 1211 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
16461d7d
KB
1212 }
1213 else
1214 {
244bc108 1215 CORE_ADDR func_start;
16461d7d 1216
50abf9e5
AC
1217 func_start = get_pc_function_start (get_frame_pc (frame));
1218 examine_prologue (func_start, get_frame_pc (frame), frame);
244bc108 1219 }
16461d7d
KB
1220}
1221
1222void
1223ia64_get_saved_register (char *raw_buffer,
1224 int *optimized,
1225 CORE_ADDR *addrp,
1226 struct frame_info *frame,
1227 int regnum,
1228 enum lval_type *lval)
1229{
244bc108 1230 int is_dummy_frame;
16461d7d
KB
1231
1232 if (!target_has_registers)
1233 error ("No registers.");
1234
1235 if (optimized != NULL)
1236 *optimized = 0;
244bc108
KB
1237
1238 if (addrp != NULL)
1239 *addrp = 0;
1240
1241 if (lval != NULL)
1242 *lval = not_lval;
1243
1e2330ba
AC
1244 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1245 get_frame_base (frame),
1246 get_frame_base (frame));
244bc108 1247
11c02a10 1248 if (regnum == SP_REGNUM && get_next_frame (frame))
16461d7d
KB
1249 {
1250 /* Handle SP values for all frames but the topmost. */
1e2330ba
AC
1251 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1252 get_frame_base (frame));
16461d7d
KB
1253 }
1254 else if (regnum == IA64_BSP_REGNUM)
1255 {
16461d7d 1256 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
da50a4b7 1257 get_frame_extra_info (frame)->bsp);
16461d7d
KB
1258 }
1259 else if (regnum == IA64_VFP_REGNUM)
1260 {
1261 /* If the function in question uses an automatic register (r32-r127)
1262 for the frame pointer, it'll be found by ia64_find_saved_register()
1263 above. If the function lacks one of these frame pointers, we can
1264 still provide a value since we know the size of the frame */
1e2330ba 1265 CORE_ADDR vfp = (get_frame_base (frame)
da50a4b7 1266 + get_frame_extra_info (frame)->mem_stack_frame_size);
16461d7d
KB
1267 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1268 }
1269 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1270 {
2fc3ac7e 1271 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1272 int pr_optim;
1273 enum lval_type pr_lval;
1274 CORE_ADDR pr_addr;
1275 int prN_val;
1276 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1277 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB
1278 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1279 {
1280 /* Fetch predicate register rename base from current frame
1281 marker for this frame. */
da50a4b7 1282 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
3a854e23
KB
1283
1284 /* Adjust the register number to account for register rotation. */
1285 regnum = IA64_PR16_REGNUM
1286 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1287 }
16461d7d
KB
1288 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1289 regnum - IA64_PR0_REGNUM, 1);
1290 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB
1291 }
1292 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1293 {
2fc3ac7e 1294 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1295 int unat_optim;
1296 enum lval_type unat_lval;
1297 CORE_ADDR unat_addr;
1298 int unatN_val;
1299 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1300 frame, IA64_UNAT_REGNUM, &unat_lval);
1301 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1302 regnum - IA64_NAT0_REGNUM, 1);
1303 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1304 unatN_val);
16461d7d
KB
1305 }
1306 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1307 {
1308 int natval = 0;
1309 /* Find address of general register corresponding to nat bit we're
1310 interested in. */
244bc108
KB
1311 CORE_ADDR gr_addr = 0;
1312
1313 if (!is_dummy_frame)
1314 {
1315 FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
1316 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1317 + IA64_GR0_REGNUM];
244bc108 1318 }
16461d7d
KB
1319 if (gr_addr)
1320 {
1321 /* Compute address of nat collection bits */
1322 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1323 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1324 CORE_ADDR nat_collection;
1325 int nat_bit;
1326 /* If our nat collection address is bigger than bsp, we have to get
1327 the nat collection from rnat. Otherwise, we fetch the nat
1328 collection from the computed address. */
1329 if (nat_addr >= bsp)
1330 nat_collection = read_register (IA64_RNAT_REGNUM);
1331 else
1332 nat_collection = read_memory_integer (nat_addr, 8);
1333 nat_bit = (gr_addr >> 3) & 0x3f;
1334 natval = (nat_collection >> nat_bit) & 1;
1335 }
1336 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB
1337 }
1338 else if (regnum == IA64_IP_REGNUM)
1339 {
1340 CORE_ADDR pc;
11c02a10 1341 if (get_next_frame (frame))
244bc108
KB
1342 {
1343 /* FIXME: Set *addrp, *lval when possible. */
11c02a10 1344 pc = ia64_frame_saved_pc (get_next_frame (frame));
244bc108
KB
1345 }
1346 else
1347 {
1348 pc = read_pc ();
1349 }
1350 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1351 }
1352 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1353 {
1354 CORE_ADDR addr = 0;
1355 if (!is_dummy_frame)
1356 {
1357 FRAME_INIT_SAVED_REGS (frame);
b2fb4676 1358 addr = get_frame_saved_regs (frame)[regnum];
244bc108
KB
1359 }
1360
1361 if (addr != 0)
1362 {
1363 if (lval != NULL)
1364 *lval = lval_memory;
1365 if (addrp != NULL)
1366 *addrp = addr;
1367 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1368 }
1369 else
1370 {
1371 /* r32 - r127 must be fetchable via memory. If they aren't,
1372 then the register is unavailable */
1373 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1374 }
16461d7d
KB
1375 }
1376 else
1377 {
3a854e23
KB
1378 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1379 {
1380 /* Fetch floating point register rename base from current
1381 frame marker for this frame. */
da50a4b7 1382 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
3a854e23
KB
1383
1384 /* Adjust the floating point register number to account for
1385 register rotation. */
1386 regnum = IA64_FR32_REGNUM
1387 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1388 }
1389
bdcdd535
AC
1390 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1391 frame, regnum, lval);
16461d7d 1392 }
16461d7d
KB
1393}
1394
1395/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1396 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1397 and TYPE is the type (which is known to be struct, union or array). */
1398int
1399ia64_use_struct_convention (int gcc_p, struct type *type)
1400{
64a5b29c
KB
1401 struct type *float_elt_type;
1402
1403 /* HFAs are structures (or arrays) consisting entirely of floating
1404 point values of the same length. Up to 8 of these are returned
1405 in registers. Don't use the struct convention when this is the
1406 case. */
1407 float_elt_type = is_float_or_hfa_type (type);
1408 if (float_elt_type != NULL
1409 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1410 return 0;
1411
1412 /* Other structs of length 32 or less are returned in r8-r11.
1413 Don't use the struct convention for those either. */
16461d7d
KB
1414 return TYPE_LENGTH (type) > 32;
1415}
1416
1417void
1418ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1419{
64a5b29c
KB
1420 struct type *float_elt_type;
1421
1422 float_elt_type = is_float_or_hfa_type (type);
1423 if (float_elt_type != NULL)
1424 {
1425 int offset = 0;
1426 int regnum = IA64_FR8_REGNUM;
1427 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1428
1429 while (n-- > 0)
1430 {
1431 ia64_register_convert_to_virtual (regnum, float_elt_type,
1432 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1433 offset += TYPE_LENGTH (float_elt_type);
1434 regnum++;
1435 }
1436 }
16461d7d 1437 else
64a5b29c
KB
1438 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1439 TYPE_LENGTH (type));
16461d7d
KB
1440}
1441
1442/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1443 like this is necessary though since the IA-64 calling conventions specify
1444 that r8 is not preserved. */
1445static CORE_ADDR struct_return_address;
1446
1447CORE_ADDR
1448ia64_extract_struct_value_address (char *regbuf)
1449{
1450 /* FIXME: See above. */
1451 return struct_return_address;
1452}
1453
1454void
1455ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1456{
1457 /* FIXME: See above. */
1458 /* Note that most of the work was done in ia64_push_arguments() */
1459 struct_return_address = addr;
1460}
1461
1462int
1463ia64_frameless_function_invocation (struct frame_info *frame)
1464{
fbad0893 1465 FRAME_INIT_SAVED_REGS (frame);
da50a4b7 1466 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
16461d7d
KB
1467}
1468
1469CORE_ADDR
1470ia64_saved_pc_after_call (struct frame_info *frame)
1471{
1472 return read_register (IA64_BR0_REGNUM);
1473}
1474
1475CORE_ADDR
1476ia64_frame_args_address (struct frame_info *frame)
1477{
1478 /* frame->frame points at the SP for this frame; But we want the start
1479 of the frame, not the end. Calling frame chain will get his for us. */
1480 return ia64_frame_chain (frame);
1481}
1482
1483CORE_ADDR
1484ia64_frame_locals_address (struct frame_info *frame)
1485{
1486 /* frame->frame points at the SP for this frame; But we want the start
1487 of the frame, not the end. Calling frame chain will get his for us. */
1488 return ia64_frame_chain (frame);
1489}
1490
1491void
1492ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1493{
1494 CORE_ADDR bsp, cfm;
11c02a10
AC
1495 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1496 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1497 get_frame_base (get_next_frame (frame)),
1498 get_frame_base (get_next_frame (frame))));
16461d7d 1499
a00a19e9 1500 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
16461d7d 1501
11c02a10 1502 if (get_next_frame (frame) == 0)
16461d7d
KB
1503 {
1504 bsp = read_register (IA64_BSP_REGNUM);
1505 cfm = read_register (IA64_CFM_REGNUM);
1506
1507 }
11c02a10 1508 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
244bc108 1509 {
11c02a10
AC
1510 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1511 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
244bc108
KB
1512 }
1513 else if (next_frame_is_call_dummy)
1514 {
11c02a10
AC
1515 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1516 get_frame_base (get_next_frame (frame)),
135c175f 1517 IA64_BSP_REGNUM);
11c02a10
AC
1518 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1519 get_frame_base (get_next_frame (frame)),
135c175f 1520 IA64_CFM_REGNUM);
244bc108 1521 }
16461d7d
KB
1522 else
1523 {
11c02a10 1524 struct frame_info *frn = get_next_frame (frame);
16461d7d
KB
1525
1526 FRAME_INIT_SAVED_REGS (frn);
1527
b2fb4676
AC
1528 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1529 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
11c02a10
AC
1530 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1531 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1532 else if (get_next_frame (frn)
1533 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1534 get_frame_base (get_next_frame (frn)),
1535 get_frame_base (get_next_frame (frn))))
1536 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1537 get_frame_base (get_next_frame (frn)),
135c175f 1538 IA64_PFS_REGNUM);
16461d7d 1539 else
76d689a6 1540 cfm = read_register (IA64_PFS_REGNUM);
16461d7d 1541
da50a4b7 1542 bsp = get_frame_extra_info (frn)->bsp;
16461d7d 1543 }
da50a4b7
AC
1544 get_frame_extra_info (frame)->cfm = cfm;
1545 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1546 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
11c02a10
AC
1547 if (get_next_frame (frame) == 0
1548 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
244bc108 1549 || next_frame_is_call_dummy)
da50a4b7
AC
1550 get_frame_extra_info (frame)->bsp =
1551 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
16461d7d 1552 else
da50a4b7
AC
1553 get_frame_extra_info (frame)->bsp =
1554 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
16461d7d 1555
da50a4b7
AC
1556 get_frame_extra_info (frame)->after_prologue = 0;
1557 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1558 get_frame_extra_info (frame)->fp_reg = 0;
16461d7d
KB
1559}
1560
64a5b29c
KB
1561static int
1562is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1563{
1564 switch (TYPE_CODE (t))
1565 {
1566 case TYPE_CODE_FLT:
1567 if (*etp)
1568 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1569 else
1570 {
1571 *etp = t;
1572 return 1;
1573 }
1574 break;
1575 case TYPE_CODE_ARRAY:
98f96ba1
KB
1576 return
1577 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1578 etp);
64a5b29c
KB
1579 break;
1580 case TYPE_CODE_STRUCT:
1581 {
1582 int i;
1583
1584 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB
1585 if (!is_float_or_hfa_type_recurse
1586 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB
1587 return 0;
1588 return 1;
1589 }
1590 break;
1591 default:
1592 return 0;
1593 break;
1594 }
1595}
1596
1597/* Determine if the given type is one of the floating point types or
1598 and HFA (which is a struct, array, or combination thereof whose
1599 bottom-most elements are all of the same floating point type.) */
1600
1601static struct type *
1602is_float_or_hfa_type (struct type *t)
1603{
1604 struct type *et = 0;
1605
1606 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1607}
1608
1609
98f96ba1
KB
1610/* Return 1 if the alignment of T is such that the next even slot
1611 should be used. Return 0, if the next available slot should
1612 be used. (See section 8.5.1 of the IA-64 Software Conventions
1613 and Runtime manual.) */
1614
1615static int
1616slot_alignment_is_next_even (struct type *t)
1617{
1618 switch (TYPE_CODE (t))
1619 {
1620 case TYPE_CODE_INT:
1621 case TYPE_CODE_FLT:
1622 if (TYPE_LENGTH (t) > 8)
1623 return 1;
1624 else
1625 return 0;
1626 case TYPE_CODE_ARRAY:
1627 return
1628 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1629 case TYPE_CODE_STRUCT:
1630 {
1631 int i;
1632
1633 for (i = 0; i < TYPE_NFIELDS (t); i++)
1634 if (slot_alignment_is_next_even
1635 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1636 return 1;
1637 return 0;
1638 }
1639 default:
1640 return 0;
1641 }
1642}
1643
64a5b29c
KB
1644/* Attempt to find (and return) the global pointer for the given
1645 function.
1646
1647 This is a rather nasty bit of code searchs for the .dynamic section
1648 in the objfile corresponding to the pc of the function we're trying
1649 to call. Once it finds the addresses at which the .dynamic section
1650 lives in the child process, it scans the Elf64_Dyn entries for a
1651 DT_PLTGOT tag. If it finds one of these, the corresponding
1652 d_un.d_ptr value is the global pointer. */
1653
1654static CORE_ADDR
698cb3f0 1655generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1656{
76d689a6 1657 struct obj_section *faddr_sect;
64a5b29c 1658
76d689a6
KB
1659 faddr_sect = find_pc_section (faddr);
1660 if (faddr_sect != NULL)
64a5b29c
KB
1661 {
1662 struct obj_section *osect;
1663
76d689a6 1664 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1665 {
1666 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1667 break;
1668 }
1669
76d689a6 1670 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1671 {
1672 CORE_ADDR addr;
1673
1674 addr = osect->addr;
1675 while (addr < osect->endaddr)
1676 {
1677 int status;
1678 LONGEST tag;
1679 char buf[8];
1680
1681 status = target_read_memory (addr, buf, sizeof (buf));
1682 if (status != 0)
1683 break;
1684 tag = extract_signed_integer (buf, sizeof (buf));
1685
1686 if (tag == DT_PLTGOT)
1687 {
1688 CORE_ADDR global_pointer;
1689
1690 status = target_read_memory (addr + 8, buf, sizeof (buf));
1691 if (status != 0)
1692 break;
1693 global_pointer = extract_address (buf, sizeof (buf));
1694
1695 /* The payoff... */
1696 return global_pointer;
1697 }
1698
1699 if (tag == DT_NULL)
1700 break;
1701
1702 addr += 16;
1703 }
1704 }
1705 }
1706 return 0;
1707}
1708
1709/* Given a function's address, attempt to find (and return) the
1710 corresponding (canonical) function descriptor. Return 0 if
1711 not found. */
1712static CORE_ADDR
1713find_extant_func_descr (CORE_ADDR faddr)
1714{
76d689a6 1715 struct obj_section *faddr_sect;
64a5b29c
KB
1716
1717 /* Return early if faddr is already a function descriptor */
76d689a6
KB
1718 faddr_sect = find_pc_section (faddr);
1719 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB
1720 return faddr;
1721
76d689a6 1722 if (faddr_sect != NULL)
64a5b29c 1723 {
76d689a6
KB
1724 struct obj_section *osect;
1725 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1726 {
1727 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1728 break;
1729 }
1730
76d689a6 1731 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1732 {
1733 CORE_ADDR addr;
1734
1735 addr = osect->addr;
1736 while (addr < osect->endaddr)
1737 {
1738 int status;
1739 LONGEST faddr2;
1740 char buf[8];
1741
1742 status = target_read_memory (addr, buf, sizeof (buf));
1743 if (status != 0)
1744 break;
1745 faddr2 = extract_signed_integer (buf, sizeof (buf));
1746
1747 if (faddr == faddr2)
1748 return addr;
1749
1750 addr += 16;
1751 }
1752 }
1753 }
1754 return 0;
1755}
1756
1757/* Attempt to find a function descriptor corresponding to the
1758 given address. If none is found, construct one on the
1759 stack using the address at fdaptr */
1760
1761static CORE_ADDR
1762find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1763{
1764 CORE_ADDR fdesc;
1765
1766 fdesc = find_extant_func_descr (faddr);
1767
1768 if (fdesc == 0)
1769 {
1770 CORE_ADDR global_pointer;
1771 char buf[16];
1772
1773 fdesc = *fdaptr;
1774 *fdaptr += 16;
1775
698cb3f0 1776 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB
1777
1778 if (global_pointer == 0)
1779 global_pointer = read_register (IA64_GR1_REGNUM);
1780
1781 store_address (buf, 8, faddr);
1782 store_address (buf + 8, 8, global_pointer);
1783
1784 write_memory (fdesc, buf, 16);
1785 }
1786
1787 return fdesc;
1788}
16461d7d
KB
1789
1790CORE_ADDR
ea7c478f 1791ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB
1792 int struct_return, CORE_ADDR struct_addr)
1793{
1794 int argno;
ea7c478f 1795 struct value *arg;
16461d7d
KB
1796 struct type *type;
1797 int len, argoffset;
64a5b29c 1798 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1799 int floatreg;
64a5b29c 1800 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB
1801
1802 nslots = 0;
64a5b29c 1803 nfuncargs = 0;
16461d7d
KB
1804 /* Count the number of slots needed for the arguments */
1805 for (argno = 0; argno < nargs; argno++)
1806 {
1807 arg = args[argno];
1808 type = check_typedef (VALUE_TYPE (arg));
1809 len = TYPE_LENGTH (type);
1810
98f96ba1 1811 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB
1812 nslots++;
1813
64a5b29c
KB
1814 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1815 nfuncargs++;
1816
16461d7d
KB
1817 nslots += (len + 7) / 8;
1818 }
1819
64a5b29c 1820 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB
1821 rseslots = (nslots > 8) ? 8 : nslots;
1822 memslots = nslots - rseslots;
1823
64a5b29c 1824 /* Allocate a new RSE frame */
16461d7d
KB
1825 cfm = read_register (IA64_CFM_REGNUM);
1826
1827 bsp = read_register (IA64_BSP_REGNUM);
1828 bsp = rse_address_add (bsp, cfm & 0x7f);
1829 new_bsp = rse_address_add (bsp, rseslots);
1830 write_register (IA64_BSP_REGNUM, new_bsp);
1831
1832 pfs = read_register (IA64_PFS_REGNUM);
1833 pfs &= 0xc000000000000000LL;
1834 pfs |= (cfm & 0xffffffffffffLL);
1835 write_register (IA64_PFS_REGNUM, pfs);
1836
1837 cfm &= 0xc000000000000000LL;
1838 cfm |= rseslots;
1839 write_register (IA64_CFM_REGNUM, cfm);
1840
64a5b29c
KB
1841 /* We will attempt to find function descriptors in the .opd segment,
1842 but if we can't we'll construct them ourselves. That being the
1843 case, we'll need to reserve space on the stack for them. */
1844 funcdescaddr = sp - nfuncargs * 16;
1845 funcdescaddr &= ~0xfLL;
1846
1847 /* Adjust the stack pointer to it's new value. The calling conventions
1848 require us to have 16 bytes of scratch, plus whatever space is
1849 necessary for the memory slots and our function descriptors */
1850 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB
1851 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1852
64a5b29c
KB
1853 /* Place the arguments where they belong. The arguments will be
1854 either placed in the RSE backing store or on the memory stack.
1855 In addition, floating point arguments or HFAs are placed in
1856 floating point registers. */
16461d7d
KB
1857 slotnum = 0;
1858 floatreg = IA64_FR8_REGNUM;
1859 for (argno = 0; argno < nargs; argno++)
1860 {
64a5b29c
KB
1861 struct type *float_elt_type;
1862
16461d7d
KB
1863 arg = args[argno];
1864 type = check_typedef (VALUE_TYPE (arg));
1865 len = TYPE_LENGTH (type);
64a5b29c
KB
1866
1867 /* Special handling for function parameters */
1868 if (len == 8
1869 && TYPE_CODE (type) == TYPE_CODE_PTR
1870 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1871 {
1872 char val_buf[8];
1873
1874 store_address (val_buf, 8,
1875 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1876 &funcdescaddr));
1877 if (slotnum < rseslots)
1878 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1879 else
1880 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1881 slotnum++;
1882 continue;
1883 }
1884
1885 /* Normal slots */
98f96ba1
KB
1886
1887 /* Skip odd slot if necessary... */
1888 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1889 slotnum++;
98f96ba1 1890
16461d7d
KB
1891 argoffset = 0;
1892 while (len > 0)
1893 {
1894 char val_buf[8];
1895
1896 memset (val_buf, 0, 8);
1897 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1898
1899 if (slotnum < rseslots)
1900 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1901 else
1902 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1903
1904 argoffset += 8;
1905 len -= 8;
1906 slotnum++;
1907 }
64a5b29c
KB
1908
1909 /* Handle floating point types (including HFAs) */
1910 float_elt_type = is_float_or_hfa_type (type);
1911 if (float_elt_type != NULL)
1912 {
1913 argoffset = 0;
1914 len = TYPE_LENGTH (type);
1915 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1916 {
1917 ia64_register_convert_to_raw (
1918 float_elt_type,
1919 floatreg,
1920 VALUE_CONTENTS (arg) + argoffset,
524d7c18 1921 &deprecated_registers[REGISTER_BYTE (floatreg)]);
64a5b29c
KB
1922 floatreg++;
1923 argoffset += TYPE_LENGTH (float_elt_type);
1924 len -= TYPE_LENGTH (float_elt_type);
1925 }
16461d7d
KB
1926 }
1927 }
1928
64a5b29c 1929 /* Store the struct return value in r8 if necessary. */
16461d7d
KB
1930 if (struct_return)
1931 {
524d7c18 1932 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
16461d7d
KB
1933 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1934 struct_addr);
1935 }
1936
64a5b29c 1937 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB
1938 target_store_registers (-1);
1939
1940 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1941 to be defined to call generic_save_dummy_frame_tos(). But at the
1942 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1943 I chose to put this call here instead of using the old mechanisms.
1944 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1945 line
1946
1947 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1948
1949 to ia64_gdbarch_init() and remove the line below. */
1950 generic_save_dummy_frame_tos (sp);
1951
1952 return sp;
1953}
1954
1955CORE_ADDR
1956ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1957{
698cb3f0 1958 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1959
64a5b29c
KB
1960 if (global_pointer != 0)
1961 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB
1962
1963 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1964 return sp;
1965}
1966
1967void
1968ia64_store_return_value (struct type *type, char *valbuf)
1969{
1970 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1971 {
1972 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
524d7c18 1973 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
16461d7d
KB
1974 target_store_registers (IA64_FR8_REGNUM);
1975 }
1976 else
73937e03
AC
1977 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1978 valbuf, TYPE_LENGTH (type));
16461d7d
KB
1979}
1980
1981void
1982ia64_pop_frame (void)
1983{
1984 generic_pop_current_frame (ia64_pop_frame_regular);
1985}
1986
1987static void
1988ia64_pop_frame_regular (struct frame_info *frame)
1989{
1990 int regno;
1991 CORE_ADDR bsp, cfm, pfs;
1992
1993 FRAME_INIT_SAVED_REGS (frame);
1994
1995 for (regno = 0; regno < ia64_num_regs; regno++)
1996 {
b2fb4676 1997 if (get_frame_saved_regs (frame)[regno]
16461d7d
KB
1998 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1999 && regno != pc_regnum
2000 && regno != sp_regnum
2001 && regno != IA64_PFS_REGNUM
2002 && regno != IA64_CFM_REGNUM
2003 && regno != IA64_BSP_REGNUM
2004 && regno != IA64_BSPSTORE_REGNUM)
2005 {
2006 write_register (regno,
b2fb4676 2007 read_memory_integer (get_frame_saved_regs (frame)[regno],
16461d7d
KB
2008 REGISTER_RAW_SIZE (regno)));
2009 }
2010 }
2011
2012 write_register (sp_regnum, FRAME_CHAIN (frame));
2013 write_pc (FRAME_SAVED_PC (frame));
2014
2015 cfm = read_register (IA64_CFM_REGNUM);
2016
b2fb4676 2017 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
16461d7d 2018 {
b2fb4676 2019 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
16461d7d
KB
2020 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2021 }
2022 else
2023 pfs = read_register (IA64_PFS_REGNUM);
2024
2025 /* Compute the new bsp by *adding* the difference between the
2026 size of the frame and the size of the locals (both wrt the
2027 frame that we're going back to). This seems kind of strange,
2028 especially since it seems like we ought to be subtracting the
ca557f44 2029 size of the locals... and we should; but the Linux kernel
16461d7d
KB
2030 wants bsp to be set at the end of all used registers. It's
2031 likely that this code will need to be revised to accomodate
2032 other operating systems. */
da50a4b7 2033 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
16461d7d
KB
2034 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2035 write_register (IA64_BSP_REGNUM, bsp);
2036
2037 /* FIXME: What becomes of the epilog count in the PFS? */
2038 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2039 write_register (IA64_CFM_REGNUM, cfm);
2040
2041 flush_cached_frames ();
2042}
2043
2044static void
2045ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2046 CORE_ADDR *targ_addr, int *targ_len)
2047{
2048 *targ_addr = memaddr;
2049 *targ_len = nr_bytes;
2050}
2051
244bc108
KB
2052static void
2053process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2054{
2055 int *os_ident_ptr = obj;
2056 const char *name;
2057 unsigned int sectsize;
2058
2059 name = bfd_get_section_name (abfd, sect);
2060 sectsize = bfd_section_size (abfd, sect);
2061 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2062 {
2063 unsigned int name_length, data_length, note_type;
2064 char *note = alloca (sectsize);
2065
2066 bfd_get_section_contents (abfd, sect, note,
2067 (file_ptr) 0, (bfd_size_type) sectsize);
2068
2069 name_length = bfd_h_get_32 (abfd, note);
2070 data_length = bfd_h_get_32 (abfd, note + 4);
2071 note_type = bfd_h_get_32 (abfd, note + 8);
2072
2073 if (name_length == 4 && data_length == 16 && note_type == 1
2074 && strcmp (note + 12, "GNU") == 0)
2075 {
2076 int os_number = bfd_h_get_32 (abfd, note + 16);
2077
2078 /* The case numbers are from abi-tags in glibc */
2079 switch (os_number)
2080 {
2081 case 0 :
2082 *os_ident_ptr = ELFOSABI_LINUX;
2083 break;
244bc108
KB
2084 case 1 :
2085 *os_ident_ptr = ELFOSABI_HURD;
2086 break;
2087 case 2 :
2088 *os_ident_ptr = ELFOSABI_SOLARIS;
2089 break;
244bc108 2090 default :
8e65ff28
AC
2091 internal_error (__FILE__, __LINE__,
2092 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB
2093 break;
2094 }
2095 }
2096 }
2097}
2098
16461d7d
KB
2099static struct gdbarch *
2100ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2101{
2102 struct gdbarch *gdbarch;
244bc108
KB
2103 struct gdbarch_tdep *tdep;
2104 int os_ident;
2105
2106 if (info.abfd != NULL
2107 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2108 {
2109 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2110
ca557f44
AC
2111 /* If os_ident is 0, it is not necessarily the case that we're
2112 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2113 GNU/Linux uses a note section to record OS/ABI info, but
2114 leaves e_ident[EI_OSABI] zero. So we have to check for note
2115 sections too. */
244bc108
KB
2116 if (os_ident == 0)
2117 {
2118 bfd_map_over_sections (info.abfd,
2119 process_note_abi_tag_sections,
2120 &os_ident);
2121 }
2122 }
2123 else
2124 os_ident = -1;
16461d7d 2125
244bc108
KB
2126 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2127 arches != NULL;
2128 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2129 {
57bc8964
KB
2130 tdep = gdbarch_tdep (arches->gdbarch);
2131 if (tdep &&tdep->os_ident == os_ident)
2132 return arches->gdbarch;
244bc108 2133 }
16461d7d 2134
244bc108
KB
2135 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2136 gdbarch = gdbarch_alloc (&info, tdep);
2137 tdep->os_ident = os_ident;
2138
a5afb99f
AC
2139 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2140 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2141 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
d7fa2ae2
KB
2142
2143 /* Set the method of obtaining the sigcontext addresses at which
2144 registers are saved. The method of checking to see if
2145 native_find_global_pointer is nonzero to indicate that we're
2146 on AIX is kind of hokey, but I can't think of a better way
2147 to do it. */
244bc108
KB
2148 if (os_ident == ELFOSABI_LINUX)
2149 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB
2150 else if (native_find_global_pointer != 0)
2151 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB
2152 else
2153 tdep->sigcontext_register_address = 0;
16461d7d 2154
ca557f44
AC
2155 /* We know that GNU/Linux won't have to resort to the
2156 native_find_global_pointer hackery. But that's the only one we
2157 know about so far, so if native_find_global_pointer is set to
2158 something non-zero, then use it. Otherwise fall back to using
2159 generic_elf_find_global_pointer. This arrangement should (in
2160 theory) allow us to cross debug GNU/Linux binaries from an AIX
2161 machine. */
698cb3f0
KB
2162 if (os_ident == ELFOSABI_LINUX)
2163 tdep->find_global_pointer = generic_elf_find_global_pointer;
2164 else if (native_find_global_pointer != 0)
2165 tdep->find_global_pointer = native_find_global_pointer;
2166 else
2167 tdep->find_global_pointer = generic_elf_find_global_pointer;
2168
16461d7d
KB
2169 set_gdbarch_short_bit (gdbarch, 16);
2170 set_gdbarch_int_bit (gdbarch, 32);
2171 set_gdbarch_long_bit (gdbarch, 64);
2172 set_gdbarch_long_long_bit (gdbarch, 64);
2173 set_gdbarch_float_bit (gdbarch, 32);
2174 set_gdbarch_double_bit (gdbarch, 64);
2175 set_gdbarch_long_double_bit (gdbarch, 64);
2176 set_gdbarch_ptr_bit (gdbarch, 64);
2177
2178 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2179 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2180 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2181 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2182 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB
2183
2184 set_gdbarch_register_name (gdbarch, ia64_register_name);
2185 set_gdbarch_register_size (gdbarch, 8);
2186 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2187 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2188 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2189 set_gdbarch_max_register_raw_size (gdbarch, 16);
2190 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2191 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2192 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2193
2194 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2195
2196 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2197 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2198
2199 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2200
2201 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
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2202 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2203
2204 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2205 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2206
2207 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2208 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2209 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2210
2211 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
26e9b323 2212 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
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2213
2214 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
ebba8386 2215 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
26e9b323 2216 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
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2217
2218 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2219 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2220 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2221 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2222 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2223
2224 /* Settings for calling functions in the inferior. */
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2225 set_gdbarch_call_dummy_length (gdbarch, 0);
2226 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2227 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2228 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2229
2230 set_gdbarch_call_dummy_p (gdbarch, 1);
2231 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2232 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2233 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2234 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2235 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2236 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2237
2238 /* We won't necessarily have a frame pointer and even if we do,
2239 it winds up being extraordinarly messy when attempting to find
2240 the frame chain. So for the purposes of creating frames (which
2241 is all read_fp() is used for), simply use the stack pointer value
2242 instead. */
2243 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
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2244
2245 /* Settings that should be unnecessary. */
2246 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2247
2248 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2249 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2250
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2251 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2252 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2253 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
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2254 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2255 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2256 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2257
2258 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2259 set_gdbarch_function_start_offset (gdbarch, 0);
4156bb53 2260 set_gdbarch_frame_args_skip (gdbarch, 0);
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2261
2262 set_gdbarch_remote_translate_xfer_address (
2263 gdbarch, ia64_remote_translate_xfer_address);
2264
2265 return gdbarch;
2266}
2267
2268void
2269_initialize_ia64_tdep (void)
2270{
2271 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2272
2273 tm_print_insn = print_insn_ia64;
2274 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2275}
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