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2000-12-17 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d
KB		 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2 Copyright 1999, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d
KB		 27#include "floatformat.h"
28
29#include "objfiles.h"
30#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 31#include "elf-bfd.h"
16461d7d 32
698cb3f0
KB		 33/* Hook for determining the global pointer when calling functions in
34 the inferior under AIX. The initialization code in ia64-aix-nat.c
35 sets this hook to the address of a function which will find the
36 global pointer for a given address.
37
38 The generic code which uses the dynamic section in the inferior for
39 finding the global pointer is not of much use on AIX since the
40 values obtained from the inferior have not been relocated. */
41
42CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
43
44/* An enumeration of the different IA-64 instruction types. */
45
16461d7d
KB		 46typedef enum instruction_type
47{
48 A, /* Integer ALU ; I-unit or M-unit */
49 I, /* Non-ALU integer; I-unit */
50 M, /* Memory ; M-unit */
51 F, /* Floating-point ; F-unit */
52 B, /* Branch ; B-unit */
53 L, /* Extended (L+X) ; I-unit */
54 X, /* Extended (L+X) ; I-unit */
55 undefined /* undefined or reserved */
56} instruction_type;
57
58/* We represent IA-64 PC addresses as the value of the instruction
59 pointer or'd with some bit combination in the low nibble which
60 represents the slot number in the bundle addressed by the
61 instruction pointer. The problem is that the Linux kernel
62 multiplies its slot numbers (for exceptions) by one while the
63 disassembler multiplies its slot numbers by 6. In addition, I've
64 heard it said that the simulator uses 1 as the multiplier.
65
66 I've fixed the disassembler so that the bytes_per_line field will
67 be the slot multiplier. If bytes_per_line comes in as zero, it
68 is set to six (which is how it was set up initially). -- objdump
69 displays pretty disassembly dumps with this value. For our purposes,
70 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
71 never want to also display the raw bytes the way objdump does. */
72
73#define SLOT_MULTIPLIER 1
74
75/* Length in bytes of an instruction bundle */
76
77#define BUNDLE_LEN 16
78
79extern void _initialize_ia64_tdep (void);
80
244bc108
KB		 81extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
82
16461d7d
KB		 83static gdbarch_init_ftype ia64_gdbarch_init;
84
85static gdbarch_register_name_ftype ia64_register_name;
86static gdbarch_register_raw_size_ftype ia64_register_raw_size;
87static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
88static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
89static gdbarch_register_byte_ftype ia64_register_byte;
90static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
91static gdbarch_frame_chain_ftype ia64_frame_chain;
92static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
93static gdbarch_skip_prologue_ftype ia64_skip_prologue;
94static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
95static gdbarch_get_saved_register_ftype ia64_get_saved_register;
96static gdbarch_extract_return_value_ftype ia64_extract_return_value;
97static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
98static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
99static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
100static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
101static gdbarch_store_return_value_ftype ia64_store_return_value;
102static gdbarch_store_struct_return_ftype ia64_store_struct_return;
103static gdbarch_push_arguments_ftype ia64_push_arguments;
104static gdbarch_push_return_address_ftype ia64_push_return_address;
105static gdbarch_pop_frame_ftype ia64_pop_frame;
106static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 107static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 108static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 109
110static int ia64_num_regs = 590;
111
112static int pc_regnum = IA64_IP_REGNUM;
113static int sp_regnum = IA64_GR12_REGNUM;
114static int fp_regnum = IA64_VFP_REGNUM;
115static int lr_regnum = IA64_VRAP_REGNUM;
116
117static LONGEST ia64_call_dummy_words[] = {0};
118
119/* Array of register names; There should be ia64_num_regs strings in
120 the initializer. */
121
122static char *ia64_register_names[] =
123{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
124 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
125 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
126 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
127 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
128 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
129 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
130 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
131 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
132 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
133 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
134 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
135 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
136 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
137 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
138 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
139
140 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
141 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
142 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
143 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
144 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
145 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
146 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
147 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
148 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
149 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
150 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
151 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
152 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
153 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
154 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
155 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
156
157 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
158 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
159 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
160 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
161 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
162 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
163 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
164 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
165
166 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
167
168 "vfp", "vrap",
169
170 "pr", "ip", "psr", "cfm",
171
172 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
173 "", "", "", "", "", "", "", "",
174 "rsc", "bsp", "bspstore", "rnat",
175 "", "fcr", "", "",
176 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
177 "ccv", "", "", "", "unat", "", "", "",
178 "fpsr", "", "", "", "itc",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "",
181 "pfs", "lc", "ec",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "",
189 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
190 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
191 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
192 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
193 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
194 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
195 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
196 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
197 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
198 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
199 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
200 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
201 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
202 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
203 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
204 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
205};
206
207struct frame_extra_info
244bc108
KB		 208 {
209 CORE_ADDR bsp; /* points at r32 for the current frame */
210 CORE_ADDR cfm; /* cfm value for current frame */
211 int sof; /* Size of frame (decoded from cfm value) */
212 int sol; /* Size of locals (decoded from cfm value) */
213 CORE_ADDR after_prologue;
214 /* Address of first instruction after the last
16461d7d
KB		 215 prologue instruction; Note that there may
216 be instructions from the function's body
217 intermingled with the prologue. */
244bc108
KB		 218 int mem_stack_frame_size;
219 /* Size of the memory stack frame (may be zero),
16461d7d 220 or -1 if it has not been determined yet. */
244bc108
KB		 221 int fp_reg; /* Register number (if any) used a frame pointer
222 for this frame. 0 if no register is being used
16461d7d 223 as the frame pointer. */
244bc108
KB		 224 };
225
226struct gdbarch_tdep
227 {
228 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 229 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
KB		 230 etc. */
231 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
232 /* OS specific function which, given a frame address
233 and register number, returns the offset to the
234 given register from the start of the frame. */
698cb3f0 235 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
KB		 236 };
237
698cb3f0
KB		 238#define SIGCONTEXT_REGISTER_ADDRESS \
239 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
240#define FIND_GLOBAL_POINTER \
241 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d
KB		 242
243static char *
244ia64_register_name (int reg)
245{
246 return ia64_register_names[reg];
247}
248
249int
250ia64_register_raw_size (int reg)
251{
252 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
253}
254
255int
256ia64_register_virtual_size (int reg)
257{
258 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
259}
260
261/* Return true iff register N's virtual format is different from
262 its raw format. */
263int
264ia64_register_convertible (int nr)
265{
266 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
267}
268
269const struct floatformat floatformat_ia64_ext =
270{
271 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
272 floatformat_intbit_yes
273};
274
275void
276ia64_register_convert_to_virtual (int regnum, struct type *type,
277 char *from, char *to)
278{
279 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
280 {
281 DOUBLEST val;
282 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
283 store_floating(to, TYPE_LENGTH(type), val);
284 }
285 else
286 error("ia64_register_convert_to_virtual called with non floating point register number");
287}
288
289void
290ia64_register_convert_to_raw (struct type *type, int regnum,
291 char *from, char *to)
292{
293 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
294 {
295 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
296 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
297 }
298 else
299 error("ia64_register_convert_to_raw called with non floating point register number");
300}
301
302struct type *
303ia64_register_virtual_type (int reg)
304{
305 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
306 return builtin_type_long_double;
307 else
308 return builtin_type_long;
309}
310
311int
312ia64_register_byte (int reg)
313{
314 return (8 * reg) +
315 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
316}
317
244bc108
KB		 318/* Read the given register from a sigcontext structure in the
319 specified frame. */
320
321static CORE_ADDR
322read_sigcontext_register (struct frame_info *frame, int regnum)
323{
324 CORE_ADDR regaddr;
325
326 if (frame == NULL)
327 internal_error ("read_sigcontext_register: NULL frame");
328 if (!frame->signal_handler_caller)
329 internal_error (
330 "read_sigcontext_register: frame not a signal_handler_caller");
331 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
332 internal_error (
333 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
334
335 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
336 if (regaddr)
337 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
338 else
339 internal_error (
340 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
341}
342
16461d7d
KB		 343/* Extract ``len'' bits from an instruction bundle starting at
344 bit ``from''. */
345
244bc108 346static long long
16461d7d
KB		 347extract_bit_field (char *bundle, int from, int len)
348{
349 long long result = 0LL;
350 int to = from + len;
351 int from_byte = from / 8;
352 int to_byte = to / 8;
353 unsigned char *b = (unsigned char *) bundle;
354 unsigned char c;
355 int lshift;
356 int i;
357
358 c = b[from_byte];
359 if (from_byte == to_byte)
360 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
361 result = c >> (from % 8);
362 lshift = 8 - (from % 8);
363
364 for (i = from_byte+1; i < to_byte; i++)
365 {
366 result |= ((long long) b[i]) << lshift;
367 lshift += 8;
368 }
369
370 if (from_byte < to_byte && (to % 8 != 0))
371 {
372 c = b[to_byte];
373 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
374 result |= ((long long) c) << lshift;
375 }
376
377 return result;
378}
379
380/* Replace the specified bits in an instruction bundle */
381
244bc108 382static void
16461d7d
KB		 383replace_bit_field (char *bundle, long long val, int from, int len)
384{
385 int to = from + len;
386 int from_byte = from / 8;
387 int to_byte = to / 8;
388 unsigned char *b = (unsigned char *) bundle;
389 unsigned char c;
390
391 if (from_byte == to_byte)
392 {
393 unsigned char left, right;
394 c = b[from_byte];
395 left = (c >> (to % 8)) << (to % 8);
396 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
397 c = (unsigned char) (val & 0xff);
398 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
399 c |= right | left;
400 b[from_byte] = c;
401 }
402 else
403 {
404 int i;
405 c = b[from_byte];
406 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
407 c = c | (val << (from % 8));
408 b[from_byte] = c;
409 val >>= 8 - from % 8;
410
411 for (i = from_byte+1; i < to_byte; i++)
412 {
413 c = val & 0xff;
414 val >>= 8;
415 b[i] = c;
416 }
417
418 if (to % 8 != 0)
419 {
420 unsigned char cv = (unsigned char) val;
421 c = b[to_byte];
422 c = c >> (to % 8) << (to % 8);
423 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
424 b[to_byte] = c;
425 }
426 }
427}
428
429/* Return the contents of slot N (for N = 0, 1, or 2) in
430 and instruction bundle */
431
244bc108 432static long long
16461d7d
KB		 433slotN_contents (unsigned char *bundle, int slotnum)
434{
435 return extract_bit_field (bundle, 5+41*slotnum, 41);
436}
437
438/* Store an instruction in an instruction bundle */
439
244bc108 440static void
16461d7d
KB		 441replace_slotN_contents (unsigned char *bundle, long long instr, int slotnum)
442{
443 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
444}
445
64a5b29c 446static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 447{
448 { M, I, I }, /* 00 */
449 { M, I, I }, /* 01 */
450 { M, I, I }, /* 02 */
451 { M, I, I }, /* 03 */
452 { M, L, X }, /* 04 */
453 { M, L, X }, /* 05 */
454 { undefined, undefined, undefined }, /* 06 */
455 { undefined, undefined, undefined }, /* 07 */
456 { M, M, I }, /* 08 */
457 { M, M, I }, /* 09 */
458 { M, M, I }, /* 0A */
459 { M, M, I }, /* 0B */
460 { M, F, I }, /* 0C */
461 { M, F, I }, /* 0D */
462 { M, M, F }, /* 0E */
463 { M, M, F }, /* 0F */
464 { M, I, B }, /* 10 */
465 { M, I, B }, /* 11 */
466 { M, B, B }, /* 12 */
467 { M, B, B }, /* 13 */
468 { undefined, undefined, undefined }, /* 14 */
469 { undefined, undefined, undefined }, /* 15 */
470 { B, B, B }, /* 16 */
471 { B, B, B }, /* 17 */
472 { M, M, B }, /* 18 */
473 { M, M, B }, /* 19 */
474 { undefined, undefined, undefined }, /* 1A */
475 { undefined, undefined, undefined }, /* 1B */
476 { M, F, B }, /* 1C */
477 { M, F, B }, /* 1D */
478 { undefined, undefined, undefined }, /* 1E */
479 { undefined, undefined, undefined }, /* 1F */
480};
481
482/* Fetch and (partially) decode an instruction at ADDR and return the
483 address of the next instruction to fetch. */
484
485static CORE_ADDR
486fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
487{
488 char bundle[BUNDLE_LEN];
489 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
490 long long template;
491 int val;
492
493 if (slotnum > 2)
494 error("Can't fetch instructions for slot numbers greater than 2.");
495
496 addr &= ~0x0f;
497
498 val = target_read_memory (addr, bundle, BUNDLE_LEN);
499
500 if (val != 0)
501 return 0;
502
503 *instr = slotN_contents (bundle, slotnum);
504 template = extract_bit_field (bundle, 0, 5);
505 *it = template_encoding_table[(int)template][slotnum];
506
64a5b29c 507 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 508 addr += 16;
509 else
510 addr += (slotnum + 1) * SLOT_MULTIPLIER;
511
512 return addr;
513}
514
515/* There are 5 different break instructions (break.i, break.b,
516 break.m, break.f, and break.x), but they all have the same
517 encoding. (The five bit template in the low five bits of the
518 instruction bundle distinguishes one from another.)
519
520 The runtime architecture manual specifies that break instructions
521 used for debugging purposes must have the upper two bits of the 21
522 bit immediate set to a 0 and a 1 respectively. A breakpoint
523 instruction encodes the most significant bit of its 21 bit
524 immediate at bit 36 of the 41 bit instruction. The penultimate msb
525 is at bit 25 which leads to the pattern below.
526
527 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
528 it turns out that 0x80000 was used as the syscall break in the early
529 simulators. So I changed the pattern slightly to do "break.i 0x080001"
530 instead. But that didn't work either (I later found out that this
531 pattern was used by the simulator that I was using.) So I ended up
532 using the pattern seen below. */
533
534#if 0
535#define BREAKPOINT 0x00002000040LL
536#endif
537#define BREAKPOINT 0x00003333300LL
538
539static int
540ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
541{
542 char bundle[BUNDLE_LEN];
543 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
544 long long instr;
545 int val;
546
547 if (slotnum > 2)
548 error("Can't insert breakpoint for slot numbers greater than 2.");
549
550 addr &= ~0x0f;
551
552 val = target_read_memory (addr, bundle, BUNDLE_LEN);
553 instr = slotN_contents (bundle, slotnum);
554 memcpy(contents_cache, &instr, sizeof(instr));
555 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
556 if (val == 0)
557 target_write_memory (addr, bundle, BUNDLE_LEN);
558
559 return val;
560}
561
562static int
563ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
564{
565 char bundle[BUNDLE_LEN];
566 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
567 long long instr;
568 int val;
569
570 addr &= ~0x0f;
571
572 val = target_read_memory (addr, bundle, BUNDLE_LEN);
573 memcpy (&instr, contents_cache, sizeof instr);
574 replace_slotN_contents (bundle, instr, slotnum);
575 if (val == 0)
576 target_write_memory (addr, bundle, BUNDLE_LEN);
577
578 return val;
579}
580
581/* We don't really want to use this, but remote.c needs to call it in order
582 to figure out if Z-packets are supported or not. Oh, well. */
583unsigned char *
fba45db2 584ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 585{
586 static unsigned char breakpoint[] =
587 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
588 *lenptr = sizeof (breakpoint);
589#if 0
590 *pcptr &= ~0x0f;
591#endif
592 return breakpoint;
593}
594
595CORE_ADDR
596ia64_read_pc (int pid)
597{
598 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
599 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, pid);
600 int slot_num = (psr_value >> 41) & 3;
601
602 return pc_value | (slot_num * SLOT_MULTIPLIER);
603}
604
605void
606ia64_write_pc (CORE_ADDR new_pc, int pid)
607{
608 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
609 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
610 psr_value &= ~(3LL << 41);
611 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
612
613 new_pc &= ~0xfLL;
614
615 write_register_pid (IA64_PSR_REGNUM, psr_value, pid);
616 write_register_pid (IA64_IP_REGNUM, new_pc, pid);
617}
618
619#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
620
621/* Returns the address of the slot that's NSLOTS slots away from
622 the address ADDR. NSLOTS may be positive or negative. */
623static CORE_ADDR
624rse_address_add(CORE_ADDR addr, int nslots)
625{
626 CORE_ADDR new_addr;
627 int mandatory_nat_slots = nslots / 63;
628 int direction = nslots < 0 ? -1 : 1;
629
630 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
631
632 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
633 new_addr += 8 * direction;
634
635 if (IS_NaT_COLLECTION_ADDR(new_addr))
636 new_addr += 8 * direction;
637
638 return new_addr;
639}
640
641/* The IA-64 frame chain is a bit odd. We won't always have a frame
642 pointer, so we use the SP value as the FP for the purpose of
643 creating a frame. There is sometimes a register (not fixed) which
644 is used as a frame pointer. When this register exists, it is not
645 especially hard to determine which one is being used. It isn't
646 even really hard to compute the frame chain, but it can be
647 computationally expensive. So, instead of making life difficult
648 (and slow), we pick a more convenient representation of the frame
649 chain, knowing that we'll have to make some small adjustments
650 in other places. (E.g, note that read_fp() and write_fp() are
651 actually read_sp() and write_sp() below in ia64_gdbarch_init()
652 below.)
653
654 Okay, so what is the frame chain exactly? It'll be the SP value
655 at the time that the function in question was entered.
656
657 Note that this *should* actually the frame pointer for the current
658 function! But as I note above, if we were to attempt to find the
659 address of the beginning of the previous frame, we'd waste a lot
660 of cycles for no good reason. So instead, we simply choose to
661 represent the frame chain as the end of the previous frame instead
662 of the beginning. */
663
664CORE_ADDR
665ia64_frame_chain (struct frame_info *frame)
666{
244bc108
KB		 667 if (frame->signal_handler_caller)
668 return read_sigcontext_register (frame, sp_regnum);
669 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
670 return frame->frame;
16461d7d 671 else
244bc108
KB		 672 {
673 FRAME_INIT_SAVED_REGS (frame);
674 if (frame->saved_regs[IA64_VFP_REGNUM])
675 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
676 else
677 return frame->frame + frame->extra_info->mem_stack_frame_size;
678 }
16461d7d
KB		 679}
680
681CORE_ADDR
682ia64_frame_saved_pc (struct frame_info *frame)
683{
244bc108
KB		 684 if (frame->signal_handler_caller)
685 return read_sigcontext_register (frame, pc_regnum);
686 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
687 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
688 else
689 {
690 FRAME_INIT_SAVED_REGS (frame);
16461d7d 691
244bc108
KB		 692 if (frame->saved_regs[IA64_VRAP_REGNUM])
693 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
694 else if (frame->next && frame->next->signal_handler_caller)
695 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
696 else /* either frameless, or not far enough along in the prologue... */
697 return ia64_saved_pc_after_call (frame);
698 }
16461d7d
KB		 699}
700
701#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
702 || (8 <= (_regnum_) && (_regnum_) <= 11) \
703 || (14 <= (_regnum_) && (_regnum_) <= 31))
704#define imm9(_instr_) \
705 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
706 | (((_instr_) & 0x00008000000LL) >> 20) \
707 | (((_instr_) & 0x00000001fc0LL) >> 6))
708
709static CORE_ADDR
710examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
711{
712 CORE_ADDR next_pc;
713 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 714 instruction_type it;
715 long long instr;
716 int do_fsr_stuff = 0;
717
718 int cfm_reg = 0;
719 int ret_reg = 0;
720 int fp_reg = 0;
721 int unat_save_reg = 0;
722 int pr_save_reg = 0;
723 int mem_stack_frame_size = 0;
724 int spill_reg = 0;
725 CORE_ADDR spill_addr = 0;
0927a22b
KB		 726 char instores[8];
727 char infpstores[8];
728
729 memset (instores, 0, sizeof instores);
730 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 731
732 if (frame && !frame->saved_regs)
733 {
734 frame_saved_regs_zalloc (frame);
735 do_fsr_stuff = 1;
736 }
737
738 if (frame
739 && !do_fsr_stuff
740 && frame->extra_info->after_prologue != 0
741 && frame->extra_info->after_prologue <= lim_pc)
742 return frame->extra_info->after_prologue;
743
744 /* Must start with an alloc instruction */
745 next_pc = fetch_instruction (pc, &it, &instr);
746 if (pc < lim_pc && next_pc
747 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
748 {
749 /* alloc */
750 int sor = (int) ((instr & 0x00078000000LL) >> 27);
751 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
752 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
753 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
754 we could compare against the size given to us via the cfm as
755 either a sanity check or possibly to see if the frame has been
756 changed by a later alloc instruction... */
757 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
758 cfm_reg = rN;
759 last_prologue_pc = next_pc;
760 pc = next_pc;
761 }
762 else
763 pc = lim_pc; /* We're done early */
764
765 /* Loop, looking for prologue instructions, keeping track of
766 where preserved registers were spilled. */
767 while (pc < lim_pc)
768 {
769 next_pc = fetch_instruction (pc, &it, &instr);
770 if (next_pc == 0)
771 break;
772
0927a22b
KB		 773 if (it == B || ((instr & 0x3fLL) != 0LL))
774 {
775 /* Exit loop upon hitting a branch instruction or a predicated
776 instruction. */
777 break;
778 }
779 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 780 {
781 /* Move from BR */
782 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
783 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
784 int qp = (int) (instr & 0x0000000003f);
785
786 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
787 {
788 ret_reg = rN;
789 last_prologue_pc = next_pc;
790 }
791 }
792 else if ((it == I || it == M)
793 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
794 {
795 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
796 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
797 | ((instr & 0x001f8000000LL) >> 20)
798 | ((instr & 0x000000fe000LL) >> 13));
799 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
800 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
801 int qp = (int) (instr & 0x0000000003fLL);
802
803 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
804 {
805 /* mov rN, r12 */
806 fp_reg = rN;
807 last_prologue_pc = next_pc;
808 }
809 else if (qp == 0 && rN == 12 && rM == 12)
810 {
811 /* adds r12, -mem_stack_frame_size, r12 */
812 mem_stack_frame_size -= imm;
813 last_prologue_pc = next_pc;
814 }
815 else if (qp == 0 && rN == 2
816 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
817 {
818 /* adds r2, spilloffset, rFramePointer
819 or
820 adds r2, spilloffset, r12
821
822 Get ready for stf.spill or st8.spill instructions.
823 The address to start spilling at is loaded into r2.
824 FIXME: Why r2? That's what gcc currently uses; it
825 could well be different for other compilers. */
826
827 /* Hmm... whether or not this will work will depend on
828 where the pc is. If it's still early in the prologue
829 this'll be wrong. FIXME */
830 spill_addr = (frame ? frame->frame : 0)
831 + (rM == 12 ? 0 : mem_stack_frame_size)
832 + imm;
833 spill_reg = rN;
834 last_prologue_pc = next_pc;
835 }
836 }
837 else if (it == M
838 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
839 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
840 {
841 /* stf.spill [rN] = fM, imm9
842 or
843 stf.spill [rN] = fM */
844
845 int imm = imm9(instr);
846 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
847 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
848 int qp = (int) (instr & 0x0000000003fLL);
849 if (qp == 0 && rN == spill_reg && spill_addr != 0
850 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
851 {
852 if (do_fsr_stuff)
853 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
854
855 if ((instr & 0x1efc0000000) == 0x0eec0000000)
856 spill_addr += imm;
857 else
858 spill_addr = 0; /* last one; must be done */
859 last_prologue_pc = next_pc;
860 }
861 }
862 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
863 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
864 {
865 /* mov.m rN = arM
866 or
867 mov.i rN = arM */
868
869 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
870 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
871 int qp = (int) (instr & 0x0000000003fLL);
872 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
873 {
874 /* We have something like "mov.m r3 = ar.unat". Remember the
875 r3 (or whatever) and watch for a store of this register... */
876 unat_save_reg = rN;
877 last_prologue_pc = next_pc;
878 }
879 }
880 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
881 {
882 /* mov rN = pr */
883 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
884 int qp = (int) (instr & 0x0000000003fLL);
885 if (qp == 0 && isScratch (rN))
886 {
887 pr_save_reg = rN;
888 last_prologue_pc = next_pc;
889 }
890 }
891 else if (it == M
892 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
893 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
894 {
895 /* st8 [rN] = rM
896 or
897 st8 [rN] = rM, imm9 */
898 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
899 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
900 int qp = (int) (instr & 0x0000000003fLL);
901 if (qp == 0 && rN == spill_reg && spill_addr != 0
902 && (rM == unat_save_reg || rM == pr_save_reg))
903 {
904 /* We've found a spill of either the UNAT register or the PR
905 register. (Well, not exactly; what we've actually found is
906 a spill of the register that UNAT or PR was moved to).
907 Record that fact and move on... */
908 if (rM == unat_save_reg)
909 {
910 /* Track UNAT register */
911 if (do_fsr_stuff)
912 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
913 unat_save_reg = 0;
914 }
915 else
916 {
917 /* Track PR register */
918 if (do_fsr_stuff)
919 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
920 pr_save_reg = 0;
921 }
922 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
923 /* st8 [rN] = rM, imm9 */
924 spill_addr += imm9(instr);
925 else
926 spill_addr = 0; /* must be done spilling */
927 last_prologue_pc = next_pc;
928 }
0927a22b
KB		 929 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
930 {
931 /* Allow up to one store of each input register. */
932 instores[rM-32] = 1;
933 last_prologue_pc = next_pc;
934 }
935 }
936 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
937 {
938 /* One of
939 st1 [rN] = rM
940 st2 [rN] = rM
941 st4 [rN] = rM
942 st8 [rN] = rM
943 Note that the st8 case is handled in the clause above.
944
945 Advance over stores of input registers. One store per input
946 register is permitted. */
947 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
948 int qp = (int) (instr & 0x0000000003fLL);
949 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
950 {
951 instores[rM-32] = 1;
952 last_prologue_pc = next_pc;
953 }
954 }
955 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
956 {
957 /* Either
958 stfs [rN] = fM
959 or
960 stfd [rN] = fM
961
962 Advance over stores of floating point input registers. Again
963 one store per register is permitted */
964 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
965 int qp = (int) (instr & 0x0000000003fLL);
966 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
967 {
968 infpstores[fM-8] = 1;
969 last_prologue_pc = next_pc;
970 }
16461d7d
KB		 971 }
972 else if (it == M
973 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
974 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
975 {
976 /* st8.spill [rN] = rM
977 or
978 st8.spill [rN] = rM, imm9 */
979 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
980 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
981 int qp = (int) (instr & 0x0000000003fLL);
982 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
983 {
984 /* We've found a spill of one of the preserved general purpose
985 regs. Record the spill address and advance the spill
986 register if appropriate. */
987 if (do_fsr_stuff)
988 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
989 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
990 /* st8.spill [rN] = rM, imm9 */
991 spill_addr += imm9(instr);
992 else
993 spill_addr = 0; /* Done spilling */
994 last_prologue_pc = next_pc;
995 }
996 }
16461d7d
KB		 997
998 pc = next_pc;
999 }
1000
1001 if (do_fsr_stuff) {
1002 int i;
1003 CORE_ADDR addr;
3a854e23
KB		 1004 int sor, rrb_gr;
1005
1006 /* Extract the size of the rotating portion of the stack
1007 frame and the register rename base from the current
1008 frame marker. */
1009 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1010 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
16461d7d
KB		 1011
1012 for (i = 0, addr = frame->extra_info->bsp;
1013 i < frame->extra_info->sof;
1014 i++, addr += 8)
1015 {
1016 if (IS_NaT_COLLECTION_ADDR (addr))
1017 {
1018 addr += 8;
1019 }
3a854e23
KB		 1020 if (i < sor)
1021 frame->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1022 = addr;
1023 else
1024 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB		 1025
1026 if (i+32 == cfm_reg)
1027 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1028 if (i+32 == ret_reg)
1029 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1030 if (i+32 == fp_reg)
1031 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1032 }
1033 }
1034
1035 if (frame && frame->extra_info) {
1036 frame->extra_info->after_prologue = last_prologue_pc;
1037 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1038 frame->extra_info->fp_reg = fp_reg;
1039 }
1040
1041 return last_prologue_pc;
1042}
1043
1044CORE_ADDR
1045ia64_skip_prologue (CORE_ADDR pc)
1046{
1047 return examine_prologue (pc, pc+1024, 0);
1048}
1049
1050void
1051ia64_frame_init_saved_regs (struct frame_info *frame)
1052{
16461d7d
KB		 1053 if (frame->saved_regs)
1054 return;
1055
244bc108
KB		 1056 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1057 {
1058 int regno;
16461d7d 1059
244bc108 1060 frame_saved_regs_zalloc (frame);
16461d7d 1061
244bc108
KB		 1062 frame->saved_regs[IA64_VRAP_REGNUM] =
1063 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1064 frame->saved_regs[IA64_CFM_REGNUM] =
1065 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1066 frame->saved_regs[IA64_PSR_REGNUM] =
1067 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1068#if 0
1069 frame->saved_regs[IA64_BSP_REGNUM] =
1070 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1071#endif
1072 frame->saved_regs[IA64_RNAT_REGNUM] =
1073 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1074 frame->saved_regs[IA64_CCV_REGNUM] =
1075 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1076 frame->saved_regs[IA64_UNAT_REGNUM] =
1077 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1078 frame->saved_regs[IA64_FPSR_REGNUM] =
1079 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1080 frame->saved_regs[IA64_PFS_REGNUM] =
1081 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1082 frame->saved_regs[IA64_LC_REGNUM] =
1083 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1084 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1085 if (regno != sp_regnum)
1086 frame->saved_regs[regno] =
1087 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1088 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1089 frame->saved_regs[regno] =
1090 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1091 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1092 frame->saved_regs[regno] =
1093 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1094 }
1095 else
1096 {
244bc108 1097 CORE_ADDR func_start;
16461d7d 1098
244bc108
KB		 1099 func_start = get_pc_function_start (frame->pc);
1100 examine_prologue (func_start, frame->pc, frame);
1101 }
16461d7d
KB		 1102}
1103
1104void
1105ia64_get_saved_register (char *raw_buffer,
1106 int *optimized,
1107 CORE_ADDR *addrp,
1108 struct frame_info *frame,
1109 int regnum,
1110 enum lval_type *lval)
1111{
244bc108 1112 int is_dummy_frame;
16461d7d
KB		 1113
1114 if (!target_has_registers)
1115 error ("No registers.");
1116
1117 if (optimized != NULL)
1118 *optimized = 0;
244bc108
KB		 1119
1120 if (addrp != NULL)
1121 *addrp = 0;
1122
1123 if (lval != NULL)
1124 *lval = not_lval;
1125
1126 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1127
1128 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1129 {
1130 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1131 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1132 }
1133 else if (regnum == IA64_BSP_REGNUM)
1134 {
16461d7d
KB		 1135 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1136 frame->extra_info->bsp);
1137 }
1138 else if (regnum == IA64_VFP_REGNUM)
1139 {
1140 /* If the function in question uses an automatic register (r32-r127)
1141 for the frame pointer, it'll be found by ia64_find_saved_register()
1142 above. If the function lacks one of these frame pointers, we can
1143 still provide a value since we know the size of the frame */
1144 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1145 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1146 }
1147 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1148 {
1149 char pr_raw_buffer[MAX_REGISTER_RAW_SIZE];
1150 int pr_optim;
1151 enum lval_type pr_lval;
1152 CORE_ADDR pr_addr;
1153 int prN_val;
1154 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1155 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB		 1156 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1157 {
1158 /* Fetch predicate register rename base from current frame
1159 marker for this frame. */
1160 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1161
1162 /* Adjust the register number to account for register rotation. */
1163 regnum = IA64_PR16_REGNUM
1164 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1165 }
16461d7d
KB		 1166 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1167 regnum - IA64_PR0_REGNUM, 1);
1168 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1169 }
1170 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1171 {
1172 char unat_raw_buffer[MAX_REGISTER_RAW_SIZE];
1173 int unat_optim;
1174 enum lval_type unat_lval;
1175 CORE_ADDR unat_addr;
1176 int unatN_val;
1177 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1178 frame, IA64_UNAT_REGNUM, &unat_lval);
1179 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1180 regnum - IA64_NAT0_REGNUM, 1);
1181 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1182 unatN_val);
16461d7d
KB		 1183 }
1184 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1185 {
1186 int natval = 0;
1187 /* Find address of general register corresponding to nat bit we're
1188 interested in. */
244bc108
KB		 1189 CORE_ADDR gr_addr = 0;
1190
1191 if (!is_dummy_frame)
1192 {
1193 FRAME_INIT_SAVED_REGS (frame);
1194 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1195 + IA64_GR0_REGNUM];
1196 }
16461d7d
KB		 1197 if (gr_addr)
1198 {
1199 /* Compute address of nat collection bits */
1200 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1201 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1202 CORE_ADDR nat_collection;
1203 int nat_bit;
1204 /* If our nat collection address is bigger than bsp, we have to get
1205 the nat collection from rnat. Otherwise, we fetch the nat
1206 collection from the computed address. */
1207 if (nat_addr >= bsp)
1208 nat_collection = read_register (IA64_RNAT_REGNUM);
1209 else
1210 nat_collection = read_memory_integer (nat_addr, 8);
1211 nat_bit = (gr_addr >> 3) & 0x3f;
1212 natval = (nat_collection >> nat_bit) & 1;
1213 }
1214 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1215 }
1216 else if (regnum == IA64_IP_REGNUM)
1217 {
1218 CORE_ADDR pc;
1219 if (frame->next)
1220 {
1221 /* FIXME: Set *addrp, *lval when possible. */
1222 pc = ia64_frame_saved_pc (frame->next);
1223 }
1224 else
1225 {
1226 pc = read_pc ();
1227 }
1228 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1229 }
1230 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1231 {
1232 CORE_ADDR addr = 0;
1233 if (!is_dummy_frame)
1234 {
1235 FRAME_INIT_SAVED_REGS (frame);
1236 addr = frame->saved_regs[regnum];
1237 }
1238
1239 if (addr != 0)
1240 {
1241 if (lval != NULL)
1242 *lval = lval_memory;
1243 if (addrp != NULL)
1244 *addrp = addr;
1245 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1246 }
1247 else
1248 {
1249 /* r32 - r127 must be fetchable via memory. If they aren't,
1250 then the register is unavailable */
1251 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1252 }
16461d7d
KB		 1253 }
1254 else
1255 {
3a854e23
KB		 1256 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1257 {
1258 /* Fetch floating point register rename base from current
1259 frame marker for this frame. */
1260 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1261
1262 /* Adjust the floating point register number to account for
1263 register rotation. */
1264 regnum = IA64_FR32_REGNUM
1265 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1266 }
1267
244bc108
KB		 1268 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1269 regnum, lval);
16461d7d 1270 }
16461d7d
KB		 1271}
1272
1273/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1274 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1275 and TYPE is the type (which is known to be struct, union or array). */
1276int
1277ia64_use_struct_convention (int gcc_p, struct type *type)
1278{
64a5b29c
KB		 1279 struct type *float_elt_type;
1280
1281 /* HFAs are structures (or arrays) consisting entirely of floating
1282 point values of the same length. Up to 8 of these are returned
1283 in registers. Don't use the struct convention when this is the
1284 case. */
1285 float_elt_type = is_float_or_hfa_type (type);
1286 if (float_elt_type != NULL
1287 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1288 return 0;
1289
1290 /* Other structs of length 32 or less are returned in r8-r11.
1291 Don't use the struct convention for those either. */
16461d7d
KB		 1292 return TYPE_LENGTH (type) > 32;
1293}
1294
1295void
1296ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1297{
64a5b29c
KB		 1298 struct type *float_elt_type;
1299
1300 float_elt_type = is_float_or_hfa_type (type);
1301 if (float_elt_type != NULL)
1302 {
1303 int offset = 0;
1304 int regnum = IA64_FR8_REGNUM;
1305 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1306
1307 while (n-- > 0)
1308 {
1309 ia64_register_convert_to_virtual (regnum, float_elt_type,
1310 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1311 offset += TYPE_LENGTH (float_elt_type);
1312 regnum++;
1313 }
1314 }
16461d7d 1315 else
64a5b29c
KB		 1316 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1317 TYPE_LENGTH (type));
16461d7d
KB		 1318}
1319
1320/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1321 like this is necessary though since the IA-64 calling conventions specify
1322 that r8 is not preserved. */
1323static CORE_ADDR struct_return_address;
1324
1325CORE_ADDR
1326ia64_extract_struct_value_address (char *regbuf)
1327{
1328 /* FIXME: See above. */
1329 return struct_return_address;
1330}
1331
1332void
1333ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1334{
1335 /* FIXME: See above. */
1336 /* Note that most of the work was done in ia64_push_arguments() */
1337 struct_return_address = addr;
1338}
1339
1340int
1341ia64_frameless_function_invocation (struct frame_info *frame)
1342{
1343 /* FIXME: Implement */
1344 return 0;
1345}
1346
1347CORE_ADDR
1348ia64_saved_pc_after_call (struct frame_info *frame)
1349{
1350 return read_register (IA64_BR0_REGNUM);
1351}
1352
1353CORE_ADDR
1354ia64_frame_args_address (struct frame_info *frame)
1355{
1356 /* frame->frame points at the SP for this frame; But we want the start
1357 of the frame, not the end. Calling frame chain will get his for us. */
1358 return ia64_frame_chain (frame);
1359}
1360
1361CORE_ADDR
1362ia64_frame_locals_address (struct frame_info *frame)
1363{
1364 /* frame->frame points at the SP for this frame; But we want the start
1365 of the frame, not the end. Calling frame chain will get his for us. */
1366 return ia64_frame_chain (frame);
1367}
1368
1369void
1370ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1371{
1372 CORE_ADDR bsp, cfm;
244bc108
KB		 1373 int next_frame_is_call_dummy = ((frame->next != NULL)
1374 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1375 frame->next->frame));
16461d7d
KB		 1376
1377 frame->extra_info = (struct frame_extra_info *)
1378 frame_obstack_alloc (sizeof (struct frame_extra_info));
1379
1380 if (frame->next == 0)
1381 {
1382 bsp = read_register (IA64_BSP_REGNUM);
1383 cfm = read_register (IA64_CFM_REGNUM);
1384
1385 }
244bc108
KB		 1386 else if (frame->next->signal_handler_caller)
1387 {
1388 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1389 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1390 }
1391 else if (next_frame_is_call_dummy)
1392 {
1393 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1394 IA64_BSP_REGNUM);
1395 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1396 IA64_CFM_REGNUM);
1397 }
16461d7d
KB		 1398 else
1399 {
1400 struct frame_info *frn = frame->next;
16461d7d
KB		 1401
1402 FRAME_INIT_SAVED_REGS (frn);
1403
1404 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1405 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1406 else if (frn->next && frn->next->signal_handler_caller)
1407 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1408 else if (frn->next
1409 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1410 frn->next->frame))
1411 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1412 IA64_PFS_REGNUM);
16461d7d 1413 else
76d689a6 1414 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1415
1416 bsp = frn->extra_info->bsp;
1417 }
1418 frame->extra_info->cfm = cfm;
1419 frame->extra_info->sof = cfm & 0x7f;
1420 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1421 if (frame->next == 0
1422 || frame->next->signal_handler_caller
1423 || next_frame_is_call_dummy)
16461d7d
KB		 1424 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1425 else
1426 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1427
1428 frame->extra_info->after_prologue = 0;
1429 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1430 frame->extra_info->fp_reg = 0;
1431}
1432
64a5b29c
KB		 1433static int
1434is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1435{
1436 switch (TYPE_CODE (t))
1437 {
1438 case TYPE_CODE_FLT:
1439 if (*etp)
1440 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1441 else
1442 {
1443 *etp = t;
1444 return 1;
1445 }
1446 break;
1447 case TYPE_CODE_ARRAY:
1448 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t), etp);
1449 break;
1450 case TYPE_CODE_STRUCT:
1451 {
1452 int i;
1453
1454 for (i = 0; i < TYPE_NFIELDS (t); i++)
1455 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t, i), etp))
1456 return 0;
1457 return 1;
1458 }
1459 break;
1460 default:
1461 return 0;
1462 break;
1463 }
1464}
1465
1466/* Determine if the given type is one of the floating point types or
1467 and HFA (which is a struct, array, or combination thereof whose
1468 bottom-most elements are all of the same floating point type.) */
1469
1470static struct type *
1471is_float_or_hfa_type (struct type *t)
1472{
1473 struct type *et = 0;
1474
1475 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1476}
1477
1478
1479/* Attempt to find (and return) the global pointer for the given
1480 function.
1481
1482 This is a rather nasty bit of code searchs for the .dynamic section
1483 in the objfile corresponding to the pc of the function we're trying
1484 to call. Once it finds the addresses at which the .dynamic section
1485 lives in the child process, it scans the Elf64_Dyn entries for a
1486 DT_PLTGOT tag. If it finds one of these, the corresponding
1487 d_un.d_ptr value is the global pointer. */
1488
1489static CORE_ADDR
698cb3f0 1490generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1491{
76d689a6 1492 struct obj_section *faddr_sect;
64a5b29c 1493
76d689a6
KB		 1494 faddr_sect = find_pc_section (faddr);
1495 if (faddr_sect != NULL)
64a5b29c
KB		 1496 {
1497 struct obj_section *osect;
1498
76d689a6 1499 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1500 {
1501 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1502 break;
1503 }
1504
76d689a6 1505 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1506 {
1507 CORE_ADDR addr;
1508
1509 addr = osect->addr;
1510 while (addr < osect->endaddr)
1511 {
1512 int status;
1513 LONGEST tag;
1514 char buf[8];
1515
1516 status = target_read_memory (addr, buf, sizeof (buf));
1517 if (status != 0)
1518 break;
1519 tag = extract_signed_integer (buf, sizeof (buf));
1520
1521 if (tag == DT_PLTGOT)
1522 {
1523 CORE_ADDR global_pointer;
1524
1525 status = target_read_memory (addr + 8, buf, sizeof (buf));
1526 if (status != 0)
1527 break;
1528 global_pointer = extract_address (buf, sizeof (buf));
1529
1530 /* The payoff... */
1531 return global_pointer;
1532 }
1533
1534 if (tag == DT_NULL)
1535 break;
1536
1537 addr += 16;
1538 }
1539 }
1540 }
1541 return 0;
1542}
1543
1544/* Given a function's address, attempt to find (and return) the
1545 corresponding (canonical) function descriptor. Return 0 if
1546 not found. */
1547static CORE_ADDR
1548find_extant_func_descr (CORE_ADDR faddr)
1549{
76d689a6 1550 struct obj_section *faddr_sect;
64a5b29c
KB		 1551
1552 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1553 faddr_sect = find_pc_section (faddr);
1554 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1555 return faddr;
1556
76d689a6 1557 if (faddr_sect != NULL)
64a5b29c 1558 {
76d689a6
KB		 1559 struct obj_section *osect;
1560 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1561 {
1562 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1563 break;
1564 }
1565
76d689a6 1566 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1567 {
1568 CORE_ADDR addr;
1569
1570 addr = osect->addr;
1571 while (addr < osect->endaddr)
1572 {
1573 int status;
1574 LONGEST faddr2;
1575 char buf[8];
1576
1577 status = target_read_memory (addr, buf, sizeof (buf));
1578 if (status != 0)
1579 break;
1580 faddr2 = extract_signed_integer (buf, sizeof (buf));
1581
1582 if (faddr == faddr2)
1583 return addr;
1584
1585 addr += 16;
1586 }
1587 }
1588 }
1589 return 0;
1590}
1591
1592/* Attempt to find a function descriptor corresponding to the
1593 given address. If none is found, construct one on the
1594 stack using the address at fdaptr */
1595
1596static CORE_ADDR
1597find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1598{
1599 CORE_ADDR fdesc;
1600
1601 fdesc = find_extant_func_descr (faddr);
1602
1603 if (fdesc == 0)
1604 {
1605 CORE_ADDR global_pointer;
1606 char buf[16];
1607
1608 fdesc = *fdaptr;
1609 *fdaptr += 16;
1610
698cb3f0 1611 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB		 1612
1613 if (global_pointer == 0)
1614 global_pointer = read_register (IA64_GR1_REGNUM);
1615
1616 store_address (buf, 8, faddr);
1617 store_address (buf + 8, 8, global_pointer);
1618
1619 write_memory (fdesc, buf, 16);
1620 }
1621
1622 return fdesc;
1623}
16461d7d
KB		 1624
1625CORE_ADDR
1626ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1627 int struct_return, CORE_ADDR struct_addr)
1628{
1629 int argno;
1630 value_ptr arg;
1631 struct type *type;
1632 int len, argoffset;
64a5b29c 1633 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1634 int floatreg;
64a5b29c 1635 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1636
1637 nslots = 0;
64a5b29c 1638 nfuncargs = 0;
16461d7d
KB		 1639 /* Count the number of slots needed for the arguments */
1640 for (argno = 0; argno < nargs; argno++)
1641 {
1642 arg = args[argno];
1643 type = check_typedef (VALUE_TYPE (arg));
1644 len = TYPE_LENGTH (type);
1645
1646 /* FIXME: This is crude and it is wrong (IMO), but it matches
1647 what gcc does, I think. */
1648 if (len > 8 && (nslots & 1))
1649 nslots++;
1650
64a5b29c
KB		 1651 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1652 nfuncargs++;
1653
16461d7d
KB		 1654 nslots += (len + 7) / 8;
1655 }
1656
64a5b29c 1657 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1658 rseslots = (nslots > 8) ? 8 : nslots;
1659 memslots = nslots - rseslots;
1660
64a5b29c 1661 /* Allocate a new RSE frame */
16461d7d
KB		 1662 cfm = read_register (IA64_CFM_REGNUM);
1663
1664 bsp = read_register (IA64_BSP_REGNUM);
1665 bsp = rse_address_add (bsp, cfm & 0x7f);
1666 new_bsp = rse_address_add (bsp, rseslots);
1667 write_register (IA64_BSP_REGNUM, new_bsp);
1668
1669 pfs = read_register (IA64_PFS_REGNUM);
1670 pfs &= 0xc000000000000000LL;
1671 pfs |= (cfm & 0xffffffffffffLL);
1672 write_register (IA64_PFS_REGNUM, pfs);
1673
1674 cfm &= 0xc000000000000000LL;
1675 cfm |= rseslots;
1676 write_register (IA64_CFM_REGNUM, cfm);
1677
64a5b29c
KB		 1678 /* We will attempt to find function descriptors in the .opd segment,
1679 but if we can't we'll construct them ourselves. That being the
1680 case, we'll need to reserve space on the stack for them. */
1681 funcdescaddr = sp - nfuncargs * 16;
1682 funcdescaddr &= ~0xfLL;
1683
1684 /* Adjust the stack pointer to it's new value. The calling conventions
1685 require us to have 16 bytes of scratch, plus whatever space is
1686 necessary for the memory slots and our function descriptors */
1687 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1688 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1689
64a5b29c
KB		 1690 /* Place the arguments where they belong. The arguments will be
1691 either placed in the RSE backing store or on the memory stack.
1692 In addition, floating point arguments or HFAs are placed in
1693 floating point registers. */
16461d7d
KB		 1694 slotnum = 0;
1695 floatreg = IA64_FR8_REGNUM;
1696 for (argno = 0; argno < nargs; argno++)
1697 {
64a5b29c
KB		 1698 struct type *float_elt_type;
1699
16461d7d
KB		 1700 arg = args[argno];
1701 type = check_typedef (VALUE_TYPE (arg));
1702 len = TYPE_LENGTH (type);
64a5b29c
KB		 1703
1704 /* Special handling for function parameters */
1705 if (len == 8
1706 && TYPE_CODE (type) == TYPE_CODE_PTR
1707 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1708 {
1709 char val_buf[8];
1710
1711 store_address (val_buf, 8,
1712 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1713 &funcdescaddr));
1714 if (slotnum < rseslots)
1715 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1716 else
1717 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1718 slotnum++;
1719 continue;
1720 }
1721
1722 /* Normal slots */
16461d7d
KB		 1723 if (len > 8 && (slotnum & 1))
1724 slotnum++;
1725 argoffset = 0;
1726 while (len > 0)
1727 {
1728 char val_buf[8];
1729
1730 memset (val_buf, 0, 8);
1731 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1732
1733 if (slotnum < rseslots)
1734 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1735 else
1736 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1737
1738 argoffset += 8;
1739 len -= 8;
1740 slotnum++;
1741 }
64a5b29c
KB		 1742
1743 /* Handle floating point types (including HFAs) */
1744 float_elt_type = is_float_or_hfa_type (type);
1745 if (float_elt_type != NULL)
1746 {
1747 argoffset = 0;
1748 len = TYPE_LENGTH (type);
1749 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1750 {
1751 ia64_register_convert_to_raw (
1752 float_elt_type,
1753 floatreg,
1754 VALUE_CONTENTS (arg) + argoffset,
1755 &registers[REGISTER_BYTE (floatreg)]);
1756 floatreg++;
1757 argoffset += TYPE_LENGTH (float_elt_type);
1758 len -= TYPE_LENGTH (float_elt_type);
1759 }
16461d7d
KB		 1760 }
1761 }
1762
64a5b29c 1763 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1764 if (struct_return)
1765 {
1766 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1767 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1768 struct_addr);
1769 }
1770
64a5b29c 1771 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1772 target_store_registers (-1);
1773
1774 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1775 to be defined to call generic_save_dummy_frame_tos(). But at the
1776 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1777 I chose to put this call here instead of using the old mechanisms.
1778 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1779 line
1780
1781 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1782
1783 to ia64_gdbarch_init() and remove the line below. */
1784 generic_save_dummy_frame_tos (sp);
1785
1786 return sp;
1787}
1788
1789CORE_ADDR
1790ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1791{
698cb3f0 1792 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1793
64a5b29c
KB		 1794 if (global_pointer != 0)
1795 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1796
1797 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1798 return sp;
1799}
1800
1801void
1802ia64_store_return_value (struct type *type, char *valbuf)
1803{
1804 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1805 {
1806 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1807 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1808 target_store_registers (IA64_FR8_REGNUM);
1809 }
1810 else
1811 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1812 valbuf, TYPE_LENGTH (type));
1813}
1814
1815void
1816ia64_pop_frame (void)
1817{
1818 generic_pop_current_frame (ia64_pop_frame_regular);
1819}
1820
1821static void
1822ia64_pop_frame_regular (struct frame_info *frame)
1823{
1824 int regno;
1825 CORE_ADDR bsp, cfm, pfs;
1826
1827 FRAME_INIT_SAVED_REGS (frame);
1828
1829 for (regno = 0; regno < ia64_num_regs; regno++)
1830 {
1831 if (frame->saved_regs[regno]
1832 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1833 && regno != pc_regnum
1834 && regno != sp_regnum
1835 && regno != IA64_PFS_REGNUM
1836 && regno != IA64_CFM_REGNUM
1837 && regno != IA64_BSP_REGNUM
1838 && regno != IA64_BSPSTORE_REGNUM)
1839 {
1840 write_register (regno,
1841 read_memory_integer (frame->saved_regs[regno],
1842 REGISTER_RAW_SIZE (regno)));
1843 }
1844 }
1845
1846 write_register (sp_regnum, FRAME_CHAIN (frame));
1847 write_pc (FRAME_SAVED_PC (frame));
1848
1849 cfm = read_register (IA64_CFM_REGNUM);
1850
1851 if (frame->saved_regs[IA64_PFS_REGNUM])
1852 {
1853 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1854 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1855 }
1856 else
1857 pfs = read_register (IA64_PFS_REGNUM);
1858
1859 /* Compute the new bsp by *adding* the difference between the
1860 size of the frame and the size of the locals (both wrt the
1861 frame that we're going back to). This seems kind of strange,
1862 especially since it seems like we ought to be subtracting the
1863 size of the locals... and we should; but the linux kernel
1864 wants bsp to be set at the end of all used registers. It's
1865 likely that this code will need to be revised to accomodate
1866 other operating systems. */
1867 bsp = rse_address_add (frame->extra_info->bsp,
1868 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1869 write_register (IA64_BSP_REGNUM, bsp);
1870
1871 /* FIXME: What becomes of the epilog count in the PFS? */
1872 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1873 write_register (IA64_CFM_REGNUM, cfm);
1874
1875 flush_cached_frames ();
1876}
1877
1878static void
1879ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1880 CORE_ADDR *targ_addr, int *targ_len)
1881{
1882 *targ_addr = memaddr;
1883 *targ_len = nr_bytes;
1884}
1885
244bc108
KB		 1886static void
1887process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1888{
1889 int *os_ident_ptr = obj;
1890 const char *name;
1891 unsigned int sectsize;
1892
1893 name = bfd_get_section_name (abfd, sect);
1894 sectsize = bfd_section_size (abfd, sect);
1895 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1896 {
1897 unsigned int name_length, data_length, note_type;
1898 char *note = alloca (sectsize);
1899
1900 bfd_get_section_contents (abfd, sect, note,
1901 (file_ptr) 0, (bfd_size_type) sectsize);
1902
1903 name_length = bfd_h_get_32 (abfd, note);
1904 data_length = bfd_h_get_32 (abfd, note + 4);
1905 note_type = bfd_h_get_32 (abfd, note + 8);
1906
1907 if (name_length == 4 && data_length == 16 && note_type == 1
1908 && strcmp (note + 12, "GNU") == 0)
1909 {
1910 int os_number = bfd_h_get_32 (abfd, note + 16);
1911
1912 /* The case numbers are from abi-tags in glibc */
1913 switch (os_number)
1914 {
1915 case 0 :
1916 *os_ident_ptr = ELFOSABI_LINUX;
1917 break;
244bc108
KB		 1918 case 1 :
1919 *os_ident_ptr = ELFOSABI_HURD;
1920 break;
1921 case 2 :
1922 *os_ident_ptr = ELFOSABI_SOLARIS;
1923 break;
244bc108
KB		 1924 default :
1925 internal_error (
1926 "process_note_abi_sections: unknown OS number %d", os_number);
1927 break;
1928 }
1929 }
1930 }
1931}
1932
16461d7d
KB		 1933static struct gdbarch *
1934ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1935{
1936 struct gdbarch *gdbarch;
244bc108
KB		 1937 struct gdbarch_tdep *tdep;
1938 int os_ident;
1939
1940 if (info.abfd != NULL
1941 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1942 {
1943 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
1944
1945 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 1946 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 1947 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1948 zero. So we have to check for note sections too. */
1949 if (os_ident == 0)
1950 {
1951 bfd_map_over_sections (info.abfd,
1952 process_note_abi_tag_sections,
1953 &os_ident);
1954 }
1955 }
1956 else
1957 os_ident = -1;
16461d7d 1958
244bc108
KB		 1959 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1960 arches != NULL;
1961 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1962 {
1963 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
1964 continue;
1965 return arches->gdbarch;
1966 }
16461d7d 1967
244bc108
KB		 1968 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1969 gdbarch = gdbarch_alloc (&info, tdep);
1970 tdep->os_ident = os_ident;
1971
1972 if (os_ident == ELFOSABI_LINUX)
1973 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
1974 else
1975 tdep->sigcontext_register_address = 0;
16461d7d 1976
698cb3f0
KB		 1977 /* We know that Linux won't have to resort to the native_find_global_pointer
1978 hackery. But that's the only one we know about so far, so if
1979 native_find_global_pointer is set to something non-zero, then use
1980 it. Otherwise fall back to using generic_elf_find_global_pointer.
1981 This arrangement should (in theory) allow us to cross debug Linux
1982 binaries from an AIX machine. */
1983 if (os_ident == ELFOSABI_LINUX)
1984 tdep->find_global_pointer = generic_elf_find_global_pointer;
1985 else if (native_find_global_pointer != 0)
1986 tdep->find_global_pointer = native_find_global_pointer;
1987 else
1988 tdep->find_global_pointer = generic_elf_find_global_pointer;
1989
16461d7d
KB		 1990 set_gdbarch_short_bit (gdbarch, 16);
1991 set_gdbarch_int_bit (gdbarch, 32);
1992 set_gdbarch_long_bit (gdbarch, 64);
1993 set_gdbarch_long_long_bit (gdbarch, 64);
1994 set_gdbarch_float_bit (gdbarch, 32);
1995 set_gdbarch_double_bit (gdbarch, 64);
1996 set_gdbarch_long_double_bit (gdbarch, 64);
1997 set_gdbarch_ptr_bit (gdbarch, 64);
1998
1999 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2000 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2001 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2002 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2003 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB		 2004
2005 set_gdbarch_register_name (gdbarch, ia64_register_name);
2006 set_gdbarch_register_size (gdbarch, 8);
2007 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2008 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2009 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2010 set_gdbarch_max_register_raw_size (gdbarch, 16);
2011 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2012 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2013 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2014
2015 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2016
2017 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2018 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2019
2020 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2021
2022 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 2023 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 2024 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2025
2026 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2027 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2028
2029 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2030 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2031 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2032
2033 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2034 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
2035
2036 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2037 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
2038 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2039
2040 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2041 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2042 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2043 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2044 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2045
2046 /* Settings for calling functions in the inferior. */
2047 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2048 set_gdbarch_call_dummy_length (gdbarch, 0);
2049 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2050 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2051 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2052
2053 set_gdbarch_call_dummy_p (gdbarch, 1);
2054 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2055 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2056 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2057 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2058 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2059 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2060
2061 /* We won't necessarily have a frame pointer and even if we do,
2062 it winds up being extraordinarly messy when attempting to find
2063 the frame chain. So for the purposes of creating frames (which
2064 is all read_fp() is used for), simply use the stack pointer value
2065 instead. */
2066 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2067 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2068
2069 /* Settings that should be unnecessary. */
2070 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2071
2072 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2073 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2074
2075 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2076 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2077 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2078 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2079 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2080 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2081 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2082 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2083
2084 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2085 set_gdbarch_function_start_offset (gdbarch, 0);
2086
2087 set_gdbarch_remote_translate_xfer_address (
2088 gdbarch, ia64_remote_translate_xfer_address);
2089
2090 return gdbarch;
2091}
2092
2093void
2094_initialize_ia64_tdep (void)
2095{
2096 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2097
2098 tm_print_insn = print_insn_ia64;
2099 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2100}
GDB Binutils - Deliverables
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