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* elf64-alpha.c (elf64_alpha_relocate_section): Duplicate memory
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
8e65ff28 2 Copyright 1999, 2000, 2001
16461d7d
KB		 3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
16461d7d
KB		 30
31#include "objfiles.h"
32#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 33#include "elf-bfd.h"
16461d7d 34
698cb3f0
KB		 35/* Hook for determining the global pointer when calling functions in
36 the inferior under AIX. The initialization code in ia64-aix-nat.c
37 sets this hook to the address of a function which will find the
38 global pointer for a given address.
39
40 The generic code which uses the dynamic section in the inferior for
41 finding the global pointer is not of much use on AIX since the
42 values obtained from the inferior have not been relocated. */
43
44CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
45
46/* An enumeration of the different IA-64 instruction types. */
47
16461d7d
KB		 48typedef enum instruction_type
49{
50 A, /* Integer ALU ; I-unit or M-unit */
51 I, /* Non-ALU integer; I-unit */
52 M, /* Memory ; M-unit */
53 F, /* Floating-point ; F-unit */
54 B, /* Branch ; B-unit */
55 L, /* Extended (L+X) ; I-unit */
56 X, /* Extended (L+X) ; I-unit */
57 undefined /* undefined or reserved */
58} instruction_type;
59
60/* We represent IA-64 PC addresses as the value of the instruction
61 pointer or'd with some bit combination in the low nibble which
62 represents the slot number in the bundle addressed by the
63 instruction pointer. The problem is that the Linux kernel
64 multiplies its slot numbers (for exceptions) by one while the
65 disassembler multiplies its slot numbers by 6. In addition, I've
66 heard it said that the simulator uses 1 as the multiplier.
67
68 I've fixed the disassembler so that the bytes_per_line field will
69 be the slot multiplier. If bytes_per_line comes in as zero, it
70 is set to six (which is how it was set up initially). -- objdump
71 displays pretty disassembly dumps with this value. For our purposes,
72 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
73 never want to also display the raw bytes the way objdump does. */
74
75#define SLOT_MULTIPLIER 1
76
77/* Length in bytes of an instruction bundle */
78
79#define BUNDLE_LEN 16
80
d7fa2ae2 81/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 82extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 83extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 84
16461d7d
KB		 85static gdbarch_init_ftype ia64_gdbarch_init;
86
87static gdbarch_register_name_ftype ia64_register_name;
88static gdbarch_register_raw_size_ftype ia64_register_raw_size;
89static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
90static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
91static gdbarch_register_byte_ftype ia64_register_byte;
92static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
93static gdbarch_frame_chain_ftype ia64_frame_chain;
94static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
95static gdbarch_skip_prologue_ftype ia64_skip_prologue;
96static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
97static gdbarch_get_saved_register_ftype ia64_get_saved_register;
98static gdbarch_extract_return_value_ftype ia64_extract_return_value;
99static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
100static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
101static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
102static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
103static gdbarch_store_return_value_ftype ia64_store_return_value;
104static gdbarch_store_struct_return_ftype ia64_store_struct_return;
105static gdbarch_push_arguments_ftype ia64_push_arguments;
106static gdbarch_push_return_address_ftype ia64_push_return_address;
107static gdbarch_pop_frame_ftype ia64_pop_frame;
108static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 109static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 110static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 111
112static int ia64_num_regs = 590;
113
114static int pc_regnum = IA64_IP_REGNUM;
115static int sp_regnum = IA64_GR12_REGNUM;
116static int fp_regnum = IA64_VFP_REGNUM;
117static int lr_regnum = IA64_VRAP_REGNUM;
118
119static LONGEST ia64_call_dummy_words[] = {0};
120
121/* Array of register names; There should be ia64_num_regs strings in
122 the initializer. */
123
124static char *ia64_register_names[] =
125{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
126 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
127 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
128 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
129 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
130 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
131 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
132 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
133 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
134 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
135 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
136 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
137 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
138 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
139 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
140 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
141
142 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
143 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
144 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
145 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
146 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
147 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
148 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
149 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
150 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
151 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
152 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
153 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
154 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
155 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
156 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
157 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
158
159 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
160 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
161 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
162 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
163 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
164 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
165 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
166 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
167
168 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
169
170 "vfp", "vrap",
171
172 "pr", "ip", "psr", "cfm",
173
174 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
175 "", "", "", "", "", "", "", "",
176 "rsc", "bsp", "bspstore", "rnat",
177 "", "fcr", "", "",
178 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
179 "ccv", "", "", "", "unat", "", "", "",
180 "fpsr", "", "", "", "itc",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "",
183 "pfs", "lc", "ec",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "", "", "",
190 "",
191 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
192 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
193 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
194 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
195 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
196 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
197 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
198 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
199 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
200 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
201 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
202 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
203 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
204 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
205 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
206 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
207};
208
209struct frame_extra_info
244bc108
KB		 210 {
211 CORE_ADDR bsp; /* points at r32 for the current frame */
212 CORE_ADDR cfm; /* cfm value for current frame */
213 int sof; /* Size of frame (decoded from cfm value) */
214 int sol; /* Size of locals (decoded from cfm value) */
215 CORE_ADDR after_prologue;
216 /* Address of first instruction after the last
16461d7d
KB		 217 prologue instruction; Note that there may
218 be instructions from the function's body
219 intermingled with the prologue. */
244bc108
KB		 220 int mem_stack_frame_size;
221 /* Size of the memory stack frame (may be zero),
16461d7d 222 or -1 if it has not been determined yet. */
244bc108
KB		 223 int fp_reg; /* Register number (if any) used a frame pointer
224 for this frame. 0 if no register is being used
16461d7d 225 as the frame pointer. */
244bc108
KB		 226 };
227
228struct gdbarch_tdep
229 {
230 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 231 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
KB		 232 etc. */
233 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
234 /* OS specific function which, given a frame address
235 and register number, returns the offset to the
236 given register from the start of the frame. */
698cb3f0 237 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
KB		 238 };
239
698cb3f0
KB		 240#define SIGCONTEXT_REGISTER_ADDRESS \
241 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
242#define FIND_GLOBAL_POINTER \
243 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d
KB		 244
245static char *
246ia64_register_name (int reg)
247{
248 return ia64_register_names[reg];
249}
250
251int
252ia64_register_raw_size (int reg)
253{
254 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
255}
256
257int
258ia64_register_virtual_size (int reg)
259{
260 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
261}
262
263/* Return true iff register N's virtual format is different from
264 its raw format. */
265int
266ia64_register_convertible (int nr)
267{
268 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
269}
270
271const struct floatformat floatformat_ia64_ext =
272{
273 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
274 floatformat_intbit_yes
275};
276
277void
278ia64_register_convert_to_virtual (int regnum, struct type *type,
279 char *from, char *to)
280{
281 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
282 {
283 DOUBLEST val;
284 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
285 store_floating(to, TYPE_LENGTH(type), val);
286 }
287 else
288 error("ia64_register_convert_to_virtual called with non floating point register number");
289}
290
291void
292ia64_register_convert_to_raw (struct type *type, int regnum,
293 char *from, char *to)
294{
295 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
296 {
297 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
298 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
299 }
300 else
301 error("ia64_register_convert_to_raw called with non floating point register number");
302}
303
304struct type *
305ia64_register_virtual_type (int reg)
306{
307 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
308 return builtin_type_long_double;
309 else
310 return builtin_type_long;
311}
312
313int
314ia64_register_byte (int reg)
315{
316 return (8 * reg) +
317 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
318}
319
244bc108
KB		 320/* Read the given register from a sigcontext structure in the
321 specified frame. */
322
323static CORE_ADDR
324read_sigcontext_register (struct frame_info *frame, int regnum)
325{
326 CORE_ADDR regaddr;
327
328 if (frame == NULL)
8e65ff28
AC		 329 internal_error (__FILE__, __LINE__,
330 "read_sigcontext_register: NULL frame");
244bc108 331 if (!frame->signal_handler_caller)
8e65ff28
AC		 332 internal_error (__FILE__, __LINE__,
333 "read_sigcontext_register: frame not a signal_handler_caller");
244bc108 334 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC		 335 internal_error (__FILE__, __LINE__,
336 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108
KB		 337
338 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
339 if (regaddr)
340 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
341 else
8e65ff28
AC		 342 internal_error (__FILE__, __LINE__,
343 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
KB		 344}
345
16461d7d
KB		 346/* Extract ``len'' bits from an instruction bundle starting at
347 bit ``from''. */
348
244bc108 349static long long
16461d7d
KB		 350extract_bit_field (char *bundle, int from, int len)
351{
352 long long result = 0LL;
353 int to = from + len;
354 int from_byte = from / 8;
355 int to_byte = to / 8;
356 unsigned char *b = (unsigned char *) bundle;
357 unsigned char c;
358 int lshift;
359 int i;
360
361 c = b[from_byte];
362 if (from_byte == to_byte)
363 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
364 result = c >> (from % 8);
365 lshift = 8 - (from % 8);
366
367 for (i = from_byte+1; i < to_byte; i++)
368 {
369 result |= ((long long) b[i]) << lshift;
370 lshift += 8;
371 }
372
373 if (from_byte < to_byte && (to % 8 != 0))
374 {
375 c = b[to_byte];
376 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
377 result |= ((long long) c) << lshift;
378 }
379
380 return result;
381}
382
383/* Replace the specified bits in an instruction bundle */
384
244bc108 385static void
16461d7d
KB		 386replace_bit_field (char *bundle, long long val, int from, int len)
387{
388 int to = from + len;
389 int from_byte = from / 8;
390 int to_byte = to / 8;
391 unsigned char *b = (unsigned char *) bundle;
392 unsigned char c;
393
394 if (from_byte == to_byte)
395 {
396 unsigned char left, right;
397 c = b[from_byte];
398 left = (c >> (to % 8)) << (to % 8);
399 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
400 c = (unsigned char) (val & 0xff);
401 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
402 c |= right | left;
403 b[from_byte] = c;
404 }
405 else
406 {
407 int i;
408 c = b[from_byte];
409 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
410 c = c | (val << (from % 8));
411 b[from_byte] = c;
412 val >>= 8 - from % 8;
413
414 for (i = from_byte+1; i < to_byte; i++)
415 {
416 c = val & 0xff;
417 val >>= 8;
418 b[i] = c;
419 }
420
421 if (to % 8 != 0)
422 {
423 unsigned char cv = (unsigned char) val;
424 c = b[to_byte];
425 c = c >> (to % 8) << (to % 8);
426 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
427 b[to_byte] = c;
428 }
429 }
430}
431
432/* Return the contents of slot N (for N = 0, 1, or 2) in
433 and instruction bundle */
434
244bc108 435static long long
2fc3ac7e 436slotN_contents (char *bundle, int slotnum)
16461d7d
KB		 437{
438 return extract_bit_field (bundle, 5+41*slotnum, 41);
439}
440
441/* Store an instruction in an instruction bundle */
442
244bc108 443static void
2fc3ac7e 444replace_slotN_contents (char *bundle, long long instr, int slotnum)
16461d7d
KB		 445{
446 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
447}
448
64a5b29c 449static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 450{
451 { M, I, I }, /* 00 */
452 { M, I, I }, /* 01 */
453 { M, I, I }, /* 02 */
454 { M, I, I }, /* 03 */
455 { M, L, X }, /* 04 */
456 { M, L, X }, /* 05 */
457 { undefined, undefined, undefined }, /* 06 */
458 { undefined, undefined, undefined }, /* 07 */
459 { M, M, I }, /* 08 */
460 { M, M, I }, /* 09 */
461 { M, M, I }, /* 0A */
462 { M, M, I }, /* 0B */
463 { M, F, I }, /* 0C */
464 { M, F, I }, /* 0D */
465 { M, M, F }, /* 0E */
466 { M, M, F }, /* 0F */
467 { M, I, B }, /* 10 */
468 { M, I, B }, /* 11 */
469 { M, B, B }, /* 12 */
470 { M, B, B }, /* 13 */
471 { undefined, undefined, undefined }, /* 14 */
472 { undefined, undefined, undefined }, /* 15 */
473 { B, B, B }, /* 16 */
474 { B, B, B }, /* 17 */
475 { M, M, B }, /* 18 */
476 { M, M, B }, /* 19 */
477 { undefined, undefined, undefined }, /* 1A */
478 { undefined, undefined, undefined }, /* 1B */
479 { M, F, B }, /* 1C */
480 { M, F, B }, /* 1D */
481 { undefined, undefined, undefined }, /* 1E */
482 { undefined, undefined, undefined }, /* 1F */
483};
484
485/* Fetch and (partially) decode an instruction at ADDR and return the
486 address of the next instruction to fetch. */
487
488static CORE_ADDR
489fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
490{
491 char bundle[BUNDLE_LEN];
492 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
493 long long template;
494 int val;
495
c26e1c2b
KB		 496 /* Warn about slot numbers greater than 2. We used to generate
497 an error here on the assumption that the user entered an invalid
498 address. But, sometimes GDB itself requests an invalid address.
499 This can (easily) happen when execution stops in a function for
500 which there are no symbols. The prologue scanner will attempt to
501 find the beginning of the function - if the nearest symbol
502 happens to not be aligned on a bundle boundary (16 bytes), the
503 resulting starting address will cause GDB to think that the slot
504 number is too large.
505
506 So we warn about it and set the slot number to zero. It is
507 not necessarily a fatal condition, particularly if debugging
508 at the assembly language level. */
16461d7d 509 if (slotnum > 2)
c26e1c2b
KB		 510 {
511 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
512 "Using slot 0 instead");
513 slotnum = 0;
514 }
16461d7d
KB		 515
516 addr &= ~0x0f;
517
518 val = target_read_memory (addr, bundle, BUNDLE_LEN);
519
520 if (val != 0)
521 return 0;
522
523 *instr = slotN_contents (bundle, slotnum);
524 template = extract_bit_field (bundle, 0, 5);
525 *it = template_encoding_table[(int)template][slotnum];
526
64a5b29c 527 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 528 addr += 16;
529 else
530 addr += (slotnum + 1) * SLOT_MULTIPLIER;
531
532 return addr;
533}
534
535/* There are 5 different break instructions (break.i, break.b,
536 break.m, break.f, and break.x), but they all have the same
537 encoding. (The five bit template in the low five bits of the
538 instruction bundle distinguishes one from another.)
539
540 The runtime architecture manual specifies that break instructions
541 used for debugging purposes must have the upper two bits of the 21
542 bit immediate set to a 0 and a 1 respectively. A breakpoint
543 instruction encodes the most significant bit of its 21 bit
544 immediate at bit 36 of the 41 bit instruction. The penultimate msb
545 is at bit 25 which leads to the pattern below.
546
547 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
548 it turns out that 0x80000 was used as the syscall break in the early
549 simulators. So I changed the pattern slightly to do "break.i 0x080001"
550 instead. But that didn't work either (I later found out that this
551 pattern was used by the simulator that I was using.) So I ended up
552 using the pattern seen below. */
553
554#if 0
555#define BREAKPOINT 0x00002000040LL
556#endif
557#define BREAKPOINT 0x00003333300LL
558
559static int
560ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
561{
562 char bundle[BUNDLE_LEN];
563 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
564 long long instr;
565 int val;
566
567 if (slotnum > 2)
568 error("Can't insert breakpoint for slot numbers greater than 2.");
569
570 addr &= ~0x0f;
571
572 val = target_read_memory (addr, bundle, BUNDLE_LEN);
573 instr = slotN_contents (bundle, slotnum);
574 memcpy(contents_cache, &instr, sizeof(instr));
575 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
576 if (val == 0)
577 target_write_memory (addr, bundle, BUNDLE_LEN);
578
579 return val;
580}
581
582static int
583ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
584{
585 char bundle[BUNDLE_LEN];
586 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
587 long long instr;
588 int val;
589
590 addr &= ~0x0f;
591
592 val = target_read_memory (addr, bundle, BUNDLE_LEN);
593 memcpy (&instr, contents_cache, sizeof instr);
594 replace_slotN_contents (bundle, instr, slotnum);
595 if (val == 0)
596 target_write_memory (addr, bundle, BUNDLE_LEN);
597
598 return val;
599}
600
601/* We don't really want to use this, but remote.c needs to call it in order
602 to figure out if Z-packets are supported or not. Oh, well. */
603unsigned char *
fba45db2 604ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 605{
606 static unsigned char breakpoint[] =
607 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
608 *lenptr = sizeof (breakpoint);
609#if 0
610 *pcptr &= ~0x0f;
611#endif
612 return breakpoint;
613}
614
615CORE_ADDR
39f77062 616ia64_read_pc (ptid_t ptid)
16461d7d 617{
39f77062
KB		 618 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
619 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB		 620 int slot_num = (psr_value >> 41) & 3;
621
622 return pc_value | (slot_num * SLOT_MULTIPLIER);
623}
624
625void
39f77062 626ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB		 627{
628 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 629 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB		 630 psr_value &= ~(3LL << 41);
631 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
632
633 new_pc &= ~0xfLL;
634
39f77062
KB		 635 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
636 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB		 637}
638
639#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
640
641/* Returns the address of the slot that's NSLOTS slots away from
642 the address ADDR. NSLOTS may be positive or negative. */
643static CORE_ADDR
644rse_address_add(CORE_ADDR addr, int nslots)
645{
646 CORE_ADDR new_addr;
647 int mandatory_nat_slots = nslots / 63;
648 int direction = nslots < 0 ? -1 : 1;
649
650 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
651
652 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
653 new_addr += 8 * direction;
654
655 if (IS_NaT_COLLECTION_ADDR(new_addr))
656 new_addr += 8 * direction;
657
658 return new_addr;
659}
660
661/* The IA-64 frame chain is a bit odd. We won't always have a frame
662 pointer, so we use the SP value as the FP for the purpose of
663 creating a frame. There is sometimes a register (not fixed) which
664 is used as a frame pointer. When this register exists, it is not
665 especially hard to determine which one is being used. It isn't
666 even really hard to compute the frame chain, but it can be
667 computationally expensive. So, instead of making life difficult
668 (and slow), we pick a more convenient representation of the frame
669 chain, knowing that we'll have to make some small adjustments
670 in other places. (E.g, note that read_fp() and write_fp() are
671 actually read_sp() and write_sp() below in ia64_gdbarch_init()
672 below.)
673
674 Okay, so what is the frame chain exactly? It'll be the SP value
675 at the time that the function in question was entered.
676
677 Note that this *should* actually the frame pointer for the current
678 function! But as I note above, if we were to attempt to find the
679 address of the beginning of the previous frame, we'd waste a lot
680 of cycles for no good reason. So instead, we simply choose to
681 represent the frame chain as the end of the previous frame instead
682 of the beginning. */
683
684CORE_ADDR
685ia64_frame_chain (struct frame_info *frame)
686{
244bc108
KB		 687 if (frame->signal_handler_caller)
688 return read_sigcontext_register (frame, sp_regnum);
689 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
690 return frame->frame;
16461d7d 691 else
244bc108
KB		 692 {
693 FRAME_INIT_SAVED_REGS (frame);
694 if (frame->saved_regs[IA64_VFP_REGNUM])
695 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
696 else
697 return frame->frame + frame->extra_info->mem_stack_frame_size;
698 }
16461d7d
KB		 699}
700
701CORE_ADDR
702ia64_frame_saved_pc (struct frame_info *frame)
703{
244bc108
KB		 704 if (frame->signal_handler_caller)
705 return read_sigcontext_register (frame, pc_regnum);
706 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
707 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
708 else
709 {
710 FRAME_INIT_SAVED_REGS (frame);
16461d7d 711
244bc108
KB		 712 if (frame->saved_regs[IA64_VRAP_REGNUM])
713 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
714 else if (frame->next && frame->next->signal_handler_caller)
715 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
716 else /* either frameless, or not far enough along in the prologue... */
717 return ia64_saved_pc_after_call (frame);
718 }
16461d7d
KB		 719}
720
58ab00f9
KB		 721/* Limit the number of skipped non-prologue instructions since examining
722 of the prologue is expensive. */
723static int max_skip_non_prologue_insns = 10;
724
725/* Given PC representing the starting address of a function, and
726 LIM_PC which is the (sloppy) limit to which to scan when looking
727 for a prologue, attempt to further refine this limit by using
728 the line data in the symbol table. If successful, a better guess
729 on where the prologue ends is returned, otherwise the previous
730 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
731 which will be set to indicate whether the returned limit may be
732 used with no further scanning in the event that the function is
733 frameless. */
734
735static CORE_ADDR
736refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
737{
738 struct symtab_and_line prologue_sal;
739 CORE_ADDR start_pc = pc;
740
741 /* Start off not trusting the limit. */
742 *trust_limit = 0;
743
744 prologue_sal = find_pc_line (pc, 0);
745 if (prologue_sal.line != 0)
746 {
747 int i;
748 CORE_ADDR addr = prologue_sal.end;
749
750 /* Handle the case in which compiler's optimizer/scheduler
751 has moved instructions into the prologue. We scan ahead
752 in the function looking for address ranges whose corresponding
753 line number is less than or equal to the first one that we
754 found for the function. (It can be less than when the
755 scheduler puts a body instruction before the first prologue
756 instruction.) */
757 for (i = 2 * max_skip_non_prologue_insns;
758 i > 0 && (lim_pc == 0 || addr < lim_pc);
759 i--)
760 {
761 struct symtab_and_line sal;
762
763 sal = find_pc_line (addr, 0);
764 if (sal.line == 0)
765 break;
766 if (sal.line <= prologue_sal.line
767 && sal.symtab == prologue_sal.symtab)
768 {
769 prologue_sal = sal;
770 }
771 addr = sal.end;
772 }
773
774 if (lim_pc == 0 || prologue_sal.end < lim_pc)
775 {
776 lim_pc = prologue_sal.end;
777 if (start_pc == get_pc_function_start (lim_pc))
778 *trust_limit = 1;
779 }
780 }
781 return lim_pc;
782}
783
16461d7d
KB		 784#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
785 || (8 <= (_regnum_) && (_regnum_) <= 11) \
786 || (14 <= (_regnum_) && (_regnum_) <= 31))
787#define imm9(_instr_) \
788 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
789 | (((_instr_) & 0x00008000000LL) >> 20) \
790 | (((_instr_) & 0x00000001fc0LL) >> 6))
791
792static CORE_ADDR
793examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
794{
795 CORE_ADDR next_pc;
796 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 797 instruction_type it;
798 long long instr;
799 int do_fsr_stuff = 0;
800
801 int cfm_reg = 0;
802 int ret_reg = 0;
803 int fp_reg = 0;
804 int unat_save_reg = 0;
805 int pr_save_reg = 0;
806 int mem_stack_frame_size = 0;
807 int spill_reg = 0;
808 CORE_ADDR spill_addr = 0;
0927a22b
KB		 809 char instores[8];
810 char infpstores[8];
58ab00f9 811 int trust_limit;
0927a22b
KB		 812
813 memset (instores, 0, sizeof instores);
814 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 815
816 if (frame && !frame->saved_regs)
817 {
818 frame_saved_regs_zalloc (frame);
819 do_fsr_stuff = 1;
820 }
821
822 if (frame
823 && !do_fsr_stuff
824 && frame->extra_info->after_prologue != 0
825 && frame->extra_info->after_prologue <= lim_pc)
826 return frame->extra_info->after_prologue;
827
58ab00f9
KB		 828 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
829
16461d7d
KB		 830 /* Must start with an alloc instruction */
831 next_pc = fetch_instruction (pc, &it, &instr);
832 if (pc < lim_pc && next_pc
833 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
834 {
835 /* alloc */
836 int sor = (int) ((instr & 0x00078000000LL) >> 27);
837 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
838 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
839 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
840 we could compare against the size given to us via the cfm as
841 either a sanity check or possibly to see if the frame has been
842 changed by a later alloc instruction... */
843 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
844 cfm_reg = rN;
845 last_prologue_pc = next_pc;
846 pc = next_pc;
847 }
848 else
58ab00f9
KB		 849 {
850 pc = lim_pc; /* Frameless: We're done early. */
851 if (trust_limit)
852 last_prologue_pc = lim_pc;
853 }
16461d7d
KB		 854
855 /* Loop, looking for prologue instructions, keeping track of
856 where preserved registers were spilled. */
857 while (pc < lim_pc)
858 {
859 next_pc = fetch_instruction (pc, &it, &instr);
860 if (next_pc == 0)
861 break;
862
0927a22b
KB		 863 if (it == B || ((instr & 0x3fLL) != 0LL))
864 {
865 /* Exit loop upon hitting a branch instruction or a predicated
866 instruction. */
867 break;
868 }
869 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 870 {
871 /* Move from BR */
872 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
873 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
874 int qp = (int) (instr & 0x0000000003f);
875
876 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
877 {
878 ret_reg = rN;
879 last_prologue_pc = next_pc;
880 }
881 }
882 else if ((it == I || it == M)
883 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
884 {
885 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
886 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
887 | ((instr & 0x001f8000000LL) >> 20)
888 | ((instr & 0x000000fe000LL) >> 13));
889 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
890 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
891 int qp = (int) (instr & 0x0000000003fLL);
892
893 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
894 {
895 /* mov rN, r12 */
896 fp_reg = rN;
897 last_prologue_pc = next_pc;
898 }
899 else if (qp == 0 && rN == 12 && rM == 12)
900 {
901 /* adds r12, -mem_stack_frame_size, r12 */
902 mem_stack_frame_size -= imm;
903 last_prologue_pc = next_pc;
904 }
905 else if (qp == 0 && rN == 2
906 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
907 {
908 /* adds r2, spilloffset, rFramePointer
909 or
910 adds r2, spilloffset, r12
911
912 Get ready for stf.spill or st8.spill instructions.
913 The address to start spilling at is loaded into r2.
914 FIXME: Why r2? That's what gcc currently uses; it
915 could well be different for other compilers. */
916
917 /* Hmm... whether or not this will work will depend on
918 where the pc is. If it's still early in the prologue
919 this'll be wrong. FIXME */
920 spill_addr = (frame ? frame->frame : 0)
921 + (rM == 12 ? 0 : mem_stack_frame_size)
922 + imm;
923 spill_reg = rN;
924 last_prologue_pc = next_pc;
925 }
926 }
927 else if (it == M
928 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
929 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
930 {
931 /* stf.spill [rN] = fM, imm9
932 or
933 stf.spill [rN] = fM */
934
935 int imm = imm9(instr);
936 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
937 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
938 int qp = (int) (instr & 0x0000000003fLL);
939 if (qp == 0 && rN == spill_reg && spill_addr != 0
940 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
941 {
942 if (do_fsr_stuff)
943 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
944
945 if ((instr & 0x1efc0000000) == 0x0eec0000000)
946 spill_addr += imm;
947 else
948 spill_addr = 0; /* last one; must be done */
949 last_prologue_pc = next_pc;
950 }
951 }
952 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
953 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
954 {
955 /* mov.m rN = arM
956 or
957 mov.i rN = arM */
958
959 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
960 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
961 int qp = (int) (instr & 0x0000000003fLL);
962 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
963 {
964 /* We have something like "mov.m r3 = ar.unat". Remember the
965 r3 (or whatever) and watch for a store of this register... */
966 unat_save_reg = rN;
967 last_prologue_pc = next_pc;
968 }
969 }
970 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
971 {
972 /* mov rN = pr */
973 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
974 int qp = (int) (instr & 0x0000000003fLL);
975 if (qp == 0 && isScratch (rN))
976 {
977 pr_save_reg = rN;
978 last_prologue_pc = next_pc;
979 }
980 }
981 else if (it == M
982 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
983 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
984 {
985 /* st8 [rN] = rM
986 or
987 st8 [rN] = rM, imm9 */
988 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
989 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
990 int qp = (int) (instr & 0x0000000003fLL);
991 if (qp == 0 && rN == spill_reg && spill_addr != 0
992 && (rM == unat_save_reg || rM == pr_save_reg))
993 {
994 /* We've found a spill of either the UNAT register or the PR
995 register. (Well, not exactly; what we've actually found is
996 a spill of the register that UNAT or PR was moved to).
997 Record that fact and move on... */
998 if (rM == unat_save_reg)
999 {
1000 /* Track UNAT register */
1001 if (do_fsr_stuff)
1002 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
1003 unat_save_reg = 0;
1004 }
1005 else
1006 {
1007 /* Track PR register */
1008 if (do_fsr_stuff)
1009 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
1010 pr_save_reg = 0;
1011 }
1012 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1013 /* st8 [rN] = rM, imm9 */
1014 spill_addr += imm9(instr);
1015 else
1016 spill_addr = 0; /* must be done spilling */
1017 last_prologue_pc = next_pc;
1018 }
0927a22b
KB		 1019 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1020 {
1021 /* Allow up to one store of each input register. */
1022 instores[rM-32] = 1;
1023 last_prologue_pc = next_pc;
1024 }
1025 }
1026 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1027 {
1028 /* One of
1029 st1 [rN] = rM
1030 st2 [rN] = rM
1031 st4 [rN] = rM
1032 st8 [rN] = rM
1033 Note that the st8 case is handled in the clause above.
1034
1035 Advance over stores of input registers. One store per input
1036 register is permitted. */
1037 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1038 int qp = (int) (instr & 0x0000000003fLL);
1039 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1040 {
1041 instores[rM-32] = 1;
1042 last_prologue_pc = next_pc;
1043 }
1044 }
1045 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1046 {
1047 /* Either
1048 stfs [rN] = fM
1049 or
1050 stfd [rN] = fM
1051
1052 Advance over stores of floating point input registers. Again
1053 one store per register is permitted */
1054 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1055 int qp = (int) (instr & 0x0000000003fLL);
1056 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1057 {
1058 infpstores[fM-8] = 1;
1059 last_prologue_pc = next_pc;
1060 }
16461d7d
KB		 1061 }
1062 else if (it == M
1063 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1064 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1065 {
1066 /* st8.spill [rN] = rM
1067 or
1068 st8.spill [rN] = rM, imm9 */
1069 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1070 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1071 int qp = (int) (instr & 0x0000000003fLL);
1072 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1073 {
1074 /* We've found a spill of one of the preserved general purpose
1075 regs. Record the spill address and advance the spill
1076 register if appropriate. */
1077 if (do_fsr_stuff)
1078 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1079 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1080 /* st8.spill [rN] = rM, imm9 */
1081 spill_addr += imm9(instr);
1082 else
1083 spill_addr = 0; /* Done spilling */
1084 last_prologue_pc = next_pc;
1085 }
1086 }
16461d7d
KB		 1087
1088 pc = next_pc;
1089 }
1090
1091 if (do_fsr_stuff) {
1092 int i;
1093 CORE_ADDR addr;
3a854e23
KB		 1094 int sor, rrb_gr;
1095
1096 /* Extract the size of the rotating portion of the stack
1097 frame and the register rename base from the current
1098 frame marker. */
1099 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1100 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
16461d7d
KB		 1101
1102 for (i = 0, addr = frame->extra_info->bsp;
1103 i < frame->extra_info->sof;
1104 i++, addr += 8)
1105 {
1106 if (IS_NaT_COLLECTION_ADDR (addr))
1107 {
1108 addr += 8;
1109 }
3a854e23
KB		 1110 if (i < sor)
1111 frame->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1112 = addr;
1113 else
1114 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB		 1115
1116 if (i+32 == cfm_reg)
1117 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1118 if (i+32 == ret_reg)
1119 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1120 if (i+32 == fp_reg)
1121 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1122 }
1123 }
1124
1125 if (frame && frame->extra_info) {
1126 frame->extra_info->after_prologue = last_prologue_pc;
1127 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1128 frame->extra_info->fp_reg = fp_reg;
1129 }
1130
1131 return last_prologue_pc;
1132}
1133
1134CORE_ADDR
1135ia64_skip_prologue (CORE_ADDR pc)
1136{
1137 return examine_prologue (pc, pc+1024, 0);
1138}
1139
1140void
1141ia64_frame_init_saved_regs (struct frame_info *frame)
1142{
16461d7d
KB		 1143 if (frame->saved_regs)
1144 return;
1145
244bc108
KB		 1146 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1147 {
1148 int regno;
16461d7d 1149
244bc108 1150 frame_saved_regs_zalloc (frame);
16461d7d 1151
244bc108
KB		 1152 frame->saved_regs[IA64_VRAP_REGNUM] =
1153 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1154 frame->saved_regs[IA64_CFM_REGNUM] =
1155 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1156 frame->saved_regs[IA64_PSR_REGNUM] =
1157 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1158#if 0
1159 frame->saved_regs[IA64_BSP_REGNUM] =
1160 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1161#endif
1162 frame->saved_regs[IA64_RNAT_REGNUM] =
1163 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1164 frame->saved_regs[IA64_CCV_REGNUM] =
1165 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1166 frame->saved_regs[IA64_UNAT_REGNUM] =
1167 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1168 frame->saved_regs[IA64_FPSR_REGNUM] =
1169 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1170 frame->saved_regs[IA64_PFS_REGNUM] =
1171 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1172 frame->saved_regs[IA64_LC_REGNUM] =
1173 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1174 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1175 if (regno != sp_regnum)
1176 frame->saved_regs[regno] =
1177 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1178 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1179 frame->saved_regs[regno] =
1180 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1181 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1182 frame->saved_regs[regno] =
1183 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1184 }
1185 else
1186 {
244bc108 1187 CORE_ADDR func_start;
16461d7d 1188
244bc108
KB		 1189 func_start = get_pc_function_start (frame->pc);
1190 examine_prologue (func_start, frame->pc, frame);
1191 }
16461d7d
KB		 1192}
1193
1194void
1195ia64_get_saved_register (char *raw_buffer,
1196 int *optimized,
1197 CORE_ADDR *addrp,
1198 struct frame_info *frame,
1199 int regnum,
1200 enum lval_type *lval)
1201{
244bc108 1202 int is_dummy_frame;
16461d7d
KB		 1203
1204 if (!target_has_registers)
1205 error ("No registers.");
1206
1207 if (optimized != NULL)
1208 *optimized = 0;
244bc108
KB		 1209
1210 if (addrp != NULL)
1211 *addrp = 0;
1212
1213 if (lval != NULL)
1214 *lval = not_lval;
1215
1216 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1217
1218 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1219 {
1220 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1221 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1222 }
1223 else if (regnum == IA64_BSP_REGNUM)
1224 {
16461d7d
KB		 1225 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1226 frame->extra_info->bsp);
1227 }
1228 else if (regnum == IA64_VFP_REGNUM)
1229 {
1230 /* If the function in question uses an automatic register (r32-r127)
1231 for the frame pointer, it'll be found by ia64_find_saved_register()
1232 above. If the function lacks one of these frame pointers, we can
1233 still provide a value since we know the size of the frame */
1234 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1235 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1236 }
1237 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1238 {
2fc3ac7e 1239 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB		 1240 int pr_optim;
1241 enum lval_type pr_lval;
1242 CORE_ADDR pr_addr;
1243 int prN_val;
1244 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1245 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB		 1246 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1247 {
1248 /* Fetch predicate register rename base from current frame
1249 marker for this frame. */
1250 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1251
1252 /* Adjust the register number to account for register rotation. */
1253 regnum = IA64_PR16_REGNUM
1254 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1255 }
16461d7d
KB		 1256 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1257 regnum - IA64_PR0_REGNUM, 1);
1258 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1259 }
1260 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1261 {
2fc3ac7e 1262 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB		 1263 int unat_optim;
1264 enum lval_type unat_lval;
1265 CORE_ADDR unat_addr;
1266 int unatN_val;
1267 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1268 frame, IA64_UNAT_REGNUM, &unat_lval);
1269 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1270 regnum - IA64_NAT0_REGNUM, 1);
1271 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1272 unatN_val);
16461d7d
KB		 1273 }
1274 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1275 {
1276 int natval = 0;
1277 /* Find address of general register corresponding to nat bit we're
1278 interested in. */
244bc108
KB		 1279 CORE_ADDR gr_addr = 0;
1280
1281 if (!is_dummy_frame)
1282 {
1283 FRAME_INIT_SAVED_REGS (frame);
1284 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1285 + IA64_GR0_REGNUM];
1286 }
16461d7d
KB		 1287 if (gr_addr)
1288 {
1289 /* Compute address of nat collection bits */
1290 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1291 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1292 CORE_ADDR nat_collection;
1293 int nat_bit;
1294 /* If our nat collection address is bigger than bsp, we have to get
1295 the nat collection from rnat. Otherwise, we fetch the nat
1296 collection from the computed address. */
1297 if (nat_addr >= bsp)
1298 nat_collection = read_register (IA64_RNAT_REGNUM);
1299 else
1300 nat_collection = read_memory_integer (nat_addr, 8);
1301 nat_bit = (gr_addr >> 3) & 0x3f;
1302 natval = (nat_collection >> nat_bit) & 1;
1303 }
1304 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1305 }
1306 else if (regnum == IA64_IP_REGNUM)
1307 {
1308 CORE_ADDR pc;
1309 if (frame->next)
1310 {
1311 /* FIXME: Set *addrp, *lval when possible. */
1312 pc = ia64_frame_saved_pc (frame->next);
1313 }
1314 else
1315 {
1316 pc = read_pc ();
1317 }
1318 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1319 }
1320 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1321 {
1322 CORE_ADDR addr = 0;
1323 if (!is_dummy_frame)
1324 {
1325 FRAME_INIT_SAVED_REGS (frame);
1326 addr = frame->saved_regs[regnum];
1327 }
1328
1329 if (addr != 0)
1330 {
1331 if (lval != NULL)
1332 *lval = lval_memory;
1333 if (addrp != NULL)
1334 *addrp = addr;
1335 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1336 }
1337 else
1338 {
1339 /* r32 - r127 must be fetchable via memory. If they aren't,
1340 then the register is unavailable */
1341 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1342 }
16461d7d
KB		 1343 }
1344 else
1345 {
3a854e23
KB		 1346 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1347 {
1348 /* Fetch floating point register rename base from current
1349 frame marker for this frame. */
1350 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1351
1352 /* Adjust the floating point register number to account for
1353 register rotation. */
1354 regnum = IA64_FR32_REGNUM
1355 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1356 }
1357
244bc108
KB		 1358 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1359 regnum, lval);
16461d7d 1360 }
16461d7d
KB		 1361}
1362
1363/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1364 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1365 and TYPE is the type (which is known to be struct, union or array). */
1366int
1367ia64_use_struct_convention (int gcc_p, struct type *type)
1368{
64a5b29c
KB		 1369 struct type *float_elt_type;
1370
1371 /* HFAs are structures (or arrays) consisting entirely of floating
1372 point values of the same length. Up to 8 of these are returned
1373 in registers. Don't use the struct convention when this is the
1374 case. */
1375 float_elt_type = is_float_or_hfa_type (type);
1376 if (float_elt_type != NULL
1377 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1378 return 0;
1379
1380 /* Other structs of length 32 or less are returned in r8-r11.
1381 Don't use the struct convention for those either. */
16461d7d
KB		 1382 return TYPE_LENGTH (type) > 32;
1383}
1384
1385void
1386ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1387{
64a5b29c
KB		 1388 struct type *float_elt_type;
1389
1390 float_elt_type = is_float_or_hfa_type (type);
1391 if (float_elt_type != NULL)
1392 {
1393 int offset = 0;
1394 int regnum = IA64_FR8_REGNUM;
1395 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1396
1397 while (n-- > 0)
1398 {
1399 ia64_register_convert_to_virtual (regnum, float_elt_type,
1400 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1401 offset += TYPE_LENGTH (float_elt_type);
1402 regnum++;
1403 }
1404 }
16461d7d 1405 else
64a5b29c
KB		 1406 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1407 TYPE_LENGTH (type));
16461d7d
KB		 1408}
1409
1410/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1411 like this is necessary though since the IA-64 calling conventions specify
1412 that r8 is not preserved. */
1413static CORE_ADDR struct_return_address;
1414
1415CORE_ADDR
1416ia64_extract_struct_value_address (char *regbuf)
1417{
1418 /* FIXME: See above. */
1419 return struct_return_address;
1420}
1421
1422void
1423ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1424{
1425 /* FIXME: See above. */
1426 /* Note that most of the work was done in ia64_push_arguments() */
1427 struct_return_address = addr;
1428}
1429
1430int
1431ia64_frameless_function_invocation (struct frame_info *frame)
1432{
fbad0893
KB		 1433 FRAME_INIT_SAVED_REGS (frame);
1434 return (frame->extra_info->mem_stack_frame_size == 0);
16461d7d
KB		 1435}
1436
1437CORE_ADDR
1438ia64_saved_pc_after_call (struct frame_info *frame)
1439{
1440 return read_register (IA64_BR0_REGNUM);
1441}
1442
1443CORE_ADDR
1444ia64_frame_args_address (struct frame_info *frame)
1445{
1446 /* frame->frame points at the SP for this frame; But we want the start
1447 of the frame, not the end. Calling frame chain will get his for us. */
1448 return ia64_frame_chain (frame);
1449}
1450
1451CORE_ADDR
1452ia64_frame_locals_address (struct frame_info *frame)
1453{
1454 /* frame->frame points at the SP for this frame; But we want the start
1455 of the frame, not the end. Calling frame chain will get his for us. */
1456 return ia64_frame_chain (frame);
1457}
1458
1459void
1460ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1461{
1462 CORE_ADDR bsp, cfm;
244bc108
KB		 1463 int next_frame_is_call_dummy = ((frame->next != NULL)
1464 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1465 frame->next->frame));
16461d7d
KB		 1466
1467 frame->extra_info = (struct frame_extra_info *)
1468 frame_obstack_alloc (sizeof (struct frame_extra_info));
1469
1470 if (frame->next == 0)
1471 {
1472 bsp = read_register (IA64_BSP_REGNUM);
1473 cfm = read_register (IA64_CFM_REGNUM);
1474
1475 }
244bc108
KB		 1476 else if (frame->next->signal_handler_caller)
1477 {
1478 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1479 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1480 }
1481 else if (next_frame_is_call_dummy)
1482 {
1483 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1484 IA64_BSP_REGNUM);
1485 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1486 IA64_CFM_REGNUM);
1487 }
16461d7d
KB		 1488 else
1489 {
1490 struct frame_info *frn = frame->next;
16461d7d
KB		 1491
1492 FRAME_INIT_SAVED_REGS (frn);
1493
1494 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1495 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1496 else if (frn->next && frn->next->signal_handler_caller)
1497 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1498 else if (frn->next
1499 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1500 frn->next->frame))
1501 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1502 IA64_PFS_REGNUM);
16461d7d 1503 else
76d689a6 1504 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1505
1506 bsp = frn->extra_info->bsp;
1507 }
1508 frame->extra_info->cfm = cfm;
1509 frame->extra_info->sof = cfm & 0x7f;
1510 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1511 if (frame->next == 0
1512 || frame->next->signal_handler_caller
1513 || next_frame_is_call_dummy)
16461d7d
KB		 1514 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1515 else
1516 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1517
1518 frame->extra_info->after_prologue = 0;
1519 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1520 frame->extra_info->fp_reg = 0;
1521}
1522
64a5b29c
KB		 1523static int
1524is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1525{
1526 switch (TYPE_CODE (t))
1527 {
1528 case TYPE_CODE_FLT:
1529 if (*etp)
1530 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1531 else
1532 {
1533 *etp = t;
1534 return 1;
1535 }
1536 break;
1537 case TYPE_CODE_ARRAY:
98f96ba1
KB		 1538 return
1539 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1540 etp);
64a5b29c
KB		 1541 break;
1542 case TYPE_CODE_STRUCT:
1543 {
1544 int i;
1545
1546 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB		 1547 if (!is_float_or_hfa_type_recurse
1548 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB		 1549 return 0;
1550 return 1;
1551 }
1552 break;
1553 default:
1554 return 0;
1555 break;
1556 }
1557}
1558
1559/* Determine if the given type is one of the floating point types or
1560 and HFA (which is a struct, array, or combination thereof whose
1561 bottom-most elements are all of the same floating point type.) */
1562
1563static struct type *
1564is_float_or_hfa_type (struct type *t)
1565{
1566 struct type *et = 0;
1567
1568 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1569}
1570
1571
98f96ba1
KB		 1572/* Return 1 if the alignment of T is such that the next even slot
1573 should be used. Return 0, if the next available slot should
1574 be used. (See section 8.5.1 of the IA-64 Software Conventions
1575 and Runtime manual.) */
1576
1577static int
1578slot_alignment_is_next_even (struct type *t)
1579{
1580 switch (TYPE_CODE (t))
1581 {
1582 case TYPE_CODE_INT:
1583 case TYPE_CODE_FLT:
1584 if (TYPE_LENGTH (t) > 8)
1585 return 1;
1586 else
1587 return 0;
1588 case TYPE_CODE_ARRAY:
1589 return
1590 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1591 case TYPE_CODE_STRUCT:
1592 {
1593 int i;
1594
1595 for (i = 0; i < TYPE_NFIELDS (t); i++)
1596 if (slot_alignment_is_next_even
1597 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1598 return 1;
1599 return 0;
1600 }
1601 default:
1602 return 0;
1603 }
1604}
1605
64a5b29c
KB		 1606/* Attempt to find (and return) the global pointer for the given
1607 function.
1608
1609 This is a rather nasty bit of code searchs for the .dynamic section
1610 in the objfile corresponding to the pc of the function we're trying
1611 to call. Once it finds the addresses at which the .dynamic section
1612 lives in the child process, it scans the Elf64_Dyn entries for a
1613 DT_PLTGOT tag. If it finds one of these, the corresponding
1614 d_un.d_ptr value is the global pointer. */
1615
1616static CORE_ADDR
698cb3f0 1617generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1618{
76d689a6 1619 struct obj_section *faddr_sect;
64a5b29c 1620
76d689a6
KB		 1621 faddr_sect = find_pc_section (faddr);
1622 if (faddr_sect != NULL)
64a5b29c
KB		 1623 {
1624 struct obj_section *osect;
1625
76d689a6 1626 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1627 {
1628 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1629 break;
1630 }
1631
76d689a6 1632 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1633 {
1634 CORE_ADDR addr;
1635
1636 addr = osect->addr;
1637 while (addr < osect->endaddr)
1638 {
1639 int status;
1640 LONGEST tag;
1641 char buf[8];
1642
1643 status = target_read_memory (addr, buf, sizeof (buf));
1644 if (status != 0)
1645 break;
1646 tag = extract_signed_integer (buf, sizeof (buf));
1647
1648 if (tag == DT_PLTGOT)
1649 {
1650 CORE_ADDR global_pointer;
1651
1652 status = target_read_memory (addr + 8, buf, sizeof (buf));
1653 if (status != 0)
1654 break;
1655 global_pointer = extract_address (buf, sizeof (buf));
1656
1657 /* The payoff... */
1658 return global_pointer;
1659 }
1660
1661 if (tag == DT_NULL)
1662 break;
1663
1664 addr += 16;
1665 }
1666 }
1667 }
1668 return 0;
1669}
1670
1671/* Given a function's address, attempt to find (and return) the
1672 corresponding (canonical) function descriptor. Return 0 if
1673 not found. */
1674static CORE_ADDR
1675find_extant_func_descr (CORE_ADDR faddr)
1676{
76d689a6 1677 struct obj_section *faddr_sect;
64a5b29c
KB		 1678
1679 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1680 faddr_sect = find_pc_section (faddr);
1681 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1682 return faddr;
1683
76d689a6 1684 if (faddr_sect != NULL)
64a5b29c 1685 {
76d689a6
KB		 1686 struct obj_section *osect;
1687 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1688 {
1689 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1690 break;
1691 }
1692
76d689a6 1693 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1694 {
1695 CORE_ADDR addr;
1696
1697 addr = osect->addr;
1698 while (addr < osect->endaddr)
1699 {
1700 int status;
1701 LONGEST faddr2;
1702 char buf[8];
1703
1704 status = target_read_memory (addr, buf, sizeof (buf));
1705 if (status != 0)
1706 break;
1707 faddr2 = extract_signed_integer (buf, sizeof (buf));
1708
1709 if (faddr == faddr2)
1710 return addr;
1711
1712 addr += 16;
1713 }
1714 }
1715 }
1716 return 0;
1717}
1718
1719/* Attempt to find a function descriptor corresponding to the
1720 given address. If none is found, construct one on the
1721 stack using the address at fdaptr */
1722
1723static CORE_ADDR
1724find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1725{
1726 CORE_ADDR fdesc;
1727
1728 fdesc = find_extant_func_descr (faddr);
1729
1730 if (fdesc == 0)
1731 {
1732 CORE_ADDR global_pointer;
1733 char buf[16];
1734
1735 fdesc = *fdaptr;
1736 *fdaptr += 16;
1737
698cb3f0 1738 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB		 1739
1740 if (global_pointer == 0)
1741 global_pointer = read_register (IA64_GR1_REGNUM);
1742
1743 store_address (buf, 8, faddr);
1744 store_address (buf + 8, 8, global_pointer);
1745
1746 write_memory (fdesc, buf, 16);
1747 }
1748
1749 return fdesc;
1750}
16461d7d
KB		 1751
1752CORE_ADDR
ea7c478f 1753ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB		 1754 int struct_return, CORE_ADDR struct_addr)
1755{
1756 int argno;
ea7c478f 1757 struct value *arg;
16461d7d
KB		 1758 struct type *type;
1759 int len, argoffset;
64a5b29c 1760 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1761 int floatreg;
64a5b29c 1762 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1763
1764 nslots = 0;
64a5b29c 1765 nfuncargs = 0;
16461d7d
KB		 1766 /* Count the number of slots needed for the arguments */
1767 for (argno = 0; argno < nargs; argno++)
1768 {
1769 arg = args[argno];
1770 type = check_typedef (VALUE_TYPE (arg));
1771 len = TYPE_LENGTH (type);
1772
98f96ba1 1773 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB		 1774 nslots++;
1775
64a5b29c
KB		 1776 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1777 nfuncargs++;
1778
16461d7d
KB		 1779 nslots += (len + 7) / 8;
1780 }
1781
64a5b29c 1782 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1783 rseslots = (nslots > 8) ? 8 : nslots;
1784 memslots = nslots - rseslots;
1785
64a5b29c 1786 /* Allocate a new RSE frame */
16461d7d
KB		 1787 cfm = read_register (IA64_CFM_REGNUM);
1788
1789 bsp = read_register (IA64_BSP_REGNUM);
1790 bsp = rse_address_add (bsp, cfm & 0x7f);
1791 new_bsp = rse_address_add (bsp, rseslots);
1792 write_register (IA64_BSP_REGNUM, new_bsp);
1793
1794 pfs = read_register (IA64_PFS_REGNUM);
1795 pfs &= 0xc000000000000000LL;
1796 pfs |= (cfm & 0xffffffffffffLL);
1797 write_register (IA64_PFS_REGNUM, pfs);
1798
1799 cfm &= 0xc000000000000000LL;
1800 cfm |= rseslots;
1801 write_register (IA64_CFM_REGNUM, cfm);
1802
64a5b29c
KB		 1803 /* We will attempt to find function descriptors in the .opd segment,
1804 but if we can't we'll construct them ourselves. That being the
1805 case, we'll need to reserve space on the stack for them. */
1806 funcdescaddr = sp - nfuncargs * 16;
1807 funcdescaddr &= ~0xfLL;
1808
1809 /* Adjust the stack pointer to it's new value. The calling conventions
1810 require us to have 16 bytes of scratch, plus whatever space is
1811 necessary for the memory slots and our function descriptors */
1812 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1813 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1814
64a5b29c
KB		 1815 /* Place the arguments where they belong. The arguments will be
1816 either placed in the RSE backing store or on the memory stack.
1817 In addition, floating point arguments or HFAs are placed in
1818 floating point registers. */
16461d7d
KB		 1819 slotnum = 0;
1820 floatreg = IA64_FR8_REGNUM;
1821 for (argno = 0; argno < nargs; argno++)
1822 {
64a5b29c
KB		 1823 struct type *float_elt_type;
1824
16461d7d
KB		 1825 arg = args[argno];
1826 type = check_typedef (VALUE_TYPE (arg));
1827 len = TYPE_LENGTH (type);
64a5b29c
KB		 1828
1829 /* Special handling for function parameters */
1830 if (len == 8
1831 && TYPE_CODE (type) == TYPE_CODE_PTR
1832 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1833 {
1834 char val_buf[8];
1835
1836 store_address (val_buf, 8,
1837 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1838 &funcdescaddr));
1839 if (slotnum < rseslots)
1840 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1841 else
1842 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1843 slotnum++;
1844 continue;
1845 }
1846
1847 /* Normal slots */
98f96ba1
KB		 1848
1849 /* Skip odd slot if necessary... */
1850 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1851 slotnum++;
98f96ba1 1852
16461d7d
KB		 1853 argoffset = 0;
1854 while (len > 0)
1855 {
1856 char val_buf[8];
1857
1858 memset (val_buf, 0, 8);
1859 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1860
1861 if (slotnum < rseslots)
1862 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1863 else
1864 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1865
1866 argoffset += 8;
1867 len -= 8;
1868 slotnum++;
1869 }
64a5b29c
KB		 1870
1871 /* Handle floating point types (including HFAs) */
1872 float_elt_type = is_float_or_hfa_type (type);
1873 if (float_elt_type != NULL)
1874 {
1875 argoffset = 0;
1876 len = TYPE_LENGTH (type);
1877 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1878 {
1879 ia64_register_convert_to_raw (
1880 float_elt_type,
1881 floatreg,
1882 VALUE_CONTENTS (arg) + argoffset,
1883 &registers[REGISTER_BYTE (floatreg)]);
1884 floatreg++;
1885 argoffset += TYPE_LENGTH (float_elt_type);
1886 len -= TYPE_LENGTH (float_elt_type);
1887 }
16461d7d
KB		 1888 }
1889 }
1890
64a5b29c 1891 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1892 if (struct_return)
1893 {
1894 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1895 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1896 struct_addr);
1897 }
1898
64a5b29c 1899 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1900 target_store_registers (-1);
1901
1902 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1903 to be defined to call generic_save_dummy_frame_tos(). But at the
1904 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1905 I chose to put this call here instead of using the old mechanisms.
1906 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1907 line
1908
1909 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1910
1911 to ia64_gdbarch_init() and remove the line below. */
1912 generic_save_dummy_frame_tos (sp);
1913
1914 return sp;
1915}
1916
1917CORE_ADDR
1918ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1919{
698cb3f0 1920 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1921
64a5b29c
KB		 1922 if (global_pointer != 0)
1923 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1924
1925 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1926 return sp;
1927}
1928
1929void
1930ia64_store_return_value (struct type *type, char *valbuf)
1931{
1932 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1933 {
1934 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1935 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1936 target_store_registers (IA64_FR8_REGNUM);
1937 }
1938 else
1939 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1940 valbuf, TYPE_LENGTH (type));
1941}
1942
1943void
1944ia64_pop_frame (void)
1945{
1946 generic_pop_current_frame (ia64_pop_frame_regular);
1947}
1948
1949static void
1950ia64_pop_frame_regular (struct frame_info *frame)
1951{
1952 int regno;
1953 CORE_ADDR bsp, cfm, pfs;
1954
1955 FRAME_INIT_SAVED_REGS (frame);
1956
1957 for (regno = 0; regno < ia64_num_regs; regno++)
1958 {
1959 if (frame->saved_regs[regno]
1960 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1961 && regno != pc_regnum
1962 && regno != sp_regnum
1963 && regno != IA64_PFS_REGNUM
1964 && regno != IA64_CFM_REGNUM
1965 && regno != IA64_BSP_REGNUM
1966 && regno != IA64_BSPSTORE_REGNUM)
1967 {
1968 write_register (regno,
1969 read_memory_integer (frame->saved_regs[regno],
1970 REGISTER_RAW_SIZE (regno)));
1971 }
1972 }
1973
1974 write_register (sp_regnum, FRAME_CHAIN (frame));
1975 write_pc (FRAME_SAVED_PC (frame));
1976
1977 cfm = read_register (IA64_CFM_REGNUM);
1978
1979 if (frame->saved_regs[IA64_PFS_REGNUM])
1980 {
1981 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1982 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1983 }
1984 else
1985 pfs = read_register (IA64_PFS_REGNUM);
1986
1987 /* Compute the new bsp by *adding* the difference between the
1988 size of the frame and the size of the locals (both wrt the
1989 frame that we're going back to). This seems kind of strange,
1990 especially since it seems like we ought to be subtracting the
1991 size of the locals... and we should; but the linux kernel
1992 wants bsp to be set at the end of all used registers. It's
1993 likely that this code will need to be revised to accomodate
1994 other operating systems. */
1995 bsp = rse_address_add (frame->extra_info->bsp,
1996 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1997 write_register (IA64_BSP_REGNUM, bsp);
1998
1999 /* FIXME: What becomes of the epilog count in the PFS? */
2000 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2001 write_register (IA64_CFM_REGNUM, cfm);
2002
2003 flush_cached_frames ();
2004}
2005
2006static void
2007ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2008 CORE_ADDR *targ_addr, int *targ_len)
2009{
2010 *targ_addr = memaddr;
2011 *targ_len = nr_bytes;
2012}
2013
244bc108
KB		 2014static void
2015process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2016{
2017 int *os_ident_ptr = obj;
2018 const char *name;
2019 unsigned int sectsize;
2020
2021 name = bfd_get_section_name (abfd, sect);
2022 sectsize = bfd_section_size (abfd, sect);
2023 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2024 {
2025 unsigned int name_length, data_length, note_type;
2026 char *note = alloca (sectsize);
2027
2028 bfd_get_section_contents (abfd, sect, note,
2029 (file_ptr) 0, (bfd_size_type) sectsize);
2030
2031 name_length = bfd_h_get_32 (abfd, note);
2032 data_length = bfd_h_get_32 (abfd, note + 4);
2033 note_type = bfd_h_get_32 (abfd, note + 8);
2034
2035 if (name_length == 4 && data_length == 16 && note_type == 1
2036 && strcmp (note + 12, "GNU") == 0)
2037 {
2038 int os_number = bfd_h_get_32 (abfd, note + 16);
2039
2040 /* The case numbers are from abi-tags in glibc */
2041 switch (os_number)
2042 {
2043 case 0 :
2044 *os_ident_ptr = ELFOSABI_LINUX;
2045 break;
244bc108
KB		 2046 case 1 :
2047 *os_ident_ptr = ELFOSABI_HURD;
2048 break;
2049 case 2 :
2050 *os_ident_ptr = ELFOSABI_SOLARIS;
2051 break;
244bc108 2052 default :
8e65ff28
AC		 2053 internal_error (__FILE__, __LINE__,
2054 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB		 2055 break;
2056 }
2057 }
2058 }
2059}
2060
16461d7d
KB		 2061static struct gdbarch *
2062ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2063{
2064 struct gdbarch *gdbarch;
244bc108
KB		 2065 struct gdbarch_tdep *tdep;
2066 int os_ident;
2067
2068 if (info.abfd != NULL
2069 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2070 {
2071 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2072
2073 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 2074 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 2075 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
2076 zero. So we have to check for note sections too. */
2077 if (os_ident == 0)
2078 {
2079 bfd_map_over_sections (info.abfd,
2080 process_note_abi_tag_sections,
2081 &os_ident);
2082 }
2083 }
2084 else
2085 os_ident = -1;
16461d7d 2086
244bc108
KB		 2087 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2088 arches != NULL;
2089 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2090 {
2091 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
2092 continue;
2093 return arches->gdbarch;
2094 }
16461d7d 2095
244bc108
KB		 2096 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2097 gdbarch = gdbarch_alloc (&info, tdep);
2098 tdep->os_ident = os_ident;
2099
d7fa2ae2
KB		 2100
2101 /* Set the method of obtaining the sigcontext addresses at which
2102 registers are saved. The method of checking to see if
2103 native_find_global_pointer is nonzero to indicate that we're
2104 on AIX is kind of hokey, but I can't think of a better way
2105 to do it. */
244bc108
KB		 2106 if (os_ident == ELFOSABI_LINUX)
2107 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB		 2108 else if (native_find_global_pointer != 0)
2109 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB		 2110 else
2111 tdep->sigcontext_register_address = 0;
16461d7d 2112
698cb3f0
KB		 2113 /* We know that Linux won't have to resort to the native_find_global_pointer
2114 hackery. But that's the only one we know about so far, so if
2115 native_find_global_pointer is set to something non-zero, then use
2116 it. Otherwise fall back to using generic_elf_find_global_pointer.
2117 This arrangement should (in theory) allow us to cross debug Linux
2118 binaries from an AIX machine. */
2119 if (os_ident == ELFOSABI_LINUX)
2120 tdep->find_global_pointer = generic_elf_find_global_pointer;
2121 else if (native_find_global_pointer != 0)
2122 tdep->find_global_pointer = native_find_global_pointer;
2123 else
2124 tdep->find_global_pointer = generic_elf_find_global_pointer;
2125
16461d7d
KB		 2126 set_gdbarch_short_bit (gdbarch, 16);
2127 set_gdbarch_int_bit (gdbarch, 32);
2128 set_gdbarch_long_bit (gdbarch, 64);
2129 set_gdbarch_long_long_bit (gdbarch, 64);
2130 set_gdbarch_float_bit (gdbarch, 32);
2131 set_gdbarch_double_bit (gdbarch, 64);
2132 set_gdbarch_long_double_bit (gdbarch, 64);
2133 set_gdbarch_ptr_bit (gdbarch, 64);
2134
2135 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2136 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2137 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2138 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2139 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB		 2140
2141 set_gdbarch_register_name (gdbarch, ia64_register_name);
2142 set_gdbarch_register_size (gdbarch, 8);
2143 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2144 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2145 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2146 set_gdbarch_max_register_raw_size (gdbarch, 16);
2147 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2148 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2149 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2150
2151 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2152
2153 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2154 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2155
2156 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2157
2158 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 2159 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 2160 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2161
2162 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2163 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2164
2165 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2166 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2167 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2168
2169 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2170 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
2171
2172 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2173 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
2174 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2175
2176 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2177 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2178 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2179 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2180 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2181
2182 /* Settings for calling functions in the inferior. */
2183 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2184 set_gdbarch_call_dummy_length (gdbarch, 0);
2185 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2186 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2187 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2188
2189 set_gdbarch_call_dummy_p (gdbarch, 1);
2190 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2191 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2192 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2193 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2194 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2195 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2196
2197 /* We won't necessarily have a frame pointer and even if we do,
2198 it winds up being extraordinarly messy when attempting to find
2199 the frame chain. So for the purposes of creating frames (which
2200 is all read_fp() is used for), simply use the stack pointer value
2201 instead. */
2202 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2203 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2204
2205 /* Settings that should be unnecessary. */
2206 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2207
2208 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2209 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2210
2211 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2212 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2213 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2214 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2215 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2216 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2217 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2218 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2219
2220 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2221 set_gdbarch_function_start_offset (gdbarch, 0);
2222
2223 set_gdbarch_remote_translate_xfer_address (
2224 gdbarch, ia64_remote_translate_xfer_address);
2225
2226 return gdbarch;
2227}
2228
2229void
2230_initialize_ia64_tdep (void)
2231{
2232 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2233
2234 tm_print_insn = print_insn_ia64;
2235 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2236}
GDB Binutils - Deliverables
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