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Create new file regcache.h. Update all uses.
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
8e65ff28 2 Copyright 1999, 2000, 2001
16461d7d
KB		 3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
16461d7d
KB		 29
30#include "objfiles.h"
31#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 32#include "elf-bfd.h"
16461d7d 33
698cb3f0
KB		 34/* Hook for determining the global pointer when calling functions in
35 the inferior under AIX. The initialization code in ia64-aix-nat.c
36 sets this hook to the address of a function which will find the
37 global pointer for a given address.
38
39 The generic code which uses the dynamic section in the inferior for
40 finding the global pointer is not of much use on AIX since the
41 values obtained from the inferior have not been relocated. */
42
43CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
44
45/* An enumeration of the different IA-64 instruction types. */
46
16461d7d
KB		 47typedef enum instruction_type
48{
49 A, /* Integer ALU ; I-unit or M-unit */
50 I, /* Non-ALU integer; I-unit */
51 M, /* Memory ; M-unit */
52 F, /* Floating-point ; F-unit */
53 B, /* Branch ; B-unit */
54 L, /* Extended (L+X) ; I-unit */
55 X, /* Extended (L+X) ; I-unit */
56 undefined /* undefined or reserved */
57} instruction_type;
58
59/* We represent IA-64 PC addresses as the value of the instruction
60 pointer or'd with some bit combination in the low nibble which
61 represents the slot number in the bundle addressed by the
62 instruction pointer. The problem is that the Linux kernel
63 multiplies its slot numbers (for exceptions) by one while the
64 disassembler multiplies its slot numbers by 6. In addition, I've
65 heard it said that the simulator uses 1 as the multiplier.
66
67 I've fixed the disassembler so that the bytes_per_line field will
68 be the slot multiplier. If bytes_per_line comes in as zero, it
69 is set to six (which is how it was set up initially). -- objdump
70 displays pretty disassembly dumps with this value. For our purposes,
71 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
72 never want to also display the raw bytes the way objdump does. */
73
74#define SLOT_MULTIPLIER 1
75
76/* Length in bytes of an instruction bundle */
77
78#define BUNDLE_LEN 16
79
d7fa2ae2 80/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 81extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 82extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 83
16461d7d
KB		 84static gdbarch_init_ftype ia64_gdbarch_init;
85
86static gdbarch_register_name_ftype ia64_register_name;
87static gdbarch_register_raw_size_ftype ia64_register_raw_size;
88static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
89static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
90static gdbarch_register_byte_ftype ia64_register_byte;
91static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
92static gdbarch_frame_chain_ftype ia64_frame_chain;
93static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
94static gdbarch_skip_prologue_ftype ia64_skip_prologue;
95static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
96static gdbarch_get_saved_register_ftype ia64_get_saved_register;
97static gdbarch_extract_return_value_ftype ia64_extract_return_value;
98static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
99static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
100static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
101static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
102static gdbarch_store_return_value_ftype ia64_store_return_value;
103static gdbarch_store_struct_return_ftype ia64_store_struct_return;
104static gdbarch_push_arguments_ftype ia64_push_arguments;
105static gdbarch_push_return_address_ftype ia64_push_return_address;
106static gdbarch_pop_frame_ftype ia64_pop_frame;
107static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 108static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 109static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 110
111static int ia64_num_regs = 590;
112
113static int pc_regnum = IA64_IP_REGNUM;
114static int sp_regnum = IA64_GR12_REGNUM;
115static int fp_regnum = IA64_VFP_REGNUM;
116static int lr_regnum = IA64_VRAP_REGNUM;
117
118static LONGEST ia64_call_dummy_words[] = {0};
119
120/* Array of register names; There should be ia64_num_regs strings in
121 the initializer. */
122
123static char *ia64_register_names[] =
124{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
125 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
126 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
127 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
128 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
129 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
130 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
131 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
132 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
133 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
134 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
135 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
136 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
137 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
138 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
139 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
140
141 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
142 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
143 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
144 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
145 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
146 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
147 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
148 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
149 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
150 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
151 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
152 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
153 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
154 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
155 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
156 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
157
158 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
159 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
160 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
161 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
162 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
163 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
164 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
165 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
166
167 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
168
169 "vfp", "vrap",
170
171 "pr", "ip", "psr", "cfm",
172
173 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
174 "", "", "", "", "", "", "", "",
175 "rsc", "bsp", "bspstore", "rnat",
176 "", "fcr", "", "",
177 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
178 "ccv", "", "", "", "unat", "", "", "",
179 "fpsr", "", "", "", "itc",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "",
182 "pfs", "lc", "ec",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "",
190 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
191 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
192 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
193 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
194 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
195 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
196 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
197 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
198 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
199 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
200 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
201 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
202 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
203 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
204 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
205 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
206};
207
208struct frame_extra_info
244bc108
KB		 209 {
210 CORE_ADDR bsp; /* points at r32 for the current frame */
211 CORE_ADDR cfm; /* cfm value for current frame */
212 int sof; /* Size of frame (decoded from cfm value) */
213 int sol; /* Size of locals (decoded from cfm value) */
214 CORE_ADDR after_prologue;
215 /* Address of first instruction after the last
16461d7d
KB		 216 prologue instruction; Note that there may
217 be instructions from the function's body
218 intermingled with the prologue. */
244bc108
KB		 219 int mem_stack_frame_size;
220 /* Size of the memory stack frame (may be zero),
16461d7d 221 or -1 if it has not been determined yet. */
244bc108
KB		 222 int fp_reg; /* Register number (if any) used a frame pointer
223 for this frame. 0 if no register is being used
16461d7d 224 as the frame pointer. */
244bc108
KB		 225 };
226
227struct gdbarch_tdep
228 {
229 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 230 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
KB		 231 etc. */
232 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
233 /* OS specific function which, given a frame address
234 and register number, returns the offset to the
235 given register from the start of the frame. */
698cb3f0 236 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
KB		 237 };
238
698cb3f0
KB		 239#define SIGCONTEXT_REGISTER_ADDRESS \
240 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
241#define FIND_GLOBAL_POINTER \
242 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d
KB		 243
244static char *
245ia64_register_name (int reg)
246{
247 return ia64_register_names[reg];
248}
249
250int
251ia64_register_raw_size (int reg)
252{
253 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
254}
255
256int
257ia64_register_virtual_size (int reg)
258{
259 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
260}
261
262/* Return true iff register N's virtual format is different from
263 its raw format. */
264int
265ia64_register_convertible (int nr)
266{
267 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
268}
269
270const struct floatformat floatformat_ia64_ext =
271{
272 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
273 floatformat_intbit_yes
274};
275
276void
277ia64_register_convert_to_virtual (int regnum, struct type *type,
278 char *from, char *to)
279{
280 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
281 {
282 DOUBLEST val;
283 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
284 store_floating(to, TYPE_LENGTH(type), val);
285 }
286 else
287 error("ia64_register_convert_to_virtual called with non floating point register number");
288}
289
290void
291ia64_register_convert_to_raw (struct type *type, int regnum,
292 char *from, char *to)
293{
294 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
295 {
296 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
297 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
298 }
299 else
300 error("ia64_register_convert_to_raw called with non floating point register number");
301}
302
303struct type *
304ia64_register_virtual_type (int reg)
305{
306 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
307 return builtin_type_long_double;
308 else
309 return builtin_type_long;
310}
311
312int
313ia64_register_byte (int reg)
314{
315 return (8 * reg) +
316 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
317}
318
244bc108
KB		 319/* Read the given register from a sigcontext structure in the
320 specified frame. */
321
322static CORE_ADDR
323read_sigcontext_register (struct frame_info *frame, int regnum)
324{
325 CORE_ADDR regaddr;
326
327 if (frame == NULL)
8e65ff28
AC		 328 internal_error (__FILE__, __LINE__,
329 "read_sigcontext_register: NULL frame");
244bc108 330 if (!frame->signal_handler_caller)
8e65ff28
AC		 331 internal_error (__FILE__, __LINE__,
332 "read_sigcontext_register: frame not a signal_handler_caller");
244bc108 333 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC		 334 internal_error (__FILE__, __LINE__,
335 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108
KB		 336
337 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
338 if (regaddr)
339 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
340 else
8e65ff28
AC		 341 internal_error (__FILE__, __LINE__,
342 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
KB		 343}
344
16461d7d
KB		 345/* Extract ``len'' bits from an instruction bundle starting at
346 bit ``from''. */
347
244bc108 348static long long
16461d7d
KB		 349extract_bit_field (char *bundle, int from, int len)
350{
351 long long result = 0LL;
352 int to = from + len;
353 int from_byte = from / 8;
354 int to_byte = to / 8;
355 unsigned char *b = (unsigned char *) bundle;
356 unsigned char c;
357 int lshift;
358 int i;
359
360 c = b[from_byte];
361 if (from_byte == to_byte)
362 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
363 result = c >> (from % 8);
364 lshift = 8 - (from % 8);
365
366 for (i = from_byte+1; i < to_byte; i++)
367 {
368 result |= ((long long) b[i]) << lshift;
369 lshift += 8;
370 }
371
372 if (from_byte < to_byte && (to % 8 != 0))
373 {
374 c = b[to_byte];
375 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
376 result |= ((long long) c) << lshift;
377 }
378
379 return result;
380}
381
382/* Replace the specified bits in an instruction bundle */
383
244bc108 384static void
16461d7d
KB		 385replace_bit_field (char *bundle, long long val, int from, int len)
386{
387 int to = from + len;
388 int from_byte = from / 8;
389 int to_byte = to / 8;
390 unsigned char *b = (unsigned char *) bundle;
391 unsigned char c;
392
393 if (from_byte == to_byte)
394 {
395 unsigned char left, right;
396 c = b[from_byte];
397 left = (c >> (to % 8)) << (to % 8);
398 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
399 c = (unsigned char) (val & 0xff);
400 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
401 c |= right | left;
402 b[from_byte] = c;
403 }
404 else
405 {
406 int i;
407 c = b[from_byte];
408 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
409 c = c | (val << (from % 8));
410 b[from_byte] = c;
411 val >>= 8 - from % 8;
412
413 for (i = from_byte+1; i < to_byte; i++)
414 {
415 c = val & 0xff;
416 val >>= 8;
417 b[i] = c;
418 }
419
420 if (to % 8 != 0)
421 {
422 unsigned char cv = (unsigned char) val;
423 c = b[to_byte];
424 c = c >> (to % 8) << (to % 8);
425 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
426 b[to_byte] = c;
427 }
428 }
429}
430
431/* Return the contents of slot N (for N = 0, 1, or 2) in
432 and instruction bundle */
433
244bc108 434static long long
16461d7d
KB		 435slotN_contents (unsigned char *bundle, int slotnum)
436{
437 return extract_bit_field (bundle, 5+41*slotnum, 41);
438}
439
440/* Store an instruction in an instruction bundle */
441
244bc108 442static void
16461d7d
KB		 443replace_slotN_contents (unsigned char *bundle, long long instr, int slotnum)
444{
445 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
446}
447
64a5b29c 448static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 449{
450 { M, I, I }, /* 00 */
451 { M, I, I }, /* 01 */
452 { M, I, I }, /* 02 */
453 { M, I, I }, /* 03 */
454 { M, L, X }, /* 04 */
455 { M, L, X }, /* 05 */
456 { undefined, undefined, undefined }, /* 06 */
457 { undefined, undefined, undefined }, /* 07 */
458 { M, M, I }, /* 08 */
459 { M, M, I }, /* 09 */
460 { M, M, I }, /* 0A */
461 { M, M, I }, /* 0B */
462 { M, F, I }, /* 0C */
463 { M, F, I }, /* 0D */
464 { M, M, F }, /* 0E */
465 { M, M, F }, /* 0F */
466 { M, I, B }, /* 10 */
467 { M, I, B }, /* 11 */
468 { M, B, B }, /* 12 */
469 { M, B, B }, /* 13 */
470 { undefined, undefined, undefined }, /* 14 */
471 { undefined, undefined, undefined }, /* 15 */
472 { B, B, B }, /* 16 */
473 { B, B, B }, /* 17 */
474 { M, M, B }, /* 18 */
475 { M, M, B }, /* 19 */
476 { undefined, undefined, undefined }, /* 1A */
477 { undefined, undefined, undefined }, /* 1B */
478 { M, F, B }, /* 1C */
479 { M, F, B }, /* 1D */
480 { undefined, undefined, undefined }, /* 1E */
481 { undefined, undefined, undefined }, /* 1F */
482};
483
484/* Fetch and (partially) decode an instruction at ADDR and return the
485 address of the next instruction to fetch. */
486
487static CORE_ADDR
488fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
489{
490 char bundle[BUNDLE_LEN];
491 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
492 long long template;
493 int val;
494
495 if (slotnum > 2)
496 error("Can't fetch instructions for slot numbers greater than 2.");
497
498 addr &= ~0x0f;
499
500 val = target_read_memory (addr, bundle, BUNDLE_LEN);
501
502 if (val != 0)
503 return 0;
504
505 *instr = slotN_contents (bundle, slotnum);
506 template = extract_bit_field (bundle, 0, 5);
507 *it = template_encoding_table[(int)template][slotnum];
508
64a5b29c 509 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 510 addr += 16;
511 else
512 addr += (slotnum + 1) * SLOT_MULTIPLIER;
513
514 return addr;
515}
516
517/* There are 5 different break instructions (break.i, break.b,
518 break.m, break.f, and break.x), but they all have the same
519 encoding. (The five bit template in the low five bits of the
520 instruction bundle distinguishes one from another.)
521
522 The runtime architecture manual specifies that break instructions
523 used for debugging purposes must have the upper two bits of the 21
524 bit immediate set to a 0 and a 1 respectively. A breakpoint
525 instruction encodes the most significant bit of its 21 bit
526 immediate at bit 36 of the 41 bit instruction. The penultimate msb
527 is at bit 25 which leads to the pattern below.
528
529 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
530 it turns out that 0x80000 was used as the syscall break in the early
531 simulators. So I changed the pattern slightly to do "break.i 0x080001"
532 instead. But that didn't work either (I later found out that this
533 pattern was used by the simulator that I was using.) So I ended up
534 using the pattern seen below. */
535
536#if 0
537#define BREAKPOINT 0x00002000040LL
538#endif
539#define BREAKPOINT 0x00003333300LL
540
541static int
542ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
543{
544 char bundle[BUNDLE_LEN];
545 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
546 long long instr;
547 int val;
548
549 if (slotnum > 2)
550 error("Can't insert breakpoint for slot numbers greater than 2.");
551
552 addr &= ~0x0f;
553
554 val = target_read_memory (addr, bundle, BUNDLE_LEN);
555 instr = slotN_contents (bundle, slotnum);
556 memcpy(contents_cache, &instr, sizeof(instr));
557 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
558 if (val == 0)
559 target_write_memory (addr, bundle, BUNDLE_LEN);
560
561 return val;
562}
563
564static int
565ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
566{
567 char bundle[BUNDLE_LEN];
568 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
569 long long instr;
570 int val;
571
572 addr &= ~0x0f;
573
574 val = target_read_memory (addr, bundle, BUNDLE_LEN);
575 memcpy (&instr, contents_cache, sizeof instr);
576 replace_slotN_contents (bundle, instr, slotnum);
577 if (val == 0)
578 target_write_memory (addr, bundle, BUNDLE_LEN);
579
580 return val;
581}
582
583/* We don't really want to use this, but remote.c needs to call it in order
584 to figure out if Z-packets are supported or not. Oh, well. */
585unsigned char *
fba45db2 586ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 587{
588 static unsigned char breakpoint[] =
589 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
590 *lenptr = sizeof (breakpoint);
591#if 0
592 *pcptr &= ~0x0f;
593#endif
594 return breakpoint;
595}
596
597CORE_ADDR
598ia64_read_pc (int pid)
599{
600 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
601 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, pid);
602 int slot_num = (psr_value >> 41) & 3;
603
604 return pc_value | (slot_num * SLOT_MULTIPLIER);
605}
606
607void
608ia64_write_pc (CORE_ADDR new_pc, int pid)
609{
610 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
611 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
612 psr_value &= ~(3LL << 41);
613 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
614
615 new_pc &= ~0xfLL;
616
617 write_register_pid (IA64_PSR_REGNUM, psr_value, pid);
618 write_register_pid (IA64_IP_REGNUM, new_pc, pid);
619}
620
621#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
622
623/* Returns the address of the slot that's NSLOTS slots away from
624 the address ADDR. NSLOTS may be positive or negative. */
625static CORE_ADDR
626rse_address_add(CORE_ADDR addr, int nslots)
627{
628 CORE_ADDR new_addr;
629 int mandatory_nat_slots = nslots / 63;
630 int direction = nslots < 0 ? -1 : 1;
631
632 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
633
634 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
635 new_addr += 8 * direction;
636
637 if (IS_NaT_COLLECTION_ADDR(new_addr))
638 new_addr += 8 * direction;
639
640 return new_addr;
641}
642
643/* The IA-64 frame chain is a bit odd. We won't always have a frame
644 pointer, so we use the SP value as the FP for the purpose of
645 creating a frame. There is sometimes a register (not fixed) which
646 is used as a frame pointer. When this register exists, it is not
647 especially hard to determine which one is being used. It isn't
648 even really hard to compute the frame chain, but it can be
649 computationally expensive. So, instead of making life difficult
650 (and slow), we pick a more convenient representation of the frame
651 chain, knowing that we'll have to make some small adjustments
652 in other places. (E.g, note that read_fp() and write_fp() are
653 actually read_sp() and write_sp() below in ia64_gdbarch_init()
654 below.)
655
656 Okay, so what is the frame chain exactly? It'll be the SP value
657 at the time that the function in question was entered.
658
659 Note that this *should* actually the frame pointer for the current
660 function! But as I note above, if we were to attempt to find the
661 address of the beginning of the previous frame, we'd waste a lot
662 of cycles for no good reason. So instead, we simply choose to
663 represent the frame chain as the end of the previous frame instead
664 of the beginning. */
665
666CORE_ADDR
667ia64_frame_chain (struct frame_info *frame)
668{
244bc108
KB		 669 if (frame->signal_handler_caller)
670 return read_sigcontext_register (frame, sp_regnum);
671 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
672 return frame->frame;
16461d7d 673 else
244bc108
KB		 674 {
675 FRAME_INIT_SAVED_REGS (frame);
676 if (frame->saved_regs[IA64_VFP_REGNUM])
677 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
678 else
679 return frame->frame + frame->extra_info->mem_stack_frame_size;
680 }
16461d7d
KB		 681}
682
683CORE_ADDR
684ia64_frame_saved_pc (struct frame_info *frame)
685{
244bc108
KB		 686 if (frame->signal_handler_caller)
687 return read_sigcontext_register (frame, pc_regnum);
688 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
689 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
690 else
691 {
692 FRAME_INIT_SAVED_REGS (frame);
16461d7d 693
244bc108
KB		 694 if (frame->saved_regs[IA64_VRAP_REGNUM])
695 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
696 else if (frame->next && frame->next->signal_handler_caller)
697 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
698 else /* either frameless, or not far enough along in the prologue... */
699 return ia64_saved_pc_after_call (frame);
700 }
16461d7d
KB		 701}
702
703#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
704 || (8 <= (_regnum_) && (_regnum_) <= 11) \
705 || (14 <= (_regnum_) && (_regnum_) <= 31))
706#define imm9(_instr_) \
707 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
708 | (((_instr_) & 0x00008000000LL) >> 20) \
709 | (((_instr_) & 0x00000001fc0LL) >> 6))
710
711static CORE_ADDR
712examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
713{
714 CORE_ADDR next_pc;
715 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 716 instruction_type it;
717 long long instr;
718 int do_fsr_stuff = 0;
719
720 int cfm_reg = 0;
721 int ret_reg = 0;
722 int fp_reg = 0;
723 int unat_save_reg = 0;
724 int pr_save_reg = 0;
725 int mem_stack_frame_size = 0;
726 int spill_reg = 0;
727 CORE_ADDR spill_addr = 0;
0927a22b
KB		 728 char instores[8];
729 char infpstores[8];
730
731 memset (instores, 0, sizeof instores);
732 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 733
734 if (frame && !frame->saved_regs)
735 {
736 frame_saved_regs_zalloc (frame);
737 do_fsr_stuff = 1;
738 }
739
740 if (frame
741 && !do_fsr_stuff
742 && frame->extra_info->after_prologue != 0
743 && frame->extra_info->after_prologue <= lim_pc)
744 return frame->extra_info->after_prologue;
745
746 /* Must start with an alloc instruction */
747 next_pc = fetch_instruction (pc, &it, &instr);
748 if (pc < lim_pc && next_pc
749 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
750 {
751 /* alloc */
752 int sor = (int) ((instr & 0x00078000000LL) >> 27);
753 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
754 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
755 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
756 we could compare against the size given to us via the cfm as
757 either a sanity check or possibly to see if the frame has been
758 changed by a later alloc instruction... */
759 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
760 cfm_reg = rN;
761 last_prologue_pc = next_pc;
762 pc = next_pc;
763 }
764 else
765 pc = lim_pc; /* We're done early */
766
767 /* Loop, looking for prologue instructions, keeping track of
768 where preserved registers were spilled. */
769 while (pc < lim_pc)
770 {
771 next_pc = fetch_instruction (pc, &it, &instr);
772 if (next_pc == 0)
773 break;
774
0927a22b
KB		 775 if (it == B || ((instr & 0x3fLL) != 0LL))
776 {
777 /* Exit loop upon hitting a branch instruction or a predicated
778 instruction. */
779 break;
780 }
781 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 782 {
783 /* Move from BR */
784 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
785 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
786 int qp = (int) (instr & 0x0000000003f);
787
788 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
789 {
790 ret_reg = rN;
791 last_prologue_pc = next_pc;
792 }
793 }
794 else if ((it == I || it == M)
795 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
796 {
797 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
798 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
799 | ((instr & 0x001f8000000LL) >> 20)
800 | ((instr & 0x000000fe000LL) >> 13));
801 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
802 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
803 int qp = (int) (instr & 0x0000000003fLL);
804
805 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
806 {
807 /* mov rN, r12 */
808 fp_reg = rN;
809 last_prologue_pc = next_pc;
810 }
811 else if (qp == 0 && rN == 12 && rM == 12)
812 {
813 /* adds r12, -mem_stack_frame_size, r12 */
814 mem_stack_frame_size -= imm;
815 last_prologue_pc = next_pc;
816 }
817 else if (qp == 0 && rN == 2
818 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
819 {
820 /* adds r2, spilloffset, rFramePointer
821 or
822 adds r2, spilloffset, r12
823
824 Get ready for stf.spill or st8.spill instructions.
825 The address to start spilling at is loaded into r2.
826 FIXME: Why r2? That's what gcc currently uses; it
827 could well be different for other compilers. */
828
829 /* Hmm... whether or not this will work will depend on
830 where the pc is. If it's still early in the prologue
831 this'll be wrong. FIXME */
832 spill_addr = (frame ? frame->frame : 0)
833 + (rM == 12 ? 0 : mem_stack_frame_size)
834 + imm;
835 spill_reg = rN;
836 last_prologue_pc = next_pc;
837 }
838 }
839 else if (it == M
840 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
841 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
842 {
843 /* stf.spill [rN] = fM, imm9
844 or
845 stf.spill [rN] = fM */
846
847 int imm = imm9(instr);
848 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
849 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
850 int qp = (int) (instr & 0x0000000003fLL);
851 if (qp == 0 && rN == spill_reg && spill_addr != 0
852 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
853 {
854 if (do_fsr_stuff)
855 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
856
857 if ((instr & 0x1efc0000000) == 0x0eec0000000)
858 spill_addr += imm;
859 else
860 spill_addr = 0; /* last one; must be done */
861 last_prologue_pc = next_pc;
862 }
863 }
864 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
865 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
866 {
867 /* mov.m rN = arM
868 or
869 mov.i rN = arM */
870
871 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
872 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
873 int qp = (int) (instr & 0x0000000003fLL);
874 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
875 {
876 /* We have something like "mov.m r3 = ar.unat". Remember the
877 r3 (or whatever) and watch for a store of this register... */
878 unat_save_reg = rN;
879 last_prologue_pc = next_pc;
880 }
881 }
882 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
883 {
884 /* mov rN = pr */
885 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
886 int qp = (int) (instr & 0x0000000003fLL);
887 if (qp == 0 && isScratch (rN))
888 {
889 pr_save_reg = rN;
890 last_prologue_pc = next_pc;
891 }
892 }
893 else if (it == M
894 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
895 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
896 {
897 /* st8 [rN] = rM
898 or
899 st8 [rN] = rM, imm9 */
900 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
901 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
902 int qp = (int) (instr & 0x0000000003fLL);
903 if (qp == 0 && rN == spill_reg && spill_addr != 0
904 && (rM == unat_save_reg || rM == pr_save_reg))
905 {
906 /* We've found a spill of either the UNAT register or the PR
907 register. (Well, not exactly; what we've actually found is
908 a spill of the register that UNAT or PR was moved to).
909 Record that fact and move on... */
910 if (rM == unat_save_reg)
911 {
912 /* Track UNAT register */
913 if (do_fsr_stuff)
914 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
915 unat_save_reg = 0;
916 }
917 else
918 {
919 /* Track PR register */
920 if (do_fsr_stuff)
921 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
922 pr_save_reg = 0;
923 }
924 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
925 /* st8 [rN] = rM, imm9 */
926 spill_addr += imm9(instr);
927 else
928 spill_addr = 0; /* must be done spilling */
929 last_prologue_pc = next_pc;
930 }
0927a22b
KB		 931 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
932 {
933 /* Allow up to one store of each input register. */
934 instores[rM-32] = 1;
935 last_prologue_pc = next_pc;
936 }
937 }
938 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
939 {
940 /* One of
941 st1 [rN] = rM
942 st2 [rN] = rM
943 st4 [rN] = rM
944 st8 [rN] = rM
945 Note that the st8 case is handled in the clause above.
946
947 Advance over stores of input registers. One store per input
948 register is permitted. */
949 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
950 int qp = (int) (instr & 0x0000000003fLL);
951 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
952 {
953 instores[rM-32] = 1;
954 last_prologue_pc = next_pc;
955 }
956 }
957 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
958 {
959 /* Either
960 stfs [rN] = fM
961 or
962 stfd [rN] = fM
963
964 Advance over stores of floating point input registers. Again
965 one store per register is permitted */
966 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
967 int qp = (int) (instr & 0x0000000003fLL);
968 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
969 {
970 infpstores[fM-8] = 1;
971 last_prologue_pc = next_pc;
972 }
16461d7d
KB		 973 }
974 else if (it == M
975 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
976 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
977 {
978 /* st8.spill [rN] = rM
979 or
980 st8.spill [rN] = rM, imm9 */
981 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
982 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
983 int qp = (int) (instr & 0x0000000003fLL);
984 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
985 {
986 /* We've found a spill of one of the preserved general purpose
987 regs. Record the spill address and advance the spill
988 register if appropriate. */
989 if (do_fsr_stuff)
990 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
991 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
992 /* st8.spill [rN] = rM, imm9 */
993 spill_addr += imm9(instr);
994 else
995 spill_addr = 0; /* Done spilling */
996 last_prologue_pc = next_pc;
997 }
998 }
16461d7d
KB		 999
1000 pc = next_pc;
1001 }
1002
1003 if (do_fsr_stuff) {
1004 int i;
1005 CORE_ADDR addr;
3a854e23
KB		 1006 int sor, rrb_gr;
1007
1008 /* Extract the size of the rotating portion of the stack
1009 frame and the register rename base from the current
1010 frame marker. */
1011 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1012 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
16461d7d
KB		 1013
1014 for (i = 0, addr = frame->extra_info->bsp;
1015 i < frame->extra_info->sof;
1016 i++, addr += 8)
1017 {
1018 if (IS_NaT_COLLECTION_ADDR (addr))
1019 {
1020 addr += 8;
1021 }
3a854e23
KB		 1022 if (i < sor)
1023 frame->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1024 = addr;
1025 else
1026 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB		 1027
1028 if (i+32 == cfm_reg)
1029 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1030 if (i+32 == ret_reg)
1031 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1032 if (i+32 == fp_reg)
1033 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1034 }
1035 }
1036
1037 if (frame && frame->extra_info) {
1038 frame->extra_info->after_prologue = last_prologue_pc;
1039 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1040 frame->extra_info->fp_reg = fp_reg;
1041 }
1042
1043 return last_prologue_pc;
1044}
1045
1046CORE_ADDR
1047ia64_skip_prologue (CORE_ADDR pc)
1048{
1049 return examine_prologue (pc, pc+1024, 0);
1050}
1051
1052void
1053ia64_frame_init_saved_regs (struct frame_info *frame)
1054{
16461d7d
KB		 1055 if (frame->saved_regs)
1056 return;
1057
244bc108
KB		 1058 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1059 {
1060 int regno;
16461d7d 1061
244bc108 1062 frame_saved_regs_zalloc (frame);
16461d7d 1063
244bc108
KB		 1064 frame->saved_regs[IA64_VRAP_REGNUM] =
1065 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1066 frame->saved_regs[IA64_CFM_REGNUM] =
1067 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1068 frame->saved_regs[IA64_PSR_REGNUM] =
1069 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1070#if 0
1071 frame->saved_regs[IA64_BSP_REGNUM] =
1072 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1073#endif
1074 frame->saved_regs[IA64_RNAT_REGNUM] =
1075 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1076 frame->saved_regs[IA64_CCV_REGNUM] =
1077 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1078 frame->saved_regs[IA64_UNAT_REGNUM] =
1079 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1080 frame->saved_regs[IA64_FPSR_REGNUM] =
1081 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1082 frame->saved_regs[IA64_PFS_REGNUM] =
1083 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1084 frame->saved_regs[IA64_LC_REGNUM] =
1085 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1086 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1087 if (regno != sp_regnum)
1088 frame->saved_regs[regno] =
1089 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1090 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1091 frame->saved_regs[regno] =
1092 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1093 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1094 frame->saved_regs[regno] =
1095 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1096 }
1097 else
1098 {
244bc108 1099 CORE_ADDR func_start;
16461d7d 1100
244bc108
KB		 1101 func_start = get_pc_function_start (frame->pc);
1102 examine_prologue (func_start, frame->pc, frame);
1103 }
16461d7d
KB		 1104}
1105
1106void
1107ia64_get_saved_register (char *raw_buffer,
1108 int *optimized,
1109 CORE_ADDR *addrp,
1110 struct frame_info *frame,
1111 int regnum,
1112 enum lval_type *lval)
1113{
244bc108 1114 int is_dummy_frame;
16461d7d
KB		 1115
1116 if (!target_has_registers)
1117 error ("No registers.");
1118
1119 if (optimized != NULL)
1120 *optimized = 0;
244bc108
KB		 1121
1122 if (addrp != NULL)
1123 *addrp = 0;
1124
1125 if (lval != NULL)
1126 *lval = not_lval;
1127
1128 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1129
1130 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1131 {
1132 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1133 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1134 }
1135 else if (regnum == IA64_BSP_REGNUM)
1136 {
16461d7d
KB		 1137 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1138 frame->extra_info->bsp);
1139 }
1140 else if (regnum == IA64_VFP_REGNUM)
1141 {
1142 /* If the function in question uses an automatic register (r32-r127)
1143 for the frame pointer, it'll be found by ia64_find_saved_register()
1144 above. If the function lacks one of these frame pointers, we can
1145 still provide a value since we know the size of the frame */
1146 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1147 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1148 }
1149 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1150 {
1151 char pr_raw_buffer[MAX_REGISTER_RAW_SIZE];
1152 int pr_optim;
1153 enum lval_type pr_lval;
1154 CORE_ADDR pr_addr;
1155 int prN_val;
1156 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1157 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB		 1158 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1159 {
1160 /* Fetch predicate register rename base from current frame
1161 marker for this frame. */
1162 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1163
1164 /* Adjust the register number to account for register rotation. */
1165 regnum = IA64_PR16_REGNUM
1166 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1167 }
16461d7d
KB		 1168 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1169 regnum - IA64_PR0_REGNUM, 1);
1170 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1171 }
1172 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1173 {
1174 char unat_raw_buffer[MAX_REGISTER_RAW_SIZE];
1175 int unat_optim;
1176 enum lval_type unat_lval;
1177 CORE_ADDR unat_addr;
1178 int unatN_val;
1179 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1180 frame, IA64_UNAT_REGNUM, &unat_lval);
1181 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1182 regnum - IA64_NAT0_REGNUM, 1);
1183 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1184 unatN_val);
16461d7d
KB		 1185 }
1186 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1187 {
1188 int natval = 0;
1189 /* Find address of general register corresponding to nat bit we're
1190 interested in. */
244bc108
KB		 1191 CORE_ADDR gr_addr = 0;
1192
1193 if (!is_dummy_frame)
1194 {
1195 FRAME_INIT_SAVED_REGS (frame);
1196 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1197 + IA64_GR0_REGNUM];
1198 }
16461d7d
KB		 1199 if (gr_addr)
1200 {
1201 /* Compute address of nat collection bits */
1202 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1203 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1204 CORE_ADDR nat_collection;
1205 int nat_bit;
1206 /* If our nat collection address is bigger than bsp, we have to get
1207 the nat collection from rnat. Otherwise, we fetch the nat
1208 collection from the computed address. */
1209 if (nat_addr >= bsp)
1210 nat_collection = read_register (IA64_RNAT_REGNUM);
1211 else
1212 nat_collection = read_memory_integer (nat_addr, 8);
1213 nat_bit = (gr_addr >> 3) & 0x3f;
1214 natval = (nat_collection >> nat_bit) & 1;
1215 }
1216 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1217 }
1218 else if (regnum == IA64_IP_REGNUM)
1219 {
1220 CORE_ADDR pc;
1221 if (frame->next)
1222 {
1223 /* FIXME: Set *addrp, *lval when possible. */
1224 pc = ia64_frame_saved_pc (frame->next);
1225 }
1226 else
1227 {
1228 pc = read_pc ();
1229 }
1230 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1231 }
1232 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1233 {
1234 CORE_ADDR addr = 0;
1235 if (!is_dummy_frame)
1236 {
1237 FRAME_INIT_SAVED_REGS (frame);
1238 addr = frame->saved_regs[regnum];
1239 }
1240
1241 if (addr != 0)
1242 {
1243 if (lval != NULL)
1244 *lval = lval_memory;
1245 if (addrp != NULL)
1246 *addrp = addr;
1247 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1248 }
1249 else
1250 {
1251 /* r32 - r127 must be fetchable via memory. If they aren't,
1252 then the register is unavailable */
1253 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1254 }
16461d7d
KB		 1255 }
1256 else
1257 {
3a854e23
KB		 1258 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1259 {
1260 /* Fetch floating point register rename base from current
1261 frame marker for this frame. */
1262 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1263
1264 /* Adjust the floating point register number to account for
1265 register rotation. */
1266 regnum = IA64_FR32_REGNUM
1267 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1268 }
1269
244bc108
KB		 1270 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1271 regnum, lval);
16461d7d 1272 }
16461d7d
KB		 1273}
1274
1275/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1276 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1277 and TYPE is the type (which is known to be struct, union or array). */
1278int
1279ia64_use_struct_convention (int gcc_p, struct type *type)
1280{
64a5b29c
KB		 1281 struct type *float_elt_type;
1282
1283 /* HFAs are structures (or arrays) consisting entirely of floating
1284 point values of the same length. Up to 8 of these are returned
1285 in registers. Don't use the struct convention when this is the
1286 case. */
1287 float_elt_type = is_float_or_hfa_type (type);
1288 if (float_elt_type != NULL
1289 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1290 return 0;
1291
1292 /* Other structs of length 32 or less are returned in r8-r11.
1293 Don't use the struct convention for those either. */
16461d7d
KB		 1294 return TYPE_LENGTH (type) > 32;
1295}
1296
1297void
1298ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1299{
64a5b29c
KB		 1300 struct type *float_elt_type;
1301
1302 float_elt_type = is_float_or_hfa_type (type);
1303 if (float_elt_type != NULL)
1304 {
1305 int offset = 0;
1306 int regnum = IA64_FR8_REGNUM;
1307 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1308
1309 while (n-- > 0)
1310 {
1311 ia64_register_convert_to_virtual (regnum, float_elt_type,
1312 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1313 offset += TYPE_LENGTH (float_elt_type);
1314 regnum++;
1315 }
1316 }
16461d7d 1317 else
64a5b29c
KB		 1318 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1319 TYPE_LENGTH (type));
16461d7d
KB		 1320}
1321
1322/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1323 like this is necessary though since the IA-64 calling conventions specify
1324 that r8 is not preserved. */
1325static CORE_ADDR struct_return_address;
1326
1327CORE_ADDR
1328ia64_extract_struct_value_address (char *regbuf)
1329{
1330 /* FIXME: See above. */
1331 return struct_return_address;
1332}
1333
1334void
1335ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1336{
1337 /* FIXME: See above. */
1338 /* Note that most of the work was done in ia64_push_arguments() */
1339 struct_return_address = addr;
1340}
1341
1342int
1343ia64_frameless_function_invocation (struct frame_info *frame)
1344{
fbad0893
KB		 1345 FRAME_INIT_SAVED_REGS (frame);
1346 return (frame->extra_info->mem_stack_frame_size == 0);
16461d7d
KB		 1347}
1348
1349CORE_ADDR
1350ia64_saved_pc_after_call (struct frame_info *frame)
1351{
1352 return read_register (IA64_BR0_REGNUM);
1353}
1354
1355CORE_ADDR
1356ia64_frame_args_address (struct frame_info *frame)
1357{
1358 /* frame->frame points at the SP for this frame; But we want the start
1359 of the frame, not the end. Calling frame chain will get his for us. */
1360 return ia64_frame_chain (frame);
1361}
1362
1363CORE_ADDR
1364ia64_frame_locals_address (struct frame_info *frame)
1365{
1366 /* frame->frame points at the SP for this frame; But we want the start
1367 of the frame, not the end. Calling frame chain will get his for us. */
1368 return ia64_frame_chain (frame);
1369}
1370
1371void
1372ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1373{
1374 CORE_ADDR bsp, cfm;
244bc108
KB		 1375 int next_frame_is_call_dummy = ((frame->next != NULL)
1376 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1377 frame->next->frame));
16461d7d
KB		 1378
1379 frame->extra_info = (struct frame_extra_info *)
1380 frame_obstack_alloc (sizeof (struct frame_extra_info));
1381
1382 if (frame->next == 0)
1383 {
1384 bsp = read_register (IA64_BSP_REGNUM);
1385 cfm = read_register (IA64_CFM_REGNUM);
1386
1387 }
244bc108
KB		 1388 else if (frame->next->signal_handler_caller)
1389 {
1390 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1391 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1392 }
1393 else if (next_frame_is_call_dummy)
1394 {
1395 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1396 IA64_BSP_REGNUM);
1397 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1398 IA64_CFM_REGNUM);
1399 }
16461d7d
KB		 1400 else
1401 {
1402 struct frame_info *frn = frame->next;
16461d7d
KB		 1403
1404 FRAME_INIT_SAVED_REGS (frn);
1405
1406 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1407 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1408 else if (frn->next && frn->next->signal_handler_caller)
1409 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1410 else if (frn->next
1411 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1412 frn->next->frame))
1413 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1414 IA64_PFS_REGNUM);
16461d7d 1415 else
76d689a6 1416 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1417
1418 bsp = frn->extra_info->bsp;
1419 }
1420 frame->extra_info->cfm = cfm;
1421 frame->extra_info->sof = cfm & 0x7f;
1422 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1423 if (frame->next == 0
1424 || frame->next->signal_handler_caller
1425 || next_frame_is_call_dummy)
16461d7d
KB		 1426 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1427 else
1428 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1429
1430 frame->extra_info->after_prologue = 0;
1431 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1432 frame->extra_info->fp_reg = 0;
1433}
1434
64a5b29c
KB		 1435static int
1436is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1437{
1438 switch (TYPE_CODE (t))
1439 {
1440 case TYPE_CODE_FLT:
1441 if (*etp)
1442 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1443 else
1444 {
1445 *etp = t;
1446 return 1;
1447 }
1448 break;
1449 case TYPE_CODE_ARRAY:
1450 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t), etp);
1451 break;
1452 case TYPE_CODE_STRUCT:
1453 {
1454 int i;
1455
1456 for (i = 0; i < TYPE_NFIELDS (t); i++)
1457 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t, i), etp))
1458 return 0;
1459 return 1;
1460 }
1461 break;
1462 default:
1463 return 0;
1464 break;
1465 }
1466}
1467
1468/* Determine if the given type is one of the floating point types or
1469 and HFA (which is a struct, array, or combination thereof whose
1470 bottom-most elements are all of the same floating point type.) */
1471
1472static struct type *
1473is_float_or_hfa_type (struct type *t)
1474{
1475 struct type *et = 0;
1476
1477 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1478}
1479
1480
1481/* Attempt to find (and return) the global pointer for the given
1482 function.
1483
1484 This is a rather nasty bit of code searchs for the .dynamic section
1485 in the objfile corresponding to the pc of the function we're trying
1486 to call. Once it finds the addresses at which the .dynamic section
1487 lives in the child process, it scans the Elf64_Dyn entries for a
1488 DT_PLTGOT tag. If it finds one of these, the corresponding
1489 d_un.d_ptr value is the global pointer. */
1490
1491static CORE_ADDR
698cb3f0 1492generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1493{
76d689a6 1494 struct obj_section *faddr_sect;
64a5b29c 1495
76d689a6
KB		 1496 faddr_sect = find_pc_section (faddr);
1497 if (faddr_sect != NULL)
64a5b29c
KB		 1498 {
1499 struct obj_section *osect;
1500
76d689a6 1501 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1502 {
1503 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1504 break;
1505 }
1506
76d689a6 1507 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1508 {
1509 CORE_ADDR addr;
1510
1511 addr = osect->addr;
1512 while (addr < osect->endaddr)
1513 {
1514 int status;
1515 LONGEST tag;
1516 char buf[8];
1517
1518 status = target_read_memory (addr, buf, sizeof (buf));
1519 if (status != 0)
1520 break;
1521 tag = extract_signed_integer (buf, sizeof (buf));
1522
1523 if (tag == DT_PLTGOT)
1524 {
1525 CORE_ADDR global_pointer;
1526
1527 status = target_read_memory (addr + 8, buf, sizeof (buf));
1528 if (status != 0)
1529 break;
1530 global_pointer = extract_address (buf, sizeof (buf));
1531
1532 /* The payoff... */
1533 return global_pointer;
1534 }
1535
1536 if (tag == DT_NULL)
1537 break;
1538
1539 addr += 16;
1540 }
1541 }
1542 }
1543 return 0;
1544}
1545
1546/* Given a function's address, attempt to find (and return) the
1547 corresponding (canonical) function descriptor. Return 0 if
1548 not found. */
1549static CORE_ADDR
1550find_extant_func_descr (CORE_ADDR faddr)
1551{
76d689a6 1552 struct obj_section *faddr_sect;
64a5b29c
KB		 1553
1554 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1555 faddr_sect = find_pc_section (faddr);
1556 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1557 return faddr;
1558
76d689a6 1559 if (faddr_sect != NULL)
64a5b29c 1560 {
76d689a6
KB		 1561 struct obj_section *osect;
1562 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1563 {
1564 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1565 break;
1566 }
1567
76d689a6 1568 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1569 {
1570 CORE_ADDR addr;
1571
1572 addr = osect->addr;
1573 while (addr < osect->endaddr)
1574 {
1575 int status;
1576 LONGEST faddr2;
1577 char buf[8];
1578
1579 status = target_read_memory (addr, buf, sizeof (buf));
1580 if (status != 0)
1581 break;
1582 faddr2 = extract_signed_integer (buf, sizeof (buf));
1583
1584 if (faddr == faddr2)
1585 return addr;
1586
1587 addr += 16;
1588 }
1589 }
1590 }
1591 return 0;
1592}
1593
1594/* Attempt to find a function descriptor corresponding to the
1595 given address. If none is found, construct one on the
1596 stack using the address at fdaptr */
1597
1598static CORE_ADDR
1599find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1600{
1601 CORE_ADDR fdesc;
1602
1603 fdesc = find_extant_func_descr (faddr);
1604
1605 if (fdesc == 0)
1606 {
1607 CORE_ADDR global_pointer;
1608 char buf[16];
1609
1610 fdesc = *fdaptr;
1611 *fdaptr += 16;
1612
698cb3f0 1613 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB		 1614
1615 if (global_pointer == 0)
1616 global_pointer = read_register (IA64_GR1_REGNUM);
1617
1618 store_address (buf, 8, faddr);
1619 store_address (buf + 8, 8, global_pointer);
1620
1621 write_memory (fdesc, buf, 16);
1622 }
1623
1624 return fdesc;
1625}
16461d7d
KB		 1626
1627CORE_ADDR
1628ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1629 int struct_return, CORE_ADDR struct_addr)
1630{
1631 int argno;
1632 value_ptr arg;
1633 struct type *type;
1634 int len, argoffset;
64a5b29c 1635 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1636 int floatreg;
64a5b29c 1637 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1638
1639 nslots = 0;
64a5b29c 1640 nfuncargs = 0;
16461d7d
KB		 1641 /* Count the number of slots needed for the arguments */
1642 for (argno = 0; argno < nargs; argno++)
1643 {
1644 arg = args[argno];
1645 type = check_typedef (VALUE_TYPE (arg));
1646 len = TYPE_LENGTH (type);
1647
1648 /* FIXME: This is crude and it is wrong (IMO), but it matches
1649 what gcc does, I think. */
1650 if (len > 8 && (nslots & 1))
1651 nslots++;
1652
64a5b29c
KB		 1653 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1654 nfuncargs++;
1655
16461d7d
KB		 1656 nslots += (len + 7) / 8;
1657 }
1658
64a5b29c 1659 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1660 rseslots = (nslots > 8) ? 8 : nslots;
1661 memslots = nslots - rseslots;
1662
64a5b29c 1663 /* Allocate a new RSE frame */
16461d7d
KB		 1664 cfm = read_register (IA64_CFM_REGNUM);
1665
1666 bsp = read_register (IA64_BSP_REGNUM);
1667 bsp = rse_address_add (bsp, cfm & 0x7f);
1668 new_bsp = rse_address_add (bsp, rseslots);
1669 write_register (IA64_BSP_REGNUM, new_bsp);
1670
1671 pfs = read_register (IA64_PFS_REGNUM);
1672 pfs &= 0xc000000000000000LL;
1673 pfs |= (cfm & 0xffffffffffffLL);
1674 write_register (IA64_PFS_REGNUM, pfs);
1675
1676 cfm &= 0xc000000000000000LL;
1677 cfm |= rseslots;
1678 write_register (IA64_CFM_REGNUM, cfm);
1679
64a5b29c
KB		 1680 /* We will attempt to find function descriptors in the .opd segment,
1681 but if we can't we'll construct them ourselves. That being the
1682 case, we'll need to reserve space on the stack for them. */
1683 funcdescaddr = sp - nfuncargs * 16;
1684 funcdescaddr &= ~0xfLL;
1685
1686 /* Adjust the stack pointer to it's new value. The calling conventions
1687 require us to have 16 bytes of scratch, plus whatever space is
1688 necessary for the memory slots and our function descriptors */
1689 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1690 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1691
64a5b29c
KB		 1692 /* Place the arguments where they belong. The arguments will be
1693 either placed in the RSE backing store or on the memory stack.
1694 In addition, floating point arguments or HFAs are placed in
1695 floating point registers. */
16461d7d
KB		 1696 slotnum = 0;
1697 floatreg = IA64_FR8_REGNUM;
1698 for (argno = 0; argno < nargs; argno++)
1699 {
64a5b29c
KB		 1700 struct type *float_elt_type;
1701
16461d7d
KB		 1702 arg = args[argno];
1703 type = check_typedef (VALUE_TYPE (arg));
1704 len = TYPE_LENGTH (type);
64a5b29c
KB		 1705
1706 /* Special handling for function parameters */
1707 if (len == 8
1708 && TYPE_CODE (type) == TYPE_CODE_PTR
1709 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1710 {
1711 char val_buf[8];
1712
1713 store_address (val_buf, 8,
1714 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1715 &funcdescaddr));
1716 if (slotnum < rseslots)
1717 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1718 else
1719 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1720 slotnum++;
1721 continue;
1722 }
1723
1724 /* Normal slots */
16461d7d
KB		 1725 if (len > 8 && (slotnum & 1))
1726 slotnum++;
1727 argoffset = 0;
1728 while (len > 0)
1729 {
1730 char val_buf[8];
1731
1732 memset (val_buf, 0, 8);
1733 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1734
1735 if (slotnum < rseslots)
1736 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1737 else
1738 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1739
1740 argoffset += 8;
1741 len -= 8;
1742 slotnum++;
1743 }
64a5b29c
KB		 1744
1745 /* Handle floating point types (including HFAs) */
1746 float_elt_type = is_float_or_hfa_type (type);
1747 if (float_elt_type != NULL)
1748 {
1749 argoffset = 0;
1750 len = TYPE_LENGTH (type);
1751 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1752 {
1753 ia64_register_convert_to_raw (
1754 float_elt_type,
1755 floatreg,
1756 VALUE_CONTENTS (arg) + argoffset,
1757 &registers[REGISTER_BYTE (floatreg)]);
1758 floatreg++;
1759 argoffset += TYPE_LENGTH (float_elt_type);
1760 len -= TYPE_LENGTH (float_elt_type);
1761 }
16461d7d
KB		 1762 }
1763 }
1764
64a5b29c 1765 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1766 if (struct_return)
1767 {
1768 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1769 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1770 struct_addr);
1771 }
1772
64a5b29c 1773 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1774 target_store_registers (-1);
1775
1776 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1777 to be defined to call generic_save_dummy_frame_tos(). But at the
1778 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1779 I chose to put this call here instead of using the old mechanisms.
1780 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1781 line
1782
1783 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1784
1785 to ia64_gdbarch_init() and remove the line below. */
1786 generic_save_dummy_frame_tos (sp);
1787
1788 return sp;
1789}
1790
1791CORE_ADDR
1792ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1793{
698cb3f0 1794 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1795
64a5b29c
KB		 1796 if (global_pointer != 0)
1797 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1798
1799 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1800 return sp;
1801}
1802
1803void
1804ia64_store_return_value (struct type *type, char *valbuf)
1805{
1806 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1807 {
1808 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1809 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1810 target_store_registers (IA64_FR8_REGNUM);
1811 }
1812 else
1813 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1814 valbuf, TYPE_LENGTH (type));
1815}
1816
1817void
1818ia64_pop_frame (void)
1819{
1820 generic_pop_current_frame (ia64_pop_frame_regular);
1821}
1822
1823static void
1824ia64_pop_frame_regular (struct frame_info *frame)
1825{
1826 int regno;
1827 CORE_ADDR bsp, cfm, pfs;
1828
1829 FRAME_INIT_SAVED_REGS (frame);
1830
1831 for (regno = 0; regno < ia64_num_regs; regno++)
1832 {
1833 if (frame->saved_regs[regno]
1834 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1835 && regno != pc_regnum
1836 && regno != sp_regnum
1837 && regno != IA64_PFS_REGNUM
1838 && regno != IA64_CFM_REGNUM
1839 && regno != IA64_BSP_REGNUM
1840 && regno != IA64_BSPSTORE_REGNUM)
1841 {
1842 write_register (regno,
1843 read_memory_integer (frame->saved_regs[regno],
1844 REGISTER_RAW_SIZE (regno)));
1845 }
1846 }
1847
1848 write_register (sp_regnum, FRAME_CHAIN (frame));
1849 write_pc (FRAME_SAVED_PC (frame));
1850
1851 cfm = read_register (IA64_CFM_REGNUM);
1852
1853 if (frame->saved_regs[IA64_PFS_REGNUM])
1854 {
1855 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1856 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1857 }
1858 else
1859 pfs = read_register (IA64_PFS_REGNUM);
1860
1861 /* Compute the new bsp by *adding* the difference between the
1862 size of the frame and the size of the locals (both wrt the
1863 frame that we're going back to). This seems kind of strange,
1864 especially since it seems like we ought to be subtracting the
1865 size of the locals... and we should; but the linux kernel
1866 wants bsp to be set at the end of all used registers. It's
1867 likely that this code will need to be revised to accomodate
1868 other operating systems. */
1869 bsp = rse_address_add (frame->extra_info->bsp,
1870 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1871 write_register (IA64_BSP_REGNUM, bsp);
1872
1873 /* FIXME: What becomes of the epilog count in the PFS? */
1874 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1875 write_register (IA64_CFM_REGNUM, cfm);
1876
1877 flush_cached_frames ();
1878}
1879
1880static void
1881ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1882 CORE_ADDR *targ_addr, int *targ_len)
1883{
1884 *targ_addr = memaddr;
1885 *targ_len = nr_bytes;
1886}
1887
244bc108
KB		 1888static void
1889process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1890{
1891 int *os_ident_ptr = obj;
1892 const char *name;
1893 unsigned int sectsize;
1894
1895 name = bfd_get_section_name (abfd, sect);
1896 sectsize = bfd_section_size (abfd, sect);
1897 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1898 {
1899 unsigned int name_length, data_length, note_type;
1900 char *note = alloca (sectsize);
1901
1902 bfd_get_section_contents (abfd, sect, note,
1903 (file_ptr) 0, (bfd_size_type) sectsize);
1904
1905 name_length = bfd_h_get_32 (abfd, note);
1906 data_length = bfd_h_get_32 (abfd, note + 4);
1907 note_type = bfd_h_get_32 (abfd, note + 8);
1908
1909 if (name_length == 4 && data_length == 16 && note_type == 1
1910 && strcmp (note + 12, "GNU") == 0)
1911 {
1912 int os_number = bfd_h_get_32 (abfd, note + 16);
1913
1914 /* The case numbers are from abi-tags in glibc */
1915 switch (os_number)
1916 {
1917 case 0 :
1918 *os_ident_ptr = ELFOSABI_LINUX;
1919 break;
244bc108
KB		 1920 case 1 :
1921 *os_ident_ptr = ELFOSABI_HURD;
1922 break;
1923 case 2 :
1924 *os_ident_ptr = ELFOSABI_SOLARIS;
1925 break;
244bc108 1926 default :
8e65ff28
AC		 1927 internal_error (__FILE__, __LINE__,
1928 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB		 1929 break;
1930 }
1931 }
1932 }
1933}
1934
16461d7d
KB		 1935static struct gdbarch *
1936ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1937{
1938 struct gdbarch *gdbarch;
244bc108
KB		 1939 struct gdbarch_tdep *tdep;
1940 int os_ident;
1941
1942 if (info.abfd != NULL
1943 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1944 {
1945 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
1946
1947 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 1948 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 1949 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1950 zero. So we have to check for note sections too. */
1951 if (os_ident == 0)
1952 {
1953 bfd_map_over_sections (info.abfd,
1954 process_note_abi_tag_sections,
1955 &os_ident);
1956 }
1957 }
1958 else
1959 os_ident = -1;
16461d7d 1960
244bc108
KB		 1961 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1962 arches != NULL;
1963 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1964 {
1965 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
1966 continue;
1967 return arches->gdbarch;
1968 }
16461d7d 1969
244bc108
KB		 1970 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1971 gdbarch = gdbarch_alloc (&info, tdep);
1972 tdep->os_ident = os_ident;
1973
d7fa2ae2
KB		 1974
1975 /* Set the method of obtaining the sigcontext addresses at which
1976 registers are saved. The method of checking to see if
1977 native_find_global_pointer is nonzero to indicate that we're
1978 on AIX is kind of hokey, but I can't think of a better way
1979 to do it. */
244bc108
KB		 1980 if (os_ident == ELFOSABI_LINUX)
1981 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB		 1982 else if (native_find_global_pointer != 0)
1983 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB		 1984 else
1985 tdep->sigcontext_register_address = 0;
16461d7d 1986
698cb3f0
KB		 1987 /* We know that Linux won't have to resort to the native_find_global_pointer
1988 hackery. But that's the only one we know about so far, so if
1989 native_find_global_pointer is set to something non-zero, then use
1990 it. Otherwise fall back to using generic_elf_find_global_pointer.
1991 This arrangement should (in theory) allow us to cross debug Linux
1992 binaries from an AIX machine. */
1993 if (os_ident == ELFOSABI_LINUX)
1994 tdep->find_global_pointer = generic_elf_find_global_pointer;
1995 else if (native_find_global_pointer != 0)
1996 tdep->find_global_pointer = native_find_global_pointer;
1997 else
1998 tdep->find_global_pointer = generic_elf_find_global_pointer;
1999
16461d7d
KB		 2000 set_gdbarch_short_bit (gdbarch, 16);
2001 set_gdbarch_int_bit (gdbarch, 32);
2002 set_gdbarch_long_bit (gdbarch, 64);
2003 set_gdbarch_long_long_bit (gdbarch, 64);
2004 set_gdbarch_float_bit (gdbarch, 32);
2005 set_gdbarch_double_bit (gdbarch, 64);
2006 set_gdbarch_long_double_bit (gdbarch, 64);
2007 set_gdbarch_ptr_bit (gdbarch, 64);
2008
2009 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2010 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2011 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2012 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2013 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB		 2014
2015 set_gdbarch_register_name (gdbarch, ia64_register_name);
2016 set_gdbarch_register_size (gdbarch, 8);
2017 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2018 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2019 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2020 set_gdbarch_max_register_raw_size (gdbarch, 16);
2021 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2022 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2023 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2024
2025 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2026
2027 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2028 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2029
2030 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2031
2032 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 2033 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 2034 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2035
2036 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2037 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2038
2039 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2040 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2041 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2042
2043 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2044 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
2045
2046 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2047 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
2048 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2049
2050 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2051 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2052 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2053 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2054 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2055
2056 /* Settings for calling functions in the inferior. */
2057 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2058 set_gdbarch_call_dummy_length (gdbarch, 0);
2059 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2060 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2061 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2062
2063 set_gdbarch_call_dummy_p (gdbarch, 1);
2064 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2065 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2066 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2067 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2068 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2069 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2070
2071 /* We won't necessarily have a frame pointer and even if we do,
2072 it winds up being extraordinarly messy when attempting to find
2073 the frame chain. So for the purposes of creating frames (which
2074 is all read_fp() is used for), simply use the stack pointer value
2075 instead. */
2076 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2077 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2078
2079 /* Settings that should be unnecessary. */
2080 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2081
2082 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2083 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2084
2085 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2086 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2087 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2088 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2089 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2090 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2091 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2092 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2093
2094 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2095 set_gdbarch_function_start_offset (gdbarch, 0);
2096
2097 set_gdbarch_remote_translate_xfer_address (
2098 gdbarch, ia64_remote_translate_xfer_address);
2099
2100 return gdbarch;
2101}
2102
2103void
2104_initialize_ia64_tdep (void)
2105{
2106 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2107
2108 tm_print_insn = print_insn_ia64;
2109 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2110}
GDB Binutils - Deliverables
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