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Correct gas/ChangeLog 2000-06-23 entry, which I thought I'd fixed
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d
KB		 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2 Copyright 1999, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d
KB		 27#include "floatformat.h"
28
29#include "objfiles.h"
30#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 31#include "elf-bfd.h"
16461d7d
KB		 32
33typedef enum instruction_type
34{
35 A, /* Integer ALU ; I-unit or M-unit */
36 I, /* Non-ALU integer; I-unit */
37 M, /* Memory ; M-unit */
38 F, /* Floating-point ; F-unit */
39 B, /* Branch ; B-unit */
40 L, /* Extended (L+X) ; I-unit */
41 X, /* Extended (L+X) ; I-unit */
42 undefined /* undefined or reserved */
43} instruction_type;
44
45/* We represent IA-64 PC addresses as the value of the instruction
46 pointer or'd with some bit combination in the low nibble which
47 represents the slot number in the bundle addressed by the
48 instruction pointer. The problem is that the Linux kernel
49 multiplies its slot numbers (for exceptions) by one while the
50 disassembler multiplies its slot numbers by 6. In addition, I've
51 heard it said that the simulator uses 1 as the multiplier.
52
53 I've fixed the disassembler so that the bytes_per_line field will
54 be the slot multiplier. If bytes_per_line comes in as zero, it
55 is set to six (which is how it was set up initially). -- objdump
56 displays pretty disassembly dumps with this value. For our purposes,
57 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
58 never want to also display the raw bytes the way objdump does. */
59
60#define SLOT_MULTIPLIER 1
61
62/* Length in bytes of an instruction bundle */
63
64#define BUNDLE_LEN 16
65
66extern void _initialize_ia64_tdep (void);
67
244bc108
KB		 68extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
69
16461d7d
KB		 70static gdbarch_init_ftype ia64_gdbarch_init;
71
72static gdbarch_register_name_ftype ia64_register_name;
73static gdbarch_register_raw_size_ftype ia64_register_raw_size;
74static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
75static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
76static gdbarch_register_byte_ftype ia64_register_byte;
77static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
78static gdbarch_frame_chain_ftype ia64_frame_chain;
79static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
80static gdbarch_skip_prologue_ftype ia64_skip_prologue;
81static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
82static gdbarch_get_saved_register_ftype ia64_get_saved_register;
83static gdbarch_extract_return_value_ftype ia64_extract_return_value;
84static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
85static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
86static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
87static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
88static gdbarch_store_return_value_ftype ia64_store_return_value;
89static gdbarch_store_struct_return_ftype ia64_store_struct_return;
90static gdbarch_push_arguments_ftype ia64_push_arguments;
91static gdbarch_push_return_address_ftype ia64_push_return_address;
92static gdbarch_pop_frame_ftype ia64_pop_frame;
93static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 94static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 95static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 96
97static int ia64_num_regs = 590;
98
99static int pc_regnum = IA64_IP_REGNUM;
100static int sp_regnum = IA64_GR12_REGNUM;
101static int fp_regnum = IA64_VFP_REGNUM;
102static int lr_regnum = IA64_VRAP_REGNUM;
103
104static LONGEST ia64_call_dummy_words[] = {0};
105
106/* Array of register names; There should be ia64_num_regs strings in
107 the initializer. */
108
109static char *ia64_register_names[] =
110{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
111 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
112 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
113 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
114 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
115 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
116 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
117 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
118 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
119 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
120 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
121 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
122 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
123 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
124 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
125 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
126
127 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
128 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
129 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
130 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
131 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
132 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
133 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
134 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
135 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
136 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
137 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
138 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
139 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
140 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
141 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
142 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
143
144 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
145 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
146 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
147 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
148 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
149 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
150 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
151 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
152
153 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
154
155 "vfp", "vrap",
156
157 "pr", "ip", "psr", "cfm",
158
159 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
160 "", "", "", "", "", "", "", "",
161 "rsc", "bsp", "bspstore", "rnat",
162 "", "fcr", "", "",
163 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
164 "ccv", "", "", "", "unat", "", "", "",
165 "fpsr", "", "", "", "itc",
166 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "", "",
168 "pfs", "lc", "ec",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "", "", "",
173 "", "", "", "", "", "", "", "", "", "",
174 "", "", "", "", "", "", "", "", "", "",
175 "",
176 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
177 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
178 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
179 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
180 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
181 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
182 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
183 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
184 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
185 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
186 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
187 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
188 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
189 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
190 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
191 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
192};
193
194struct frame_extra_info
244bc108
KB		 195 {
196 CORE_ADDR bsp; /* points at r32 for the current frame */
197 CORE_ADDR cfm; /* cfm value for current frame */
198 int sof; /* Size of frame (decoded from cfm value) */
199 int sol; /* Size of locals (decoded from cfm value) */
200 CORE_ADDR after_prologue;
201 /* Address of first instruction after the last
16461d7d
KB		 202 prologue instruction; Note that there may
203 be instructions from the function's body
204 intermingled with the prologue. */
244bc108
KB		 205 int mem_stack_frame_size;
206 /* Size of the memory stack frame (may be zero),
16461d7d 207 or -1 if it has not been determined yet. */
244bc108
KB		 208 int fp_reg; /* Register number (if any) used a frame pointer
209 for this frame. 0 if no register is being used
16461d7d 210 as the frame pointer. */
244bc108
KB		 211 };
212
213struct gdbarch_tdep
214 {
215 int os_ident; /* From the ELF header, one of the ELFOSABI_
216 constants: ELFOSABI_LINUX, ELFOSABI_MONTEREY,
217 etc. */
218 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
219 /* OS specific function which, given a frame address
220 and register number, returns the offset to the
221 given register from the start of the frame. */
222 };
223
224#define SIGCONTEXT_REGISTER_ADDRESS (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
16461d7d
KB		 225
226static char *
227ia64_register_name (int reg)
228{
229 return ia64_register_names[reg];
230}
231
232int
233ia64_register_raw_size (int reg)
234{
235 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
236}
237
238int
239ia64_register_virtual_size (int reg)
240{
241 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
242}
243
244/* Return true iff register N's virtual format is different from
245 its raw format. */
246int
247ia64_register_convertible (int nr)
248{
249 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
250}
251
252const struct floatformat floatformat_ia64_ext =
253{
254 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
255 floatformat_intbit_yes
256};
257
258void
259ia64_register_convert_to_virtual (int regnum, struct type *type,
260 char *from, char *to)
261{
262 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
263 {
264 DOUBLEST val;
265 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
266 store_floating(to, TYPE_LENGTH(type), val);
267 }
268 else
269 error("ia64_register_convert_to_virtual called with non floating point register number");
270}
271
272void
273ia64_register_convert_to_raw (struct type *type, int regnum,
274 char *from, char *to)
275{
276 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
277 {
278 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
279 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
280 }
281 else
282 error("ia64_register_convert_to_raw called with non floating point register number");
283}
284
285struct type *
286ia64_register_virtual_type (int reg)
287{
288 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
289 return builtin_type_long_double;
290 else
291 return builtin_type_long;
292}
293
294int
295ia64_register_byte (int reg)
296{
297 return (8 * reg) +
298 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
299}
300
244bc108
KB		 301/* Read the given register from a sigcontext structure in the
302 specified frame. */
303
304static CORE_ADDR
305read_sigcontext_register (struct frame_info *frame, int regnum)
306{
307 CORE_ADDR regaddr;
308
309 if (frame == NULL)
310 internal_error ("read_sigcontext_register: NULL frame");
311 if (!frame->signal_handler_caller)
312 internal_error (
313 "read_sigcontext_register: frame not a signal_handler_caller");
314 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
315 internal_error (
316 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
317
318 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
319 if (regaddr)
320 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
321 else
322 internal_error (
323 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
324}
325
16461d7d
KB		 326/* Extract ``len'' bits from an instruction bundle starting at
327 bit ``from''. */
328
244bc108 329static long long
16461d7d
KB		 330extract_bit_field (char *bundle, int from, int len)
331{
332 long long result = 0LL;
333 int to = from + len;
334 int from_byte = from / 8;
335 int to_byte = to / 8;
336 unsigned char *b = (unsigned char *) bundle;
337 unsigned char c;
338 int lshift;
339 int i;
340
341 c = b[from_byte];
342 if (from_byte == to_byte)
343 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
344 result = c >> (from % 8);
345 lshift = 8 - (from % 8);
346
347 for (i = from_byte+1; i < to_byte; i++)
348 {
349 result |= ((long long) b[i]) << lshift;
350 lshift += 8;
351 }
352
353 if (from_byte < to_byte && (to % 8 != 0))
354 {
355 c = b[to_byte];
356 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
357 result |= ((long long) c) << lshift;
358 }
359
360 return result;
361}
362
363/* Replace the specified bits in an instruction bundle */
364
244bc108 365static void
16461d7d
KB		 366replace_bit_field (char *bundle, long long val, int from, int len)
367{
368 int to = from + len;
369 int from_byte = from / 8;
370 int to_byte = to / 8;
371 unsigned char *b = (unsigned char *) bundle;
372 unsigned char c;
373
374 if (from_byte == to_byte)
375 {
376 unsigned char left, right;
377 c = b[from_byte];
378 left = (c >> (to % 8)) << (to % 8);
379 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
380 c = (unsigned char) (val & 0xff);
381 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
382 c |= right | left;
383 b[from_byte] = c;
384 }
385 else
386 {
387 int i;
388 c = b[from_byte];
389 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
390 c = c | (val << (from % 8));
391 b[from_byte] = c;
392 val >>= 8 - from % 8;
393
394 for (i = from_byte+1; i < to_byte; i++)
395 {
396 c = val & 0xff;
397 val >>= 8;
398 b[i] = c;
399 }
400
401 if (to % 8 != 0)
402 {
403 unsigned char cv = (unsigned char) val;
404 c = b[to_byte];
405 c = c >> (to % 8) << (to % 8);
406 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
407 b[to_byte] = c;
408 }
409 }
410}
411
412/* Return the contents of slot N (for N = 0, 1, or 2) in
413 and instruction bundle */
414
244bc108 415static long long
16461d7d
KB		 416slotN_contents (unsigned char *bundle, int slotnum)
417{
418 return extract_bit_field (bundle, 5+41*slotnum, 41);
419}
420
421/* Store an instruction in an instruction bundle */
422
244bc108 423static void
16461d7d
KB		 424replace_slotN_contents (unsigned char *bundle, long long instr, int slotnum)
425{
426 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
427}
428
64a5b29c 429static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 430{
431 { M, I, I }, /* 00 */
432 { M, I, I }, /* 01 */
433 { M, I, I }, /* 02 */
434 { M, I, I }, /* 03 */
435 { M, L, X }, /* 04 */
436 { M, L, X }, /* 05 */
437 { undefined, undefined, undefined }, /* 06 */
438 { undefined, undefined, undefined }, /* 07 */
439 { M, M, I }, /* 08 */
440 { M, M, I }, /* 09 */
441 { M, M, I }, /* 0A */
442 { M, M, I }, /* 0B */
443 { M, F, I }, /* 0C */
444 { M, F, I }, /* 0D */
445 { M, M, F }, /* 0E */
446 { M, M, F }, /* 0F */
447 { M, I, B }, /* 10 */
448 { M, I, B }, /* 11 */
449 { M, B, B }, /* 12 */
450 { M, B, B }, /* 13 */
451 { undefined, undefined, undefined }, /* 14 */
452 { undefined, undefined, undefined }, /* 15 */
453 { B, B, B }, /* 16 */
454 { B, B, B }, /* 17 */
455 { M, M, B }, /* 18 */
456 { M, M, B }, /* 19 */
457 { undefined, undefined, undefined }, /* 1A */
458 { undefined, undefined, undefined }, /* 1B */
459 { M, F, B }, /* 1C */
460 { M, F, B }, /* 1D */
461 { undefined, undefined, undefined }, /* 1E */
462 { undefined, undefined, undefined }, /* 1F */
463};
464
465/* Fetch and (partially) decode an instruction at ADDR and return the
466 address of the next instruction to fetch. */
467
468static CORE_ADDR
469fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
470{
471 char bundle[BUNDLE_LEN];
472 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
473 long long template;
474 int val;
475
476 if (slotnum > 2)
477 error("Can't fetch instructions for slot numbers greater than 2.");
478
479 addr &= ~0x0f;
480
481 val = target_read_memory (addr, bundle, BUNDLE_LEN);
482
483 if (val != 0)
484 return 0;
485
486 *instr = slotN_contents (bundle, slotnum);
487 template = extract_bit_field (bundle, 0, 5);
488 *it = template_encoding_table[(int)template][slotnum];
489
64a5b29c 490 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 491 addr += 16;
492 else
493 addr += (slotnum + 1) * SLOT_MULTIPLIER;
494
495 return addr;
496}
497
498/* There are 5 different break instructions (break.i, break.b,
499 break.m, break.f, and break.x), but they all have the same
500 encoding. (The five bit template in the low five bits of the
501 instruction bundle distinguishes one from another.)
502
503 The runtime architecture manual specifies that break instructions
504 used for debugging purposes must have the upper two bits of the 21
505 bit immediate set to a 0 and a 1 respectively. A breakpoint
506 instruction encodes the most significant bit of its 21 bit
507 immediate at bit 36 of the 41 bit instruction. The penultimate msb
508 is at bit 25 which leads to the pattern below.
509
510 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
511 it turns out that 0x80000 was used as the syscall break in the early
512 simulators. So I changed the pattern slightly to do "break.i 0x080001"
513 instead. But that didn't work either (I later found out that this
514 pattern was used by the simulator that I was using.) So I ended up
515 using the pattern seen below. */
516
517#if 0
518#define BREAKPOINT 0x00002000040LL
519#endif
520#define BREAKPOINT 0x00003333300LL
521
522static int
523ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
524{
525 char bundle[BUNDLE_LEN];
526 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
527 long long instr;
528 int val;
529
530 if (slotnum > 2)
531 error("Can't insert breakpoint for slot numbers greater than 2.");
532
533 addr &= ~0x0f;
534
535 val = target_read_memory (addr, bundle, BUNDLE_LEN);
536 instr = slotN_contents (bundle, slotnum);
537 memcpy(contents_cache, &instr, sizeof(instr));
538 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
539 if (val == 0)
540 target_write_memory (addr, bundle, BUNDLE_LEN);
541
542 return val;
543}
544
545static int
546ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
547{
548 char bundle[BUNDLE_LEN];
549 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
550 long long instr;
551 int val;
552
553 addr &= ~0x0f;
554
555 val = target_read_memory (addr, bundle, BUNDLE_LEN);
556 memcpy (&instr, contents_cache, sizeof instr);
557 replace_slotN_contents (bundle, instr, slotnum);
558 if (val == 0)
559 target_write_memory (addr, bundle, BUNDLE_LEN);
560
561 return val;
562}
563
564/* We don't really want to use this, but remote.c needs to call it in order
565 to figure out if Z-packets are supported or not. Oh, well. */
566unsigned char *
fba45db2 567ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB		 568{
569 static unsigned char breakpoint[] =
570 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
571 *lenptr = sizeof (breakpoint);
572#if 0
573 *pcptr &= ~0x0f;
574#endif
575 return breakpoint;
576}
577
578CORE_ADDR
579ia64_read_pc (int pid)
580{
581 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
582 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, pid);
583 int slot_num = (psr_value >> 41) & 3;
584
585 return pc_value | (slot_num * SLOT_MULTIPLIER);
586}
587
588void
589ia64_write_pc (CORE_ADDR new_pc, int pid)
590{
591 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
592 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
593 psr_value &= ~(3LL << 41);
594 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
595
596 new_pc &= ~0xfLL;
597
598 write_register_pid (IA64_PSR_REGNUM, psr_value, pid);
599 write_register_pid (IA64_IP_REGNUM, new_pc, pid);
600}
601
602#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
603
604/* Returns the address of the slot that's NSLOTS slots away from
605 the address ADDR. NSLOTS may be positive or negative. */
606static CORE_ADDR
607rse_address_add(CORE_ADDR addr, int nslots)
608{
609 CORE_ADDR new_addr;
610 int mandatory_nat_slots = nslots / 63;
611 int direction = nslots < 0 ? -1 : 1;
612
613 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
614
615 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
616 new_addr += 8 * direction;
617
618 if (IS_NaT_COLLECTION_ADDR(new_addr))
619 new_addr += 8 * direction;
620
621 return new_addr;
622}
623
624/* The IA-64 frame chain is a bit odd. We won't always have a frame
625 pointer, so we use the SP value as the FP for the purpose of
626 creating a frame. There is sometimes a register (not fixed) which
627 is used as a frame pointer. When this register exists, it is not
628 especially hard to determine which one is being used. It isn't
629 even really hard to compute the frame chain, but it can be
630 computationally expensive. So, instead of making life difficult
631 (and slow), we pick a more convenient representation of the frame
632 chain, knowing that we'll have to make some small adjustments
633 in other places. (E.g, note that read_fp() and write_fp() are
634 actually read_sp() and write_sp() below in ia64_gdbarch_init()
635 below.)
636
637 Okay, so what is the frame chain exactly? It'll be the SP value
638 at the time that the function in question was entered.
639
640 Note that this *should* actually the frame pointer for the current
641 function! But as I note above, if we were to attempt to find the
642 address of the beginning of the previous frame, we'd waste a lot
643 of cycles for no good reason. So instead, we simply choose to
644 represent the frame chain as the end of the previous frame instead
645 of the beginning. */
646
647CORE_ADDR
648ia64_frame_chain (struct frame_info *frame)
649{
244bc108
KB		 650 if (frame->signal_handler_caller)
651 return read_sigcontext_register (frame, sp_regnum);
652 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
653 return frame->frame;
16461d7d 654 else
244bc108
KB		 655 {
656 FRAME_INIT_SAVED_REGS (frame);
657 if (frame->saved_regs[IA64_VFP_REGNUM])
658 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
659 else
660 return frame->frame + frame->extra_info->mem_stack_frame_size;
661 }
16461d7d
KB		 662}
663
664CORE_ADDR
665ia64_frame_saved_pc (struct frame_info *frame)
666{
244bc108
KB		 667 if (frame->signal_handler_caller)
668 return read_sigcontext_register (frame, pc_regnum);
669 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
670 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
671 else
672 {
673 FRAME_INIT_SAVED_REGS (frame);
16461d7d 674
244bc108
KB		 675 if (frame->saved_regs[IA64_VRAP_REGNUM])
676 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
677 else if (frame->next && frame->next->signal_handler_caller)
678 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
679 else /* either frameless, or not far enough along in the prologue... */
680 return ia64_saved_pc_after_call (frame);
681 }
16461d7d
KB		 682}
683
684#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
685 || (8 <= (_regnum_) && (_regnum_) <= 11) \
686 || (14 <= (_regnum_) && (_regnum_) <= 31))
687#define imm9(_instr_) \
688 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
689 | (((_instr_) & 0x00008000000LL) >> 20) \
690 | (((_instr_) & 0x00000001fc0LL) >> 6))
691
692static CORE_ADDR
693examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
694{
695 CORE_ADDR next_pc;
696 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 697 instruction_type it;
698 long long instr;
699 int do_fsr_stuff = 0;
700
701 int cfm_reg = 0;
702 int ret_reg = 0;
703 int fp_reg = 0;
704 int unat_save_reg = 0;
705 int pr_save_reg = 0;
706 int mem_stack_frame_size = 0;
707 int spill_reg = 0;
708 CORE_ADDR spill_addr = 0;
0927a22b
KB		 709 char instores[8];
710 char infpstores[8];
711
712 memset (instores, 0, sizeof instores);
713 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 714
715 if (frame && !frame->saved_regs)
716 {
717 frame_saved_regs_zalloc (frame);
718 do_fsr_stuff = 1;
719 }
720
721 if (frame
722 && !do_fsr_stuff
723 && frame->extra_info->after_prologue != 0
724 && frame->extra_info->after_prologue <= lim_pc)
725 return frame->extra_info->after_prologue;
726
727 /* Must start with an alloc instruction */
728 next_pc = fetch_instruction (pc, &it, &instr);
729 if (pc < lim_pc && next_pc
730 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
731 {
732 /* alloc */
733 int sor = (int) ((instr & 0x00078000000LL) >> 27);
734 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
735 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
736 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
737 we could compare against the size given to us via the cfm as
738 either a sanity check or possibly to see if the frame has been
739 changed by a later alloc instruction... */
740 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
741 cfm_reg = rN;
742 last_prologue_pc = next_pc;
743 pc = next_pc;
744 }
745 else
746 pc = lim_pc; /* We're done early */
747
748 /* Loop, looking for prologue instructions, keeping track of
749 where preserved registers were spilled. */
750 while (pc < lim_pc)
751 {
752 next_pc = fetch_instruction (pc, &it, &instr);
753 if (next_pc == 0)
754 break;
755
0927a22b
KB		 756 if (it == B || ((instr & 0x3fLL) != 0LL))
757 {
758 /* Exit loop upon hitting a branch instruction or a predicated
759 instruction. */
760 break;
761 }
762 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 763 {
764 /* Move from BR */
765 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
766 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
767 int qp = (int) (instr & 0x0000000003f);
768
769 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
770 {
771 ret_reg = rN;
772 last_prologue_pc = next_pc;
773 }
774 }
775 else if ((it == I || it == M)
776 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
777 {
778 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
779 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
780 | ((instr & 0x001f8000000LL) >> 20)
781 | ((instr & 0x000000fe000LL) >> 13));
782 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
783 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
784 int qp = (int) (instr & 0x0000000003fLL);
785
786 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
787 {
788 /* mov rN, r12 */
789 fp_reg = rN;
790 last_prologue_pc = next_pc;
791 }
792 else if (qp == 0 && rN == 12 && rM == 12)
793 {
794 /* adds r12, -mem_stack_frame_size, r12 */
795 mem_stack_frame_size -= imm;
796 last_prologue_pc = next_pc;
797 }
798 else if (qp == 0 && rN == 2
799 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
800 {
801 /* adds r2, spilloffset, rFramePointer
802 or
803 adds r2, spilloffset, r12
804
805 Get ready for stf.spill or st8.spill instructions.
806 The address to start spilling at is loaded into r2.
807 FIXME: Why r2? That's what gcc currently uses; it
808 could well be different for other compilers. */
809
810 /* Hmm... whether or not this will work will depend on
811 where the pc is. If it's still early in the prologue
812 this'll be wrong. FIXME */
813 spill_addr = (frame ? frame->frame : 0)
814 + (rM == 12 ? 0 : mem_stack_frame_size)
815 + imm;
816 spill_reg = rN;
817 last_prologue_pc = next_pc;
818 }
819 }
820 else if (it == M
821 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
822 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
823 {
824 /* stf.spill [rN] = fM, imm9
825 or
826 stf.spill [rN] = fM */
827
828 int imm = imm9(instr);
829 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
830 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
831 int qp = (int) (instr & 0x0000000003fLL);
832 if (qp == 0 && rN == spill_reg && spill_addr != 0
833 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
834 {
835 if (do_fsr_stuff)
836 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
837
838 if ((instr & 0x1efc0000000) == 0x0eec0000000)
839 spill_addr += imm;
840 else
841 spill_addr = 0; /* last one; must be done */
842 last_prologue_pc = next_pc;
843 }
844 }
845 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
846 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
847 {
848 /* mov.m rN = arM
849 or
850 mov.i rN = arM */
851
852 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
853 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
854 int qp = (int) (instr & 0x0000000003fLL);
855 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
856 {
857 /* We have something like "mov.m r3 = ar.unat". Remember the
858 r3 (or whatever) and watch for a store of this register... */
859 unat_save_reg = rN;
860 last_prologue_pc = next_pc;
861 }
862 }
863 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
864 {
865 /* mov rN = pr */
866 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
867 int qp = (int) (instr & 0x0000000003fLL);
868 if (qp == 0 && isScratch (rN))
869 {
870 pr_save_reg = rN;
871 last_prologue_pc = next_pc;
872 }
873 }
874 else if (it == M
875 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
876 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
877 {
878 /* st8 [rN] = rM
879 or
880 st8 [rN] = rM, imm9 */
881 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
882 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
883 int qp = (int) (instr & 0x0000000003fLL);
884 if (qp == 0 && rN == spill_reg && spill_addr != 0
885 && (rM == unat_save_reg || rM == pr_save_reg))
886 {
887 /* We've found a spill of either the UNAT register or the PR
888 register. (Well, not exactly; what we've actually found is
889 a spill of the register that UNAT or PR was moved to).
890 Record that fact and move on... */
891 if (rM == unat_save_reg)
892 {
893 /* Track UNAT register */
894 if (do_fsr_stuff)
895 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
896 unat_save_reg = 0;
897 }
898 else
899 {
900 /* Track PR register */
901 if (do_fsr_stuff)
902 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
903 pr_save_reg = 0;
904 }
905 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
906 /* st8 [rN] = rM, imm9 */
907 spill_addr += imm9(instr);
908 else
909 spill_addr = 0; /* must be done spilling */
910 last_prologue_pc = next_pc;
911 }
0927a22b
KB		 912 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
913 {
914 /* Allow up to one store of each input register. */
915 instores[rM-32] = 1;
916 last_prologue_pc = next_pc;
917 }
918 }
919 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
920 {
921 /* One of
922 st1 [rN] = rM
923 st2 [rN] = rM
924 st4 [rN] = rM
925 st8 [rN] = rM
926 Note that the st8 case is handled in the clause above.
927
928 Advance over stores of input registers. One store per input
929 register is permitted. */
930 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
931 int qp = (int) (instr & 0x0000000003fLL);
932 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
933 {
934 instores[rM-32] = 1;
935 last_prologue_pc = next_pc;
936 }
937 }
938 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
939 {
940 /* Either
941 stfs [rN] = fM
942 or
943 stfd [rN] = fM
944
945 Advance over stores of floating point input registers. Again
946 one store per register is permitted */
947 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
948 int qp = (int) (instr & 0x0000000003fLL);
949 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
950 {
951 infpstores[fM-8] = 1;
952 last_prologue_pc = next_pc;
953 }
16461d7d
KB		 954 }
955 else if (it == M
956 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
957 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
958 {
959 /* st8.spill [rN] = rM
960 or
961 st8.spill [rN] = rM, imm9 */
962 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
963 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
964 int qp = (int) (instr & 0x0000000003fLL);
965 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
966 {
967 /* We've found a spill of one of the preserved general purpose
968 regs. Record the spill address and advance the spill
969 register if appropriate. */
970 if (do_fsr_stuff)
971 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
972 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
973 /* st8.spill [rN] = rM, imm9 */
974 spill_addr += imm9(instr);
975 else
976 spill_addr = 0; /* Done spilling */
977 last_prologue_pc = next_pc;
978 }
979 }
16461d7d
KB		 980
981 pc = next_pc;
982 }
983
984 if (do_fsr_stuff) {
985 int i;
986 CORE_ADDR addr;
987
988 for (i = 0, addr = frame->extra_info->bsp;
989 i < frame->extra_info->sof;
990 i++, addr += 8)
991 {
992 if (IS_NaT_COLLECTION_ADDR (addr))
993 {
994 addr += 8;
995 }
996 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
997
998 if (i+32 == cfm_reg)
999 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1000 if (i+32 == ret_reg)
1001 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1002 if (i+32 == fp_reg)
1003 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1004 }
1005 }
1006
1007 if (frame && frame->extra_info) {
1008 frame->extra_info->after_prologue = last_prologue_pc;
1009 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1010 frame->extra_info->fp_reg = fp_reg;
1011 }
1012
1013 return last_prologue_pc;
1014}
1015
1016CORE_ADDR
1017ia64_skip_prologue (CORE_ADDR pc)
1018{
1019 return examine_prologue (pc, pc+1024, 0);
1020}
1021
1022void
1023ia64_frame_init_saved_regs (struct frame_info *frame)
1024{
16461d7d
KB		 1025 if (frame->saved_regs)
1026 return;
1027
244bc108
KB		 1028 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1029 {
1030 int regno;
16461d7d 1031
244bc108 1032 frame_saved_regs_zalloc (frame);
16461d7d 1033
244bc108
KB		 1034 frame->saved_regs[IA64_VRAP_REGNUM] =
1035 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1036 frame->saved_regs[IA64_CFM_REGNUM] =
1037 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1038 frame->saved_regs[IA64_PSR_REGNUM] =
1039 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1040#if 0
1041 frame->saved_regs[IA64_BSP_REGNUM] =
1042 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1043#endif
1044 frame->saved_regs[IA64_RNAT_REGNUM] =
1045 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1046 frame->saved_regs[IA64_CCV_REGNUM] =
1047 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1048 frame->saved_regs[IA64_UNAT_REGNUM] =
1049 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1050 frame->saved_regs[IA64_FPSR_REGNUM] =
1051 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1052 frame->saved_regs[IA64_PFS_REGNUM] =
1053 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1054 frame->saved_regs[IA64_LC_REGNUM] =
1055 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1056 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1057 if (regno != sp_regnum)
1058 frame->saved_regs[regno] =
1059 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1060 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1061 frame->saved_regs[regno] =
1062 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1063 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1064 frame->saved_regs[regno] =
1065 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1066 }
1067 else
1068 {
244bc108 1069 CORE_ADDR func_start;
16461d7d 1070
244bc108
KB		 1071 func_start = get_pc_function_start (frame->pc);
1072 examine_prologue (func_start, frame->pc, frame);
1073 }
16461d7d
KB		 1074}
1075
1076void
1077ia64_get_saved_register (char *raw_buffer,
1078 int *optimized,
1079 CORE_ADDR *addrp,
1080 struct frame_info *frame,
1081 int regnum,
1082 enum lval_type *lval)
1083{
244bc108 1084 int is_dummy_frame;
16461d7d
KB		 1085
1086 if (!target_has_registers)
1087 error ("No registers.");
1088
1089 if (optimized != NULL)
1090 *optimized = 0;
244bc108
KB		 1091
1092 if (addrp != NULL)
1093 *addrp = 0;
1094
1095 if (lval != NULL)
1096 *lval = not_lval;
1097
1098 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1099
1100 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1101 {
1102 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1103 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1104 }
1105 else if (regnum == IA64_BSP_REGNUM)
1106 {
16461d7d
KB		 1107 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1108 frame->extra_info->bsp);
1109 }
1110 else if (regnum == IA64_VFP_REGNUM)
1111 {
1112 /* If the function in question uses an automatic register (r32-r127)
1113 for the frame pointer, it'll be found by ia64_find_saved_register()
1114 above. If the function lacks one of these frame pointers, we can
1115 still provide a value since we know the size of the frame */
1116 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1117 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1118 }
1119 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1120 {
1121 char pr_raw_buffer[MAX_REGISTER_RAW_SIZE];
1122 int pr_optim;
1123 enum lval_type pr_lval;
1124 CORE_ADDR pr_addr;
1125 int prN_val;
1126 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1127 frame, IA64_PR_REGNUM, &pr_lval);
1128 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1129 regnum - IA64_PR0_REGNUM, 1);
1130 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1131 }
1132 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1133 {
1134 char unat_raw_buffer[MAX_REGISTER_RAW_SIZE];
1135 int unat_optim;
1136 enum lval_type unat_lval;
1137 CORE_ADDR unat_addr;
1138 int unatN_val;
1139 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1140 frame, IA64_UNAT_REGNUM, &unat_lval);
1141 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1142 regnum - IA64_NAT0_REGNUM, 1);
1143 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1144 unatN_val);
16461d7d
KB		 1145 }
1146 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1147 {
1148 int natval = 0;
1149 /* Find address of general register corresponding to nat bit we're
1150 interested in. */
244bc108
KB		 1151 CORE_ADDR gr_addr = 0;
1152
1153 if (!is_dummy_frame)
1154 {
1155 FRAME_INIT_SAVED_REGS (frame);
1156 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1157 + IA64_GR0_REGNUM];
1158 }
16461d7d
KB		 1159 if (gr_addr)
1160 {
1161 /* Compute address of nat collection bits */
1162 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1163 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1164 CORE_ADDR nat_collection;
1165 int nat_bit;
1166 /* If our nat collection address is bigger than bsp, we have to get
1167 the nat collection from rnat. Otherwise, we fetch the nat
1168 collection from the computed address. */
1169 if (nat_addr >= bsp)
1170 nat_collection = read_register (IA64_RNAT_REGNUM);
1171 else
1172 nat_collection = read_memory_integer (nat_addr, 8);
1173 nat_bit = (gr_addr >> 3) & 0x3f;
1174 natval = (nat_collection >> nat_bit) & 1;
1175 }
1176 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1177 }
1178 else if (regnum == IA64_IP_REGNUM)
1179 {
1180 CORE_ADDR pc;
1181 if (frame->next)
1182 {
1183 /* FIXME: Set *addrp, *lval when possible. */
1184 pc = ia64_frame_saved_pc (frame->next);
1185 }
1186 else
1187 {
1188 pc = read_pc ();
1189 }
1190 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1191 }
1192 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1193 {
1194 CORE_ADDR addr = 0;
1195 if (!is_dummy_frame)
1196 {
1197 FRAME_INIT_SAVED_REGS (frame);
1198 addr = frame->saved_regs[regnum];
1199 }
1200
1201 if (addr != 0)
1202 {
1203 if (lval != NULL)
1204 *lval = lval_memory;
1205 if (addrp != NULL)
1206 *addrp = addr;
1207 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1208 }
1209 else
1210 {
1211 /* r32 - r127 must be fetchable via memory. If they aren't,
1212 then the register is unavailable */
1213 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1214 }
16461d7d
KB		 1215 }
1216 else
1217 {
244bc108
KB		 1218 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1219 regnum, lval);
16461d7d 1220 }
16461d7d
KB		 1221}
1222
1223/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1224 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1225 and TYPE is the type (which is known to be struct, union or array). */
1226int
1227ia64_use_struct_convention (int gcc_p, struct type *type)
1228{
64a5b29c
KB		 1229 struct type *float_elt_type;
1230
1231 /* HFAs are structures (or arrays) consisting entirely of floating
1232 point values of the same length. Up to 8 of these are returned
1233 in registers. Don't use the struct convention when this is the
1234 case. */
1235 float_elt_type = is_float_or_hfa_type (type);
1236 if (float_elt_type != NULL
1237 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1238 return 0;
1239
1240 /* Other structs of length 32 or less are returned in r8-r11.
1241 Don't use the struct convention for those either. */
16461d7d
KB		 1242 return TYPE_LENGTH (type) > 32;
1243}
1244
1245void
1246ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1247{
64a5b29c
KB		 1248 struct type *float_elt_type;
1249
1250 float_elt_type = is_float_or_hfa_type (type);
1251 if (float_elt_type != NULL)
1252 {
1253 int offset = 0;
1254 int regnum = IA64_FR8_REGNUM;
1255 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1256
1257 while (n-- > 0)
1258 {
1259 ia64_register_convert_to_virtual (regnum, float_elt_type,
1260 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1261 offset += TYPE_LENGTH (float_elt_type);
1262 regnum++;
1263 }
1264 }
16461d7d 1265 else
64a5b29c
KB		 1266 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1267 TYPE_LENGTH (type));
16461d7d
KB		 1268}
1269
1270/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1271 like this is necessary though since the IA-64 calling conventions specify
1272 that r8 is not preserved. */
1273static CORE_ADDR struct_return_address;
1274
1275CORE_ADDR
1276ia64_extract_struct_value_address (char *regbuf)
1277{
1278 /* FIXME: See above. */
1279 return struct_return_address;
1280}
1281
1282void
1283ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1284{
1285 /* FIXME: See above. */
1286 /* Note that most of the work was done in ia64_push_arguments() */
1287 struct_return_address = addr;
1288}
1289
1290int
1291ia64_frameless_function_invocation (struct frame_info *frame)
1292{
1293 /* FIXME: Implement */
1294 return 0;
1295}
1296
1297CORE_ADDR
1298ia64_saved_pc_after_call (struct frame_info *frame)
1299{
1300 return read_register (IA64_BR0_REGNUM);
1301}
1302
1303CORE_ADDR
1304ia64_frame_args_address (struct frame_info *frame)
1305{
1306 /* frame->frame points at the SP for this frame; But we want the start
1307 of the frame, not the end. Calling frame chain will get his for us. */
1308 return ia64_frame_chain (frame);
1309}
1310
1311CORE_ADDR
1312ia64_frame_locals_address (struct frame_info *frame)
1313{
1314 /* frame->frame points at the SP for this frame; But we want the start
1315 of the frame, not the end. Calling frame chain will get his for us. */
1316 return ia64_frame_chain (frame);
1317}
1318
1319void
1320ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1321{
1322 CORE_ADDR bsp, cfm;
244bc108
KB		 1323 int next_frame_is_call_dummy = ((frame->next != NULL)
1324 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1325 frame->next->frame));
16461d7d
KB		 1326
1327 frame->extra_info = (struct frame_extra_info *)
1328 frame_obstack_alloc (sizeof (struct frame_extra_info));
1329
1330 if (frame->next == 0)
1331 {
1332 bsp = read_register (IA64_BSP_REGNUM);
1333 cfm = read_register (IA64_CFM_REGNUM);
1334
1335 }
244bc108
KB		 1336 else if (frame->next->signal_handler_caller)
1337 {
1338 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1339 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1340 }
1341 else if (next_frame_is_call_dummy)
1342 {
1343 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1344 IA64_BSP_REGNUM);
1345 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1346 IA64_CFM_REGNUM);
1347 }
16461d7d
KB		 1348 else
1349 {
1350 struct frame_info *frn = frame->next;
16461d7d
KB		 1351
1352 FRAME_INIT_SAVED_REGS (frn);
1353
1354 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1355 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1356 else if (frn->next && frn->next->signal_handler_caller)
1357 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1358 else if (frn->next
1359 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1360 frn->next->frame))
1361 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1362 IA64_PFS_REGNUM);
16461d7d 1363 else
76d689a6 1364 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1365
1366 bsp = frn->extra_info->bsp;
1367 }
1368 frame->extra_info->cfm = cfm;
1369 frame->extra_info->sof = cfm & 0x7f;
1370 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1371 if (frame->next == 0
1372 || frame->next->signal_handler_caller
1373 || next_frame_is_call_dummy)
16461d7d
KB		 1374 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1375 else
1376 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1377
1378 frame->extra_info->after_prologue = 0;
1379 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1380 frame->extra_info->fp_reg = 0;
1381}
1382
64a5b29c
KB		 1383static int
1384is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1385{
1386 switch (TYPE_CODE (t))
1387 {
1388 case TYPE_CODE_FLT:
1389 if (*etp)
1390 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1391 else
1392 {
1393 *etp = t;
1394 return 1;
1395 }
1396 break;
1397 case TYPE_CODE_ARRAY:
1398 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t), etp);
1399 break;
1400 case TYPE_CODE_STRUCT:
1401 {
1402 int i;
1403
1404 for (i = 0; i < TYPE_NFIELDS (t); i++)
1405 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t, i), etp))
1406 return 0;
1407 return 1;
1408 }
1409 break;
1410 default:
1411 return 0;
1412 break;
1413 }
1414}
1415
1416/* Determine if the given type is one of the floating point types or
1417 and HFA (which is a struct, array, or combination thereof whose
1418 bottom-most elements are all of the same floating point type.) */
1419
1420static struct type *
1421is_float_or_hfa_type (struct type *t)
1422{
1423 struct type *et = 0;
1424
1425 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1426}
1427
1428
1429/* Attempt to find (and return) the global pointer for the given
1430 function.
1431
1432 This is a rather nasty bit of code searchs for the .dynamic section
1433 in the objfile corresponding to the pc of the function we're trying
1434 to call. Once it finds the addresses at which the .dynamic section
1435 lives in the child process, it scans the Elf64_Dyn entries for a
1436 DT_PLTGOT tag. If it finds one of these, the corresponding
1437 d_un.d_ptr value is the global pointer. */
1438
1439static CORE_ADDR
1440find_global_pointer (CORE_ADDR faddr)
1441{
76d689a6 1442 struct obj_section *faddr_sect;
64a5b29c 1443
76d689a6
KB		 1444 faddr_sect = find_pc_section (faddr);
1445 if (faddr_sect != NULL)
64a5b29c
KB		 1446 {
1447 struct obj_section *osect;
1448
76d689a6 1449 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1450 {
1451 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1452 break;
1453 }
1454
76d689a6 1455 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1456 {
1457 CORE_ADDR addr;
1458
1459 addr = osect->addr;
1460 while (addr < osect->endaddr)
1461 {
1462 int status;
1463 LONGEST tag;
1464 char buf[8];
1465
1466 status = target_read_memory (addr, buf, sizeof (buf));
1467 if (status != 0)
1468 break;
1469 tag = extract_signed_integer (buf, sizeof (buf));
1470
1471 if (tag == DT_PLTGOT)
1472 {
1473 CORE_ADDR global_pointer;
1474
1475 status = target_read_memory (addr + 8, buf, sizeof (buf));
1476 if (status != 0)
1477 break;
1478 global_pointer = extract_address (buf, sizeof (buf));
1479
1480 /* The payoff... */
1481 return global_pointer;
1482 }
1483
1484 if (tag == DT_NULL)
1485 break;
1486
1487 addr += 16;
1488 }
1489 }
1490 }
1491 return 0;
1492}
1493
1494/* Given a function's address, attempt to find (and return) the
1495 corresponding (canonical) function descriptor. Return 0 if
1496 not found. */
1497static CORE_ADDR
1498find_extant_func_descr (CORE_ADDR faddr)
1499{
76d689a6 1500 struct obj_section *faddr_sect;
64a5b29c
KB		 1501
1502 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1503 faddr_sect = find_pc_section (faddr);
1504 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1505 return faddr;
1506
76d689a6 1507 if (faddr_sect != NULL)
64a5b29c 1508 {
76d689a6
KB		 1509 struct obj_section *osect;
1510 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1511 {
1512 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1513 break;
1514 }
1515
76d689a6 1516 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1517 {
1518 CORE_ADDR addr;
1519
1520 addr = osect->addr;
1521 while (addr < osect->endaddr)
1522 {
1523 int status;
1524 LONGEST faddr2;
1525 char buf[8];
1526
1527 status = target_read_memory (addr, buf, sizeof (buf));
1528 if (status != 0)
1529 break;
1530 faddr2 = extract_signed_integer (buf, sizeof (buf));
1531
1532 if (faddr == faddr2)
1533 return addr;
1534
1535 addr += 16;
1536 }
1537 }
1538 }
1539 return 0;
1540}
1541
1542/* Attempt to find a function descriptor corresponding to the
1543 given address. If none is found, construct one on the
1544 stack using the address at fdaptr */
1545
1546static CORE_ADDR
1547find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1548{
1549 CORE_ADDR fdesc;
1550
1551 fdesc = find_extant_func_descr (faddr);
1552
1553 if (fdesc == 0)
1554 {
1555 CORE_ADDR global_pointer;
1556 char buf[16];
1557
1558 fdesc = *fdaptr;
1559 *fdaptr += 16;
1560
1561 global_pointer = find_global_pointer (faddr);
1562
1563 if (global_pointer == 0)
1564 global_pointer = read_register (IA64_GR1_REGNUM);
1565
1566 store_address (buf, 8, faddr);
1567 store_address (buf + 8, 8, global_pointer);
1568
1569 write_memory (fdesc, buf, 16);
1570 }
1571
1572 return fdesc;
1573}
16461d7d
KB		 1574
1575CORE_ADDR
1576ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1577 int struct_return, CORE_ADDR struct_addr)
1578{
1579 int argno;
1580 value_ptr arg;
1581 struct type *type;
1582 int len, argoffset;
64a5b29c 1583 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1584 int floatreg;
64a5b29c 1585 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1586
1587 nslots = 0;
64a5b29c 1588 nfuncargs = 0;
16461d7d
KB		 1589 /* Count the number of slots needed for the arguments */
1590 for (argno = 0; argno < nargs; argno++)
1591 {
1592 arg = args[argno];
1593 type = check_typedef (VALUE_TYPE (arg));
1594 len = TYPE_LENGTH (type);
1595
1596 /* FIXME: This is crude and it is wrong (IMO), but it matches
1597 what gcc does, I think. */
1598 if (len > 8 && (nslots & 1))
1599 nslots++;
1600
64a5b29c
KB		 1601 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1602 nfuncargs++;
1603
16461d7d
KB		 1604 nslots += (len + 7) / 8;
1605 }
1606
64a5b29c 1607 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1608 rseslots = (nslots > 8) ? 8 : nslots;
1609 memslots = nslots - rseslots;
1610
64a5b29c 1611 /* Allocate a new RSE frame */
16461d7d
KB		 1612 cfm = read_register (IA64_CFM_REGNUM);
1613
1614 bsp = read_register (IA64_BSP_REGNUM);
1615 bsp = rse_address_add (bsp, cfm & 0x7f);
1616 new_bsp = rse_address_add (bsp, rseslots);
1617 write_register (IA64_BSP_REGNUM, new_bsp);
1618
1619 pfs = read_register (IA64_PFS_REGNUM);
1620 pfs &= 0xc000000000000000LL;
1621 pfs |= (cfm & 0xffffffffffffLL);
1622 write_register (IA64_PFS_REGNUM, pfs);
1623
1624 cfm &= 0xc000000000000000LL;
1625 cfm |= rseslots;
1626 write_register (IA64_CFM_REGNUM, cfm);
1627
64a5b29c
KB		 1628 /* We will attempt to find function descriptors in the .opd segment,
1629 but if we can't we'll construct them ourselves. That being the
1630 case, we'll need to reserve space on the stack for them. */
1631 funcdescaddr = sp - nfuncargs * 16;
1632 funcdescaddr &= ~0xfLL;
1633
1634 /* Adjust the stack pointer to it's new value. The calling conventions
1635 require us to have 16 bytes of scratch, plus whatever space is
1636 necessary for the memory slots and our function descriptors */
1637 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1638 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1639
64a5b29c
KB		 1640 /* Place the arguments where they belong. The arguments will be
1641 either placed in the RSE backing store or on the memory stack.
1642 In addition, floating point arguments or HFAs are placed in
1643 floating point registers. */
16461d7d
KB		 1644 slotnum = 0;
1645 floatreg = IA64_FR8_REGNUM;
1646 for (argno = 0; argno < nargs; argno++)
1647 {
64a5b29c
KB		 1648 struct type *float_elt_type;
1649
16461d7d
KB		 1650 arg = args[argno];
1651 type = check_typedef (VALUE_TYPE (arg));
1652 len = TYPE_LENGTH (type);
64a5b29c
KB		 1653
1654 /* Special handling for function parameters */
1655 if (len == 8
1656 && TYPE_CODE (type) == TYPE_CODE_PTR
1657 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1658 {
1659 char val_buf[8];
1660
1661 store_address (val_buf, 8,
1662 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1663 &funcdescaddr));
1664 if (slotnum < rseslots)
1665 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1666 else
1667 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1668 slotnum++;
1669 continue;
1670 }
1671
1672 /* Normal slots */
16461d7d
KB		 1673 if (len > 8 && (slotnum & 1))
1674 slotnum++;
1675 argoffset = 0;
1676 while (len > 0)
1677 {
1678 char val_buf[8];
1679
1680 memset (val_buf, 0, 8);
1681 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1682
1683 if (slotnum < rseslots)
1684 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1685 else
1686 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1687
1688 argoffset += 8;
1689 len -= 8;
1690 slotnum++;
1691 }
64a5b29c
KB		 1692
1693 /* Handle floating point types (including HFAs) */
1694 float_elt_type = is_float_or_hfa_type (type);
1695 if (float_elt_type != NULL)
1696 {
1697 argoffset = 0;
1698 len = TYPE_LENGTH (type);
1699 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1700 {
1701 ia64_register_convert_to_raw (
1702 float_elt_type,
1703 floatreg,
1704 VALUE_CONTENTS (arg) + argoffset,
1705 &registers[REGISTER_BYTE (floatreg)]);
1706 floatreg++;
1707 argoffset += TYPE_LENGTH (float_elt_type);
1708 len -= TYPE_LENGTH (float_elt_type);
1709 }
16461d7d
KB		 1710 }
1711 }
1712
64a5b29c 1713 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1714 if (struct_return)
1715 {
1716 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1717 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1718 struct_addr);
1719 }
1720
64a5b29c 1721 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1722 target_store_registers (-1);
1723
1724 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1725 to be defined to call generic_save_dummy_frame_tos(). But at the
1726 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1727 I chose to put this call here instead of using the old mechanisms.
1728 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1729 line
1730
1731 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1732
1733 to ia64_gdbarch_init() and remove the line below. */
1734 generic_save_dummy_frame_tos (sp);
1735
1736 return sp;
1737}
1738
1739CORE_ADDR
1740ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1741{
64a5b29c 1742 CORE_ADDR global_pointer = find_global_pointer (pc);
16461d7d 1743
64a5b29c
KB		 1744 if (global_pointer != 0)
1745 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1746
1747 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1748 return sp;
1749}
1750
1751void
1752ia64_store_return_value (struct type *type, char *valbuf)
1753{
1754 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1755 {
1756 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1757 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1758 target_store_registers (IA64_FR8_REGNUM);
1759 }
1760 else
1761 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1762 valbuf, TYPE_LENGTH (type));
1763}
1764
1765void
1766ia64_pop_frame (void)
1767{
1768 generic_pop_current_frame (ia64_pop_frame_regular);
1769}
1770
1771static void
1772ia64_pop_frame_regular (struct frame_info *frame)
1773{
1774 int regno;
1775 CORE_ADDR bsp, cfm, pfs;
1776
1777 FRAME_INIT_SAVED_REGS (frame);
1778
1779 for (regno = 0; regno < ia64_num_regs; regno++)
1780 {
1781 if (frame->saved_regs[regno]
1782 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1783 && regno != pc_regnum
1784 && regno != sp_regnum
1785 && regno != IA64_PFS_REGNUM
1786 && regno != IA64_CFM_REGNUM
1787 && regno != IA64_BSP_REGNUM
1788 && regno != IA64_BSPSTORE_REGNUM)
1789 {
1790 write_register (regno,
1791 read_memory_integer (frame->saved_regs[regno],
1792 REGISTER_RAW_SIZE (regno)));
1793 }
1794 }
1795
1796 write_register (sp_regnum, FRAME_CHAIN (frame));
1797 write_pc (FRAME_SAVED_PC (frame));
1798
1799 cfm = read_register (IA64_CFM_REGNUM);
1800
1801 if (frame->saved_regs[IA64_PFS_REGNUM])
1802 {
1803 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1804 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1805 }
1806 else
1807 pfs = read_register (IA64_PFS_REGNUM);
1808
1809 /* Compute the new bsp by *adding* the difference between the
1810 size of the frame and the size of the locals (both wrt the
1811 frame that we're going back to). This seems kind of strange,
1812 especially since it seems like we ought to be subtracting the
1813 size of the locals... and we should; but the linux kernel
1814 wants bsp to be set at the end of all used registers. It's
1815 likely that this code will need to be revised to accomodate
1816 other operating systems. */
1817 bsp = rse_address_add (frame->extra_info->bsp,
1818 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1819 write_register (IA64_BSP_REGNUM, bsp);
1820
1821 /* FIXME: What becomes of the epilog count in the PFS? */
1822 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1823 write_register (IA64_CFM_REGNUM, cfm);
1824
1825 flush_cached_frames ();
1826}
1827
1828static void
1829ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1830 CORE_ADDR *targ_addr, int *targ_len)
1831{
1832 *targ_addr = memaddr;
1833 *targ_len = nr_bytes;
1834}
1835
244bc108
KB		 1836static void
1837process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1838{
1839 int *os_ident_ptr = obj;
1840 const char *name;
1841 unsigned int sectsize;
1842
1843 name = bfd_get_section_name (abfd, sect);
1844 sectsize = bfd_section_size (abfd, sect);
1845 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1846 {
1847 unsigned int name_length, data_length, note_type;
1848 char *note = alloca (sectsize);
1849
1850 bfd_get_section_contents (abfd, sect, note,
1851 (file_ptr) 0, (bfd_size_type) sectsize);
1852
1853 name_length = bfd_h_get_32 (abfd, note);
1854 data_length = bfd_h_get_32 (abfd, note + 4);
1855 note_type = bfd_h_get_32 (abfd, note + 8);
1856
1857 if (name_length == 4 && data_length == 16 && note_type == 1
1858 && strcmp (note + 12, "GNU") == 0)
1859 {
1860 int os_number = bfd_h_get_32 (abfd, note + 16);
1861
1862 /* The case numbers are from abi-tags in glibc */
1863 switch (os_number)
1864 {
1865 case 0 :
1866 *os_ident_ptr = ELFOSABI_LINUX;
1867 break;
1868#if 0 /* FIXME: Enable after internal repository is synced with sourceware */
1869 case 1 :
1870 *os_ident_ptr = ELFOSABI_HURD;
1871 break;
1872 case 2 :
1873 *os_ident_ptr = ELFOSABI_SOLARIS;
1874 break;
1875#endif
1876 default :
1877 internal_error (
1878 "process_note_abi_sections: unknown OS number %d", os_number);
1879 break;
1880 }
1881 }
1882 }
1883}
1884
16461d7d
KB		 1885static struct gdbarch *
1886ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1887{
1888 struct gdbarch *gdbarch;
244bc108
KB		 1889 struct gdbarch_tdep *tdep;
1890 int os_ident;
1891
1892 if (info.abfd != NULL
1893 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1894 {
1895 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
1896
1897 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 1898 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 1899 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1900 zero. So we have to check for note sections too. */
1901 if (os_ident == 0)
1902 {
1903 bfd_map_over_sections (info.abfd,
1904 process_note_abi_tag_sections,
1905 &os_ident);
1906 }
1907 }
1908 else
1909 os_ident = -1;
16461d7d 1910
244bc108
KB		 1911 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1912 arches != NULL;
1913 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1914 {
1915 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
1916 continue;
1917 return arches->gdbarch;
1918 }
16461d7d 1919
244bc108
KB		 1920 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1921 gdbarch = gdbarch_alloc (&info, tdep);
1922 tdep->os_ident = os_ident;
1923
1924 if (os_ident == ELFOSABI_LINUX)
1925 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
1926 else
1927 tdep->sigcontext_register_address = 0;
16461d7d
KB		 1928
1929 set_gdbarch_short_bit (gdbarch, 16);
1930 set_gdbarch_int_bit (gdbarch, 32);
1931 set_gdbarch_long_bit (gdbarch, 64);
1932 set_gdbarch_long_long_bit (gdbarch, 64);
1933 set_gdbarch_float_bit (gdbarch, 32);
1934 set_gdbarch_double_bit (gdbarch, 64);
1935 set_gdbarch_long_double_bit (gdbarch, 64);
1936 set_gdbarch_ptr_bit (gdbarch, 64);
1937
1938 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
1939 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1940 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
1941 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1942
1943 set_gdbarch_register_name (gdbarch, ia64_register_name);
1944 set_gdbarch_register_size (gdbarch, 8);
1945 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
1946 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
1947 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
1948 set_gdbarch_max_register_raw_size (gdbarch, 16);
1949 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
1950 set_gdbarch_max_register_virtual_size (gdbarch, 16);
1951 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
1952
1953 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
1954
1955 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1956 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
1957
1958 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
1959
1960 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 1961 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 1962 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
1963
1964 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
1965 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
1966
1967 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
1968 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
1969 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
1970
1971 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
1972 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
1973
1974 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
1975 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
1976 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
1977
1978 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
1979 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
1980 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
1981 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
1982 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
1983
1984 /* Settings for calling functions in the inferior. */
1985 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1986 set_gdbarch_call_dummy_length (gdbarch, 0);
1987 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
1988 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
1989 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
1990
1991 set_gdbarch_call_dummy_p (gdbarch, 1);
1992 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
1993 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
1994 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1995 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
1996 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
1997 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
1998
1999 /* We won't necessarily have a frame pointer and even if we do,
2000 it winds up being extraordinarly messy when attempting to find
2001 the frame chain. So for the purposes of creating frames (which
2002 is all read_fp() is used for), simply use the stack pointer value
2003 instead. */
2004 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2005 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2006
2007 /* Settings that should be unnecessary. */
2008 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2009
2010 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2011 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2012
2013 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2014 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2015 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2016 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2017 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2018 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2019 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2020 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2021
2022 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2023 set_gdbarch_function_start_offset (gdbarch, 0);
2024
2025 set_gdbarch_remote_translate_xfer_address (
2026 gdbarch, ia64_remote_translate_xfer_address);
2027
2028 return gdbarch;
2029}
2030
2031void
2032_initialize_ia64_tdep (void)
2033{
2034 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2035
2036 tm_print_insn = print_insn_ia64;
2037 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2038}
GDB Binutils - Deliverables
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