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16461d7d | 1 | /* Target-dependent code for the IA-64 for GDB, the GNU debugger. |
ca557f44 | 2 | |
61baf725 | 3 | Copyright (C) 1999-2017 Free Software Foundation, Inc. |
16461d7d KB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
16461d7d KB |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
16461d7d KB |
19 | |
20 | #include "defs.h" | |
21 | #include "inferior.h" | |
16461d7d | 22 | #include "gdbcore.h" |
8064c6ae | 23 | #include "arch-utils.h" |
16461d7d | 24 | #include "floatformat.h" |
e6bb342a | 25 | #include "gdbtypes.h" |
4e052eda | 26 | #include "regcache.h" |
004d836a JJ |
27 | #include "reggroups.h" |
28 | #include "frame.h" | |
29 | #include "frame-base.h" | |
30 | #include "frame-unwind.h" | |
d16aafd8 | 31 | #include "doublest.h" |
fd0407d6 | 32 | #include "value.h" |
16461d7d KB |
33 | #include "objfiles.h" |
34 | #include "elf/common.h" /* for DT_PLTGOT value */ | |
244bc108 | 35 | #include "elf-bfd.h" |
a89aa300 | 36 | #include "dis-asm.h" |
7d9b040b | 37 | #include "infcall.h" |
b33e8514 | 38 | #include "osabi.h" |
9fc9f5e2 | 39 | #include "ia64-tdep.h" |
0d5de010 | 40 | #include "cp-abi.h" |
16461d7d | 41 | |
968d1cb4 | 42 | #ifdef HAVE_LIBUNWIND_IA64_H |
8973ff21 | 43 | #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */ |
05e7c244 | 44 | #include "ia64-libunwind-tdep.h" |
c5a27d9c JJ |
45 | |
46 | /* Note: KERNEL_START is supposed to be an address which is not going | |
47 | to ever contain any valid unwind info. For ia64 linux, the choice | |
48 | of 0xc000000000000000 is fairly safe since that's uncached space. | |
49 | ||
50 | We use KERNEL_START as follows: after obtaining the kernel's | |
51 | unwind table via getunwind(), we project its unwind data into | |
52 | address-range KERNEL_START-(KERNEL_START+ktab_size) and then | |
53 | when ia64_access_mem() sees a memory access to this | |
54 | address-range, we redirect it to ktab instead. | |
55 | ||
56 | None of this hackery is needed with a modern kernel/libcs | |
57 | which uses the kernel virtual DSO to provide access to the | |
58 | kernel's unwind info. In that case, ktab_size remains 0 and | |
59 | hence the value of KERNEL_START doesn't matter. */ | |
60 | ||
61 | #define KERNEL_START 0xc000000000000000ULL | |
62 | ||
63 | static size_t ktab_size = 0; | |
64 | struct ia64_table_entry | |
65 | { | |
66 | uint64_t start_offset; | |
67 | uint64_t end_offset; | |
68 | uint64_t info_offset; | |
69 | }; | |
70 | ||
71 | static struct ia64_table_entry *ktab = NULL; | |
72 | ||
968d1cb4 JJ |
73 | #endif |
74 | ||
698cb3f0 KB |
75 | /* An enumeration of the different IA-64 instruction types. */ |
76 | ||
16461d7d KB |
77 | typedef enum instruction_type |
78 | { | |
79 | A, /* Integer ALU ; I-unit or M-unit */ | |
80 | I, /* Non-ALU integer; I-unit */ | |
81 | M, /* Memory ; M-unit */ | |
82 | F, /* Floating-point ; F-unit */ | |
83 | B, /* Branch ; B-unit */ | |
84 | L, /* Extended (L+X) ; I-unit */ | |
85 | X, /* Extended (L+X) ; I-unit */ | |
86 | undefined /* undefined or reserved */ | |
87 | } instruction_type; | |
88 | ||
89 | /* We represent IA-64 PC addresses as the value of the instruction | |
90 | pointer or'd with some bit combination in the low nibble which | |
91 | represents the slot number in the bundle addressed by the | |
92 | instruction pointer. The problem is that the Linux kernel | |
93 | multiplies its slot numbers (for exceptions) by one while the | |
94 | disassembler multiplies its slot numbers by 6. In addition, I've | |
95 | heard it said that the simulator uses 1 as the multiplier. | |
96 | ||
97 | I've fixed the disassembler so that the bytes_per_line field will | |
98 | be the slot multiplier. If bytes_per_line comes in as zero, it | |
99 | is set to six (which is how it was set up initially). -- objdump | |
100 | displays pretty disassembly dumps with this value. For our purposes, | |
101 | we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we | |
1777feb0 | 102 | never want to also display the raw bytes the way objdump does. */ |
16461d7d KB |
103 | |
104 | #define SLOT_MULTIPLIER 1 | |
105 | ||
1777feb0 | 106 | /* Length in bytes of an instruction bundle. */ |
16461d7d KB |
107 | |
108 | #define BUNDLE_LEN 16 | |
109 | ||
939c61fa JK |
110 | /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */ |
111 | ||
112 | #if BREAKPOINT_MAX < BUNDLE_LEN - 2 | |
113 | # error "BREAKPOINT_MAX < BUNDLE_LEN - 2" | |
114 | #endif | |
115 | ||
16461d7d KB |
116 | static gdbarch_init_ftype ia64_gdbarch_init; |
117 | ||
118 | static gdbarch_register_name_ftype ia64_register_name; | |
004d836a | 119 | static gdbarch_register_type_ftype ia64_register_type; |
16461d7d | 120 | static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc; |
16461d7d | 121 | static gdbarch_skip_prologue_ftype ia64_skip_prologue; |
64a5b29c | 122 | static struct type *is_float_or_hfa_type (struct type *t); |
e17a4113 UW |
123 | static CORE_ADDR ia64_find_global_pointer (struct gdbarch *gdbarch, |
124 | CORE_ADDR faddr); | |
16461d7d | 125 | |
004d836a | 126 | #define NUM_IA64_RAW_REGS 462 |
16461d7d | 127 | |
16461d7d | 128 | static int sp_regnum = IA64_GR12_REGNUM; |
16461d7d | 129 | |
1777feb0 MS |
130 | /* NOTE: we treat the register stack registers r32-r127 as |
131 | pseudo-registers because they may not be accessible via the ptrace | |
132 | register get/set interfaces. */ | |
133 | ||
134 | enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, | |
135 | VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM, | |
004d836a | 136 | V127_REGNUM = V32_REGNUM + 95, |
1777feb0 MS |
137 | VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, |
138 | VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM }; | |
16461d7d KB |
139 | |
140 | /* Array of register names; There should be ia64_num_regs strings in | |
141 | the initializer. */ | |
142 | ||
a121b7c1 | 143 | static const char *ia64_register_names[] = |
16461d7d KB |
144 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
145 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
146 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
147 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
004d836a JJ |
148 | "", "", "", "", "", "", "", "", |
149 | "", "", "", "", "", "", "", "", | |
150 | "", "", "", "", "", "", "", "", | |
151 | "", "", "", "", "", "", "", "", | |
152 | "", "", "", "", "", "", "", "", | |
153 | "", "", "", "", "", "", "", "", | |
154 | "", "", "", "", "", "", "", "", | |
155 | "", "", "", "", "", "", "", "", | |
156 | "", "", "", "", "", "", "", "", | |
157 | "", "", "", "", "", "", "", "", | |
158 | "", "", "", "", "", "", "", "", | |
159 | "", "", "", "", "", "", "", "", | |
16461d7d KB |
160 | |
161 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
162 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
163 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
164 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", | |
165 | "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", | |
166 | "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", | |
167 | "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55", | |
168 | "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63", | |
169 | "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71", | |
170 | "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", | |
171 | "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", | |
172 | "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95", | |
173 | "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103", | |
174 | "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111", | |
175 | "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119", | |
176 | "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127", | |
177 | ||
004d836a JJ |
178 | "", "", "", "", "", "", "", "", |
179 | "", "", "", "", "", "", "", "", | |
180 | "", "", "", "", "", "", "", "", | |
181 | "", "", "", "", "", "", "", "", | |
182 | "", "", "", "", "", "", "", "", | |
183 | "", "", "", "", "", "", "", "", | |
184 | "", "", "", "", "", "", "", "", | |
185 | "", "", "", "", "", "", "", "", | |
16461d7d KB |
186 | |
187 | "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", | |
188 | ||
189 | "vfp", "vrap", | |
190 | ||
191 | "pr", "ip", "psr", "cfm", | |
192 | ||
193 | "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7", | |
194 | "", "", "", "", "", "", "", "", | |
195 | "rsc", "bsp", "bspstore", "rnat", | |
196 | "", "fcr", "", "", | |
197 | "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "", | |
198 | "ccv", "", "", "", "unat", "", "", "", | |
199 | "fpsr", "", "", "", "itc", | |
200 | "", "", "", "", "", "", "", "", "", "", | |
201 | "", "", "", "", "", "", "", "", "", | |
202 | "pfs", "lc", "ec", | |
203 | "", "", "", "", "", "", "", "", "", "", | |
204 | "", "", "", "", "", "", "", "", "", "", | |
205 | "", "", "", "", "", "", "", "", "", "", | |
206 | "", "", "", "", "", "", "", "", "", "", | |
207 | "", "", "", "", "", "", "", "", "", "", | |
208 | "", "", "", "", "", "", "", "", "", "", | |
209 | "", | |
210 | "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7", | |
211 | "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15", | |
212 | "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23", | |
213 | "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31", | |
214 | "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39", | |
215 | "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47", | |
216 | "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55", | |
217 | "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63", | |
218 | "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71", | |
219 | "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79", | |
220 | "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87", | |
221 | "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95", | |
222 | "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103", | |
223 | "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111", | |
224 | "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119", | |
225 | "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127", | |
004d836a JJ |
226 | |
227 | "bof", | |
228 | ||
229 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", | |
230 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", | |
231 | "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", | |
232 | "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", | |
233 | "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71", | |
234 | "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79", | |
235 | "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87", | |
236 | "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95", | |
237 | "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103", | |
238 | "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111", | |
239 | "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119", | |
240 | "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127", | |
241 | ||
242 | "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", | |
243 | "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", | |
244 | "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23", | |
245 | "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31", | |
246 | "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", | |
247 | "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", | |
248 | "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55", | |
249 | "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63", | |
16461d7d KB |
250 | }; |
251 | ||
004d836a JJ |
252 | struct ia64_frame_cache |
253 | { | |
254 | CORE_ADDR base; /* frame pointer base for frame */ | |
255 | CORE_ADDR pc; /* function start pc for frame */ | |
256 | CORE_ADDR saved_sp; /* stack pointer for frame */ | |
257 | CORE_ADDR bsp; /* points at r32 for the current frame */ | |
258 | CORE_ADDR cfm; /* cfm value for current frame */ | |
4afcc598 | 259 | CORE_ADDR prev_cfm; /* cfm value for previous frame */ |
004d836a | 260 | int frameless; |
1777feb0 MS |
261 | int sof; /* Size of frame (decoded from cfm value). */ |
262 | int sol; /* Size of locals (decoded from cfm value). */ | |
263 | int sor; /* Number of rotating registers (decoded from | |
264 | cfm value). */ | |
004d836a JJ |
265 | CORE_ADDR after_prologue; |
266 | /* Address of first instruction after the last | |
267 | prologue instruction; Note that there may | |
268 | be instructions from the function's body | |
1777feb0 | 269 | intermingled with the prologue. */ |
004d836a JJ |
270 | int mem_stack_frame_size; |
271 | /* Size of the memory stack frame (may be zero), | |
1777feb0 | 272 | or -1 if it has not been determined yet. */ |
004d836a | 273 | int fp_reg; /* Register number (if any) used a frame pointer |
244bc108 | 274 | for this frame. 0 if no register is being used |
1777feb0 | 275 | as the frame pointer. */ |
004d836a JJ |
276 | |
277 | /* Saved registers. */ | |
278 | CORE_ADDR saved_regs[NUM_IA64_RAW_REGS]; | |
279 | ||
280 | }; | |
244bc108 | 281 | |
27067745 UW |
282 | static int |
283 | floatformat_valid (const struct floatformat *fmt, const void *from) | |
284 | { | |
285 | return 1; | |
286 | } | |
287 | ||
7458e667 | 288 | static const struct floatformat floatformat_ia64_ext_little = |
27067745 UW |
289 | { |
290 | floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64, | |
7458e667 JB |
291 | floatformat_intbit_yes, "floatformat_ia64_ext_little", floatformat_valid, NULL |
292 | }; | |
293 | ||
294 | static const struct floatformat floatformat_ia64_ext_big = | |
295 | { | |
296 | floatformat_big, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64, | |
297 | floatformat_intbit_yes, "floatformat_ia64_ext_big", floatformat_valid | |
27067745 UW |
298 | }; |
299 | ||
300 | static const struct floatformat *floatformats_ia64_ext[2] = | |
301 | { | |
7458e667 JB |
302 | &floatformat_ia64_ext_big, |
303 | &floatformat_ia64_ext_little | |
27067745 UW |
304 | }; |
305 | ||
306 | static struct type * | |
307 | ia64_ext_type (struct gdbarch *gdbarch) | |
308 | { | |
309 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
310 | ||
311 | if (!tdep->ia64_ext_type) | |
312 | tdep->ia64_ext_type | |
e9bb382b | 313 | = arch_float_type (gdbarch, 128, "builtin_type_ia64_ext", |
27067745 UW |
314 | floatformats_ia64_ext); |
315 | ||
316 | return tdep->ia64_ext_type; | |
317 | } | |
318 | ||
63807e1d | 319 | static int |
004d836a JJ |
320 | ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
321 | struct reggroup *group) | |
16461d7d | 322 | { |
004d836a JJ |
323 | int vector_p; |
324 | int float_p; | |
325 | int raw_p; | |
326 | if (group == all_reggroup) | |
327 | return 1; | |
328 | vector_p = TYPE_VECTOR (register_type (gdbarch, regnum)); | |
329 | float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT; | |
330 | raw_p = regnum < NUM_IA64_RAW_REGS; | |
331 | if (group == float_reggroup) | |
332 | return float_p; | |
333 | if (group == vector_reggroup) | |
334 | return vector_p; | |
335 | if (group == general_reggroup) | |
336 | return (!vector_p && !float_p); | |
337 | if (group == save_reggroup || group == restore_reggroup) | |
338 | return raw_p; | |
339 | return 0; | |
16461d7d KB |
340 | } |
341 | ||
004d836a | 342 | static const char * |
d93859e2 | 343 | ia64_register_name (struct gdbarch *gdbarch, int reg) |
16461d7d | 344 | { |
004d836a | 345 | return ia64_register_names[reg]; |
16461d7d KB |
346 | } |
347 | ||
004d836a JJ |
348 | struct type * |
349 | ia64_register_type (struct gdbarch *arch, int reg) | |
16461d7d | 350 | { |
004d836a | 351 | if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM) |
27067745 | 352 | return ia64_ext_type (arch); |
004d836a | 353 | else |
0dfff4cb | 354 | return builtin_type (arch)->builtin_long; |
16461d7d KB |
355 | } |
356 | ||
a78f21af | 357 | static int |
d3f73121 | 358 | ia64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
16461d7d | 359 | { |
004d836a JJ |
360 | if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM) |
361 | return V32_REGNUM + (reg - IA64_GR32_REGNUM); | |
362 | return reg; | |
16461d7d KB |
363 | } |
364 | ||
16461d7d KB |
365 | |
366 | /* Extract ``len'' bits from an instruction bundle starting at | |
367 | bit ``from''. */ | |
368 | ||
244bc108 | 369 | static long long |
948f8e3d | 370 | extract_bit_field (const gdb_byte *bundle, int from, int len) |
16461d7d KB |
371 | { |
372 | long long result = 0LL; | |
373 | int to = from + len; | |
374 | int from_byte = from / 8; | |
375 | int to_byte = to / 8; | |
376 | unsigned char *b = (unsigned char *) bundle; | |
377 | unsigned char c; | |
378 | int lshift; | |
379 | int i; | |
380 | ||
381 | c = b[from_byte]; | |
382 | if (from_byte == to_byte) | |
383 | c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8); | |
384 | result = c >> (from % 8); | |
385 | lshift = 8 - (from % 8); | |
386 | ||
387 | for (i = from_byte+1; i < to_byte; i++) | |
388 | { | |
389 | result |= ((long long) b[i]) << lshift; | |
390 | lshift += 8; | |
391 | } | |
392 | ||
393 | if (from_byte < to_byte && (to % 8 != 0)) | |
394 | { | |
395 | c = b[to_byte]; | |
396 | c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8); | |
397 | result |= ((long long) c) << lshift; | |
398 | } | |
399 | ||
400 | return result; | |
401 | } | |
402 | ||
1777feb0 | 403 | /* Replace the specified bits in an instruction bundle. */ |
16461d7d | 404 | |
244bc108 | 405 | static void |
948f8e3d | 406 | replace_bit_field (gdb_byte *bundle, long long val, int from, int len) |
16461d7d KB |
407 | { |
408 | int to = from + len; | |
409 | int from_byte = from / 8; | |
410 | int to_byte = to / 8; | |
411 | unsigned char *b = (unsigned char *) bundle; | |
412 | unsigned char c; | |
413 | ||
414 | if (from_byte == to_byte) | |
415 | { | |
416 | unsigned char left, right; | |
417 | c = b[from_byte]; | |
418 | left = (c >> (to % 8)) << (to % 8); | |
419 | right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8); | |
420 | c = (unsigned char) (val & 0xff); | |
421 | c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8); | |
422 | c |= right | left; | |
423 | b[from_byte] = c; | |
424 | } | |
425 | else | |
426 | { | |
427 | int i; | |
428 | c = b[from_byte]; | |
429 | c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8); | |
430 | c = c | (val << (from % 8)); | |
431 | b[from_byte] = c; | |
432 | val >>= 8 - from % 8; | |
433 | ||
434 | for (i = from_byte+1; i < to_byte; i++) | |
435 | { | |
436 | c = val & 0xff; | |
437 | val >>= 8; | |
438 | b[i] = c; | |
439 | } | |
440 | ||
441 | if (to % 8 != 0) | |
442 | { | |
443 | unsigned char cv = (unsigned char) val; | |
444 | c = b[to_byte]; | |
445 | c = c >> (to % 8) << (to % 8); | |
446 | c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8); | |
447 | b[to_byte] = c; | |
448 | } | |
449 | } | |
450 | } | |
451 | ||
452 | /* Return the contents of slot N (for N = 0, 1, or 2) in | |
1777feb0 | 453 | and instruction bundle. */ |
16461d7d | 454 | |
244bc108 | 455 | static long long |
948f8e3d | 456 | slotN_contents (gdb_byte *bundle, int slotnum) |
16461d7d KB |
457 | { |
458 | return extract_bit_field (bundle, 5+41*slotnum, 41); | |
459 | } | |
460 | ||
1777feb0 | 461 | /* Store an instruction in an instruction bundle. */ |
16461d7d | 462 | |
244bc108 | 463 | static void |
948f8e3d | 464 | replace_slotN_contents (gdb_byte *bundle, long long instr, int slotnum) |
16461d7d KB |
465 | { |
466 | replace_bit_field (bundle, instr, 5+41*slotnum, 41); | |
467 | } | |
468 | ||
939c61fa | 469 | static const enum instruction_type template_encoding_table[32][3] = |
16461d7d KB |
470 | { |
471 | { M, I, I }, /* 00 */ | |
472 | { M, I, I }, /* 01 */ | |
473 | { M, I, I }, /* 02 */ | |
474 | { M, I, I }, /* 03 */ | |
475 | { M, L, X }, /* 04 */ | |
476 | { M, L, X }, /* 05 */ | |
477 | { undefined, undefined, undefined }, /* 06 */ | |
478 | { undefined, undefined, undefined }, /* 07 */ | |
479 | { M, M, I }, /* 08 */ | |
480 | { M, M, I }, /* 09 */ | |
481 | { M, M, I }, /* 0A */ | |
482 | { M, M, I }, /* 0B */ | |
483 | { M, F, I }, /* 0C */ | |
484 | { M, F, I }, /* 0D */ | |
485 | { M, M, F }, /* 0E */ | |
486 | { M, M, F }, /* 0F */ | |
487 | { M, I, B }, /* 10 */ | |
488 | { M, I, B }, /* 11 */ | |
489 | { M, B, B }, /* 12 */ | |
490 | { M, B, B }, /* 13 */ | |
491 | { undefined, undefined, undefined }, /* 14 */ | |
492 | { undefined, undefined, undefined }, /* 15 */ | |
493 | { B, B, B }, /* 16 */ | |
494 | { B, B, B }, /* 17 */ | |
495 | { M, M, B }, /* 18 */ | |
496 | { M, M, B }, /* 19 */ | |
497 | { undefined, undefined, undefined }, /* 1A */ | |
498 | { undefined, undefined, undefined }, /* 1B */ | |
499 | { M, F, B }, /* 1C */ | |
500 | { M, F, B }, /* 1D */ | |
501 | { undefined, undefined, undefined }, /* 1E */ | |
502 | { undefined, undefined, undefined }, /* 1F */ | |
503 | }; | |
504 | ||
505 | /* Fetch and (partially) decode an instruction at ADDR and return the | |
506 | address of the next instruction to fetch. */ | |
507 | ||
508 | static CORE_ADDR | |
509 | fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr) | |
510 | { | |
948f8e3d | 511 | gdb_byte bundle[BUNDLE_LEN]; |
16461d7d | 512 | int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER; |
fe978cb0 | 513 | long long templ; |
16461d7d KB |
514 | int val; |
515 | ||
c26e1c2b KB |
516 | /* Warn about slot numbers greater than 2. We used to generate |
517 | an error here on the assumption that the user entered an invalid | |
518 | address. But, sometimes GDB itself requests an invalid address. | |
519 | This can (easily) happen when execution stops in a function for | |
520 | which there are no symbols. The prologue scanner will attempt to | |
521 | find the beginning of the function - if the nearest symbol | |
522 | happens to not be aligned on a bundle boundary (16 bytes), the | |
523 | resulting starting address will cause GDB to think that the slot | |
524 | number is too large. | |
525 | ||
526 | So we warn about it and set the slot number to zero. It is | |
527 | not necessarily a fatal condition, particularly if debugging | |
528 | at the assembly language level. */ | |
16461d7d | 529 | if (slotnum > 2) |
c26e1c2b | 530 | { |
8a3fe4f8 AC |
531 | warning (_("Can't fetch instructions for slot numbers greater than 2.\n" |
532 | "Using slot 0 instead")); | |
c26e1c2b KB |
533 | slotnum = 0; |
534 | } | |
16461d7d KB |
535 | |
536 | addr &= ~0x0f; | |
537 | ||
538 | val = target_read_memory (addr, bundle, BUNDLE_LEN); | |
539 | ||
540 | if (val != 0) | |
541 | return 0; | |
542 | ||
543 | *instr = slotN_contents (bundle, slotnum); | |
fe978cb0 PA |
544 | templ = extract_bit_field (bundle, 0, 5); |
545 | *it = template_encoding_table[(int)templ][slotnum]; | |
16461d7d | 546 | |
64a5b29c | 547 | if (slotnum == 2 || (slotnum == 1 && *it == L)) |
16461d7d KB |
548 | addr += 16; |
549 | else | |
550 | addr += (slotnum + 1) * SLOT_MULTIPLIER; | |
551 | ||
552 | return addr; | |
553 | } | |
554 | ||
555 | /* There are 5 different break instructions (break.i, break.b, | |
556 | break.m, break.f, and break.x), but they all have the same | |
557 | encoding. (The five bit template in the low five bits of the | |
558 | instruction bundle distinguishes one from another.) | |
559 | ||
560 | The runtime architecture manual specifies that break instructions | |
561 | used for debugging purposes must have the upper two bits of the 21 | |
562 | bit immediate set to a 0 and a 1 respectively. A breakpoint | |
563 | instruction encodes the most significant bit of its 21 bit | |
564 | immediate at bit 36 of the 41 bit instruction. The penultimate msb | |
565 | is at bit 25 which leads to the pattern below. | |
566 | ||
567 | Originally, I had this set up to do, e.g, a "break.i 0x80000" But | |
568 | it turns out that 0x80000 was used as the syscall break in the early | |
569 | simulators. So I changed the pattern slightly to do "break.i 0x080001" | |
570 | instead. But that didn't work either (I later found out that this | |
571 | pattern was used by the simulator that I was using.) So I ended up | |
939c61fa JK |
572 | using the pattern seen below. |
573 | ||
574 | SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN) | |
575 | while we need bit-based addressing as the instructions length is 41 bits and | |
576 | we must not modify/corrupt the adjacent slots in the same bundle. | |
577 | Fortunately we may store larger memory incl. the adjacent bits with the | |
578 | original memory content (not the possibly already stored breakpoints there). | |
579 | We need to be careful in ia64_memory_remove_breakpoint to always restore | |
580 | only the specific bits of this instruction ignoring any adjacent stored | |
581 | bits. | |
582 | ||
583 | We use the original addressing with the low nibble in the range <0..2> which | |
584 | gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows | |
585 | as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN | |
586 | bytes just without these two possibly skipped bytes to not to exceed to the | |
587 | next bundle. | |
588 | ||
589 | If we would like to store the whole bundle to SHADOW_CONTENTS we would have | |
590 | to store already the base address (`address & ~0x0f') into PLACED_ADDRESS. | |
591 | In such case there is no other place where to store | |
592 | SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know | |
593 | SLOTNUM in ia64_memory_remove_breakpoint. | |
594 | ||
ca8b5032 JB |
595 | There is one special case where we need to be extra careful: |
596 | L-X instructions, which are instructions that occupy 2 slots | |
597 | (The L part is always in slot 1, and the X part is always in | |
598 | slot 2). We must refuse to insert breakpoints for an address | |
599 | that points at slot 2 of a bundle where an L-X instruction is | |
600 | present, since there is logically no instruction at that address. | |
601 | However, to make things more interesting, the opcode of L-X | |
602 | instructions is located in slot 2. This means that, to insert | |
603 | a breakpoint at an address that points to slot 1, we actually | |
604 | need to write the breakpoint in slot 2! Slot 1 is actually | |
605 | the extended operand, so writing the breakpoint there would not | |
606 | have the desired effect. Another side-effect of this issue | |
607 | is that we need to make sure that the shadow contents buffer | |
608 | does save byte 15 of our instruction bundle (this is the tail | |
609 | end of slot 2, which wouldn't be saved if we were to insert | |
610 | the breakpoint in slot 1). | |
611 | ||
939c61fa JK |
612 | ia64 16-byte bundle layout: |
613 | | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits | | |
614 | ||
615 | The current addressing used by the code below: | |
616 | original PC placed_address placed_size required covered | |
617 | == bp_tgt->shadow_len reqd \subset covered | |
73a9714c JB |
618 | 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF> |
619 | 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF> | |
939c61fa | 620 | 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF> |
ca8b5032 JB |
621 | |
622 | L-X instructions are treated a little specially, as explained above: | |
623 | 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF> | |
624 | ||
939c61fa JK |
625 | `objdump -d' and some other tools show a bit unjustified offsets: |
626 | original PC byte where starts the instruction objdump offset | |
627 | 0xABCDE0 0xABCDE0 0xABCDE0 | |
628 | 0xABCDE1 0xABCDE5 0xABCDE6 | |
629 | 0xABCDE2 0xABCDEA 0xABCDEC | |
630 | */ | |
16461d7d | 631 | |
aaab4dba | 632 | #define IA64_BREAKPOINT 0x00003333300LL |
16461d7d KB |
633 | |
634 | static int | |
ae4b2284 MD |
635 | ia64_memory_insert_breakpoint (struct gdbarch *gdbarch, |
636 | struct bp_target_info *bp_tgt) | |
16461d7d | 637 | { |
0d5ed153 | 638 | CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; |
939c61fa | 639 | gdb_byte bundle[BUNDLE_LEN]; |
73a9714c | 640 | int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum; |
939c61fa | 641 | long long instr_breakpoint; |
16461d7d | 642 | int val; |
fe978cb0 | 643 | int templ; |
939c61fa | 644 | struct cleanup *cleanup; |
16461d7d KB |
645 | |
646 | if (slotnum > 2) | |
8a3fe4f8 | 647 | error (_("Can't insert breakpoint for slot numbers greater than 2.")); |
16461d7d KB |
648 | |
649 | addr &= ~0x0f; | |
650 | ||
b554e4bd JK |
651 | /* Enable the automatic memory restoration from breakpoints while |
652 | we read our instruction bundle for the purpose of SHADOW_CONTENTS. | |
653 | Otherwise, we could possibly store into the shadow parts of the adjacent | |
939c61fa JK |
654 | placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real |
655 | breakpoint instruction bits region. */ | |
b554e4bd | 656 | cleanup = make_show_memory_breakpoints_cleanup (0); |
16461d7d | 657 | val = target_read_memory (addr, bundle, BUNDLE_LEN); |
fbfaaae5 JK |
658 | if (val != 0) |
659 | { | |
660 | do_cleanups (cleanup); | |
661 | return val; | |
662 | } | |
126fa72d | 663 | |
73a9714c JB |
664 | /* SHADOW_SLOTNUM saves the original slot number as expected by the caller |
665 | for addressing the SHADOW_CONTENTS placement. */ | |
666 | shadow_slotnum = slotnum; | |
667 | ||
ca8b5032 JB |
668 | /* Always cover the last byte of the bundle in case we are inserting |
669 | a breakpoint on an L-X instruction. */ | |
73a9714c JB |
670 | bp_tgt->shadow_len = BUNDLE_LEN - shadow_slotnum; |
671 | ||
fe978cb0 PA |
672 | templ = extract_bit_field (bundle, 0, 5); |
673 | if (template_encoding_table[templ][slotnum] == X) | |
73a9714c | 674 | { |
ca8b5032 JB |
675 | /* X unit types can only be used in slot 2, and are actually |
676 | part of a 2-slot L-X instruction. We cannot break at this | |
677 | address, as this is the second half of an instruction that | |
678 | lives in slot 1 of that bundle. */ | |
73a9714c JB |
679 | gdb_assert (slotnum == 2); |
680 | error (_("Can't insert breakpoint for non-existing slot X")); | |
681 | } | |
fe978cb0 | 682 | if (template_encoding_table[templ][slotnum] == L) |
73a9714c | 683 | { |
ca8b5032 JB |
684 | /* L unit types can only be used in slot 1. But the associated |
685 | opcode for that instruction is in slot 2, so bump the slot number | |
686 | accordingly. */ | |
73a9714c JB |
687 | gdb_assert (slotnum == 1); |
688 | slotnum = 2; | |
689 | } | |
939c61fa JK |
690 | |
691 | /* Store the whole bundle, except for the initial skipped bytes by the slot | |
692 | number interpreted as bytes offset in PLACED_ADDRESS. */ | |
1777feb0 MS |
693 | memcpy (bp_tgt->shadow_contents, bundle + shadow_slotnum, |
694 | bp_tgt->shadow_len); | |
939c61fa | 695 | |
b554e4bd JK |
696 | /* Re-read the same bundle as above except that, this time, read it in order |
697 | to compute the new bundle inside which we will be inserting the | |
698 | breakpoint. Therefore, disable the automatic memory restoration from | |
699 | breakpoints while we read our instruction bundle. Otherwise, the general | |
700 | restoration mechanism kicks in and we would possibly remove parts of the | |
701 | adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping | |
702 | the real breakpoint instruction bits region. */ | |
703 | make_show_memory_breakpoints_cleanup (1); | |
fbfaaae5 JK |
704 | val = target_read_memory (addr, bundle, BUNDLE_LEN); |
705 | if (val != 0) | |
706 | { | |
707 | do_cleanups (cleanup); | |
708 | return val; | |
709 | } | |
b554e4bd | 710 | |
939c61fa JK |
711 | /* Breakpoints already present in the code will get deteacted and not get |
712 | reinserted by bp_loc_is_permanent. Multiple breakpoints at the same | |
713 | location cannot induce the internal error as they are optimized into | |
714 | a single instance by update_global_location_list. */ | |
715 | instr_breakpoint = slotN_contents (bundle, slotnum); | |
716 | if (instr_breakpoint == IA64_BREAKPOINT) | |
717 | internal_error (__FILE__, __LINE__, | |
718 | _("Address %s already contains a breakpoint."), | |
5af949e3 | 719 | paddress (gdbarch, bp_tgt->placed_address)); |
aaab4dba | 720 | replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum); |
939c61fa | 721 | |
73a9714c | 722 | val = target_write_memory (addr + shadow_slotnum, bundle + shadow_slotnum, |
fbfaaae5 | 723 | bp_tgt->shadow_len); |
16461d7d | 724 | |
939c61fa | 725 | do_cleanups (cleanup); |
16461d7d KB |
726 | return val; |
727 | } | |
728 | ||
729 | static int | |
ae4b2284 MD |
730 | ia64_memory_remove_breakpoint (struct gdbarch *gdbarch, |
731 | struct bp_target_info *bp_tgt) | |
16461d7d | 732 | { |
8181d85f | 733 | CORE_ADDR addr = bp_tgt->placed_address; |
939c61fa | 734 | gdb_byte bundle_mem[BUNDLE_LEN], bundle_saved[BUNDLE_LEN]; |
73a9714c | 735 | int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum; |
939c61fa | 736 | long long instr_breakpoint, instr_saved; |
16461d7d | 737 | int val; |
fe978cb0 | 738 | int templ; |
1de34ab7 | 739 | struct cleanup *cleanup; |
16461d7d KB |
740 | |
741 | addr &= ~0x0f; | |
742 | ||
1de34ab7 JB |
743 | /* Disable the automatic memory restoration from breakpoints while |
744 | we read our instruction bundle. Otherwise, the general restoration | |
939c61fa JK |
745 | mechanism kicks in and we would possibly remove parts of the adjacent |
746 | placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real | |
747 | breakpoint instruction bits region. */ | |
1de34ab7 | 748 | cleanup = make_show_memory_breakpoints_cleanup (1); |
939c61fa | 749 | val = target_read_memory (addr, bundle_mem, BUNDLE_LEN); |
fbfaaae5 JK |
750 | if (val != 0) |
751 | { | |
752 | do_cleanups (cleanup); | |
753 | return val; | |
754 | } | |
126fa72d | 755 | |
73a9714c JB |
756 | /* SHADOW_SLOTNUM saves the original slot number as expected by the caller |
757 | for addressing the SHADOW_CONTENTS placement. */ | |
758 | shadow_slotnum = slotnum; | |
759 | ||
fe978cb0 PA |
760 | templ = extract_bit_field (bundle_mem, 0, 5); |
761 | if (template_encoding_table[templ][slotnum] == X) | |
73a9714c | 762 | { |
ca8b5032 JB |
763 | /* X unit types can only be used in slot 2, and are actually |
764 | part of a 2-slot L-X instruction. We refuse to insert | |
765 | breakpoints at this address, so there should be no reason | |
766 | for us attempting to remove one there, except if the program's | |
767 | code somehow got modified in memory. */ | |
73a9714c | 768 | gdb_assert (slotnum == 2); |
ca8b5032 JB |
769 | warning (_("Cannot remove breakpoint at address %s from non-existing " |
770 | "X-type slot, memory has changed underneath"), | |
73a9714c JB |
771 | paddress (gdbarch, bp_tgt->placed_address)); |
772 | do_cleanups (cleanup); | |
773 | return -1; | |
774 | } | |
fe978cb0 | 775 | if (template_encoding_table[templ][slotnum] == L) |
73a9714c | 776 | { |
ca8b5032 JB |
777 | /* L unit types can only be used in slot 1. But the breakpoint |
778 | was actually saved using slot 2, so update the slot number | |
779 | accordingly. */ | |
73a9714c JB |
780 | gdb_assert (slotnum == 1); |
781 | slotnum = 2; | |
782 | } | |
939c61fa | 783 | |
cd6c3b4f | 784 | gdb_assert (bp_tgt->shadow_len == BUNDLE_LEN - shadow_slotnum); |
939c61fa JK |
785 | |
786 | instr_breakpoint = slotN_contents (bundle_mem, slotnum); | |
787 | if (instr_breakpoint != IA64_BREAKPOINT) | |
126fa72d | 788 | { |
939c61fa JK |
789 | warning (_("Cannot remove breakpoint at address %s, " |
790 | "no break instruction at such address."), | |
5af949e3 | 791 | paddress (gdbarch, bp_tgt->placed_address)); |
a58162c2 | 792 | do_cleanups (cleanup); |
939c61fa | 793 | return -1; |
126fa72d PS |
794 | } |
795 | ||
939c61fa JK |
796 | /* Extract the original saved instruction from SLOTNUM normalizing its |
797 | bit-shift for INSTR_SAVED. */ | |
798 | memcpy (bundle_saved, bundle_mem, BUNDLE_LEN); | |
73a9714c JB |
799 | memcpy (bundle_saved + shadow_slotnum, bp_tgt->shadow_contents, |
800 | bp_tgt->shadow_len); | |
939c61fa JK |
801 | instr_saved = slotN_contents (bundle_saved, slotnum); |
802 | ||
ca8b5032 JB |
803 | /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM |
804 | and not any of the other ones that are stored in SHADOW_CONTENTS. */ | |
939c61fa | 805 | replace_slotN_contents (bundle_mem, instr_saved, slotnum); |
dd110abf | 806 | val = target_write_raw_memory (addr, bundle_mem, BUNDLE_LEN); |
16461d7d | 807 | |
1de34ab7 | 808 | do_cleanups (cleanup); |
16461d7d KB |
809 | return val; |
810 | } | |
811 | ||
cd6c3b4f YQ |
812 | /* Implement the breakpoint_kind_from_pc gdbarch method. */ |
813 | ||
814 | static int | |
815 | ia64_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr) | |
816 | { | |
817 | /* A place holder of gdbarch method breakpoint_kind_from_pc. */ | |
818 | return 0; | |
819 | } | |
820 | ||
939c61fa JK |
821 | /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64 |
822 | instruction slots ranges are bit-granular (41 bits) we have to provide an | |
823 | extended range as described for ia64_memory_insert_breakpoint. We also take | |
824 | care of preserving the `break' instruction 21-bit (or 62-bit) parameter to | |
825 | make a match for permanent breakpoints. */ | |
826 | ||
827 | static const gdb_byte * | |
1777feb0 MS |
828 | ia64_breakpoint_from_pc (struct gdbarch *gdbarch, |
829 | CORE_ADDR *pcptr, int *lenptr) | |
16461d7d | 830 | { |
939c61fa JK |
831 | CORE_ADDR addr = *pcptr; |
832 | static gdb_byte bundle[BUNDLE_LEN]; | |
73a9714c | 833 | int slotnum = (int) (*pcptr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum; |
939c61fa JK |
834 | long long instr_fetched; |
835 | int val; | |
fe978cb0 | 836 | int templ; |
939c61fa JK |
837 | struct cleanup *cleanup; |
838 | ||
839 | if (slotnum > 2) | |
840 | error (_("Can't insert breakpoint for slot numbers greater than 2.")); | |
841 | ||
842 | addr &= ~0x0f; | |
843 | ||
844 | /* Enable the automatic memory restoration from breakpoints while | |
845 | we read our instruction bundle to match bp_loc_is_permanent. */ | |
846 | cleanup = make_show_memory_breakpoints_cleanup (0); | |
847 | val = target_read_memory (addr, bundle, BUNDLE_LEN); | |
848 | do_cleanups (cleanup); | |
849 | ||
850 | /* The memory might be unreachable. This can happen, for instance, | |
851 | when the user inserts a breakpoint at an invalid address. */ | |
852 | if (val != 0) | |
853 | return NULL; | |
854 | ||
73a9714c JB |
855 | /* SHADOW_SLOTNUM saves the original slot number as expected by the caller |
856 | for addressing the SHADOW_CONTENTS placement. */ | |
857 | shadow_slotnum = slotnum; | |
858 | ||
859 | /* Cover always the last byte of the bundle for the L-X slot case. */ | |
860 | *lenptr = BUNDLE_LEN - shadow_slotnum; | |
861 | ||
939c61fa JK |
862 | /* Check for L type instruction in slot 1, if present then bump up the slot |
863 | number to the slot 2. */ | |
fe978cb0 PA |
864 | templ = extract_bit_field (bundle, 0, 5); |
865 | if (template_encoding_table[templ][slotnum] == X) | |
73a9714c JB |
866 | { |
867 | gdb_assert (slotnum == 2); | |
868 | error (_("Can't insert breakpoint for non-existing slot X")); | |
869 | } | |
fe978cb0 | 870 | if (template_encoding_table[templ][slotnum] == L) |
73a9714c JB |
871 | { |
872 | gdb_assert (slotnum == 1); | |
873 | slotnum = 2; | |
874 | } | |
939c61fa JK |
875 | |
876 | /* A break instruction has its all its opcode bits cleared except for | |
877 | the parameter value. For L+X slot pair we are at the X slot (slot 2) so | |
878 | we should not touch the L slot - the upper 41 bits of the parameter. */ | |
879 | instr_fetched = slotN_contents (bundle, slotnum); | |
116e0965 | 880 | instr_fetched &= 0x1003ffffc0LL; |
939c61fa JK |
881 | replace_slotN_contents (bundle, instr_fetched, slotnum); |
882 | ||
73a9714c | 883 | return bundle + shadow_slotnum; |
16461d7d KB |
884 | } |
885 | ||
a78f21af | 886 | static CORE_ADDR |
61a1198a | 887 | ia64_read_pc (struct regcache *regcache) |
16461d7d | 888 | { |
61a1198a UW |
889 | ULONGEST psr_value, pc_value; |
890 | int slot_num; | |
891 | ||
892 | regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value); | |
893 | regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value); | |
894 | slot_num = (psr_value >> 41) & 3; | |
16461d7d KB |
895 | |
896 | return pc_value | (slot_num * SLOT_MULTIPLIER); | |
897 | } | |
898 | ||
54a5c8d8 | 899 | void |
61a1198a | 900 | ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc) |
16461d7d KB |
901 | { |
902 | int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER; | |
61a1198a UW |
903 | ULONGEST psr_value; |
904 | ||
905 | regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value); | |
16461d7d | 906 | psr_value &= ~(3LL << 41); |
61a1198a | 907 | psr_value |= (ULONGEST)(slot_num & 0x3) << 41; |
16461d7d KB |
908 | |
909 | new_pc &= ~0xfLL; | |
910 | ||
61a1198a UW |
911 | regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr_value); |
912 | regcache_cooked_write_unsigned (regcache, IA64_IP_REGNUM, new_pc); | |
16461d7d KB |
913 | } |
914 | ||
915 | #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f) | |
916 | ||
917 | /* Returns the address of the slot that's NSLOTS slots away from | |
1777feb0 | 918 | the address ADDR. NSLOTS may be positive or negative. */ |
16461d7d KB |
919 | static CORE_ADDR |
920 | rse_address_add(CORE_ADDR addr, int nslots) | |
921 | { | |
922 | CORE_ADDR new_addr; | |
923 | int mandatory_nat_slots = nslots / 63; | |
924 | int direction = nslots < 0 ? -1 : 1; | |
925 | ||
926 | new_addr = addr + 8 * (nslots + mandatory_nat_slots); | |
927 | ||
928 | if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9)) | |
929 | new_addr += 8 * direction; | |
930 | ||
931 | if (IS_NaT_COLLECTION_ADDR(new_addr)) | |
932 | new_addr += 8 * direction; | |
933 | ||
934 | return new_addr; | |
935 | } | |
936 | ||
05d1431c | 937 | static enum register_status |
004d836a | 938 | ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
88d82102 | 939 | int regnum, gdb_byte *buf) |
16461d7d | 940 | { |
e17a4113 | 941 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
05d1431c | 942 | enum register_status status; |
e17a4113 | 943 | |
004d836a | 944 | if (regnum >= V32_REGNUM && regnum <= V127_REGNUM) |
244bc108 | 945 | { |
88d82102 | 946 | #ifdef HAVE_LIBUNWIND_IA64_H |
1777feb0 MS |
947 | /* First try and use the libunwind special reg accessor, |
948 | otherwise fallback to standard logic. */ | |
c5a27d9c | 949 | if (!libunwind_is_initialized () |
45ecac4b | 950 | || libunwind_get_reg_special (gdbarch, regcache, regnum, buf) != 0) |
88d82102 | 951 | #endif |
004d836a | 952 | { |
1777feb0 MS |
953 | /* The fallback position is to assume that r32-r127 are |
954 | found sequentially in memory starting at $bof. This | |
955 | isn't always true, but without libunwind, this is the | |
956 | best we can do. */ | |
05d1431c | 957 | enum register_status status; |
c5a27d9c JJ |
958 | ULONGEST cfm; |
959 | ULONGEST bsp; | |
960 | CORE_ADDR reg; | |
05d1431c PA |
961 | |
962 | status = regcache_cooked_read_unsigned (regcache, | |
963 | IA64_BSP_REGNUM, &bsp); | |
964 | if (status != REG_VALID) | |
965 | return status; | |
966 | ||
967 | status = regcache_cooked_read_unsigned (regcache, | |
968 | IA64_CFM_REGNUM, &cfm); | |
969 | if (status != REG_VALID) | |
970 | return status; | |
971 | ||
c5a27d9c | 972 | /* The bsp points at the end of the register frame so we |
1777feb0 MS |
973 | subtract the size of frame from it to get start of |
974 | register frame. */ | |
c5a27d9c JJ |
975 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); |
976 | ||
977 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
978 | { | |
979 | ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
e17a4113 UW |
980 | reg = read_memory_integer ((CORE_ADDR)reg_addr, 8, byte_order); |
981 | store_unsigned_integer (buf, register_size (gdbarch, regnum), | |
982 | byte_order, reg); | |
c5a27d9c JJ |
983 | } |
984 | else | |
e17a4113 UW |
985 | store_unsigned_integer (buf, register_size (gdbarch, regnum), |
986 | byte_order, 0); | |
004d836a | 987 | } |
004d836a JJ |
988 | } |
989 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) | |
990 | { | |
991 | ULONGEST unatN_val; | |
992 | ULONGEST unat; | |
05d1431c PA |
993 | status = regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat); |
994 | if (status != REG_VALID) | |
995 | return status; | |
004d836a | 996 | unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0; |
e17a4113 UW |
997 | store_unsigned_integer (buf, register_size (gdbarch, regnum), |
998 | byte_order, unatN_val); | |
004d836a JJ |
999 | } |
1000 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
1001 | { | |
1002 | ULONGEST natN_val = 0; | |
1003 | ULONGEST bsp; | |
1004 | ULONGEST cfm; | |
1005 | CORE_ADDR gr_addr = 0; | |
05d1431c PA |
1006 | status = regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
1007 | if (status != REG_VALID) | |
1008 | return status; | |
1009 | status = regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
1010 | if (status != REG_VALID) | |
1011 | return status; | |
004d836a JJ |
1012 | |
1013 | /* The bsp points at the end of the register frame so we | |
1014 | subtract the size of frame from it to get start of register frame. */ | |
1015 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
1016 | ||
1017 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
1018 | gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
1019 | ||
1020 | if (gr_addr != 0) | |
1021 | { | |
1022 | /* Compute address of nat collection bits. */ | |
1023 | CORE_ADDR nat_addr = gr_addr | 0x1f8; | |
1024 | CORE_ADDR nat_collection; | |
1025 | int nat_bit; | |
1026 | /* If our nat collection address is bigger than bsp, we have to get | |
1027 | the nat collection from rnat. Otherwise, we fetch the nat | |
1028 | collection from the computed address. */ | |
1029 | if (nat_addr >= bsp) | |
1777feb0 MS |
1030 | regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, |
1031 | &nat_collection); | |
004d836a | 1032 | else |
e17a4113 | 1033 | nat_collection = read_memory_integer (nat_addr, 8, byte_order); |
004d836a JJ |
1034 | nat_bit = (gr_addr >> 3) & 0x3f; |
1035 | natN_val = (nat_collection >> nat_bit) & 1; | |
1036 | } | |
1037 | ||
e17a4113 UW |
1038 | store_unsigned_integer (buf, register_size (gdbarch, regnum), |
1039 | byte_order, natN_val); | |
244bc108 | 1040 | } |
004d836a JJ |
1041 | else if (regnum == VBOF_REGNUM) |
1042 | { | |
1043 | /* A virtual register frame start is provided for user convenience. | |
1777feb0 | 1044 | It can be calculated as the bsp - sof (sizeof frame). */ |
004d836a JJ |
1045 | ULONGEST bsp, vbsp; |
1046 | ULONGEST cfm; | |
05d1431c PA |
1047 | status = regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
1048 | if (status != REG_VALID) | |
1049 | return status; | |
1050 | status = regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
1051 | if (status != REG_VALID) | |
1052 | return status; | |
004d836a JJ |
1053 | |
1054 | /* The bsp points at the end of the register frame so we | |
1055 | subtract the size of frame from it to get beginning of frame. */ | |
1056 | vbsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
e17a4113 UW |
1057 | store_unsigned_integer (buf, register_size (gdbarch, regnum), |
1058 | byte_order, vbsp); | |
004d836a JJ |
1059 | } |
1060 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
1061 | { | |
1062 | ULONGEST pr; | |
1063 | ULONGEST cfm; | |
1064 | ULONGEST prN_val; | |
05d1431c PA |
1065 | status = regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr); |
1066 | if (status != REG_VALID) | |
1067 | return status; | |
1068 | status = regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
1069 | if (status != REG_VALID) | |
1070 | return status; | |
004d836a JJ |
1071 | |
1072 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
1073 | { | |
1074 | /* Fetch predicate register rename base from current frame | |
1777feb0 | 1075 | marker for this frame. */ |
004d836a JJ |
1076 | int rrb_pr = (cfm >> 32) & 0x3f; |
1077 | ||
1777feb0 | 1078 | /* Adjust the register number to account for register rotation. */ |
004d836a JJ |
1079 | regnum = VP16_REGNUM |
1080 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; | |
1081 | } | |
1082 | prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0; | |
e17a4113 UW |
1083 | store_unsigned_integer (buf, register_size (gdbarch, regnum), |
1084 | byte_order, prN_val); | |
004d836a JJ |
1085 | } |
1086 | else | |
088568da | 1087 | memset (buf, 0, register_size (gdbarch, regnum)); |
05d1431c PA |
1088 | |
1089 | return REG_VALID; | |
16461d7d KB |
1090 | } |
1091 | ||
004d836a JJ |
1092 | static void |
1093 | ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
88d82102 | 1094 | int regnum, const gdb_byte *buf) |
16461d7d | 1095 | { |
e17a4113 UW |
1096 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
1097 | ||
004d836a | 1098 | if (regnum >= V32_REGNUM && regnum <= V127_REGNUM) |
244bc108 | 1099 | { |
004d836a JJ |
1100 | ULONGEST bsp; |
1101 | ULONGEST cfm; | |
004d836a JJ |
1102 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
1103 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
1104 | ||
1105 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
1106 | ||
1107 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
1108 | { | |
1109 | ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
ce746418 | 1110 | write_memory (reg_addr, buf, 8); |
004d836a JJ |
1111 | } |
1112 | } | |
1113 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) | |
1114 | { | |
1115 | ULONGEST unatN_val, unat, unatN_mask; | |
1116 | regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat); | |
1777feb0 MS |
1117 | unatN_val = extract_unsigned_integer (buf, register_size (gdbarch, |
1118 | regnum), | |
e17a4113 | 1119 | byte_order); |
004d836a JJ |
1120 | unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM)); |
1121 | if (unatN_val == 0) | |
1122 | unat &= ~unatN_mask; | |
1123 | else if (unatN_val == 1) | |
1124 | unat |= unatN_mask; | |
1125 | regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat); | |
1126 | } | |
1127 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
1128 | { | |
1129 | ULONGEST natN_val; | |
1130 | ULONGEST bsp; | |
1131 | ULONGEST cfm; | |
1132 | CORE_ADDR gr_addr = 0; | |
1133 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); | |
1134 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
1135 | ||
1136 | /* The bsp points at the end of the register frame so we | |
1137 | subtract the size of frame from it to get start of register frame. */ | |
1138 | bsp = rse_address_add (bsp, -(cfm & 0x7f)); | |
1139 | ||
1140 | if ((cfm & 0x7f) > regnum - V32_REGNUM) | |
1141 | gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); | |
1142 | ||
1777feb0 MS |
1143 | natN_val = extract_unsigned_integer (buf, register_size (gdbarch, |
1144 | regnum), | |
e17a4113 | 1145 | byte_order); |
004d836a JJ |
1146 | |
1147 | if (gr_addr != 0 && (natN_val == 0 || natN_val == 1)) | |
1148 | { | |
1149 | /* Compute address of nat collection bits. */ | |
1150 | CORE_ADDR nat_addr = gr_addr | 0x1f8; | |
1151 | CORE_ADDR nat_collection; | |
1152 | int natN_bit = (gr_addr >> 3) & 0x3f; | |
1153 | ULONGEST natN_mask = (1LL << natN_bit); | |
1154 | /* If our nat collection address is bigger than bsp, we have to get | |
1155 | the nat collection from rnat. Otherwise, we fetch the nat | |
1156 | collection from the computed address. */ | |
1157 | if (nat_addr >= bsp) | |
1158 | { | |
05d1431c PA |
1159 | regcache_cooked_read_unsigned (regcache, |
1160 | IA64_RNAT_REGNUM, | |
1777feb0 | 1161 | &nat_collection); |
004d836a JJ |
1162 | if (natN_val) |
1163 | nat_collection |= natN_mask; | |
1164 | else | |
1165 | nat_collection &= ~natN_mask; | |
1777feb0 MS |
1166 | regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, |
1167 | nat_collection); | |
004d836a JJ |
1168 | } |
1169 | else | |
1170 | { | |
948f8e3d | 1171 | gdb_byte nat_buf[8]; |
e17a4113 | 1172 | nat_collection = read_memory_integer (nat_addr, 8, byte_order); |
004d836a JJ |
1173 | if (natN_val) |
1174 | nat_collection |= natN_mask; | |
1175 | else | |
1176 | nat_collection &= ~natN_mask; | |
e17a4113 UW |
1177 | store_unsigned_integer (nat_buf, register_size (gdbarch, regnum), |
1178 | byte_order, nat_collection); | |
004d836a JJ |
1179 | write_memory (nat_addr, nat_buf, 8); |
1180 | } | |
1181 | } | |
1182 | } | |
1183 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
1184 | { | |
1185 | ULONGEST pr; | |
1186 | ULONGEST cfm; | |
1187 | ULONGEST prN_val; | |
1188 | ULONGEST prN_mask; | |
1189 | ||
1190 | regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr); | |
1191 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
1192 | ||
1193 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
1194 | { | |
1195 | /* Fetch predicate register rename base from current frame | |
1777feb0 | 1196 | marker for this frame. */ |
004d836a JJ |
1197 | int rrb_pr = (cfm >> 32) & 0x3f; |
1198 | ||
1777feb0 | 1199 | /* Adjust the register number to account for register rotation. */ |
004d836a JJ |
1200 | regnum = VP16_REGNUM |
1201 | + ((regnum - VP16_REGNUM) + rrb_pr) % 48; | |
1202 | } | |
e17a4113 UW |
1203 | prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum), |
1204 | byte_order); | |
004d836a JJ |
1205 | prN_mask = (1LL << (regnum - VP0_REGNUM)); |
1206 | if (prN_val == 0) | |
1207 | pr &= ~prN_mask; | |
1208 | else if (prN_val == 1) | |
1209 | pr |= prN_mask; | |
1210 | regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr); | |
244bc108 | 1211 | } |
16461d7d KB |
1212 | } |
1213 | ||
004d836a JJ |
1214 | /* The ia64 needs to convert between various ieee floating-point formats |
1215 | and the special ia64 floating point register format. */ | |
1216 | ||
1217 | static int | |
0abe36f5 | 1218 | ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type) |
004d836a | 1219 | { |
83acabca | 1220 | return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM |
88954b49 | 1221 | && TYPE_CODE (type) == TYPE_CODE_FLT |
27067745 | 1222 | && type != ia64_ext_type (gdbarch)); |
004d836a JJ |
1223 | } |
1224 | ||
8dccd430 | 1225 | static int |
004d836a | 1226 | ia64_register_to_value (struct frame_info *frame, int regnum, |
8dccd430 PA |
1227 | struct type *valtype, gdb_byte *out, |
1228 | int *optimizedp, int *unavailablep) | |
004d836a | 1229 | { |
27067745 | 1230 | struct gdbarch *gdbarch = get_frame_arch (frame); |
948f8e3d | 1231 | gdb_byte in[MAX_REGISTER_SIZE]; |
8dccd430 PA |
1232 | |
1233 | /* Convert to TYPE. */ | |
1234 | if (!get_frame_register_bytes (frame, regnum, 0, | |
1235 | register_size (gdbarch, regnum), | |
1236 | in, optimizedp, unavailablep)) | |
1237 | return 0; | |
1238 | ||
27067745 | 1239 | convert_typed_floating (in, ia64_ext_type (gdbarch), out, valtype); |
8dccd430 PA |
1240 | *optimizedp = *unavailablep = 0; |
1241 | return 1; | |
004d836a JJ |
1242 | } |
1243 | ||
1244 | static void | |
1245 | ia64_value_to_register (struct frame_info *frame, int regnum, | |
88d82102 | 1246 | struct type *valtype, const gdb_byte *in) |
004d836a | 1247 | { |
27067745 | 1248 | struct gdbarch *gdbarch = get_frame_arch (frame); |
948f8e3d | 1249 | gdb_byte out[MAX_REGISTER_SIZE]; |
27067745 | 1250 | convert_typed_floating (in, valtype, out, ia64_ext_type (gdbarch)); |
004d836a JJ |
1251 | put_frame_register (frame, regnum, out); |
1252 | } | |
1253 | ||
1254 | ||
58ab00f9 KB |
1255 | /* Limit the number of skipped non-prologue instructions since examining |
1256 | of the prologue is expensive. */ | |
5ea2bd7f | 1257 | static int max_skip_non_prologue_insns = 40; |
58ab00f9 KB |
1258 | |
1259 | /* Given PC representing the starting address of a function, and | |
1260 | LIM_PC which is the (sloppy) limit to which to scan when looking | |
1261 | for a prologue, attempt to further refine this limit by using | |
1262 | the line data in the symbol table. If successful, a better guess | |
1263 | on where the prologue ends is returned, otherwise the previous | |
1264 | value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag | |
1265 | which will be set to indicate whether the returned limit may be | |
1266 | used with no further scanning in the event that the function is | |
1267 | frameless. */ | |
1268 | ||
634aa483 AC |
1269 | /* FIXME: cagney/2004-02-14: This function and logic have largely been |
1270 | superseded by skip_prologue_using_sal. */ | |
1271 | ||
58ab00f9 KB |
1272 | static CORE_ADDR |
1273 | refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit) | |
1274 | { | |
1275 | struct symtab_and_line prologue_sal; | |
1276 | CORE_ADDR start_pc = pc; | |
39312971 JB |
1277 | CORE_ADDR end_pc; |
1278 | ||
1279 | /* The prologue can not possibly go past the function end itself, | |
1280 | so we can already adjust LIM_PC accordingly. */ | |
1281 | if (find_pc_partial_function (pc, NULL, NULL, &end_pc) && end_pc < lim_pc) | |
1282 | lim_pc = end_pc; | |
58ab00f9 KB |
1283 | |
1284 | /* Start off not trusting the limit. */ | |
1285 | *trust_limit = 0; | |
1286 | ||
1287 | prologue_sal = find_pc_line (pc, 0); | |
1288 | if (prologue_sal.line != 0) | |
1289 | { | |
1290 | int i; | |
1291 | CORE_ADDR addr = prologue_sal.end; | |
1292 | ||
1293 | /* Handle the case in which compiler's optimizer/scheduler | |
1294 | has moved instructions into the prologue. We scan ahead | |
1295 | in the function looking for address ranges whose corresponding | |
1296 | line number is less than or equal to the first one that we | |
1297 | found for the function. (It can be less than when the | |
1298 | scheduler puts a body instruction before the first prologue | |
1299 | instruction.) */ | |
1300 | for (i = 2 * max_skip_non_prologue_insns; | |
1301 | i > 0 && (lim_pc == 0 || addr < lim_pc); | |
1302 | i--) | |
1303 | { | |
1304 | struct symtab_and_line sal; | |
1305 | ||
1306 | sal = find_pc_line (addr, 0); | |
1307 | if (sal.line == 0) | |
1308 | break; | |
1309 | if (sal.line <= prologue_sal.line | |
1310 | && sal.symtab == prologue_sal.symtab) | |
1311 | { | |
1312 | prologue_sal = sal; | |
1313 | } | |
1314 | addr = sal.end; | |
1315 | } | |
1316 | ||
1317 | if (lim_pc == 0 || prologue_sal.end < lim_pc) | |
1318 | { | |
1319 | lim_pc = prologue_sal.end; | |
1320 | if (start_pc == get_pc_function_start (lim_pc)) | |
1321 | *trust_limit = 1; | |
1322 | } | |
1323 | } | |
1324 | return lim_pc; | |
1325 | } | |
1326 | ||
16461d7d KB |
1327 | #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \ |
1328 | || (8 <= (_regnum_) && (_regnum_) <= 11) \ | |
1329 | || (14 <= (_regnum_) && (_regnum_) <= 31)) | |
1330 | #define imm9(_instr_) \ | |
1331 | ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \ | |
1332 | | (((_instr_) & 0x00008000000LL) >> 20) \ | |
1333 | | (((_instr_) & 0x00000001fc0LL) >> 6)) | |
1334 | ||
004d836a JJ |
1335 | /* Allocate and initialize a frame cache. */ |
1336 | ||
1337 | static struct ia64_frame_cache * | |
1338 | ia64_alloc_frame_cache (void) | |
1339 | { | |
1340 | struct ia64_frame_cache *cache; | |
1341 | int i; | |
1342 | ||
1343 | cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache); | |
1344 | ||
1345 | /* Base address. */ | |
1346 | cache->base = 0; | |
1347 | cache->pc = 0; | |
1348 | cache->cfm = 0; | |
4afcc598 | 1349 | cache->prev_cfm = 0; |
004d836a JJ |
1350 | cache->sof = 0; |
1351 | cache->sol = 0; | |
1352 | cache->sor = 0; | |
1353 | cache->bsp = 0; | |
1354 | cache->fp_reg = 0; | |
1355 | cache->frameless = 1; | |
1356 | ||
1357 | for (i = 0; i < NUM_IA64_RAW_REGS; i++) | |
1358 | cache->saved_regs[i] = 0; | |
1359 | ||
1360 | return cache; | |
1361 | } | |
1362 | ||
16461d7d | 1363 | static CORE_ADDR |
15c1e57f JB |
1364 | examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, |
1365 | struct frame_info *this_frame, | |
1366 | struct ia64_frame_cache *cache) | |
16461d7d KB |
1367 | { |
1368 | CORE_ADDR next_pc; | |
1369 | CORE_ADDR last_prologue_pc = pc; | |
16461d7d KB |
1370 | instruction_type it; |
1371 | long long instr; | |
16461d7d KB |
1372 | int cfm_reg = 0; |
1373 | int ret_reg = 0; | |
1374 | int fp_reg = 0; | |
1375 | int unat_save_reg = 0; | |
1376 | int pr_save_reg = 0; | |
1377 | int mem_stack_frame_size = 0; | |
1378 | int spill_reg = 0; | |
1379 | CORE_ADDR spill_addr = 0; | |
0927a22b KB |
1380 | char instores[8]; |
1381 | char infpstores[8]; | |
5ea2bd7f | 1382 | char reg_contents[256]; |
58ab00f9 | 1383 | int trust_limit; |
004d836a JJ |
1384 | int frameless = 1; |
1385 | int i; | |
1386 | CORE_ADDR addr; | |
e362b510 | 1387 | gdb_byte buf[8]; |
004d836a | 1388 | CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr; |
0927a22b KB |
1389 | |
1390 | memset (instores, 0, sizeof instores); | |
1391 | memset (infpstores, 0, sizeof infpstores); | |
5ea2bd7f | 1392 | memset (reg_contents, 0, sizeof reg_contents); |
16461d7d | 1393 | |
004d836a JJ |
1394 | if (cache->after_prologue != 0 |
1395 | && cache->after_prologue <= lim_pc) | |
1396 | return cache->after_prologue; | |
16461d7d | 1397 | |
58ab00f9 | 1398 | lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit); |
16461d7d | 1399 | next_pc = fetch_instruction (pc, &it, &instr); |
5ea2bd7f JJ |
1400 | |
1401 | /* We want to check if we have a recognizable function start before we | |
1402 | look ahead for a prologue. */ | |
16461d7d KB |
1403 | if (pc < lim_pc && next_pc |
1404 | && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL)) | |
1405 | { | |
5ea2bd7f | 1406 | /* alloc - start of a regular function. */ |
16461d7d KB |
1407 | int sol = (int) ((instr & 0x00007f00000LL) >> 20); |
1408 | int sof = (int) ((instr & 0x000000fe000LL) >> 13); | |
16461d7d | 1409 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); |
004d836a JJ |
1410 | |
1411 | /* Verify that the current cfm matches what we think is the | |
1412 | function start. If we have somehow jumped within a function, | |
1413 | we do not want to interpret the prologue and calculate the | |
1777feb0 MS |
1414 | addresses of various registers such as the return address. |
1415 | We will instead treat the frame as frameless. */ | |
15c1e57f | 1416 | if (!this_frame || |
004d836a JJ |
1417 | (sof == (cache->cfm & 0x7f) && |
1418 | sol == ((cache->cfm >> 7) & 0x7f))) | |
1419 | frameless = 0; | |
1420 | ||
16461d7d KB |
1421 | cfm_reg = rN; |
1422 | last_prologue_pc = next_pc; | |
1423 | pc = next_pc; | |
1424 | } | |
1425 | else | |
58ab00f9 | 1426 | { |
5ea2bd7f JJ |
1427 | /* Look for a leaf routine. */ |
1428 | if (pc < lim_pc && next_pc | |
1429 | && (it == I || it == M) | |
1430 | && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) | |
1431 | { | |
1432 | /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ | |
1433 | int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) | |
1434 | | ((instr & 0x001f8000000LL) >> 20) | |
1435 | | ((instr & 0x000000fe000LL) >> 13)); | |
1436 | int rM = (int) ((instr & 0x00007f00000LL) >> 20); | |
1437 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1438 | int qp = (int) (instr & 0x0000000003fLL); | |
1439 | if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0) | |
1440 | { | |
1777feb0 | 1441 | /* mov r2, r12 - beginning of leaf routine. */ |
5ea2bd7f | 1442 | fp_reg = rN; |
5ea2bd7f JJ |
1443 | last_prologue_pc = next_pc; |
1444 | } | |
1445 | } | |
1446 | ||
1447 | /* If we don't recognize a regular function or leaf routine, we are | |
1448 | done. */ | |
1449 | if (!fp_reg) | |
1450 | { | |
1451 | pc = lim_pc; | |
1452 | if (trust_limit) | |
1453 | last_prologue_pc = lim_pc; | |
1454 | } | |
58ab00f9 | 1455 | } |
16461d7d KB |
1456 | |
1457 | /* Loop, looking for prologue instructions, keeping track of | |
1777feb0 | 1458 | where preserved registers were spilled. */ |
16461d7d KB |
1459 | while (pc < lim_pc) |
1460 | { | |
1461 | next_pc = fetch_instruction (pc, &it, &instr); | |
1462 | if (next_pc == 0) | |
1463 | break; | |
1464 | ||
594706e6 | 1465 | if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL)) |
0927a22b | 1466 | { |
1777feb0 | 1467 | /* Exit loop upon hitting a non-nop branch instruction. */ |
102d615a JJ |
1468 | if (trust_limit) |
1469 | lim_pc = pc; | |
1470 | break; | |
1471 | } | |
1472 | else if (((instr & 0x3fLL) != 0LL) && | |
1473 | (frameless || ret_reg != 0)) | |
1474 | { | |
1475 | /* Exit loop upon hitting a predicated instruction if | |
1476 | we already have the return register or if we are frameless. */ | |
5ea2bd7f JJ |
1477 | if (trust_limit) |
1478 | lim_pc = pc; | |
0927a22b KB |
1479 | break; |
1480 | } | |
1481 | else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL)) | |
16461d7d KB |
1482 | { |
1483 | /* Move from BR */ | |
1484 | int b2 = (int) ((instr & 0x0000000e000LL) >> 13); | |
1485 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1486 | int qp = (int) (instr & 0x0000000003f); | |
1487 | ||
1488 | if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0) | |
1489 | { | |
1490 | ret_reg = rN; | |
1491 | last_prologue_pc = next_pc; | |
1492 | } | |
1493 | } | |
1494 | else if ((it == I || it == M) | |
1495 | && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) | |
1496 | { | |
1497 | /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ | |
1498 | int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) | |
1499 | | ((instr & 0x001f8000000LL) >> 20) | |
1500 | | ((instr & 0x000000fe000LL) >> 13)); | |
1501 | int rM = (int) ((instr & 0x00007f00000LL) >> 20); | |
1502 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1503 | int qp = (int) (instr & 0x0000000003fLL); | |
1504 | ||
1505 | if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0) | |
1506 | { | |
1507 | /* mov rN, r12 */ | |
1508 | fp_reg = rN; | |
1509 | last_prologue_pc = next_pc; | |
1510 | } | |
1511 | else if (qp == 0 && rN == 12 && rM == 12) | |
1512 | { | |
1513 | /* adds r12, -mem_stack_frame_size, r12 */ | |
1514 | mem_stack_frame_size -= imm; | |
1515 | last_prologue_pc = next_pc; | |
1516 | } | |
1517 | else if (qp == 0 && rN == 2 | |
1518 | && ((rM == fp_reg && fp_reg != 0) || rM == 12)) | |
1519 | { | |
004d836a | 1520 | CORE_ADDR saved_sp = 0; |
16461d7d KB |
1521 | /* adds r2, spilloffset, rFramePointer |
1522 | or | |
1523 | adds r2, spilloffset, r12 | |
1524 | ||
1525 | Get ready for stf.spill or st8.spill instructions. | |
1777feb0 | 1526 | The address to start spilling at is loaded into r2. |
16461d7d KB |
1527 | FIXME: Why r2? That's what gcc currently uses; it |
1528 | could well be different for other compilers. */ | |
1529 | ||
1777feb0 | 1530 | /* Hmm... whether or not this will work will depend on |
16461d7d KB |
1531 | where the pc is. If it's still early in the prologue |
1532 | this'll be wrong. FIXME */ | |
15c1e57f | 1533 | if (this_frame) |
004d836a | 1534 | { |
e17a4113 | 1535 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
5c99fcf8 AH |
1536 | saved_sp = get_frame_register_unsigned (this_frame, |
1537 | sp_regnum); | |
004d836a JJ |
1538 | } |
1539 | spill_addr = saved_sp | |
16461d7d KB |
1540 | + (rM == 12 ? 0 : mem_stack_frame_size) |
1541 | + imm; | |
1542 | spill_reg = rN; | |
1543 | last_prologue_pc = next_pc; | |
1544 | } | |
b7d038ae | 1545 | else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] && |
5ea2bd7f JJ |
1546 | rN < 256 && imm == 0) |
1547 | { | |
1777feb0 | 1548 | /* mov rN, rM where rM is an input register. */ |
5ea2bd7f JJ |
1549 | reg_contents[rN] = rM; |
1550 | last_prologue_pc = next_pc; | |
1551 | } | |
1552 | else if (frameless && qp == 0 && rN == fp_reg && imm == 0 && | |
1553 | rM == 2) | |
1554 | { | |
1555 | /* mov r12, r2 */ | |
1556 | last_prologue_pc = next_pc; | |
1557 | break; | |
1558 | } | |
16461d7d KB |
1559 | } |
1560 | else if (it == M | |
1561 | && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL) | |
1562 | || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) )) | |
1563 | { | |
1564 | /* stf.spill [rN] = fM, imm9 | |
1565 | or | |
1566 | stf.spill [rN] = fM */ | |
1567 | ||
1568 | int imm = imm9(instr); | |
1569 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); | |
1570 | int fM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1571 | int qp = (int) (instr & 0x0000000003fLL); | |
1572 | if (qp == 0 && rN == spill_reg && spill_addr != 0 | |
1573 | && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31))) | |
1574 | { | |
004d836a | 1575 | cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr; |
16461d7d | 1576 | |
594706e6 | 1577 | if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL) |
16461d7d KB |
1578 | spill_addr += imm; |
1579 | else | |
1777feb0 | 1580 | spill_addr = 0; /* last one; must be done. */ |
16461d7d KB |
1581 | last_prologue_pc = next_pc; |
1582 | } | |
1583 | } | |
1584 | else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL)) | |
1585 | || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) ) | |
1586 | { | |
1587 | /* mov.m rN = arM | |
1588 | or | |
1589 | mov.i rN = arM */ | |
1590 | ||
1591 | int arM = (int) ((instr & 0x00007f00000LL) >> 20); | |
1592 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1593 | int qp = (int) (instr & 0x0000000003fLL); | |
1594 | if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */) | |
1595 | { | |
1596 | /* We have something like "mov.m r3 = ar.unat". Remember the | |
1777feb0 | 1597 | r3 (or whatever) and watch for a store of this register... */ |
16461d7d KB |
1598 | unat_save_reg = rN; |
1599 | last_prologue_pc = next_pc; | |
1600 | } | |
1601 | } | |
1602 | else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL)) | |
1603 | { | |
1604 | /* mov rN = pr */ | |
1605 | int rN = (int) ((instr & 0x00000001fc0LL) >> 6); | |
1606 | int qp = (int) (instr & 0x0000000003fLL); | |
1607 | if (qp == 0 && isScratch (rN)) | |
1608 | { | |
1609 | pr_save_reg = rN; | |
1610 | last_prologue_pc = next_pc; | |
1611 | } | |
1612 | } | |
1613 | else if (it == M | |
1614 | && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL) | |
1615 | || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL))) | |
1616 | { | |
1617 | /* st8 [rN] = rM | |
1618 | or | |
1619 | st8 [rN] = rM, imm9 */ | |
1620 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); | |
1621 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1622 | int qp = (int) (instr & 0x0000000003fLL); | |
5ea2bd7f | 1623 | int indirect = rM < 256 ? reg_contents[rM] : 0; |
16461d7d KB |
1624 | if (qp == 0 && rN == spill_reg && spill_addr != 0 |
1625 | && (rM == unat_save_reg || rM == pr_save_reg)) | |
1626 | { | |
1627 | /* We've found a spill of either the UNAT register or the PR | |
1628 | register. (Well, not exactly; what we've actually found is | |
1629 | a spill of the register that UNAT or PR was moved to). | |
1777feb0 | 1630 | Record that fact and move on... */ |
16461d7d KB |
1631 | if (rM == unat_save_reg) |
1632 | { | |
1777feb0 | 1633 | /* Track UNAT register. */ |
004d836a | 1634 | cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr; |
16461d7d KB |
1635 | unat_save_reg = 0; |
1636 | } | |
1637 | else | |
1638 | { | |
1777feb0 | 1639 | /* Track PR register. */ |
004d836a | 1640 | cache->saved_regs[IA64_PR_REGNUM] = spill_addr; |
16461d7d KB |
1641 | pr_save_reg = 0; |
1642 | } | |
1643 | if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL) | |
1644 | /* st8 [rN] = rM, imm9 */ | |
1645 | spill_addr += imm9(instr); | |
1646 | else | |
1777feb0 | 1647 | spill_addr = 0; /* Must be done spilling. */ |
16461d7d KB |
1648 | last_prologue_pc = next_pc; |
1649 | } | |
0927a22b KB |
1650 | else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) |
1651 | { | |
1777feb0 | 1652 | /* Allow up to one store of each input register. */ |
0927a22b KB |
1653 | instores[rM-32] = 1; |
1654 | last_prologue_pc = next_pc; | |
1655 | } | |
5ea2bd7f JJ |
1656 | else if (qp == 0 && 32 <= indirect && indirect < 40 && |
1657 | !instores[indirect-32]) | |
1658 | { | |
1659 | /* Allow an indirect store of an input register. */ | |
1660 | instores[indirect-32] = 1; | |
1661 | last_prologue_pc = next_pc; | |
1662 | } | |
0927a22b KB |
1663 | } |
1664 | else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL)) | |
1665 | { | |
1666 | /* One of | |
1667 | st1 [rN] = rM | |
1668 | st2 [rN] = rM | |
1669 | st4 [rN] = rM | |
1670 | st8 [rN] = rM | |
1671 | Note that the st8 case is handled in the clause above. | |
1672 | ||
1777feb0 MS |
1673 | Advance over stores of input registers. One store per input |
1674 | register is permitted. */ | |
0927a22b KB |
1675 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); |
1676 | int qp = (int) (instr & 0x0000000003fLL); | |
5ea2bd7f | 1677 | int indirect = rM < 256 ? reg_contents[rM] : 0; |
0927a22b KB |
1678 | if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) |
1679 | { | |
1680 | instores[rM-32] = 1; | |
1681 | last_prologue_pc = next_pc; | |
1682 | } | |
5ea2bd7f JJ |
1683 | else if (qp == 0 && 32 <= indirect && indirect < 40 && |
1684 | !instores[indirect-32]) | |
1685 | { | |
1686 | /* Allow an indirect store of an input register. */ | |
1687 | instores[indirect-32] = 1; | |
1688 | last_prologue_pc = next_pc; | |
1689 | } | |
0927a22b KB |
1690 | } |
1691 | else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL)) | |
1692 | { | |
1693 | /* Either | |
1694 | stfs [rN] = fM | |
1695 | or | |
1696 | stfd [rN] = fM | |
1697 | ||
1698 | Advance over stores of floating point input registers. Again | |
1777feb0 | 1699 | one store per register is permitted. */ |
0927a22b KB |
1700 | int fM = (int) ((instr & 0x000000fe000LL) >> 13); |
1701 | int qp = (int) (instr & 0x0000000003fLL); | |
1702 | if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8]) | |
1703 | { | |
1704 | infpstores[fM-8] = 1; | |
1705 | last_prologue_pc = next_pc; | |
1706 | } | |
16461d7d KB |
1707 | } |
1708 | else if (it == M | |
1709 | && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL) | |
1710 | || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL))) | |
1711 | { | |
1712 | /* st8.spill [rN] = rM | |
1713 | or | |
1714 | st8.spill [rN] = rM, imm9 */ | |
1715 | int rN = (int) ((instr & 0x00007f00000LL) >> 20); | |
1716 | int rM = (int) ((instr & 0x000000fe000LL) >> 13); | |
1717 | int qp = (int) (instr & 0x0000000003fLL); | |
1718 | if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7) | |
1719 | { | |
1720 | /* We've found a spill of one of the preserved general purpose | |
1721 | regs. Record the spill address and advance the spill | |
1777feb0 | 1722 | register if appropriate. */ |
004d836a | 1723 | cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr; |
16461d7d KB |
1724 | if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL) |
1725 | /* st8.spill [rN] = rM, imm9 */ | |
1726 | spill_addr += imm9(instr); | |
1727 | else | |
1777feb0 | 1728 | spill_addr = 0; /* Done spilling. */ |
16461d7d KB |
1729 | last_prologue_pc = next_pc; |
1730 | } | |
1731 | } | |
16461d7d KB |
1732 | |
1733 | pc = next_pc; | |
1734 | } | |
1735 | ||
15c1e57f JB |
1736 | /* If not frameless and we aren't called by skip_prologue, then we need |
1737 | to calculate registers for the previous frame which will be needed | |
1738 | later. */ | |
16461d7d | 1739 | |
15c1e57f | 1740 | if (!frameless && this_frame) |
da50a4b7 | 1741 | { |
e17a4113 UW |
1742 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
1743 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1744 | ||
004d836a JJ |
1745 | /* Extract the size of the rotating portion of the stack |
1746 | frame and the register rename base from the current | |
1777feb0 | 1747 | frame marker. */ |
004d836a JJ |
1748 | cfm = cache->cfm; |
1749 | sor = cache->sor; | |
1750 | sof = cache->sof; | |
1751 | sol = cache->sol; | |
1752 | rrb_gr = (cfm >> 18) & 0x7f; | |
1753 | ||
1754 | /* Find the bof (beginning of frame). */ | |
1755 | bof = rse_address_add (cache->bsp, -sof); | |
1756 | ||
1757 | for (i = 0, addr = bof; | |
1758 | i < sof; | |
1759 | i++, addr += 8) | |
1760 | { | |
1761 | if (IS_NaT_COLLECTION_ADDR (addr)) | |
1762 | { | |
1763 | addr += 8; | |
1764 | } | |
1765 | if (i+32 == cfm_reg) | |
1766 | cache->saved_regs[IA64_CFM_REGNUM] = addr; | |
1767 | if (i+32 == ret_reg) | |
1768 | cache->saved_regs[IA64_VRAP_REGNUM] = addr; | |
1769 | if (i+32 == fp_reg) | |
1770 | cache->saved_regs[IA64_VFP_REGNUM] = addr; | |
1771 | } | |
16461d7d | 1772 | |
1777feb0 | 1773 | /* For the previous argument registers we require the previous bof. |
004d836a | 1774 | If we can't find the previous cfm, then we can do nothing. */ |
4afcc598 | 1775 | cfm = 0; |
004d836a JJ |
1776 | if (cache->saved_regs[IA64_CFM_REGNUM] != 0) |
1777 | { | |
e17a4113 UW |
1778 | cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], |
1779 | 8, byte_order); | |
4afcc598 JJ |
1780 | } |
1781 | else if (cfm_reg != 0) | |
1782 | { | |
15c1e57f | 1783 | get_frame_register (this_frame, cfm_reg, buf); |
e17a4113 | 1784 | cfm = extract_unsigned_integer (buf, 8, byte_order); |
4afcc598 JJ |
1785 | } |
1786 | cache->prev_cfm = cfm; | |
1787 | ||
1788 | if (cfm != 0) | |
1789 | { | |
004d836a JJ |
1790 | sor = ((cfm >> 14) & 0xf) * 8; |
1791 | sof = (cfm & 0x7f); | |
1792 | sol = (cfm >> 7) & 0x7f; | |
1793 | rrb_gr = (cfm >> 18) & 0x7f; | |
1794 | ||
15c1e57f JB |
1795 | /* The previous bof only requires subtraction of the sol (size of |
1796 | locals) due to the overlap between output and input of | |
1797 | subsequent frames. */ | |
004d836a JJ |
1798 | bof = rse_address_add (bof, -sol); |
1799 | ||
1800 | for (i = 0, addr = bof; | |
1801 | i < sof; | |
1802 | i++, addr += 8) | |
1803 | { | |
1804 | if (IS_NaT_COLLECTION_ADDR (addr)) | |
1805 | { | |
1806 | addr += 8; | |
1807 | } | |
1808 | if (i < sor) | |
1777feb0 MS |
1809 | cache->saved_regs[IA64_GR32_REGNUM |
1810 | + ((i + (sor - rrb_gr)) % sor)] | |
004d836a JJ |
1811 | = addr; |
1812 | else | |
1813 | cache->saved_regs[IA64_GR32_REGNUM + i] = addr; | |
1814 | } | |
1815 | ||
1816 | } | |
1817 | } | |
1818 | ||
5ea2bd7f JJ |
1819 | /* Try and trust the lim_pc value whenever possible. */ |
1820 | if (trust_limit && lim_pc >= last_prologue_pc) | |
004d836a JJ |
1821 | last_prologue_pc = lim_pc; |
1822 | ||
1823 | cache->frameless = frameless; | |
1824 | cache->after_prologue = last_prologue_pc; | |
1825 | cache->mem_stack_frame_size = mem_stack_frame_size; | |
1826 | cache->fp_reg = fp_reg; | |
5ea2bd7f | 1827 | |
16461d7d KB |
1828 | return last_prologue_pc; |
1829 | } | |
1830 | ||
1831 | CORE_ADDR | |
6093d2eb | 1832 | ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
16461d7d | 1833 | { |
004d836a JJ |
1834 | struct ia64_frame_cache cache; |
1835 | cache.base = 0; | |
1836 | cache.after_prologue = 0; | |
1837 | cache.cfm = 0; | |
1838 | cache.bsp = 0; | |
1839 | ||
1777feb0 MS |
1840 | /* Call examine_prologue with - as third argument since we don't |
1841 | have a next frame pointer to send. */ | |
004d836a | 1842 | return examine_prologue (pc, pc+1024, 0, &cache); |
16461d7d KB |
1843 | } |
1844 | ||
004d836a JJ |
1845 | |
1846 | /* Normal frames. */ | |
1847 | ||
1848 | static struct ia64_frame_cache * | |
15c1e57f | 1849 | ia64_frame_cache (struct frame_info *this_frame, void **this_cache) |
16461d7d | 1850 | { |
e17a4113 UW |
1851 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
1852 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
004d836a | 1853 | struct ia64_frame_cache *cache; |
e362b510 | 1854 | gdb_byte buf[8]; |
870f88f7 | 1855 | CORE_ADDR cfm; |
16461d7d | 1856 | |
004d836a | 1857 | if (*this_cache) |
9a3c8263 | 1858 | return (struct ia64_frame_cache *) *this_cache; |
16461d7d | 1859 | |
004d836a JJ |
1860 | cache = ia64_alloc_frame_cache (); |
1861 | *this_cache = cache; | |
16461d7d | 1862 | |
15c1e57f | 1863 | get_frame_register (this_frame, sp_regnum, buf); |
e17a4113 | 1864 | cache->saved_sp = extract_unsigned_integer (buf, 8, byte_order); |
16461d7d | 1865 | |
004d836a JJ |
1866 | /* We always want the bsp to point to the end of frame. |
1867 | This way, we can always get the beginning of frame (bof) | |
1868 | by subtracting frame size. */ | |
15c1e57f | 1869 | get_frame_register (this_frame, IA64_BSP_REGNUM, buf); |
e17a4113 | 1870 | cache->bsp = extract_unsigned_integer (buf, 8, byte_order); |
004d836a | 1871 | |
15c1e57f | 1872 | get_frame_register (this_frame, IA64_PSR_REGNUM, buf); |
004d836a | 1873 | |
15c1e57f | 1874 | get_frame_register (this_frame, IA64_CFM_REGNUM, buf); |
e17a4113 | 1875 | cfm = extract_unsigned_integer (buf, 8, byte_order); |
004d836a JJ |
1876 | |
1877 | cache->sof = (cfm & 0x7f); | |
1878 | cache->sol = (cfm >> 7) & 0x7f; | |
1879 | cache->sor = ((cfm >> 14) & 0xf) * 8; | |
1880 | ||
1881 | cache->cfm = cfm; | |
1882 | ||
15c1e57f | 1883 | cache->pc = get_frame_func (this_frame); |
004d836a JJ |
1884 | |
1885 | if (cache->pc != 0) | |
15c1e57f | 1886 | examine_prologue (cache->pc, get_frame_pc (this_frame), this_frame, cache); |
004d836a JJ |
1887 | |
1888 | cache->base = cache->saved_sp + cache->mem_stack_frame_size; | |
1889 | ||
1890 | return cache; | |
16461d7d KB |
1891 | } |
1892 | ||
a78f21af | 1893 | static void |
15c1e57f | 1894 | ia64_frame_this_id (struct frame_info *this_frame, void **this_cache, |
004d836a | 1895 | struct frame_id *this_id) |
16461d7d | 1896 | { |
5af949e3 | 1897 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
004d836a | 1898 | struct ia64_frame_cache *cache = |
15c1e57f | 1899 | ia64_frame_cache (this_frame, this_cache); |
16461d7d | 1900 | |
c5a27d9c | 1901 | /* If outermost frame, mark with null frame id. */ |
005ca36a | 1902 | if (cache->base != 0) |
c5a27d9c | 1903 | (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp); |
4afcc598 JJ |
1904 | if (gdbarch_debug >= 1) |
1905 | fprintf_unfiltered (gdb_stdlog, | |
1777feb0 MS |
1906 | "regular frame id: code %s, stack %s, " |
1907 | "special %s, this_frame %s\n", | |
5af949e3 UW |
1908 | paddress (gdbarch, this_id->code_addr), |
1909 | paddress (gdbarch, this_id->stack_addr), | |
1910 | paddress (gdbarch, cache->bsp), | |
dfc3cd0e | 1911 | host_address_to_string (this_frame)); |
004d836a | 1912 | } |
244bc108 | 1913 | |
15c1e57f JB |
1914 | static struct value * |
1915 | ia64_frame_prev_register (struct frame_info *this_frame, void **this_cache, | |
1916 | int regnum) | |
004d836a | 1917 | { |
15c1e57f | 1918 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
e17a4113 | 1919 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
15c1e57f | 1920 | struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache); |
e362b510 | 1921 | gdb_byte buf[8]; |
004d836a JJ |
1922 | |
1923 | gdb_assert (regnum >= 0); | |
244bc108 | 1924 | |
004d836a | 1925 | if (!target_has_registers) |
8a3fe4f8 | 1926 | error (_("No registers.")); |
244bc108 | 1927 | |
088568da | 1928 | if (regnum == gdbarch_sp_regnum (gdbarch)) |
15c1e57f JB |
1929 | return frame_unwind_got_constant (this_frame, regnum, cache->base); |
1930 | ||
16461d7d KB |
1931 | else if (regnum == IA64_BSP_REGNUM) |
1932 | { | |
15c1e57f JB |
1933 | struct value *val; |
1934 | CORE_ADDR prev_cfm, bsp, prev_bsp; | |
1935 | ||
1936 | /* We want to calculate the previous bsp as the end of the previous | |
1937 | register stack frame. This corresponds to what the hardware bsp | |
1938 | register will be if we pop the frame back which is why we might | |
1939 | have been called. We know the beginning of the current frame is | |
1940 | cache->bsp - cache->sof. This value in the previous frame points | |
1941 | to the start of the output registers. We can calculate the end of | |
1942 | that frame by adding the size of output: | |
1943 | (sof (size of frame) - sol (size of locals)). */ | |
1944 | val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM); | |
e17a4113 UW |
1945 | prev_cfm = extract_unsigned_integer (value_contents_all (val), |
1946 | 8, byte_order); | |
004d836a | 1947 | bsp = rse_address_add (cache->bsp, -(cache->sof)); |
15c1e57f JB |
1948 | prev_bsp = |
1949 | rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f)); | |
004d836a | 1950 | |
15c1e57f | 1951 | return frame_unwind_got_constant (this_frame, regnum, prev_bsp); |
004d836a | 1952 | } |
15c1e57f | 1953 | |
004d836a JJ |
1954 | else if (regnum == IA64_CFM_REGNUM) |
1955 | { | |
4afcc598 JJ |
1956 | CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM]; |
1957 | ||
1958 | if (addr != 0) | |
15c1e57f JB |
1959 | return frame_unwind_got_memory (this_frame, regnum, addr); |
1960 | ||
1961 | if (cache->prev_cfm) | |
1962 | return frame_unwind_got_constant (this_frame, regnum, cache->prev_cfm); | |
1963 | ||
1964 | if (cache->frameless) | |
1965 | return frame_unwind_got_register (this_frame, IA64_PFS_REGNUM, | |
1966 | IA64_PFS_REGNUM); | |
1967 | return frame_unwind_got_register (this_frame, regnum, 0); | |
16461d7d | 1968 | } |
15c1e57f | 1969 | |
16461d7d KB |
1970 | else if (regnum == IA64_VFP_REGNUM) |
1971 | { | |
1972 | /* If the function in question uses an automatic register (r32-r127) | |
1973 | for the frame pointer, it'll be found by ia64_find_saved_register() | |
1974 | above. If the function lacks one of these frame pointers, we can | |
004d836a | 1975 | still provide a value since we know the size of the frame. */ |
15c1e57f | 1976 | return frame_unwind_got_constant (this_frame, regnum, cache->base); |
16461d7d | 1977 | } |
15c1e57f | 1978 | |
004d836a | 1979 | else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) |
16461d7d | 1980 | { |
15c1e57f JB |
1981 | struct value *pr_val; |
1982 | ULONGEST prN; | |
1983 | ||
1984 | pr_val = ia64_frame_prev_register (this_frame, this_cache, | |
1985 | IA64_PR_REGNUM); | |
004d836a | 1986 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) |
3a854e23 KB |
1987 | { |
1988 | /* Fetch predicate register rename base from current frame | |
004d836a JJ |
1989 | marker for this frame. */ |
1990 | int rrb_pr = (cache->cfm >> 32) & 0x3f; | |
3a854e23 | 1991 | |
004d836a | 1992 | /* Adjust the register number to account for register rotation. */ |
15c1e57f | 1993 | regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48; |
3a854e23 | 1994 | } |
15c1e57f JB |
1995 | prN = extract_bit_field (value_contents_all (pr_val), |
1996 | regnum - VP0_REGNUM, 1); | |
1997 | return frame_unwind_got_constant (this_frame, regnum, prN); | |
16461d7d | 1998 | } |
15c1e57f | 1999 | |
16461d7d KB |
2000 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM) |
2001 | { | |
15c1e57f JB |
2002 | struct value *unat_val; |
2003 | ULONGEST unatN; | |
2004 | unat_val = ia64_frame_prev_register (this_frame, this_cache, | |
2005 | IA64_UNAT_REGNUM); | |
2006 | unatN = extract_bit_field (value_contents_all (unat_val), | |
2007 | regnum - IA64_NAT0_REGNUM, 1); | |
2008 | return frame_unwind_got_constant (this_frame, regnum, unatN); | |
16461d7d | 2009 | } |
15c1e57f | 2010 | |
16461d7d KB |
2011 | else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) |
2012 | { | |
2013 | int natval = 0; | |
2014 | /* Find address of general register corresponding to nat bit we're | |
004d836a JJ |
2015 | interested in. */ |
2016 | CORE_ADDR gr_addr; | |
244bc108 | 2017 | |
15c1e57f JB |
2018 | gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM]; |
2019 | ||
004d836a | 2020 | if (gr_addr != 0) |
244bc108 | 2021 | { |
004d836a | 2022 | /* Compute address of nat collection bits. */ |
16461d7d | 2023 | CORE_ADDR nat_addr = gr_addr | 0x1f8; |
004d836a | 2024 | CORE_ADDR bsp; |
16461d7d KB |
2025 | CORE_ADDR nat_collection; |
2026 | int nat_bit; | |
15c1e57f | 2027 | |
16461d7d KB |
2028 | /* If our nat collection address is bigger than bsp, we have to get |
2029 | the nat collection from rnat. Otherwise, we fetch the nat | |
004d836a | 2030 | collection from the computed address. */ |
15c1e57f | 2031 | get_frame_register (this_frame, IA64_BSP_REGNUM, buf); |
e17a4113 | 2032 | bsp = extract_unsigned_integer (buf, 8, byte_order); |
16461d7d | 2033 | if (nat_addr >= bsp) |
004d836a | 2034 | { |
15c1e57f | 2035 | get_frame_register (this_frame, IA64_RNAT_REGNUM, buf); |
e17a4113 | 2036 | nat_collection = extract_unsigned_integer (buf, 8, byte_order); |
004d836a | 2037 | } |
16461d7d | 2038 | else |
e17a4113 | 2039 | nat_collection = read_memory_integer (nat_addr, 8, byte_order); |
16461d7d KB |
2040 | nat_bit = (gr_addr >> 3) & 0x3f; |
2041 | natval = (nat_collection >> nat_bit) & 1; | |
2042 | } | |
004d836a | 2043 | |
15c1e57f | 2044 | return frame_unwind_got_constant (this_frame, regnum, natval); |
244bc108 | 2045 | } |
15c1e57f | 2046 | |
244bc108 KB |
2047 | else if (regnum == IA64_IP_REGNUM) |
2048 | { | |
004d836a | 2049 | CORE_ADDR pc = 0; |
4afcc598 | 2050 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; |
004d836a | 2051 | |
4afcc598 | 2052 | if (addr != 0) |
15c1e57f JB |
2053 | { |
2054 | read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM)); | |
e17a4113 | 2055 | pc = extract_unsigned_integer (buf, 8, byte_order); |
15c1e57f | 2056 | } |
4afcc598 | 2057 | else if (cache->frameless) |
004d836a | 2058 | { |
15c1e57f | 2059 | get_frame_register (this_frame, IA64_BR0_REGNUM, buf); |
e17a4113 | 2060 | pc = extract_unsigned_integer (buf, 8, byte_order); |
244bc108 | 2061 | } |
004d836a | 2062 | pc &= ~0xf; |
15c1e57f | 2063 | return frame_unwind_got_constant (this_frame, regnum, pc); |
244bc108 | 2064 | } |
15c1e57f | 2065 | |
004d836a | 2066 | else if (regnum == IA64_PSR_REGNUM) |
244bc108 | 2067 | { |
15c1e57f JB |
2068 | /* We don't know how to get the complete previous PSR, but we need it |
2069 | for the slot information when we unwind the pc (pc is formed of IP | |
2070 | register plus slot information from PSR). To get the previous | |
2071 | slot information, we mask it off the return address. */ | |
004d836a | 2072 | ULONGEST slot_num = 0; |
15c1e57f | 2073 | CORE_ADDR pc = 0; |
004d836a | 2074 | CORE_ADDR psr = 0; |
4afcc598 | 2075 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; |
004d836a | 2076 | |
15c1e57f | 2077 | get_frame_register (this_frame, IA64_PSR_REGNUM, buf); |
e17a4113 | 2078 | psr = extract_unsigned_integer (buf, 8, byte_order); |
004d836a | 2079 | |
4afcc598 | 2080 | if (addr != 0) |
244bc108 | 2081 | { |
088568da | 2082 | read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM)); |
e17a4113 | 2083 | pc = extract_unsigned_integer (buf, 8, byte_order); |
244bc108 | 2084 | } |
4afcc598 | 2085 | else if (cache->frameless) |
004d836a | 2086 | { |
15c1e57f | 2087 | get_frame_register (this_frame, IA64_BR0_REGNUM, buf); |
e17a4113 | 2088 | pc = extract_unsigned_integer (buf, 8, byte_order); |
004d836a JJ |
2089 | } |
2090 | psr &= ~(3LL << 41); | |
2091 | slot_num = pc & 0x3LL; | |
2092 | psr |= (CORE_ADDR)slot_num << 41; | |
15c1e57f | 2093 | return frame_unwind_got_constant (this_frame, regnum, psr); |
004d836a | 2094 | } |
15c1e57f | 2095 | |
4afcc598 JJ |
2096 | else if (regnum == IA64_BR0_REGNUM) |
2097 | { | |
4afcc598 | 2098 | CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM]; |
15c1e57f | 2099 | |
4afcc598 | 2100 | if (addr != 0) |
15c1e57f JB |
2101 | return frame_unwind_got_memory (this_frame, regnum, addr); |
2102 | ||
2103 | return frame_unwind_got_constant (this_frame, regnum, 0); | |
4afcc598 | 2104 | } |
15c1e57f JB |
2105 | |
2106 | else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) | |
2107 | || (regnum >= V32_REGNUM && regnum <= V127_REGNUM)) | |
004d836a JJ |
2108 | { |
2109 | CORE_ADDR addr = 0; | |
15c1e57f | 2110 | |
004d836a JJ |
2111 | if (regnum >= V32_REGNUM) |
2112 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); | |
2113 | addr = cache->saved_regs[regnum]; | |
244bc108 | 2114 | if (addr != 0) |
15c1e57f JB |
2115 | return frame_unwind_got_memory (this_frame, regnum, addr); |
2116 | ||
2117 | if (cache->frameless) | |
244bc108 | 2118 | { |
15c1e57f JB |
2119 | struct value *reg_val; |
2120 | CORE_ADDR prev_cfm, prev_bsp, prev_bof; | |
2121 | ||
2122 | /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant | |
2123 | with the same code above? */ | |
004d836a JJ |
2124 | if (regnum >= V32_REGNUM) |
2125 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); | |
15c1e57f JB |
2126 | reg_val = ia64_frame_prev_register (this_frame, this_cache, |
2127 | IA64_CFM_REGNUM); | |
2128 | prev_cfm = extract_unsigned_integer (value_contents_all (reg_val), | |
e17a4113 | 2129 | 8, byte_order); |
15c1e57f JB |
2130 | reg_val = ia64_frame_prev_register (this_frame, this_cache, |
2131 | IA64_BSP_REGNUM); | |
2132 | prev_bsp = extract_unsigned_integer (value_contents_all (reg_val), | |
e17a4113 | 2133 | 8, byte_order); |
004d836a JJ |
2134 | prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f)); |
2135 | ||
2136 | addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM)); | |
15c1e57f | 2137 | return frame_unwind_got_memory (this_frame, regnum, addr); |
244bc108 | 2138 | } |
15c1e57f JB |
2139 | |
2140 | return frame_unwind_got_constant (this_frame, regnum, 0); | |
16461d7d | 2141 | } |
15c1e57f JB |
2142 | |
2143 | else /* All other registers. */ | |
16461d7d | 2144 | { |
004d836a | 2145 | CORE_ADDR addr = 0; |
15c1e57f | 2146 | |
3a854e23 KB |
2147 | if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM) |
2148 | { | |
2149 | /* Fetch floating point register rename base from current | |
004d836a JJ |
2150 | frame marker for this frame. */ |
2151 | int rrb_fr = (cache->cfm >> 25) & 0x7f; | |
3a854e23 KB |
2152 | |
2153 | /* Adjust the floating point register number to account for | |
004d836a | 2154 | register rotation. */ |
3a854e23 KB |
2155 | regnum = IA64_FR32_REGNUM |
2156 | + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96; | |
2157 | } | |
2158 | ||
004d836a JJ |
2159 | /* If we have stored a memory address, access the register. */ |
2160 | addr = cache->saved_regs[regnum]; | |
2161 | if (addr != 0) | |
15c1e57f | 2162 | return frame_unwind_got_memory (this_frame, regnum, addr); |
004d836a JJ |
2163 | /* Otherwise, punt and get the current value of the register. */ |
2164 | else | |
15c1e57f | 2165 | return frame_unwind_got_register (this_frame, regnum, regnum); |
16461d7d | 2166 | } |
16461d7d | 2167 | } |
004d836a JJ |
2168 | |
2169 | static const struct frame_unwind ia64_frame_unwind = | |
2170 | { | |
2171 | NORMAL_FRAME, | |
8fbca658 | 2172 | default_frame_unwind_stop_reason, |
004d836a | 2173 | &ia64_frame_this_id, |
15c1e57f JB |
2174 | &ia64_frame_prev_register, |
2175 | NULL, | |
2176 | default_frame_sniffer | |
004d836a JJ |
2177 | }; |
2178 | ||
004d836a JJ |
2179 | /* Signal trampolines. */ |
2180 | ||
2181 | static void | |
15c1e57f | 2182 | ia64_sigtramp_frame_init_saved_regs (struct frame_info *this_frame, |
2685572f | 2183 | struct ia64_frame_cache *cache) |
004d836a | 2184 | { |
e17a4113 UW |
2185 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
2186 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2685572f UW |
2187 | |
2188 | if (tdep->sigcontext_register_address) | |
004d836a JJ |
2189 | { |
2190 | int regno; | |
2191 | ||
1777feb0 MS |
2192 | cache->saved_regs[IA64_VRAP_REGNUM] |
2193 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2194 | IA64_IP_REGNUM); | |
2195 | cache->saved_regs[IA64_CFM_REGNUM] | |
2196 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2197 | IA64_CFM_REGNUM); | |
2198 | cache->saved_regs[IA64_PSR_REGNUM] | |
2199 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2200 | IA64_PSR_REGNUM); | |
2201 | cache->saved_regs[IA64_BSP_REGNUM] | |
2202 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2203 | IA64_BSP_REGNUM); | |
2204 | cache->saved_regs[IA64_RNAT_REGNUM] | |
2205 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2206 | IA64_RNAT_REGNUM); | |
2207 | cache->saved_regs[IA64_CCV_REGNUM] | |
2208 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2209 | IA64_CCV_REGNUM); | |
2210 | cache->saved_regs[IA64_UNAT_REGNUM] | |
2211 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2212 | IA64_UNAT_REGNUM); | |
2213 | cache->saved_regs[IA64_FPSR_REGNUM] | |
2214 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2215 | IA64_FPSR_REGNUM); | |
2216 | cache->saved_regs[IA64_PFS_REGNUM] | |
2217 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2218 | IA64_PFS_REGNUM); | |
2219 | cache->saved_regs[IA64_LC_REGNUM] | |
2220 | = tdep->sigcontext_register_address (gdbarch, cache->base, | |
2221 | IA64_LC_REGNUM); | |
2222 | ||
004d836a | 2223 | for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++) |
4afcc598 | 2224 | cache->saved_regs[regno] = |
e17a4113 | 2225 | tdep->sigcontext_register_address (gdbarch, cache->base, regno); |
004d836a JJ |
2226 | for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++) |
2227 | cache->saved_regs[regno] = | |
e17a4113 | 2228 | tdep->sigcontext_register_address (gdbarch, cache->base, regno); |
932644f0 | 2229 | for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++) |
004d836a | 2230 | cache->saved_regs[regno] = |
e17a4113 | 2231 | tdep->sigcontext_register_address (gdbarch, cache->base, regno); |
004d836a JJ |
2232 | } |
2233 | } | |
2234 | ||
2235 | static struct ia64_frame_cache * | |
15c1e57f | 2236 | ia64_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache) |
004d836a | 2237 | { |
e17a4113 UW |
2238 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
2239 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
004d836a | 2240 | struct ia64_frame_cache *cache; |
e362b510 | 2241 | gdb_byte buf[8]; |
004d836a JJ |
2242 | |
2243 | if (*this_cache) | |
9a3c8263 | 2244 | return (struct ia64_frame_cache *) *this_cache; |
004d836a JJ |
2245 | |
2246 | cache = ia64_alloc_frame_cache (); | |
2247 | ||
15c1e57f | 2248 | get_frame_register (this_frame, sp_regnum, buf); |
4afcc598 JJ |
2249 | /* Note that frame size is hard-coded below. We cannot calculate it |
2250 | via prologue examination. */ | |
e17a4113 | 2251 | cache->base = extract_unsigned_integer (buf, 8, byte_order) + 16; |
4afcc598 | 2252 | |
15c1e57f | 2253 | get_frame_register (this_frame, IA64_BSP_REGNUM, buf); |
e17a4113 | 2254 | cache->bsp = extract_unsigned_integer (buf, 8, byte_order); |
4afcc598 | 2255 | |
15c1e57f | 2256 | get_frame_register (this_frame, IA64_CFM_REGNUM, buf); |
e17a4113 | 2257 | cache->cfm = extract_unsigned_integer (buf, 8, byte_order); |
4afcc598 | 2258 | cache->sof = cache->cfm & 0x7f; |
004d836a | 2259 | |
15c1e57f | 2260 | ia64_sigtramp_frame_init_saved_regs (this_frame, cache); |
004d836a JJ |
2261 | |
2262 | *this_cache = cache; | |
2263 | return cache; | |
2264 | } | |
2265 | ||
2266 | static void | |
15c1e57f JB |
2267 | ia64_sigtramp_frame_this_id (struct frame_info *this_frame, |
2268 | void **this_cache, struct frame_id *this_id) | |
004d836a | 2269 | { |
5af949e3 | 2270 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
004d836a | 2271 | struct ia64_frame_cache *cache = |
15c1e57f | 2272 | ia64_sigtramp_frame_cache (this_frame, this_cache); |
004d836a | 2273 | |
15c1e57f JB |
2274 | (*this_id) = frame_id_build_special (cache->base, |
2275 | get_frame_pc (this_frame), | |
2276 | cache->bsp); | |
4afcc598 JJ |
2277 | if (gdbarch_debug >= 1) |
2278 | fprintf_unfiltered (gdb_stdlog, | |
1777feb0 MS |
2279 | "sigtramp frame id: code %s, stack %s, " |
2280 | "special %s, this_frame %s\n", | |
5af949e3 UW |
2281 | paddress (gdbarch, this_id->code_addr), |
2282 | paddress (gdbarch, this_id->stack_addr), | |
2283 | paddress (gdbarch, cache->bsp), | |
dfc3cd0e | 2284 | host_address_to_string (this_frame)); |
004d836a JJ |
2285 | } |
2286 | ||
15c1e57f JB |
2287 | static struct value * |
2288 | ia64_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
2289 | void **this_cache, int regnum) | |
004d836a | 2290 | { |
4afcc598 | 2291 | struct ia64_frame_cache *cache = |
15c1e57f | 2292 | ia64_sigtramp_frame_cache (this_frame, this_cache); |
4afcc598 JJ |
2293 | |
2294 | gdb_assert (regnum >= 0); | |
2295 | ||
2296 | if (!target_has_registers) | |
8a3fe4f8 | 2297 | error (_("No registers.")); |
4afcc598 | 2298 | |
4afcc598 JJ |
2299 | if (regnum == IA64_IP_REGNUM) |
2300 | { | |
2301 | CORE_ADDR pc = 0; | |
2302 | CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM]; | |
2303 | ||
2304 | if (addr != 0) | |
2305 | { | |
5c99fcf8 AH |
2306 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
2307 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
2308 | pc = read_memory_unsigned_integer (addr, 8, byte_order); | |
4afcc598 JJ |
2309 | } |
2310 | pc &= ~0xf; | |
15c1e57f | 2311 | return frame_unwind_got_constant (this_frame, regnum, pc); |
4afcc598 | 2312 | } |
15c1e57f JB |
2313 | |
2314 | else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) | |
2315 | || (regnum >= V32_REGNUM && regnum <= V127_REGNUM)) | |
4afcc598 JJ |
2316 | { |
2317 | CORE_ADDR addr = 0; | |
15c1e57f | 2318 | |
4afcc598 JJ |
2319 | if (regnum >= V32_REGNUM) |
2320 | regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); | |
2321 | addr = cache->saved_regs[regnum]; | |
2322 | if (addr != 0) | |
15c1e57f JB |
2323 | return frame_unwind_got_memory (this_frame, regnum, addr); |
2324 | ||
2325 | return frame_unwind_got_constant (this_frame, regnum, 0); | |
4afcc598 | 2326 | } |
15c1e57f JB |
2327 | |
2328 | else /* All other registers not listed above. */ | |
4afcc598 | 2329 | { |
4afcc598 | 2330 | CORE_ADDR addr = cache->saved_regs[regnum]; |
15c1e57f | 2331 | |
4afcc598 | 2332 | if (addr != 0) |
15c1e57f | 2333 | return frame_unwind_got_memory (this_frame, regnum, addr); |
004d836a | 2334 | |
15c1e57f JB |
2335 | return frame_unwind_got_constant (this_frame, regnum, 0); |
2336 | } | |
004d836a JJ |
2337 | } |
2338 | ||
15c1e57f JB |
2339 | static int |
2340 | ia64_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
2341 | struct frame_info *this_frame, | |
2342 | void **this_cache) | |
004d836a | 2343 | { |
15c1e57f | 2344 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame)); |
74174d2e UW |
2345 | if (tdep->pc_in_sigtramp) |
2346 | { | |
15c1e57f | 2347 | CORE_ADDR pc = get_frame_pc (this_frame); |
004d836a | 2348 | |
74174d2e | 2349 | if (tdep->pc_in_sigtramp (pc)) |
15c1e57f | 2350 | return 1; |
74174d2e | 2351 | } |
004d836a | 2352 | |
15c1e57f | 2353 | return 0; |
004d836a | 2354 | } |
15c1e57f JB |
2355 | |
2356 | static const struct frame_unwind ia64_sigtramp_frame_unwind = | |
2357 | { | |
2358 | SIGTRAMP_FRAME, | |
8fbca658 | 2359 | default_frame_unwind_stop_reason, |
15c1e57f JB |
2360 | ia64_sigtramp_frame_this_id, |
2361 | ia64_sigtramp_frame_prev_register, | |
2362 | NULL, | |
2363 | ia64_sigtramp_frame_sniffer | |
2364 | }; | |
2365 | ||
004d836a JJ |
2366 | \f |
2367 | ||
2368 | static CORE_ADDR | |
15c1e57f | 2369 | ia64_frame_base_address (struct frame_info *this_frame, void **this_cache) |
004d836a | 2370 | { |
15c1e57f | 2371 | struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache); |
004d836a JJ |
2372 | |
2373 | return cache->base; | |
2374 | } | |
2375 | ||
2376 | static const struct frame_base ia64_frame_base = | |
2377 | { | |
2378 | &ia64_frame_unwind, | |
2379 | ia64_frame_base_address, | |
2380 | ia64_frame_base_address, | |
2381 | ia64_frame_base_address | |
2382 | }; | |
16461d7d | 2383 | |
968d1cb4 JJ |
2384 | #ifdef HAVE_LIBUNWIND_IA64_H |
2385 | ||
2386 | struct ia64_unwind_table_entry | |
2387 | { | |
2388 | unw_word_t start_offset; | |
2389 | unw_word_t end_offset; | |
2390 | unw_word_t info_offset; | |
2391 | }; | |
2392 | ||
2393 | static __inline__ uint64_t | |
2394 | ia64_rse_slot_num (uint64_t addr) | |
2395 | { | |
2396 | return (addr >> 3) & 0x3f; | |
2397 | } | |
2398 | ||
2399 | /* Skip over a designated number of registers in the backing | |
2400 | store, remembering every 64th position is for NAT. */ | |
2401 | static __inline__ uint64_t | |
2402 | ia64_rse_skip_regs (uint64_t addr, long num_regs) | |
2403 | { | |
2404 | long delta = ia64_rse_slot_num(addr) + num_regs; | |
2405 | ||
2406 | if (num_regs < 0) | |
2407 | delta -= 0x3e; | |
2408 | return addr + ((num_regs + delta/0x3f) << 3); | |
2409 | } | |
2410 | ||
05e7c244 JK |
2411 | /* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb |
2412 | register number to a libunwind register number. */ | |
968d1cb4 JJ |
2413 | static int |
2414 | ia64_gdb2uw_regnum (int regnum) | |
2415 | { | |
2416 | if (regnum == sp_regnum) | |
2417 | return UNW_IA64_SP; | |
2418 | else if (regnum == IA64_BSP_REGNUM) | |
2419 | return UNW_IA64_BSP; | |
2420 | else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128) | |
2421 | return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM); | |
2422 | else if ((unsigned) (regnum - V32_REGNUM) < 95) | |
2423 | return UNW_IA64_GR + 32 + (regnum - V32_REGNUM); | |
2424 | else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128) | |
2425 | return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM); | |
2426 | else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64) | |
2427 | return -1; | |
2428 | else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8) | |
2429 | return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM); | |
2430 | else if (regnum == IA64_PR_REGNUM) | |
2431 | return UNW_IA64_PR; | |
2432 | else if (regnum == IA64_IP_REGNUM) | |
2433 | return UNW_REG_IP; | |
2434 | else if (regnum == IA64_CFM_REGNUM) | |
2435 | return UNW_IA64_CFM; | |
2436 | else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128) | |
2437 | return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM); | |
2438 | else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128) | |
2439 | return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM); | |
2440 | else | |
2441 | return -1; | |
2442 | } | |
2443 | ||
05e7c244 JK |
2444 | /* Gdb ia64-libunwind-tdep callback function to convert from a libunwind |
2445 | register number to a ia64 gdb register number. */ | |
968d1cb4 JJ |
2446 | static int |
2447 | ia64_uw2gdb_regnum (int uw_regnum) | |
2448 | { | |
2449 | if (uw_regnum == UNW_IA64_SP) | |
2450 | return sp_regnum; | |
2451 | else if (uw_regnum == UNW_IA64_BSP) | |
2452 | return IA64_BSP_REGNUM; | |
2453 | else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32) | |
2454 | return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR); | |
2455 | else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128) | |
2456 | return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32)); | |
2457 | else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128) | |
2458 | return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR); | |
2459 | else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8) | |
2460 | return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR); | |
2461 | else if (uw_regnum == UNW_IA64_PR) | |
2462 | return IA64_PR_REGNUM; | |
2463 | else if (uw_regnum == UNW_REG_IP) | |
2464 | return IA64_IP_REGNUM; | |
2465 | else if (uw_regnum == UNW_IA64_CFM) | |
2466 | return IA64_CFM_REGNUM; | |
2467 | else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128) | |
2468 | return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR); | |
2469 | else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128) | |
2470 | return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT); | |
2471 | else | |
2472 | return -1; | |
2473 | } | |
2474 | ||
05e7c244 JK |
2475 | /* Gdb ia64-libunwind-tdep callback function to reveal if register is |
2476 | a float register or not. */ | |
968d1cb4 JJ |
2477 | static int |
2478 | ia64_is_fpreg (int uw_regnum) | |
2479 | { | |
2480 | return unw_is_fpreg (uw_regnum); | |
2481 | } | |
77ca787b | 2482 | |
968d1cb4 JJ |
2483 | /* Libunwind callback accessor function for general registers. */ |
2484 | static int | |
2485 | ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, | |
2486 | int write, void *arg) | |
2487 | { | |
2488 | int regnum = ia64_uw2gdb_regnum (uw_regnum); | |
5c99fcf8 | 2489 | unw_word_t bsp, sof, cfm, psr, ip; |
bfb0d950 | 2490 | struct frame_info *this_frame = (struct frame_info *) arg; |
5af949e3 | 2491 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
e17a4113 | 2492 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
968d1cb4 | 2493 | long new_sof, old_sof; |
968d1cb4 | 2494 | |
45ecac4b UW |
2495 | /* We never call any libunwind routines that need to write registers. */ |
2496 | gdb_assert (!write); | |
968d1cb4 | 2497 | |
45ecac4b | 2498 | switch (uw_regnum) |
968d1cb4 | 2499 | { |
45ecac4b UW |
2500 | case UNW_REG_IP: |
2501 | /* Libunwind expects to see the pc value which means the slot number | |
2502 | from the psr must be merged with the ip word address. */ | |
5c99fcf8 AH |
2503 | ip = get_frame_register_unsigned (this_frame, IA64_IP_REGNUM); |
2504 | psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM); | |
45ecac4b UW |
2505 | *val = ip | ((psr >> 41) & 0x3); |
2506 | break; | |
2507 | ||
2508 | case UNW_IA64_AR_BSP: | |
1777feb0 MS |
2509 | /* Libunwind expects to see the beginning of the current |
2510 | register frame so we must account for the fact that | |
2511 | ptrace() will return a value for bsp that points *after* | |
2512 | the current register frame. */ | |
5c99fcf8 AH |
2513 | bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); |
2514 | cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); | |
77ca787b | 2515 | sof = gdbarch_tdep (gdbarch)->size_of_register_frame (this_frame, cfm); |
45ecac4b UW |
2516 | *val = ia64_rse_skip_regs (bsp, -sof); |
2517 | break; | |
968d1cb4 | 2518 | |
45ecac4b UW |
2519 | case UNW_IA64_AR_BSPSTORE: |
2520 | /* Libunwind wants bspstore to be after the current register frame. | |
2521 | This is what ptrace() and gdb treats as the regular bsp value. */ | |
5c99fcf8 | 2522 | *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); |
45ecac4b UW |
2523 | break; |
2524 | ||
2525 | default: | |
2526 | /* For all other registers, just unwind the value directly. */ | |
5c99fcf8 | 2527 | *val = get_frame_register_unsigned (this_frame, regnum); |
45ecac4b | 2528 | break; |
968d1cb4 | 2529 | } |
45ecac4b UW |
2530 | |
2531 | if (gdbarch_debug >= 1) | |
2532 | fprintf_unfiltered (gdb_stdlog, | |
5af949e3 | 2533 | " access_reg: from cache: %4s=%s\n", |
45ecac4b UW |
2534 | (((unsigned) regnum <= IA64_NAT127_REGNUM) |
2535 | ? ia64_register_names[regnum] : "r??"), | |
2edfe795 | 2536 | paddress (gdbarch, *val)); |
968d1cb4 JJ |
2537 | return 0; |
2538 | } | |
2539 | ||
2540 | /* Libunwind callback accessor function for floating-point registers. */ | |
2541 | static int | |
1777feb0 MS |
2542 | ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, |
2543 | unw_fpreg_t *val, int write, void *arg) | |
968d1cb4 JJ |
2544 | { |
2545 | int regnum = ia64_uw2gdb_regnum (uw_regnum); | |
bfb0d950 | 2546 | struct frame_info *this_frame = (struct frame_info *) arg; |
968d1cb4 | 2547 | |
45ecac4b UW |
2548 | /* We never call any libunwind routines that need to write registers. */ |
2549 | gdb_assert (!write); | |
2550 | ||
2b692d32 | 2551 | get_frame_register (this_frame, regnum, (gdb_byte *) val); |
45ecac4b | 2552 | |
968d1cb4 JJ |
2553 | return 0; |
2554 | } | |
2555 | ||
c5a27d9c JJ |
2556 | /* Libunwind callback accessor function for top-level rse registers. */ |
2557 | static int | |
1777feb0 MS |
2558 | ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, |
2559 | unw_word_t *val, int write, void *arg) | |
c5a27d9c JJ |
2560 | { |
2561 | int regnum = ia64_uw2gdb_regnum (uw_regnum); | |
5c99fcf8 | 2562 | unw_word_t bsp, sof, cfm, psr, ip; |
bfb0d950 | 2563 | struct regcache *regcache = (struct regcache *) arg; |
5af949e3 | 2564 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
e17a4113 | 2565 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
c5a27d9c JJ |
2566 | long new_sof, old_sof; |
2567 | ||
45ecac4b UW |
2568 | /* We never call any libunwind routines that need to write registers. */ |
2569 | gdb_assert (!write); | |
c5a27d9c | 2570 | |
45ecac4b | 2571 | switch (uw_regnum) |
c5a27d9c | 2572 | { |
45ecac4b UW |
2573 | case UNW_REG_IP: |
2574 | /* Libunwind expects to see the pc value which means the slot number | |
2575 | from the psr must be merged with the ip word address. */ | |
5c99fcf8 AH |
2576 | regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip); |
2577 | regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr); | |
45ecac4b UW |
2578 | *val = ip | ((psr >> 41) & 0x3); |
2579 | break; | |
c5a27d9c | 2580 | |
45ecac4b | 2581 | case UNW_IA64_AR_BSP: |
1777feb0 MS |
2582 | /* Libunwind expects to see the beginning of the current |
2583 | register frame so we must account for the fact that | |
2584 | ptrace() will return a value for bsp that points *after* | |
2585 | the current register frame. */ | |
5c99fcf8 AH |
2586 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
2587 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
45ecac4b UW |
2588 | sof = (cfm & 0x7f); |
2589 | *val = ia64_rse_skip_regs (bsp, -sof); | |
2590 | break; | |
c5a27d9c | 2591 | |
45ecac4b UW |
2592 | case UNW_IA64_AR_BSPSTORE: |
2593 | /* Libunwind wants bspstore to be after the current register frame. | |
2594 | This is what ptrace() and gdb treats as the regular bsp value. */ | |
5c99fcf8 | 2595 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val); |
45ecac4b | 2596 | break; |
c5a27d9c | 2597 | |
45ecac4b UW |
2598 | default: |
2599 | /* For all other registers, just unwind the value directly. */ | |
5c99fcf8 | 2600 | regcache_cooked_read_unsigned (regcache, regnum, val); |
45ecac4b | 2601 | break; |
c5a27d9c JJ |
2602 | } |
2603 | ||
2604 | if (gdbarch_debug >= 1) | |
2605 | fprintf_unfiltered (gdb_stdlog, | |
5af949e3 | 2606 | " access_rse_reg: from cache: %4s=%s\n", |
c5a27d9c JJ |
2607 | (((unsigned) regnum <= IA64_NAT127_REGNUM) |
2608 | ? ia64_register_names[regnum] : "r??"), | |
5af949e3 | 2609 | paddress (gdbarch, *val)); |
c5a27d9c JJ |
2610 | |
2611 | return 0; | |
2612 | } | |
2613 | ||
45ecac4b UW |
2614 | /* Libunwind callback accessor function for top-level fp registers. */ |
2615 | static int | |
2616 | ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, | |
2617 | unw_fpreg_t *val, int write, void *arg) | |
2618 | { | |
2619 | int regnum = ia64_uw2gdb_regnum (uw_regnum); | |
bfb0d950 | 2620 | struct regcache *regcache = (struct regcache *) arg; |
45ecac4b UW |
2621 | |
2622 | /* We never call any libunwind routines that need to write registers. */ | |
2623 | gdb_assert (!write); | |
2624 | ||
2b692d32 | 2625 | regcache_cooked_read (regcache, regnum, (gdb_byte *) val); |
45ecac4b UW |
2626 | |
2627 | return 0; | |
2628 | } | |
2629 | ||
968d1cb4 JJ |
2630 | /* Libunwind callback accessor function for accessing memory. */ |
2631 | static int | |
2632 | ia64_access_mem (unw_addr_space_t as, | |
2633 | unw_word_t addr, unw_word_t *val, | |
2634 | int write, void *arg) | |
2635 | { | |
c5a27d9c JJ |
2636 | if (addr - KERNEL_START < ktab_size) |
2637 | { | |
2638 | unw_word_t *laddr = (unw_word_t*) ((char *) ktab | |
2639 | + (addr - KERNEL_START)); | |
2640 | ||
2641 | if (write) | |
2642 | *laddr = *val; | |
2643 | else | |
2644 | *val = *laddr; | |
2645 | return 0; | |
2646 | } | |
2647 | ||
968d1cb4 JJ |
2648 | /* XXX do we need to normalize byte-order here? */ |
2649 | if (write) | |
2b692d32 | 2650 | return target_write_memory (addr, (gdb_byte *) val, sizeof (unw_word_t)); |
968d1cb4 | 2651 | else |
2b692d32 | 2652 | return target_read_memory (addr, (gdb_byte *) val, sizeof (unw_word_t)); |
968d1cb4 JJ |
2653 | } |
2654 | ||
2655 | /* Call low-level function to access the kernel unwind table. */ | |
13547ab6 DJ |
2656 | static LONGEST |
2657 | getunwind_table (gdb_byte **buf_p) | |
968d1cb4 JJ |
2658 | { |
2659 | LONGEST x; | |
c5a27d9c | 2660 | |
10d6c8cd DJ |
2661 | /* FIXME drow/2005-09-10: This code used to call |
2662 | ia64_linux_xfer_unwind_table directly to fetch the unwind table | |
2663 | for the currently running ia64-linux kernel. That data should | |
2664 | come from the core file and be accessed via the auxv vector; if | |
2665 | we want to preserve fall back to the running kernel's table, then | |
2666 | we should find a way to override the corefile layer's | |
2667 | xfer_partial method. */ | |
968d1cb4 | 2668 | |
13547ab6 DJ |
2669 | x = target_read_alloc (¤t_target, TARGET_OBJECT_UNWIND_TABLE, |
2670 | NULL, buf_p); | |
2671 | ||
2672 | return x; | |
968d1cb4 | 2673 | } |
10d6c8cd | 2674 | |
968d1cb4 JJ |
2675 | /* Get the kernel unwind table. */ |
2676 | static int | |
2677 | get_kernel_table (unw_word_t ip, unw_dyn_info_t *di) | |
2678 | { | |
c5a27d9c | 2679 | static struct ia64_table_entry *etab; |
968d1cb4 | 2680 | |
c5a27d9c | 2681 | if (!ktab) |
968d1cb4 | 2682 | { |
13547ab6 | 2683 | gdb_byte *ktab_buf; |
eeec829c | 2684 | LONGEST size; |
13547ab6 | 2685 | |
eeec829c DJ |
2686 | size = getunwind_table (&ktab_buf); |
2687 | if (size <= 0) | |
13547ab6 | 2688 | return -UNW_ENOINFO; |
eeec829c DJ |
2689 | |
2690 | ktab = (struct ia64_table_entry *) ktab_buf; | |
2691 | ktab_size = size; | |
13547ab6 | 2692 | |
968d1cb4 | 2693 | for (etab = ktab; etab->start_offset; ++etab) |
c5a27d9c | 2694 | etab->info_offset += KERNEL_START; |
968d1cb4 JJ |
2695 | } |
2696 | ||
2697 | if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset) | |
2698 | return -UNW_ENOINFO; | |
2699 | ||
2700 | di->format = UNW_INFO_FORMAT_TABLE; | |
2701 | di->gp = 0; | |
2702 | di->start_ip = ktab[0].start_offset; | |
2703 | di->end_ip = etab[-1].end_offset; | |
2704 | di->u.ti.name_ptr = (unw_word_t) "<kernel>"; | |
2705 | di->u.ti.segbase = 0; | |
2706 | di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t); | |
2707 | di->u.ti.table_data = (unw_word_t *) ktab; | |
2708 | ||
2709 | if (gdbarch_debug >= 1) | |
2710 | fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': " | |
5af949e3 | 2711 | "segbase=%s, length=%s, gp=%s\n", |
78ced177 | 2712 | (char *) di->u.ti.name_ptr, |
5af949e3 | 2713 | hex_string (di->u.ti.segbase), |
623d3eb1 | 2714 | pulongest (di->u.ti.table_len), |
5af949e3 | 2715 | hex_string (di->gp)); |
968d1cb4 JJ |
2716 | return 0; |
2717 | } | |
2718 | ||
2719 | /* Find the unwind table entry for a specified address. */ | |
2720 | static int | |
2721 | ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip, | |
2722 | unw_dyn_info_t *dip, void **buf) | |
2723 | { | |
2724 | Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL; | |
2725 | Elf_Internal_Ehdr *ehdr; | |
2726 | unw_word_t segbase = 0; | |
2727 | CORE_ADDR load_base; | |
2728 | bfd *bfd; | |
2729 | int i; | |
2730 | ||
2731 | bfd = objfile->obfd; | |
2732 | ||
2733 | ehdr = elf_tdata (bfd)->elf_header; | |
2734 | phdr = elf_tdata (bfd)->phdr; | |
2735 | ||
2736 | load_base = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile)); | |
2737 | ||
2738 | for (i = 0; i < ehdr->e_phnum; ++i) | |
2739 | { | |
2740 | switch (phdr[i].p_type) | |
2741 | { | |
2742 | case PT_LOAD: | |
2743 | if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr) | |
2744 | < phdr[i].p_memsz) | |
2745 | p_text = phdr + i; | |
2746 | break; | |
2747 | ||
2748 | case PT_IA_64_UNWIND: | |
2749 | p_unwind = phdr + i; | |
2750 | break; | |
2751 | ||
2752 | default: | |
2753 | break; | |
2754 | } | |
2755 | } | |
2756 | ||
c5a27d9c | 2757 | if (!p_text || !p_unwind) |
968d1cb4 JJ |
2758 | return -UNW_ENOINFO; |
2759 | ||
c5a27d9c JJ |
2760 | /* Verify that the segment that contains the IP also contains |
2761 | the static unwind table. If not, we may be in the Linux kernel's | |
1777feb0 | 2762 | DSO gate page in which case the unwind table is another segment. |
c5a27d9c JJ |
2763 | Otherwise, we are dealing with runtime-generated code, for which we |
2764 | have no info here. */ | |
968d1cb4 JJ |
2765 | segbase = p_text->p_vaddr + load_base; |
2766 | ||
c5a27d9c JJ |
2767 | if ((p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz) |
2768 | { | |
2769 | int ok = 0; | |
2770 | for (i = 0; i < ehdr->e_phnum; ++i) | |
2771 | { | |
2772 | if (phdr[i].p_type == PT_LOAD | |
2773 | && (p_unwind->p_vaddr - phdr[i].p_vaddr) < phdr[i].p_memsz) | |
2774 | { | |
2775 | ok = 1; | |
2776 | /* Get the segbase from the section containing the | |
2777 | libunwind table. */ | |
2778 | segbase = phdr[i].p_vaddr + load_base; | |
2779 | } | |
2780 | } | |
2781 | if (!ok) | |
2782 | return -UNW_ENOINFO; | |
2783 | } | |
2784 | ||
2785 | dip->start_ip = p_text->p_vaddr + load_base; | |
968d1cb4 | 2786 | dip->end_ip = dip->start_ip + p_text->p_memsz; |
e17a4113 | 2787 | dip->gp = ia64_find_global_pointer (get_objfile_arch (objfile), ip); |
503ff15d KB |
2788 | dip->format = UNW_INFO_FORMAT_REMOTE_TABLE; |
2789 | dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd); | |
2790 | dip->u.rti.segbase = segbase; | |
2791 | dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t); | |
2792 | dip->u.rti.table_data = p_unwind->p_vaddr + load_base; | |
968d1cb4 JJ |
2793 | |
2794 | return 0; | |
2795 | } | |
2796 | ||
2797 | /* Libunwind callback accessor function to acquire procedure unwind-info. */ | |
2798 | static int | |
2799 | ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi, | |
2800 | int need_unwind_info, void *arg) | |
2801 | { | |
2802 | struct obj_section *sec = find_pc_section (ip); | |
2803 | unw_dyn_info_t di; | |
2804 | int ret; | |
2805 | void *buf = NULL; | |
2806 | ||
2807 | if (!sec) | |
2808 | { | |
2809 | /* XXX This only works if the host and the target architecture are | |
2810 | both ia64 and if the have (more or less) the same kernel | |
2811 | version. */ | |
2812 | if (get_kernel_table (ip, &di) < 0) | |
2813 | return -UNW_ENOINFO; | |
503ff15d KB |
2814 | |
2815 | if (gdbarch_debug >= 1) | |
5af949e3 UW |
2816 | fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %s -> " |
2817 | "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s," | |
2818 | "length=%s,data=%s)\n", | |
2819 | hex_string (ip), (char *)di.u.ti.name_ptr, | |
2820 | hex_string (di.u.ti.segbase), | |
2821 | hex_string (di.start_ip), hex_string (di.end_ip), | |
2822 | hex_string (di.gp), | |
623d3eb1 | 2823 | pulongest (di.u.ti.table_len), |
5af949e3 | 2824 | hex_string ((CORE_ADDR)di.u.ti.table_data)); |
968d1cb4 JJ |
2825 | } |
2826 | else | |
2827 | { | |
2828 | ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf); | |
2829 | if (ret < 0) | |
2830 | return ret; | |
968d1cb4 | 2831 | |
503ff15d | 2832 | if (gdbarch_debug >= 1) |
5af949e3 UW |
2833 | fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %s -> " |
2834 | "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s," | |
2835 | "length=%s,data=%s)\n", | |
2836 | hex_string (ip), (char *)di.u.rti.name_ptr, | |
2837 | hex_string (di.u.rti.segbase), | |
2838 | hex_string (di.start_ip), hex_string (di.end_ip), | |
2839 | hex_string (di.gp), | |
623d3eb1 | 2840 | pulongest (di.u.rti.table_len), |
5af949e3 | 2841 | hex_string (di.u.rti.table_data)); |
503ff15d | 2842 | } |
968d1cb4 | 2843 | |
503ff15d KB |
2844 | ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info, |
2845 | arg); | |
968d1cb4 JJ |
2846 | |
2847 | /* We no longer need the dyn info storage so free it. */ | |
2848 | xfree (buf); | |
2849 | ||
2850 | return ret; | |
2851 | } | |
2852 | ||
2853 | /* Libunwind callback accessor function for cleanup. */ | |
2854 | static void | |
2855 | ia64_put_unwind_info (unw_addr_space_t as, | |
2856 | unw_proc_info_t *pip, void *arg) | |
2857 | { | |
2858 | /* Nothing required for now. */ | |
2859 | } | |
2860 | ||
2861 | /* Libunwind callback accessor function to get head of the dynamic | |
2862 | unwind-info registration list. */ | |
2863 | static int | |
2864 | ia64_get_dyn_info_list (unw_addr_space_t as, | |
2865 | unw_word_t *dilap, void *arg) | |
2866 | { | |
2867 | struct obj_section *text_sec; | |
2868 | struct objfile *objfile; | |
2869 | unw_word_t ip, addr; | |
2870 | unw_dyn_info_t di; | |
2871 | int ret; | |
2872 | ||
2873 | if (!libunwind_is_initialized ()) | |
2874 | return -UNW_ENOINFO; | |
2875 | ||
2876 | for (objfile = object_files; objfile; objfile = objfile->next) | |
2877 | { | |
2878 | void *buf = NULL; | |
2879 | ||
2880 | text_sec = objfile->sections + SECT_OFF_TEXT (objfile); | |
8b7a6d61 | 2881 | ip = obj_section_addr (text_sec); |
968d1cb4 JJ |
2882 | ret = ia64_find_unwind_table (objfile, ip, &di, &buf); |
2883 | if (ret >= 0) | |
2884 | { | |
503ff15d | 2885 | addr = libunwind_find_dyn_list (as, &di, arg); |
968d1cb4 JJ |
2886 | /* We no longer need the dyn info storage so free it. */ |
2887 | xfree (buf); | |
2888 | ||
2889 | if (addr) | |
2890 | { | |
2891 | if (gdbarch_debug >= 1) | |
2892 | fprintf_unfiltered (gdb_stdlog, | |
2893 | "dynamic unwind table in objfile %s " | |
5af949e3 | 2894 | "at %s (gp=%s)\n", |
968d1cb4 | 2895 | bfd_get_filename (objfile->obfd), |
5af949e3 | 2896 | hex_string (addr), hex_string (di.gp)); |
968d1cb4 JJ |
2897 | *dilap = addr; |
2898 | return 0; | |
2899 | } | |
2900 | } | |
2901 | } | |
2902 | return -UNW_ENOINFO; | |
2903 | } | |
2904 | ||
2905 | ||
2906 | /* Frame interface functions for libunwind. */ | |
2907 | ||
2908 | static void | |
15c1e57f | 2909 | ia64_libunwind_frame_this_id (struct frame_info *this_frame, void **this_cache, |
7166c4a9 | 2910 | struct frame_id *this_id) |
968d1cb4 | 2911 | { |
5af949e3 | 2912 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
e17a4113 | 2913 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
005ca36a | 2914 | struct frame_id id = outer_frame_id; |
e362b510 | 2915 | gdb_byte buf[8]; |
968d1cb4 | 2916 | CORE_ADDR bsp; |
c5a27d9c | 2917 | |
15c1e57f | 2918 | libunwind_frame_this_id (this_frame, this_cache, &id); |
005ca36a | 2919 | if (frame_id_eq (id, outer_frame_id)) |
c5a27d9c | 2920 | { |
005ca36a | 2921 | (*this_id) = outer_frame_id; |
c5a27d9c JJ |
2922 | return; |
2923 | } | |
968d1cb4 | 2924 | |
c5a27d9c JJ |
2925 | /* We must add the bsp as the special address for frame comparison |
2926 | purposes. */ | |
15c1e57f | 2927 | get_frame_register (this_frame, IA64_BSP_REGNUM, buf); |
e17a4113 | 2928 | bsp = extract_unsigned_integer (buf, 8, byte_order); |
968d1cb4 | 2929 | |
15c1e57f | 2930 | (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp); |
968d1cb4 JJ |
2931 | |
2932 | if (gdbarch_debug >= 1) | |
2933 | fprintf_unfiltered (gdb_stdlog, | |
1777feb0 MS |
2934 | "libunwind frame id: code %s, stack %s, " |
2935 | "special %s, this_frame %s\n", | |
5af949e3 UW |
2936 | paddress (gdbarch, id.code_addr), |
2937 | paddress (gdbarch, id.stack_addr), | |
2938 | paddress (gdbarch, bsp), | |
dfc3cd0e | 2939 | host_address_to_string (this_frame)); |
968d1cb4 JJ |
2940 | } |
2941 | ||
15c1e57f JB |
2942 | static struct value * |
2943 | ia64_libunwind_frame_prev_register (struct frame_info *this_frame, | |
2944 | void **this_cache, int regnum) | |
968d1cb4 JJ |
2945 | { |
2946 | int reg = regnum; | |
15c1e57f | 2947 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
e17a4113 | 2948 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
15c1e57f | 2949 | struct value *val; |
968d1cb4 JJ |
2950 | |
2951 | if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
2952 | reg = IA64_PR_REGNUM; | |
2953 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) | |
2954 | reg = IA64_UNAT_REGNUM; | |
2955 | ||
2956 | /* Let libunwind do most of the work. */ | |
15c1e57f | 2957 | val = libunwind_frame_prev_register (this_frame, this_cache, reg); |
6672f2ae | 2958 | |
968d1cb4 JJ |
2959 | if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) |
2960 | { | |
2961 | ULONGEST prN_val; | |
2962 | ||
2963 | if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) | |
2964 | { | |
2965 | int rrb_pr = 0; | |
2966 | ULONGEST cfm; | |
968d1cb4 JJ |
2967 | |
2968 | /* Fetch predicate register rename base from current frame | |
2969 | marker for this frame. */ | |
5c99fcf8 | 2970 | cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); |
968d1cb4 JJ |
2971 | rrb_pr = (cfm >> 32) & 0x3f; |
2972 | ||
2973 | /* Adjust the register number to account for register rotation. */ | |
15c1e57f | 2974 | regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48; |
968d1cb4 | 2975 | } |
15c1e57f | 2976 | prN_val = extract_bit_field (value_contents_all (val), |
968d1cb4 | 2977 | regnum - VP0_REGNUM, 1); |
15c1e57f | 2978 | return frame_unwind_got_constant (this_frame, regnum, prN_val); |
968d1cb4 | 2979 | } |
15c1e57f | 2980 | |
968d1cb4 JJ |
2981 | else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) |
2982 | { | |
2983 | ULONGEST unatN_val; | |
2984 | ||
15c1e57f JB |
2985 | unatN_val = extract_bit_field (value_contents_all (val), |
2986 | regnum - IA64_NAT0_REGNUM, 1); | |
2987 | return frame_unwind_got_constant (this_frame, regnum, unatN_val); | |
968d1cb4 | 2988 | } |
15c1e57f | 2989 | |
968d1cb4 JJ |
2990 | else if (regnum == IA64_BSP_REGNUM) |
2991 | { | |
15c1e57f JB |
2992 | struct value *cfm_val; |
2993 | CORE_ADDR prev_bsp, prev_cfm; | |
2994 | ||
2995 | /* We want to calculate the previous bsp as the end of the previous | |
2996 | register stack frame. This corresponds to what the hardware bsp | |
2997 | register will be if we pop the frame back which is why we might | |
2998 | have been called. We know that libunwind will pass us back the | |
1777feb0 | 2999 | beginning of the current frame so we should just add sof to it. */ |
e17a4113 UW |
3000 | prev_bsp = extract_unsigned_integer (value_contents_all (val), |
3001 | 8, byte_order); | |
15c1e57f JB |
3002 | cfm_val = libunwind_frame_prev_register (this_frame, this_cache, |
3003 | IA64_CFM_REGNUM); | |
e17a4113 UW |
3004 | prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val), |
3005 | 8, byte_order); | |
968d1cb4 JJ |
3006 | prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f)); |
3007 | ||
15c1e57f | 3008 | return frame_unwind_got_constant (this_frame, regnum, prev_bsp); |
968d1cb4 | 3009 | } |
15c1e57f JB |
3010 | else |
3011 | return val; | |
3012 | } | |
968d1cb4 | 3013 | |
15c1e57f JB |
3014 | static int |
3015 | ia64_libunwind_frame_sniffer (const struct frame_unwind *self, | |
3016 | struct frame_info *this_frame, | |
3017 | void **this_cache) | |
3018 | { | |
3019 | if (libunwind_is_initialized () | |
3020 | && libunwind_frame_sniffer (self, this_frame, this_cache)) | |
3021 | return 1; | |
3022 | ||
3023 | return 0; | |
968d1cb4 JJ |
3024 | } |
3025 | ||
3026 | static const struct frame_unwind ia64_libunwind_frame_unwind = | |
3027 | { | |
3028 | NORMAL_FRAME, | |
8fbca658 | 3029 | default_frame_unwind_stop_reason, |
968d1cb4 | 3030 | ia64_libunwind_frame_this_id, |
272dfcfd AS |
3031 | ia64_libunwind_frame_prev_register, |
3032 | NULL, | |
15c1e57f | 3033 | ia64_libunwind_frame_sniffer, |
272dfcfd | 3034 | libunwind_frame_dealloc_cache |
968d1cb4 JJ |
3035 | }; |
3036 | ||
c5a27d9c | 3037 | static void |
15c1e57f JB |
3038 | ia64_libunwind_sigtramp_frame_this_id (struct frame_info *this_frame, |
3039 | void **this_cache, | |
c5a27d9c JJ |
3040 | struct frame_id *this_id) |
3041 | { | |
5af949e3 | 3042 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
e17a4113 | 3043 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
e362b510 | 3044 | gdb_byte buf[8]; |
c5a27d9c | 3045 | CORE_ADDR bsp; |
005ca36a | 3046 | struct frame_id id = outer_frame_id; |
c5a27d9c JJ |
3047 | CORE_ADDR prev_ip; |
3048 | ||
15c1e57f | 3049 | libunwind_frame_this_id (this_frame, this_cache, &id); |
005ca36a | 3050 | if (frame_id_eq (id, outer_frame_id)) |
c5a27d9c | 3051 | { |
005ca36a | 3052 | (*this_id) = outer_frame_id; |
c5a27d9c JJ |
3053 | return; |
3054 | } | |
3055 | ||
3056 | /* We must add the bsp as the special address for frame comparison | |
3057 | purposes. */ | |
15c1e57f | 3058 | get_frame_register (this_frame, IA64_BSP_REGNUM, buf); |
e17a4113 | 3059 | bsp = extract_unsigned_integer (buf, 8, byte_order); |
c5a27d9c JJ |
3060 | |
3061 | /* For a sigtramp frame, we don't make the check for previous ip being 0. */ | |
3062 | (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp); | |
3063 | ||
3064 | if (gdbarch_debug >= 1) | |
3065 | fprintf_unfiltered (gdb_stdlog, | |
1777feb0 MS |
3066 | "libunwind sigtramp frame id: code %s, " |
3067 | "stack %s, special %s, this_frame %s\n", | |
5af949e3 UW |
3068 | paddress (gdbarch, id.code_addr), |
3069 | paddress (gdbarch, id.stack_addr), | |
3070 | paddress (gdbarch, bsp), | |
dfc3cd0e | 3071 | host_address_to_string (this_frame)); |
c5a27d9c JJ |
3072 | } |
3073 | ||
15c1e57f JB |
3074 | static struct value * |
3075 | ia64_libunwind_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
3076 | void **this_cache, int regnum) | |
c5a27d9c | 3077 | { |
e17a4113 UW |
3078 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
3079 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
15c1e57f JB |
3080 | struct value *prev_ip_val; |
3081 | CORE_ADDR prev_ip; | |
c5a27d9c JJ |
3082 | |
3083 | /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT | |
3084 | method of getting previous registers. */ | |
15c1e57f JB |
3085 | prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache, |
3086 | IA64_IP_REGNUM); | |
e17a4113 UW |
3087 | prev_ip = extract_unsigned_integer (value_contents_all (prev_ip_val), |
3088 | 8, byte_order); | |
c5a27d9c JJ |
3089 | |
3090 | if (prev_ip == 0) | |
3091 | { | |
3092 | void *tmp_cache = NULL; | |
15c1e57f JB |
3093 | return ia64_sigtramp_frame_prev_register (this_frame, &tmp_cache, |
3094 | regnum); | |
c5a27d9c JJ |
3095 | } |
3096 | else | |
15c1e57f | 3097 | return ia64_libunwind_frame_prev_register (this_frame, this_cache, regnum); |
c5a27d9c JJ |
3098 | } |
3099 | ||
15c1e57f JB |
3100 | static int |
3101 | ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
3102 | struct frame_info *this_frame, | |
3103 | void **this_cache) | |
c5a27d9c JJ |
3104 | { |
3105 | if (libunwind_is_initialized ()) | |
3106 | { | |
15c1e57f JB |
3107 | if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache)) |
3108 | return 1; | |
3109 | return 0; | |
c5a27d9c JJ |
3110 | } |
3111 | else | |
15c1e57f | 3112 | return ia64_sigtramp_frame_sniffer (self, this_frame, this_cache); |
c5a27d9c JJ |
3113 | } |
3114 | ||
15c1e57f JB |
3115 | static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind = |
3116 | { | |
3117 | SIGTRAMP_FRAME, | |
8fbca658 | 3118 | default_frame_unwind_stop_reason, |
15c1e57f JB |
3119 | ia64_libunwind_sigtramp_frame_this_id, |
3120 | ia64_libunwind_sigtramp_frame_prev_register, | |
3121 | NULL, | |
3122 | ia64_libunwind_sigtramp_frame_sniffer | |
3123 | }; | |
3124 | ||
968d1cb4 | 3125 | /* Set of libunwind callback acccessor functions. */ |
696759ad | 3126 | unw_accessors_t ia64_unw_accessors = |
968d1cb4 JJ |
3127 | { |
3128 | ia64_find_proc_info_x, | |
3129 | ia64_put_unwind_info, | |
3130 | ia64_get_dyn_info_list, | |
3131 | ia64_access_mem, | |
3132 | ia64_access_reg, | |
3133 | ia64_access_fpreg, | |
3134 | /* resume */ | |
3135 | /* get_proc_name */ | |
3136 | }; | |
3137 | ||
c5a27d9c JJ |
3138 | /* Set of special libunwind callback acccessor functions specific for accessing |
3139 | the rse registers. At the top of the stack, we want libunwind to figure out | |
1777feb0 MS |
3140 | how to read r32 - r127. Though usually they are found sequentially in |
3141 | memory starting from $bof, this is not always true. */ | |
696759ad | 3142 | unw_accessors_t ia64_unw_rse_accessors = |
c5a27d9c JJ |
3143 | { |
3144 | ia64_find_proc_info_x, | |
3145 | ia64_put_unwind_info, | |
3146 | ia64_get_dyn_info_list, | |
3147 | ia64_access_mem, | |
3148 | ia64_access_rse_reg, | |
45ecac4b | 3149 | ia64_access_rse_fpreg, |
c5a27d9c JJ |
3150 | /* resume */ |
3151 | /* get_proc_name */ | |
3152 | }; | |
3153 | ||
05e7c244 JK |
3154 | /* Set of ia64-libunwind-tdep gdb callbacks and data for generic |
3155 | ia64-libunwind-tdep code to use. */ | |
696759ad | 3156 | struct libunwind_descr ia64_libunwind_descr = |
968d1cb4 JJ |
3157 | { |
3158 | ia64_gdb2uw_regnum, | |
3159 | ia64_uw2gdb_regnum, | |
3160 | ia64_is_fpreg, | |
3161 | &ia64_unw_accessors, | |
c5a27d9c | 3162 | &ia64_unw_rse_accessors, |
968d1cb4 JJ |
3163 | }; |
3164 | ||
3165 | #endif /* HAVE_LIBUNWIND_IA64_H */ | |
3166 | ||
4c8b6ae0 UW |
3167 | static int |
3168 | ia64_use_struct_convention (struct type *type) | |
16461d7d | 3169 | { |
64a5b29c KB |
3170 | struct type *float_elt_type; |
3171 | ||
4c8b6ae0 UW |
3172 | /* Don't use the struct convention for anything but structure, |
3173 | union, or array types. */ | |
3174 | if (!(TYPE_CODE (type) == TYPE_CODE_STRUCT | |
3175 | || TYPE_CODE (type) == TYPE_CODE_UNION | |
3176 | || TYPE_CODE (type) == TYPE_CODE_ARRAY)) | |
3177 | return 0; | |
3178 | ||
64a5b29c KB |
3179 | /* HFAs are structures (or arrays) consisting entirely of floating |
3180 | point values of the same length. Up to 8 of these are returned | |
3181 | in registers. Don't use the struct convention when this is the | |
004d836a | 3182 | case. */ |
64a5b29c KB |
3183 | float_elt_type = is_float_or_hfa_type (type); |
3184 | if (float_elt_type != NULL | |
3185 | && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8) | |
3186 | return 0; | |
3187 | ||
3188 | /* Other structs of length 32 or less are returned in r8-r11. | |
004d836a | 3189 | Don't use the struct convention for those either. */ |
16461d7d KB |
3190 | return TYPE_LENGTH (type) > 32; |
3191 | } | |
3192 | ||
825d6d8a JB |
3193 | /* Return non-zero if TYPE is a structure or union type. */ |
3194 | ||
3195 | static int | |
3196 | ia64_struct_type_p (const struct type *type) | |
3197 | { | |
3198 | return (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
3199 | || TYPE_CODE (type) == TYPE_CODE_UNION); | |
3200 | } | |
3201 | ||
4c8b6ae0 | 3202 | static void |
2d522557 AC |
3203 | ia64_extract_return_value (struct type *type, struct regcache *regcache, |
3204 | gdb_byte *valbuf) | |
16461d7d | 3205 | { |
27067745 | 3206 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
64a5b29c KB |
3207 | struct type *float_elt_type; |
3208 | ||
3209 | float_elt_type = is_float_or_hfa_type (type); | |
3210 | if (float_elt_type != NULL) | |
3211 | { | |
948f8e3d | 3212 | gdb_byte from[MAX_REGISTER_SIZE]; |
64a5b29c KB |
3213 | int offset = 0; |
3214 | int regnum = IA64_FR8_REGNUM; | |
3215 | int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type); | |
3216 | ||
3217 | while (n-- > 0) | |
3218 | { | |
004d836a | 3219 | regcache_cooked_read (regcache, regnum, from); |
27067745 | 3220 | convert_typed_floating (from, ia64_ext_type (gdbarch), |
1777feb0 | 3221 | (char *)valbuf + offset, float_elt_type); |
64a5b29c KB |
3222 | offset += TYPE_LENGTH (float_elt_type); |
3223 | regnum++; | |
3224 | } | |
3225 | } | |
825d6d8a JB |
3226 | else if (!ia64_struct_type_p (type) && TYPE_LENGTH (type) < 8) |
3227 | { | |
3228 | /* This is an integral value, and its size is less than 8 bytes. | |
3229 | These values are LSB-aligned, so extract the relevant bytes, | |
3230 | and copy them into VALBUF. */ | |
3231 | /* brobecker/2005-12-30: Actually, all integral values are LSB aligned, | |
3232 | so I suppose we should also add handling here for integral values | |
3233 | whose size is greater than 8. But I wasn't able to create such | |
3234 | a type, neither in C nor in Ada, so not worrying about these yet. */ | |
3235 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
3236 | ULONGEST val; | |
3237 | ||
3238 | regcache_cooked_read_unsigned (regcache, IA64_GR8_REGNUM, &val); | |
3239 | store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, val); | |
3240 | } | |
16461d7d | 3241 | else |
004d836a JJ |
3242 | { |
3243 | ULONGEST val; | |
3244 | int offset = 0; | |
3245 | int regnum = IA64_GR8_REGNUM; | |
27067745 | 3246 | int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM)); |
004d836a JJ |
3247 | int n = TYPE_LENGTH (type) / reglen; |
3248 | int m = TYPE_LENGTH (type) % reglen; | |
16461d7d | 3249 | |
004d836a JJ |
3250 | while (n-- > 0) |
3251 | { | |
3252 | ULONGEST val; | |
3253 | regcache_cooked_read_unsigned (regcache, regnum, &val); | |
3254 | memcpy ((char *)valbuf + offset, &val, reglen); | |
3255 | offset += reglen; | |
3256 | regnum++; | |
3257 | } | |
16461d7d | 3258 | |
004d836a JJ |
3259 | if (m) |
3260 | { | |
3261 | regcache_cooked_read_unsigned (regcache, regnum, &val); | |
3262 | memcpy ((char *)valbuf + offset, &val, m); | |
3263 | } | |
3264 | } | |
16461d7d KB |
3265 | } |
3266 | ||
4c8b6ae0 UW |
3267 | static void |
3268 | ia64_store_return_value (struct type *type, struct regcache *regcache, | |
3269 | const gdb_byte *valbuf) | |
3270 | { | |
27067745 | 3271 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
4c8b6ae0 UW |
3272 | struct type *float_elt_type; |
3273 | ||
3274 | float_elt_type = is_float_or_hfa_type (type); | |
3275 | if (float_elt_type != NULL) | |
3276 | { | |
948f8e3d | 3277 | gdb_byte to[MAX_REGISTER_SIZE]; |
4c8b6ae0 UW |
3278 | int offset = 0; |
3279 | int regnum = IA64_FR8_REGNUM; | |
3280 | int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type); | |
3281 | ||
3282 | while (n-- > 0) | |
3283 | { | |
3284 | convert_typed_floating ((char *)valbuf + offset, float_elt_type, | |
27067745 | 3285 | to, ia64_ext_type (gdbarch)); |
4c8b6ae0 UW |
3286 | regcache_cooked_write (regcache, regnum, to); |
3287 | offset += TYPE_LENGTH (float_elt_type); | |
3288 | regnum++; | |
3289 | } | |
3290 | } | |
3291 | else | |
3292 | { | |
3293 | ULONGEST val; | |
3294 | int offset = 0; | |
3295 | int regnum = IA64_GR8_REGNUM; | |
27067745 | 3296 | int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM)); |
4c8b6ae0 UW |
3297 | int n = TYPE_LENGTH (type) / reglen; |
3298 | int m = TYPE_LENGTH (type) % reglen; | |
3299 | ||
3300 | while (n-- > 0) | |
3301 | { | |
3302 | ULONGEST val; | |
3303 | memcpy (&val, (char *)valbuf + offset, reglen); | |
3304 | regcache_cooked_write_unsigned (regcache, regnum, val); | |
3305 | offset += reglen; | |
3306 | regnum++; | |
3307 | } | |
3308 | ||
3309 | if (m) | |
3310 | { | |
3311 | memcpy (&val, (char *)valbuf + offset, m); | |
3312 | regcache_cooked_write_unsigned (regcache, regnum, val); | |
3313 | } | |
3314 | } | |
3315 | } | |
3316 | ||
3317 | static enum return_value_convention | |
6a3a010b | 3318 | ia64_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
3319 | struct type *valtype, struct regcache *regcache, |
3320 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
4c8b6ae0 UW |
3321 | { |
3322 | int struct_return = ia64_use_struct_convention (valtype); | |
3323 | ||
3324 | if (writebuf != NULL) | |
3325 | { | |
3326 | gdb_assert (!struct_return); | |
3327 | ia64_store_return_value (valtype, regcache, writebuf); | |
3328 | } | |
3329 | ||
3330 | if (readbuf != NULL) | |
3331 | { | |
3332 | gdb_assert (!struct_return); | |
3333 | ia64_extract_return_value (valtype, regcache, readbuf); | |
3334 | } | |
3335 | ||
3336 | if (struct_return) | |
3337 | return RETURN_VALUE_STRUCT_CONVENTION; | |
3338 | else | |
3339 | return RETURN_VALUE_REGISTER_CONVENTION; | |
3340 | } | |
16461d7d | 3341 | |
64a5b29c KB |
3342 | static int |
3343 | is_float_or_hfa_type_recurse (struct type *t, struct type **etp) | |
3344 | { | |
3345 | switch (TYPE_CODE (t)) | |
3346 | { | |
3347 | case TYPE_CODE_FLT: | |
3348 | if (*etp) | |
3349 | return TYPE_LENGTH (*etp) == TYPE_LENGTH (t); | |
3350 | else | |
3351 | { | |
3352 | *etp = t; | |
3353 | return 1; | |
3354 | } | |
3355 | break; | |
3356 | case TYPE_CODE_ARRAY: | |
98f96ba1 KB |
3357 | return |
3358 | is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)), | |
3359 | etp); | |
64a5b29c KB |
3360 | break; |
3361 | case TYPE_CODE_STRUCT: | |
3362 | { | |
3363 | int i; | |
3364 | ||
3365 | for (i = 0; i < TYPE_NFIELDS (t); i++) | |
98f96ba1 KB |
3366 | if (!is_float_or_hfa_type_recurse |
3367 | (check_typedef (TYPE_FIELD_TYPE (t, i)), etp)) | |
64a5b29c KB |
3368 | return 0; |
3369 | return 1; | |
3370 | } | |
3371 | break; | |
3372 | default: | |
3373 | return 0; | |
3374 | break; | |
3375 | } | |
3376 | } | |
3377 | ||
3378 | /* Determine if the given type is one of the floating point types or | |
3379 | and HFA (which is a struct, array, or combination thereof whose | |
004d836a | 3380 | bottom-most elements are all of the same floating point type). */ |
64a5b29c KB |
3381 | |
3382 | static struct type * | |
3383 | is_float_or_hfa_type (struct type *t) | |
3384 | { | |
3385 | struct type *et = 0; | |
3386 | ||
3387 | return is_float_or_hfa_type_recurse (t, &et) ? et : 0; | |
3388 | } | |
3389 | ||
3390 | ||
98f96ba1 KB |
3391 | /* Return 1 if the alignment of T is such that the next even slot |
3392 | should be used. Return 0, if the next available slot should | |
3393 | be used. (See section 8.5.1 of the IA-64 Software Conventions | |
004d836a | 3394 | and Runtime manual). */ |
98f96ba1 KB |
3395 | |
3396 | static int | |
3397 | slot_alignment_is_next_even (struct type *t) | |
3398 | { | |
3399 | switch (TYPE_CODE (t)) | |
3400 | { | |
3401 | case TYPE_CODE_INT: | |
3402 | case TYPE_CODE_FLT: | |
3403 | if (TYPE_LENGTH (t) > 8) | |
3404 | return 1; | |
3405 | else | |
3406 | return 0; | |
3407 | case TYPE_CODE_ARRAY: | |
3408 | return | |
3409 | slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t))); | |
3410 | case TYPE_CODE_STRUCT: | |
3411 | { | |
3412 | int i; | |
3413 | ||
3414 | for (i = 0; i < TYPE_NFIELDS (t); i++) | |
3415 | if (slot_alignment_is_next_even | |
3416 | (check_typedef (TYPE_FIELD_TYPE (t, i)))) | |
3417 | return 1; | |
3418 | return 0; | |
3419 | } | |
3420 | default: | |
3421 | return 0; | |
3422 | } | |
3423 | } | |
3424 | ||
64a5b29c KB |
3425 | /* Attempt to find (and return) the global pointer for the given |
3426 | function. | |
3427 | ||
3428 | This is a rather nasty bit of code searchs for the .dynamic section | |
3429 | in the objfile corresponding to the pc of the function we're trying | |
3430 | to call. Once it finds the addresses at which the .dynamic section | |
3431 | lives in the child process, it scans the Elf64_Dyn entries for a | |
3432 | DT_PLTGOT tag. If it finds one of these, the corresponding | |
3433 | d_un.d_ptr value is the global pointer. */ | |
3434 | ||
3435 | static CORE_ADDR | |
c4de7027 JB |
3436 | ia64_find_global_pointer_from_dynamic_section (struct gdbarch *gdbarch, |
3437 | CORE_ADDR faddr) | |
64a5b29c | 3438 | { |
e17a4113 | 3439 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
76d689a6 | 3440 | struct obj_section *faddr_sect; |
64a5b29c | 3441 | |
76d689a6 KB |
3442 | faddr_sect = find_pc_section (faddr); |
3443 | if (faddr_sect != NULL) | |
64a5b29c KB |
3444 | { |
3445 | struct obj_section *osect; | |
3446 | ||
76d689a6 | 3447 | ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect) |
64a5b29c KB |
3448 | { |
3449 | if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0) | |
3450 | break; | |
3451 | } | |
3452 | ||
76d689a6 | 3453 | if (osect < faddr_sect->objfile->sections_end) |
64a5b29c | 3454 | { |
aded6f54 | 3455 | CORE_ADDR addr, endaddr; |
64a5b29c | 3456 | |
aded6f54 PA |
3457 | addr = obj_section_addr (osect); |
3458 | endaddr = obj_section_endaddr (osect); | |
3459 | ||
3460 | while (addr < endaddr) | |
64a5b29c KB |
3461 | { |
3462 | int status; | |
3463 | LONGEST tag; | |
e362b510 | 3464 | gdb_byte buf[8]; |
64a5b29c KB |
3465 | |
3466 | status = target_read_memory (addr, buf, sizeof (buf)); | |
3467 | if (status != 0) | |
3468 | break; | |
e17a4113 | 3469 | tag = extract_signed_integer (buf, sizeof (buf), byte_order); |
64a5b29c KB |
3470 | |
3471 | if (tag == DT_PLTGOT) | |
3472 | { | |
3473 | CORE_ADDR global_pointer; | |
3474 | ||
3475 | status = target_read_memory (addr + 8, buf, sizeof (buf)); | |
3476 | if (status != 0) | |
3477 | break; | |
e17a4113 UW |
3478 | global_pointer = extract_unsigned_integer (buf, sizeof (buf), |
3479 | byte_order); | |
64a5b29c | 3480 | |
1777feb0 | 3481 | /* The payoff... */ |
64a5b29c KB |
3482 | return global_pointer; |
3483 | } | |
3484 | ||
3485 | if (tag == DT_NULL) | |
3486 | break; | |
3487 | ||
3488 | addr += 16; | |
3489 | } | |
3490 | } | |
3491 | } | |
3492 | return 0; | |
3493 | } | |
3494 | ||
c4de7027 JB |
3495 | /* Attempt to find (and return) the global pointer for the given |
3496 | function. We first try the find_global_pointer_from_solib routine | |
3497 | from the gdbarch tdep vector, if provided. And if that does not | |
3498 | work, then we try ia64_find_global_pointer_from_dynamic_section. */ | |
3499 | ||
3500 | static CORE_ADDR | |
3501 | ia64_find_global_pointer (struct gdbarch *gdbarch, CORE_ADDR faddr) | |
3502 | { | |
3503 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
3504 | CORE_ADDR addr = 0; | |
3505 | ||
3506 | if (tdep->find_global_pointer_from_solib) | |
3507 | addr = tdep->find_global_pointer_from_solib (gdbarch, faddr); | |
3508 | if (addr == 0) | |
3509 | addr = ia64_find_global_pointer_from_dynamic_section (gdbarch, faddr); | |
3510 | return addr; | |
3511 | } | |
3512 | ||
64a5b29c KB |
3513 | /* Given a function's address, attempt to find (and return) the |
3514 | corresponding (canonical) function descriptor. Return 0 if | |
004d836a | 3515 | not found. */ |
64a5b29c | 3516 | static CORE_ADDR |
e17a4113 | 3517 | find_extant_func_descr (struct gdbarch *gdbarch, CORE_ADDR faddr) |
64a5b29c | 3518 | { |
e17a4113 | 3519 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
76d689a6 | 3520 | struct obj_section *faddr_sect; |
64a5b29c | 3521 | |
004d836a | 3522 | /* Return early if faddr is already a function descriptor. */ |
76d689a6 KB |
3523 | faddr_sect = find_pc_section (faddr); |
3524 | if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0) | |
64a5b29c KB |
3525 | return faddr; |
3526 | ||
76d689a6 | 3527 | if (faddr_sect != NULL) |
64a5b29c | 3528 | { |
76d689a6 KB |
3529 | struct obj_section *osect; |
3530 | ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect) | |
64a5b29c KB |
3531 | { |
3532 | if (strcmp (osect->the_bfd_section->name, ".opd") == 0) | |
3533 | break; | |
3534 | } | |
3535 | ||
76d689a6 | 3536 | if (osect < faddr_sect->objfile->sections_end) |
64a5b29c | 3537 | { |
aded6f54 PA |
3538 | CORE_ADDR addr, endaddr; |
3539 | ||
3540 | addr = obj_section_addr (osect); | |
3541 | endaddr = obj_section_endaddr (osect); | |
64a5b29c | 3542 | |
aded6f54 | 3543 | while (addr < endaddr) |
64a5b29c KB |
3544 | { |
3545 | int status; | |
3546 | LONGEST faddr2; | |
e362b510 | 3547 | gdb_byte buf[8]; |
64a5b29c KB |
3548 | |
3549 | status = target_read_memory (addr, buf, sizeof (buf)); | |
3550 | if (status != 0) | |
3551 | break; | |
e17a4113 | 3552 | faddr2 = extract_signed_integer (buf, sizeof (buf), byte_order); |
64a5b29c KB |
3553 | |
3554 | if (faddr == faddr2) | |
3555 | return addr; | |
3556 | ||
3557 | addr += 16; | |
3558 | } | |
3559 | } | |
3560 | } | |
3561 | return 0; | |
3562 | } | |
3563 | ||
3564 | /* Attempt to find a function descriptor corresponding to the | |
3565 | given address. If none is found, construct one on the | |
004d836a | 3566 | stack using the address at fdaptr. */ |
64a5b29c KB |
3567 | |
3568 | static CORE_ADDR | |
9c9acae0 | 3569 | find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr) |
64a5b29c | 3570 | { |
e17a4113 UW |
3571 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
3572 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
64a5b29c KB |
3573 | CORE_ADDR fdesc; |
3574 | ||
e17a4113 | 3575 | fdesc = find_extant_func_descr (gdbarch, faddr); |
64a5b29c KB |
3576 | |
3577 | if (fdesc == 0) | |
3578 | { | |
9c9acae0 | 3579 | ULONGEST global_pointer; |
e362b510 | 3580 | gdb_byte buf[16]; |
64a5b29c KB |
3581 | |
3582 | fdesc = *fdaptr; | |
3583 | *fdaptr += 16; | |
3584 | ||
e17a4113 | 3585 | global_pointer = ia64_find_global_pointer (gdbarch, faddr); |
64a5b29c KB |
3586 | |
3587 | if (global_pointer == 0) | |
9c9acae0 UW |
3588 | regcache_cooked_read_unsigned (regcache, |
3589 | IA64_GR1_REGNUM, &global_pointer); | |
64a5b29c | 3590 | |
e17a4113 UW |
3591 | store_unsigned_integer (buf, 8, byte_order, faddr); |
3592 | store_unsigned_integer (buf + 8, 8, byte_order, global_pointer); | |
64a5b29c KB |
3593 | |
3594 | write_memory (fdesc, buf, 16); | |
3595 | } | |
3596 | ||
3597 | return fdesc; | |
3598 | } | |
16461d7d | 3599 | |
af8b88dd JJ |
3600 | /* Use the following routine when printing out function pointers |
3601 | so the user can see the function address rather than just the | |
3602 | function descriptor. */ | |
3603 | static CORE_ADDR | |
e2d0e7eb AC |
3604 | ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr, |
3605 | struct target_ops *targ) | |
af8b88dd | 3606 | { |
e17a4113 | 3607 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
af8b88dd | 3608 | struct obj_section *s; |
e453266f | 3609 | gdb_byte buf[8]; |
af8b88dd JJ |
3610 | |
3611 | s = find_pc_section (addr); | |
3612 | ||
3613 | /* check if ADDR points to a function descriptor. */ | |
3614 | if (s && strcmp (s->the_bfd_section->name, ".opd") == 0) | |
e17a4113 | 3615 | return read_memory_unsigned_integer (addr, 8, byte_order); |
af8b88dd | 3616 | |
fcac911a JB |
3617 | /* Normally, functions live inside a section that is executable. |
3618 | So, if ADDR points to a non-executable section, then treat it | |
3619 | as a function descriptor and return the target address iff | |
e453266f JK |
3620 | the target address itself points to a section that is executable. |
3621 | Check first the memory of the whole length of 8 bytes is readable. */ | |
3622 | if (s && (s->the_bfd_section->flags & SEC_CODE) == 0 | |
3623 | && target_read_memory (addr, buf, 8) == 0) | |
fcac911a | 3624 | { |
e453266f | 3625 | CORE_ADDR pc = extract_unsigned_integer (buf, 8, byte_order); |
fcac911a JB |
3626 | struct obj_section *pc_section = find_pc_section (pc); |
3627 | ||
3628 | if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE)) | |
3629 | return pc; | |
3630 | } | |
b1e6fd19 | 3631 | |
0d5de010 DJ |
3632 | /* There are also descriptors embedded in vtables. */ |
3633 | if (s) | |
3634 | { | |
7cbd4a93 | 3635 | struct bound_minimal_symbol minsym; |
0d5de010 DJ |
3636 | |
3637 | minsym = lookup_minimal_symbol_by_pc (addr); | |
3638 | ||
efd66ac6 TT |
3639 | if (minsym.minsym |
3640 | && is_vtable_name (MSYMBOL_LINKAGE_NAME (minsym.minsym))) | |
e17a4113 | 3641 | return read_memory_unsigned_integer (addr, 8, byte_order); |
0d5de010 DJ |
3642 | } |
3643 | ||
af8b88dd JJ |
3644 | return addr; |
3645 | } | |
3646 | ||
a78f21af | 3647 | static CORE_ADDR |
004d836a JJ |
3648 | ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) |
3649 | { | |
3650 | return sp & ~0xfLL; | |
3651 | } | |
3652 | ||
c4de7027 JB |
3653 | /* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */ |
3654 | ||
3655 | static void | |
3656 | ia64_allocate_new_rse_frame (struct regcache *regcache, ULONGEST bsp, int sof) | |
3657 | { | |
3658 | ULONGEST cfm, pfs, new_bsp; | |
3659 | ||
3660 | regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); | |
3661 | ||
3662 | new_bsp = rse_address_add (bsp, sof); | |
3663 | regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp); | |
3664 | ||
3665 | regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs); | |
3666 | pfs &= 0xc000000000000000LL; | |
3667 | pfs |= (cfm & 0xffffffffffffLL); | |
3668 | regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs); | |
3669 | ||
3670 | cfm &= 0xc000000000000000LL; | |
3671 | cfm |= sof; | |
3672 | regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm); | |
3673 | } | |
3674 | ||
3675 | /* The default "store_argument_in_slot" ia64_infcall_ops routine for | |
3676 | ia64. */ | |
3677 | ||
3678 | static void | |
3679 | ia64_store_argument_in_slot (struct regcache *regcache, CORE_ADDR bsp, | |
3680 | int slotnum, gdb_byte *buf) | |
3681 | { | |
3682 | write_memory (rse_address_add (bsp, slotnum), buf, 8); | |
3683 | } | |
3684 | ||
3685 | /* The default "set_function_addr" ia64_infcall_ops routine for ia64. */ | |
3686 | ||
3687 | static void | |
3688 | ia64_set_function_addr (struct regcache *regcache, CORE_ADDR func_addr) | |
3689 | { | |
3690 | /* Nothing needed. */ | |
3691 | } | |
3692 | ||
004d836a | 3693 | static CORE_ADDR |
7d9b040b | 3694 | ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
8dd5115e AS |
3695 | struct regcache *regcache, CORE_ADDR bp_addr, |
3696 | int nargs, struct value **args, CORE_ADDR sp, | |
3697 | int struct_return, CORE_ADDR struct_addr) | |
16461d7d | 3698 | { |
c4de7027 | 3699 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 3700 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
16461d7d | 3701 | int argno; |
ea7c478f | 3702 | struct value *arg; |
16461d7d KB |
3703 | struct type *type; |
3704 | int len, argoffset; | |
64a5b29c | 3705 | int nslots, rseslots, memslots, slotnum, nfuncargs; |
16461d7d | 3706 | int floatreg; |
c4de7027 | 3707 | ULONGEST bsp; |
870f88f7 | 3708 | CORE_ADDR funcdescaddr, global_pointer; |
7d9b040b | 3709 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
16461d7d KB |
3710 | |
3711 | nslots = 0; | |
64a5b29c | 3712 | nfuncargs = 0; |
004d836a | 3713 | /* Count the number of slots needed for the arguments. */ |
16461d7d KB |
3714 | for (argno = 0; argno < nargs; argno++) |
3715 | { | |
3716 | arg = args[argno]; | |
4991999e | 3717 | type = check_typedef (value_type (arg)); |
16461d7d KB |
3718 | len = TYPE_LENGTH (type); |
3719 | ||
98f96ba1 | 3720 | if ((nslots & 1) && slot_alignment_is_next_even (type)) |
16461d7d KB |
3721 | nslots++; |
3722 | ||
64a5b29c KB |
3723 | if (TYPE_CODE (type) == TYPE_CODE_FUNC) |
3724 | nfuncargs++; | |
3725 | ||
16461d7d KB |
3726 | nslots += (len + 7) / 8; |
3727 | } | |
3728 | ||
004d836a | 3729 | /* Divvy up the slots between the RSE and the memory stack. */ |
16461d7d KB |
3730 | rseslots = (nslots > 8) ? 8 : nslots; |
3731 | memslots = nslots - rseslots; | |
3732 | ||
004d836a | 3733 | /* Allocate a new RSE frame. */ |
9c9acae0 | 3734 | regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); |
c4de7027 | 3735 | tdep->infcall_ops.allocate_new_rse_frame (regcache, bsp, rseslots); |
16461d7d | 3736 | |
64a5b29c KB |
3737 | /* We will attempt to find function descriptors in the .opd segment, |
3738 | but if we can't we'll construct them ourselves. That being the | |
004d836a | 3739 | case, we'll need to reserve space on the stack for them. */ |
64a5b29c KB |
3740 | funcdescaddr = sp - nfuncargs * 16; |
3741 | funcdescaddr &= ~0xfLL; | |
3742 | ||
3743 | /* Adjust the stack pointer to it's new value. The calling conventions | |
3744 | require us to have 16 bytes of scratch, plus whatever space is | |
004d836a | 3745 | necessary for the memory slots and our function descriptors. */ |
64a5b29c | 3746 | sp = sp - 16 - (memslots + nfuncargs) * 8; |
004d836a | 3747 | sp &= ~0xfLL; /* Maintain 16 byte alignment. */ |
16461d7d | 3748 | |
64a5b29c KB |
3749 | /* Place the arguments where they belong. The arguments will be |
3750 | either placed in the RSE backing store or on the memory stack. | |
3751 | In addition, floating point arguments or HFAs are placed in | |
004d836a | 3752 | floating point registers. */ |
16461d7d KB |
3753 | slotnum = 0; |
3754 | floatreg = IA64_FR8_REGNUM; | |
3755 | for (argno = 0; argno < nargs; argno++) | |
3756 | { | |
64a5b29c KB |
3757 | struct type *float_elt_type; |
3758 | ||
16461d7d | 3759 | arg = args[argno]; |
4991999e | 3760 | type = check_typedef (value_type (arg)); |
16461d7d | 3761 | len = TYPE_LENGTH (type); |
64a5b29c | 3762 | |
004d836a | 3763 | /* Special handling for function parameters. */ |
64a5b29c KB |
3764 | if (len == 8 |
3765 | && TYPE_CODE (type) == TYPE_CODE_PTR | |
3766 | && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC) | |
3767 | { | |
948f8e3d | 3768 | gdb_byte val_buf[8]; |
e17a4113 UW |
3769 | ULONGEST faddr = extract_unsigned_integer (value_contents (arg), |
3770 | 8, byte_order); | |
3771 | store_unsigned_integer (val_buf, 8, byte_order, | |
9c9acae0 | 3772 | find_func_descr (regcache, faddr, |
fbd9dcd3 | 3773 | &funcdescaddr)); |
64a5b29c | 3774 | if (slotnum < rseslots) |
c4de7027 JB |
3775 | tdep->infcall_ops.store_argument_in_slot (regcache, bsp, |
3776 | slotnum, val_buf); | |
64a5b29c KB |
3777 | else |
3778 | write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); | |
3779 | slotnum++; | |
3780 | continue; | |
3781 | } | |
3782 | ||
004d836a | 3783 | /* Normal slots. */ |
98f96ba1 KB |
3784 | |
3785 | /* Skip odd slot if necessary... */ | |
3786 | if ((slotnum & 1) && slot_alignment_is_next_even (type)) | |
16461d7d | 3787 | slotnum++; |
98f96ba1 | 3788 | |
16461d7d KB |
3789 | argoffset = 0; |
3790 | while (len > 0) | |
3791 | { | |
948f8e3d | 3792 | gdb_byte val_buf[8]; |
16461d7d KB |
3793 | |
3794 | memset (val_buf, 0, 8); | |
825d6d8a JB |
3795 | if (!ia64_struct_type_p (type) && len < 8) |
3796 | { | |
3797 | /* Integral types are LSB-aligned, so we have to be careful | |
3798 | to insert the argument on the correct side of the buffer. | |
3799 | This is why we use store_unsigned_integer. */ | |
3800 | store_unsigned_integer | |
3801 | (val_buf, 8, byte_order, | |
3802 | extract_unsigned_integer (value_contents (arg), len, | |
3803 | byte_order)); | |
3804 | } | |
3805 | else | |
3806 | { | |
3807 | /* This is either an 8bit integral type, or an aggregate. | |
3808 | For 8bit integral type, there is no problem, we just | |
3809 | copy the value over. | |
3810 | ||
3811 | For aggregates, the only potentially tricky portion | |
3812 | is to write the last one if it is less than 8 bytes. | |
3813 | In this case, the data is Byte0-aligned. Happy news, | |
3814 | this means that we don't need to differentiate the | |
3815 | handling of 8byte blocks and less-than-8bytes blocks. */ | |
3816 | memcpy (val_buf, value_contents (arg) + argoffset, | |
3817 | (len > 8) ? 8 : len); | |
3818 | } | |
16461d7d KB |
3819 | |
3820 | if (slotnum < rseslots) | |
c4de7027 JB |
3821 | tdep->infcall_ops.store_argument_in_slot (regcache, bsp, |
3822 | slotnum, val_buf); | |
16461d7d KB |
3823 | else |
3824 | write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); | |
3825 | ||
3826 | argoffset += 8; | |
3827 | len -= 8; | |
3828 | slotnum++; | |
3829 | } | |
64a5b29c | 3830 | |
004d836a | 3831 | /* Handle floating point types (including HFAs). */ |
64a5b29c KB |
3832 | float_elt_type = is_float_or_hfa_type (type); |
3833 | if (float_elt_type != NULL) | |
3834 | { | |
3835 | argoffset = 0; | |
3836 | len = TYPE_LENGTH (type); | |
3837 | while (len > 0 && floatreg < IA64_FR16_REGNUM) | |
3838 | { | |
ce746418 | 3839 | gdb_byte to[MAX_REGISTER_SIZE]; |
1777feb0 MS |
3840 | convert_typed_floating (value_contents (arg) + argoffset, |
3841 | float_elt_type, to, | |
3842 | ia64_ext_type (gdbarch)); | |
ce746418 | 3843 | regcache_cooked_write (regcache, floatreg, to); |
64a5b29c KB |
3844 | floatreg++; |
3845 | argoffset += TYPE_LENGTH (float_elt_type); | |
3846 | len -= TYPE_LENGTH (float_elt_type); | |
3847 | } | |
16461d7d KB |
3848 | } |
3849 | } | |
3850 | ||
004d836a | 3851 | /* Store the struct return value in r8 if necessary. */ |
16461d7d KB |
3852 | if (struct_return) |
3853 | { | |
1777feb0 MS |
3854 | regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, |
3855 | (ULONGEST) struct_addr); | |
16461d7d KB |
3856 | } |
3857 | ||
e17a4113 | 3858 | global_pointer = ia64_find_global_pointer (gdbarch, func_addr); |
8dd5115e | 3859 | |
004d836a | 3860 | if (global_pointer != 0) |
9c9acae0 | 3861 | regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer); |
a59fe496 | 3862 | |
c4de7027 JB |
3863 | /* The following is not necessary on HP-UX, because we're using |
3864 | a dummy code sequence pushed on the stack to make the call, and | |
3865 | this sequence doesn't need b0 to be set in order for our dummy | |
3866 | breakpoint to be hit. Nonetheless, this doesn't interfere, and | |
3867 | it's needed for other OSes, so we do this unconditionaly. */ | |
9c9acae0 | 3868 | regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr); |
16461d7d | 3869 | |
9c9acae0 | 3870 | regcache_cooked_write_unsigned (regcache, sp_regnum, sp); |
16461d7d | 3871 | |
c4de7027 JB |
3872 | tdep->infcall_ops.set_function_addr (regcache, func_addr); |
3873 | ||
16461d7d KB |
3874 | return sp; |
3875 | } | |
3876 | ||
c4de7027 JB |
3877 | static const struct ia64_infcall_ops ia64_infcall_ops = |
3878 | { | |
3879 | ia64_allocate_new_rse_frame, | |
3880 | ia64_store_argument_in_slot, | |
3881 | ia64_set_function_addr | |
3882 | }; | |
3883 | ||
004d836a | 3884 | static struct frame_id |
15c1e57f | 3885 | ia64_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
16461d7d | 3886 | { |
e17a4113 | 3887 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
e362b510 | 3888 | gdb_byte buf[8]; |
4afcc598 | 3889 | CORE_ADDR sp, bsp; |
004d836a | 3890 | |
15c1e57f | 3891 | get_frame_register (this_frame, sp_regnum, buf); |
e17a4113 | 3892 | sp = extract_unsigned_integer (buf, 8, byte_order); |
004d836a | 3893 | |
15c1e57f | 3894 | get_frame_register (this_frame, IA64_BSP_REGNUM, buf); |
e17a4113 | 3895 | bsp = extract_unsigned_integer (buf, 8, byte_order); |
4afcc598 JJ |
3896 | |
3897 | if (gdbarch_debug >= 1) | |
3898 | fprintf_unfiltered (gdb_stdlog, | |
5af949e3 UW |
3899 | "dummy frame id: code %s, stack %s, special %s\n", |
3900 | paddress (gdbarch, get_frame_pc (this_frame)), | |
3901 | paddress (gdbarch, sp), paddress (gdbarch, bsp)); | |
4afcc598 | 3902 | |
15c1e57f | 3903 | return frame_id_build_special (sp, get_frame_pc (this_frame), bsp); |
16461d7d KB |
3904 | } |
3905 | ||
004d836a JJ |
3906 | static CORE_ADDR |
3907 | ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
16461d7d | 3908 | { |
e17a4113 | 3909 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
e362b510 | 3910 | gdb_byte buf[8]; |
004d836a JJ |
3911 | CORE_ADDR ip, psr, pc; |
3912 | ||
3913 | frame_unwind_register (next_frame, IA64_IP_REGNUM, buf); | |
e17a4113 | 3914 | ip = extract_unsigned_integer (buf, 8, byte_order); |
004d836a | 3915 | frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); |
e17a4113 | 3916 | psr = extract_unsigned_integer (buf, 8, byte_order); |
004d836a JJ |
3917 | |
3918 | pc = (ip & ~0xf) | ((psr >> 41) & 3); | |
3919 | return pc; | |
16461d7d KB |
3920 | } |
3921 | ||
6926787d AS |
3922 | static int |
3923 | ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info) | |
3924 | { | |
3925 | info->bytes_per_line = SLOT_MULTIPLIER; | |
3926 | return print_insn_ia64 (memaddr, info); | |
3927 | } | |
3928 | ||
77ca787b JB |
3929 | /* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */ |
3930 | ||
3931 | static int | |
3932 | ia64_size_of_register_frame (struct frame_info *this_frame, ULONGEST cfm) | |
3933 | { | |
3934 | return (cfm & 0x7f); | |
3935 | } | |
3936 | ||
16461d7d KB |
3937 | static struct gdbarch * |
3938 | ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
3939 | { | |
3940 | struct gdbarch *gdbarch; | |
244bc108 | 3941 | struct gdbarch_tdep *tdep; |
244bc108 | 3942 | |
85bf2b91 JJ |
3943 | /* If there is already a candidate, use it. */ |
3944 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
3945 | if (arches != NULL) | |
3946 | return arches->gdbarch; | |
16461d7d | 3947 | |
8d749320 | 3948 | tdep = XCNEW (struct gdbarch_tdep); |
244bc108 | 3949 | gdbarch = gdbarch_alloc (&info, tdep); |
244bc108 | 3950 | |
77ca787b JB |
3951 | tdep->size_of_register_frame = ia64_size_of_register_frame; |
3952 | ||
5439edaa AC |
3953 | /* According to the ia64 specs, instructions that store long double |
3954 | floats in memory use a long-double format different than that | |
3955 | used in the floating registers. The memory format matches the | |
3956 | x86 extended float format which is 80 bits. An OS may choose to | |
3957 | use this format (e.g. GNU/Linux) or choose to use a different | |
3958 | format for storing long doubles (e.g. HPUX). In the latter case, | |
3959 | the setting of the format may be moved/overridden in an | |
3960 | OS-specific tdep file. */ | |
8da61cc4 | 3961 | set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext); |
32edc941 | 3962 | |
16461d7d KB |
3963 | set_gdbarch_short_bit (gdbarch, 16); |
3964 | set_gdbarch_int_bit (gdbarch, 32); | |
3965 | set_gdbarch_long_bit (gdbarch, 64); | |
3966 | set_gdbarch_long_long_bit (gdbarch, 64); | |
3967 | set_gdbarch_float_bit (gdbarch, 32); | |
3968 | set_gdbarch_double_bit (gdbarch, 64); | |
33c08150 | 3969 | set_gdbarch_long_double_bit (gdbarch, 128); |
16461d7d KB |
3970 | set_gdbarch_ptr_bit (gdbarch, 64); |
3971 | ||
004d836a | 3972 | set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS); |
1777feb0 MS |
3973 | set_gdbarch_num_pseudo_regs (gdbarch, |
3974 | LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM); | |
16461d7d | 3975 | set_gdbarch_sp_regnum (gdbarch, sp_regnum); |
698cb3f0 | 3976 | set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM); |
16461d7d KB |
3977 | |
3978 | set_gdbarch_register_name (gdbarch, ia64_register_name); | |
004d836a | 3979 | set_gdbarch_register_type (gdbarch, ia64_register_type); |
16461d7d | 3980 | |
004d836a JJ |
3981 | set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read); |
3982 | set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write); | |
3983 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum); | |
3984 | set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p); | |
3985 | set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p); | |
3986 | set_gdbarch_register_to_value (gdbarch, ia64_register_to_value); | |
3987 | set_gdbarch_value_to_register (gdbarch, ia64_value_to_register); | |
16461d7d | 3988 | |
004d836a | 3989 | set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue); |
16461d7d | 3990 | |
4c8b6ae0 | 3991 | set_gdbarch_return_value (gdbarch, ia64_return_value); |
16461d7d | 3992 | |
1777feb0 MS |
3993 | set_gdbarch_memory_insert_breakpoint (gdbarch, |
3994 | ia64_memory_insert_breakpoint); | |
3995 | set_gdbarch_memory_remove_breakpoint (gdbarch, | |
3996 | ia64_memory_remove_breakpoint); | |
16461d7d | 3997 | set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc); |
cd6c3b4f | 3998 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, ia64_breakpoint_kind_from_pc); |
16461d7d | 3999 | set_gdbarch_read_pc (gdbarch, ia64_read_pc); |
b33e8514 | 4000 | set_gdbarch_write_pc (gdbarch, ia64_write_pc); |
16461d7d KB |
4001 | |
4002 | /* Settings for calling functions in the inferior. */ | |
8dd5115e | 4003 | set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call); |
c4de7027 | 4004 | tdep->infcall_ops = ia64_infcall_ops; |
004d836a | 4005 | set_gdbarch_frame_align (gdbarch, ia64_frame_align); |
15c1e57f | 4006 | set_gdbarch_dummy_id (gdbarch, ia64_dummy_id); |
16461d7d | 4007 | |
004d836a | 4008 | set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc); |
968d1cb4 | 4009 | #ifdef HAVE_LIBUNWIND_IA64_H |
15c1e57f JB |
4010 | frame_unwind_append_unwinder (gdbarch, |
4011 | &ia64_libunwind_sigtramp_frame_unwind); | |
4012 | frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind); | |
4013 | frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind); | |
968d1cb4 | 4014 | libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr); |
c5a27d9c | 4015 | #else |
15c1e57f | 4016 | frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind); |
968d1cb4 | 4017 | #endif |
15c1e57f | 4018 | frame_unwind_append_unwinder (gdbarch, &ia64_frame_unwind); |
004d836a | 4019 | frame_base_set_default (gdbarch, &ia64_frame_base); |
16461d7d KB |
4020 | |
4021 | /* Settings that should be unnecessary. */ | |
4022 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
4023 | ||
6926787d | 4024 | set_gdbarch_print_insn (gdbarch, ia64_print_insn); |
1777feb0 MS |
4025 | set_gdbarch_convert_from_func_ptr_addr (gdbarch, |
4026 | ia64_convert_from_func_ptr_addr); | |
6926787d | 4027 | |
0d5de010 DJ |
4028 | /* The virtual table contains 16-byte descriptors, not pointers to |
4029 | descriptors. */ | |
4030 | set_gdbarch_vtable_function_descriptors (gdbarch, 1); | |
4031 | ||
b33e8514 AS |
4032 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4033 | gdbarch_init_osabi (info, gdbarch); | |
4034 | ||
16461d7d KB |
4035 | return gdbarch; |
4036 | } | |
4037 | ||
a78f21af AC |
4038 | extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */ |
4039 | ||
16461d7d KB |
4040 | void |
4041 | _initialize_ia64_tdep (void) | |
4042 | { | |
b33e8514 | 4043 | gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL); |
16461d7d | 4044 | } |