* gdb.texinfo (Backtraces): Document "set backtrace-below-main".
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
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2
3 Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
fd0407d6 30#include "value.h"
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31
32#include "objfiles.h"
33#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 34#include "elf-bfd.h"
16461d7d 35
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36/* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47/* An enumeration of the different IA-64 instruction types. */
48
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49typedef enum instruction_type
50{
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59} instruction_type;
60
61/* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76#define SLOT_MULTIPLIER 1
77
78/* Length in bytes of an instruction bundle */
79
80#define BUNDLE_LEN 16
81
d7fa2ae2 82/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 83extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 84extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 85
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86static gdbarch_init_ftype ia64_gdbarch_init;
87
88static gdbarch_register_name_ftype ia64_register_name;
89static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92static gdbarch_register_byte_ftype ia64_register_byte;
93static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94static gdbarch_frame_chain_ftype ia64_frame_chain;
95static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
96static gdbarch_skip_prologue_ftype ia64_skip_prologue;
97static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
98static gdbarch_get_saved_register_ftype ia64_get_saved_register;
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99static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
100static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
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101static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
102static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
103static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
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104static gdbarch_store_struct_return_ftype ia64_store_struct_return;
105static gdbarch_push_arguments_ftype ia64_push_arguments;
106static gdbarch_push_return_address_ftype ia64_push_return_address;
107static gdbarch_pop_frame_ftype ia64_pop_frame;
108static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 109static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 110static struct type *is_float_or_hfa_type (struct type *t);
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111
112static int ia64_num_regs = 590;
113
114static int pc_regnum = IA64_IP_REGNUM;
115static int sp_regnum = IA64_GR12_REGNUM;
116static int fp_regnum = IA64_VFP_REGNUM;
117static int lr_regnum = IA64_VRAP_REGNUM;
118
119static LONGEST ia64_call_dummy_words[] = {0};
120
121/* Array of register names; There should be ia64_num_regs strings in
122 the initializer. */
123
124static char *ia64_register_names[] =
125{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
126 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
127 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
128 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
129 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
130 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
131 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
132 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
133 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
134 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
135 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
136 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
137 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
138 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
139 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
140 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
141
142 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
143 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
144 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
145 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
146 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
147 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
148 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
149 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
150 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
151 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
152 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
153 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
154 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
155 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
156 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
157 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
158
159 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
160 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
161 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
162 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
163 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
164 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
165 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
166 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
167
168 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
169
170 "vfp", "vrap",
171
172 "pr", "ip", "psr", "cfm",
173
174 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
175 "", "", "", "", "", "", "", "",
176 "rsc", "bsp", "bspstore", "rnat",
177 "", "fcr", "", "",
178 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
179 "ccv", "", "", "", "unat", "", "", "",
180 "fpsr", "", "", "", "itc",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "",
183 "pfs", "lc", "ec",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "", "", "",
190 "",
191 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
192 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
193 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
194 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
195 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
196 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
197 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
198 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
199 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
200 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
201 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
202 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
203 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
204 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
205 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
206 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
207};
208
209struct frame_extra_info
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210 {
211 CORE_ADDR bsp; /* points at r32 for the current frame */
212 CORE_ADDR cfm; /* cfm value for current frame */
213 int sof; /* Size of frame (decoded from cfm value) */
214 int sol; /* Size of locals (decoded from cfm value) */
215 CORE_ADDR after_prologue;
216 /* Address of first instruction after the last
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217 prologue instruction; Note that there may
218 be instructions from the function's body
219 intermingled with the prologue. */
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220 int mem_stack_frame_size;
221 /* Size of the memory stack frame (may be zero),
16461d7d 222 or -1 if it has not been determined yet. */
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223 int fp_reg; /* Register number (if any) used a frame pointer
224 for this frame. 0 if no register is being used
16461d7d 225 as the frame pointer. */
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226 };
227
228struct gdbarch_tdep
229 {
230 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 231 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
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232 etc. */
233 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
234 /* OS specific function which, given a frame address
235 and register number, returns the offset to the
236 given register from the start of the frame. */
698cb3f0 237 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
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238 };
239
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240#define SIGCONTEXT_REGISTER_ADDRESS \
241 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
242#define FIND_GLOBAL_POINTER \
243 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d 244
fa88f677 245static const char *
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246ia64_register_name (int reg)
247{
248 return ia64_register_names[reg];
249}
250
251int
252ia64_register_raw_size (int reg)
253{
254 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
255}
256
257int
258ia64_register_virtual_size (int reg)
259{
260 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
261}
262
263/* Return true iff register N's virtual format is different from
264 its raw format. */
265int
266ia64_register_convertible (int nr)
267{
268 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
269}
270
271const struct floatformat floatformat_ia64_ext =
272{
273 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
274 floatformat_intbit_yes
275};
276
277void
278ia64_register_convert_to_virtual (int regnum, struct type *type,
279 char *from, char *to)
280{
281 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
282 {
283 DOUBLEST val;
284 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
285 store_floating(to, TYPE_LENGTH(type), val);
286 }
287 else
288 error("ia64_register_convert_to_virtual called with non floating point register number");
289}
290
291void
292ia64_register_convert_to_raw (struct type *type, int regnum,
293 char *from, char *to)
294{
295 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
296 {
297 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
298 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
299 }
300 else
301 error("ia64_register_convert_to_raw called with non floating point register number");
302}
303
304struct type *
305ia64_register_virtual_type (int reg)
306{
307 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
308 return builtin_type_long_double;
309 else
310 return builtin_type_long;
311}
312
313int
314ia64_register_byte (int reg)
315{
316 return (8 * reg) +
317 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
318}
319
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320/* Read the given register from a sigcontext structure in the
321 specified frame. */
322
323static CORE_ADDR
324read_sigcontext_register (struct frame_info *frame, int regnum)
325{
326 CORE_ADDR regaddr;
327
328 if (frame == NULL)
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329 internal_error (__FILE__, __LINE__,
330 "read_sigcontext_register: NULL frame");
5a203e44 331 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
8e65ff28 332 internal_error (__FILE__, __LINE__,
5a203e44 333 "read_sigcontext_register: frame not a signal trampoline");
244bc108 334 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
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335 internal_error (__FILE__, __LINE__,
336 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
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337
338 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
339 if (regaddr)
340 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
341 else
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342 internal_error (__FILE__, __LINE__,
343 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
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344}
345
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346/* Extract ``len'' bits from an instruction bundle starting at
347 bit ``from''. */
348
244bc108 349static long long
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350extract_bit_field (char *bundle, int from, int len)
351{
352 long long result = 0LL;
353 int to = from + len;
354 int from_byte = from / 8;
355 int to_byte = to / 8;
356 unsigned char *b = (unsigned char *) bundle;
357 unsigned char c;
358 int lshift;
359 int i;
360
361 c = b[from_byte];
362 if (from_byte == to_byte)
363 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
364 result = c >> (from % 8);
365 lshift = 8 - (from % 8);
366
367 for (i = from_byte+1; i < to_byte; i++)
368 {
369 result |= ((long long) b[i]) << lshift;
370 lshift += 8;
371 }
372
373 if (from_byte < to_byte && (to % 8 != 0))
374 {
375 c = b[to_byte];
376 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
377 result |= ((long long) c) << lshift;
378 }
379
380 return result;
381}
382
383/* Replace the specified bits in an instruction bundle */
384
244bc108 385static void
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386replace_bit_field (char *bundle, long long val, int from, int len)
387{
388 int to = from + len;
389 int from_byte = from / 8;
390 int to_byte = to / 8;
391 unsigned char *b = (unsigned char *) bundle;
392 unsigned char c;
393
394 if (from_byte == to_byte)
395 {
396 unsigned char left, right;
397 c = b[from_byte];
398 left = (c >> (to % 8)) << (to % 8);
399 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
400 c = (unsigned char) (val & 0xff);
401 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
402 c |= right | left;
403 b[from_byte] = c;
404 }
405 else
406 {
407 int i;
408 c = b[from_byte];
409 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
410 c = c | (val << (from % 8));
411 b[from_byte] = c;
412 val >>= 8 - from % 8;
413
414 for (i = from_byte+1; i < to_byte; i++)
415 {
416 c = val & 0xff;
417 val >>= 8;
418 b[i] = c;
419 }
420
421 if (to % 8 != 0)
422 {
423 unsigned char cv = (unsigned char) val;
424 c = b[to_byte];
425 c = c >> (to % 8) << (to % 8);
426 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
427 b[to_byte] = c;
428 }
429 }
430}
431
432/* Return the contents of slot N (for N = 0, 1, or 2) in
433 and instruction bundle */
434
244bc108 435static long long
2fc3ac7e 436slotN_contents (char *bundle, int slotnum)
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437{
438 return extract_bit_field (bundle, 5+41*slotnum, 41);
439}
440
441/* Store an instruction in an instruction bundle */
442
244bc108 443static void
2fc3ac7e 444replace_slotN_contents (char *bundle, long long instr, int slotnum)
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445{
446 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
447}
448
64a5b29c 449static enum instruction_type template_encoding_table[32][3] =
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450{
451 { M, I, I }, /* 00 */
452 { M, I, I }, /* 01 */
453 { M, I, I }, /* 02 */
454 { M, I, I }, /* 03 */
455 { M, L, X }, /* 04 */
456 { M, L, X }, /* 05 */
457 { undefined, undefined, undefined }, /* 06 */
458 { undefined, undefined, undefined }, /* 07 */
459 { M, M, I }, /* 08 */
460 { M, M, I }, /* 09 */
461 { M, M, I }, /* 0A */
462 { M, M, I }, /* 0B */
463 { M, F, I }, /* 0C */
464 { M, F, I }, /* 0D */
465 { M, M, F }, /* 0E */
466 { M, M, F }, /* 0F */
467 { M, I, B }, /* 10 */
468 { M, I, B }, /* 11 */
469 { M, B, B }, /* 12 */
470 { M, B, B }, /* 13 */
471 { undefined, undefined, undefined }, /* 14 */
472 { undefined, undefined, undefined }, /* 15 */
473 { B, B, B }, /* 16 */
474 { B, B, B }, /* 17 */
475 { M, M, B }, /* 18 */
476 { M, M, B }, /* 19 */
477 { undefined, undefined, undefined }, /* 1A */
478 { undefined, undefined, undefined }, /* 1B */
479 { M, F, B }, /* 1C */
480 { M, F, B }, /* 1D */
481 { undefined, undefined, undefined }, /* 1E */
482 { undefined, undefined, undefined }, /* 1F */
483};
484
485/* Fetch and (partially) decode an instruction at ADDR and return the
486 address of the next instruction to fetch. */
487
488static CORE_ADDR
489fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
490{
491 char bundle[BUNDLE_LEN];
492 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
493 long long template;
494 int val;
495
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496 /* Warn about slot numbers greater than 2. We used to generate
497 an error here on the assumption that the user entered an invalid
498 address. But, sometimes GDB itself requests an invalid address.
499 This can (easily) happen when execution stops in a function for
500 which there are no symbols. The prologue scanner will attempt to
501 find the beginning of the function - if the nearest symbol
502 happens to not be aligned on a bundle boundary (16 bytes), the
503 resulting starting address will cause GDB to think that the slot
504 number is too large.
505
506 So we warn about it and set the slot number to zero. It is
507 not necessarily a fatal condition, particularly if debugging
508 at the assembly language level. */
16461d7d 509 if (slotnum > 2)
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510 {
511 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
512 "Using slot 0 instead");
513 slotnum = 0;
514 }
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515
516 addr &= ~0x0f;
517
518 val = target_read_memory (addr, bundle, BUNDLE_LEN);
519
520 if (val != 0)
521 return 0;
522
523 *instr = slotN_contents (bundle, slotnum);
524 template = extract_bit_field (bundle, 0, 5);
525 *it = template_encoding_table[(int)template][slotnum];
526
64a5b29c 527 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB
528 addr += 16;
529 else
530 addr += (slotnum + 1) * SLOT_MULTIPLIER;
531
532 return addr;
533}
534
535/* There are 5 different break instructions (break.i, break.b,
536 break.m, break.f, and break.x), but they all have the same
537 encoding. (The five bit template in the low five bits of the
538 instruction bundle distinguishes one from another.)
539
540 The runtime architecture manual specifies that break instructions
541 used for debugging purposes must have the upper two bits of the 21
542 bit immediate set to a 0 and a 1 respectively. A breakpoint
543 instruction encodes the most significant bit of its 21 bit
544 immediate at bit 36 of the 41 bit instruction. The penultimate msb
545 is at bit 25 which leads to the pattern below.
546
547 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
548 it turns out that 0x80000 was used as the syscall break in the early
549 simulators. So I changed the pattern slightly to do "break.i 0x080001"
550 instead. But that didn't work either (I later found out that this
551 pattern was used by the simulator that I was using.) So I ended up
552 using the pattern seen below. */
553
554#if 0
555#define BREAKPOINT 0x00002000040LL
556#endif
557#define BREAKPOINT 0x00003333300LL
558
559static int
560ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
561{
562 char bundle[BUNDLE_LEN];
563 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
564 long long instr;
565 int val;
126fa72d 566 int template;
16461d7d
KB
567
568 if (slotnum > 2)
569 error("Can't insert breakpoint for slot numbers greater than 2.");
570
571 addr &= ~0x0f;
572
573 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
574
575 /* Check for L type instruction in 2nd slot, if present then
576 bump up the slot number to the 3rd slot */
577 template = extract_bit_field (bundle, 0, 5);
578 if (slotnum == 1 && template_encoding_table[template][1] == L)
579 {
580 slotnum = 2;
581 }
582
16461d7d
KB
583 instr = slotN_contents (bundle, slotnum);
584 memcpy(contents_cache, &instr, sizeof(instr));
585 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
586 if (val == 0)
587 target_write_memory (addr, bundle, BUNDLE_LEN);
588
589 return val;
590}
591
592static int
593ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
594{
595 char bundle[BUNDLE_LEN];
596 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
597 long long instr;
598 int val;
126fa72d 599 int template;
16461d7d
KB
600
601 addr &= ~0x0f;
602
603 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
604
605 /* Check for L type instruction in 2nd slot, if present then
606 bump up the slot number to the 3rd slot */
607 template = extract_bit_field (bundle, 0, 5);
608 if (slotnum == 1 && template_encoding_table[template][1] == L)
609 {
610 slotnum = 2;
611 }
612
16461d7d
KB
613 memcpy (&instr, contents_cache, sizeof instr);
614 replace_slotN_contents (bundle, instr, slotnum);
615 if (val == 0)
616 target_write_memory (addr, bundle, BUNDLE_LEN);
617
618 return val;
619}
620
621/* We don't really want to use this, but remote.c needs to call it in order
622 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 623const unsigned char *
fba45db2 624ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB
625{
626 static unsigned char breakpoint[] =
627 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
628 *lenptr = sizeof (breakpoint);
629#if 0
630 *pcptr &= ~0x0f;
631#endif
632 return breakpoint;
633}
634
635CORE_ADDR
39f77062 636ia64_read_pc (ptid_t ptid)
16461d7d 637{
39f77062
KB
638 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
639 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB
640 int slot_num = (psr_value >> 41) & 3;
641
642 return pc_value | (slot_num * SLOT_MULTIPLIER);
643}
644
645void
39f77062 646ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB
647{
648 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 649 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB
650 psr_value &= ~(3LL << 41);
651 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
652
653 new_pc &= ~0xfLL;
654
39f77062
KB
655 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
656 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB
657}
658
659#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
660
661/* Returns the address of the slot that's NSLOTS slots away from
662 the address ADDR. NSLOTS may be positive or negative. */
663static CORE_ADDR
664rse_address_add(CORE_ADDR addr, int nslots)
665{
666 CORE_ADDR new_addr;
667 int mandatory_nat_slots = nslots / 63;
668 int direction = nslots < 0 ? -1 : 1;
669
670 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
671
672 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
673 new_addr += 8 * direction;
674
675 if (IS_NaT_COLLECTION_ADDR(new_addr))
676 new_addr += 8 * direction;
677
678 return new_addr;
679}
680
681/* The IA-64 frame chain is a bit odd. We won't always have a frame
682 pointer, so we use the SP value as the FP for the purpose of
683 creating a frame. There is sometimes a register (not fixed) which
684 is used as a frame pointer. When this register exists, it is not
685 especially hard to determine which one is being used. It isn't
686 even really hard to compute the frame chain, but it can be
687 computationally expensive. So, instead of making life difficult
688 (and slow), we pick a more convenient representation of the frame
8227c0ff
AC
689 chain, knowing that we'll have to make some small adjustments in
690 other places. (E.g, note that read_fp() is actually read_sp() in
691 ia64_gdbarch_init() below.)
16461d7d
KB
692
693 Okay, so what is the frame chain exactly? It'll be the SP value
694 at the time that the function in question was entered.
695
696 Note that this *should* actually the frame pointer for the current
697 function! But as I note above, if we were to attempt to find the
698 address of the beginning of the previous frame, we'd waste a lot
699 of cycles for no good reason. So instead, we simply choose to
700 represent the frame chain as the end of the previous frame instead
701 of the beginning. */
702
703CORE_ADDR
704ia64_frame_chain (struct frame_info *frame)
705{
5a203e44 706 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 707 return read_sigcontext_register (frame, sp_regnum);
50abf9e5 708 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), frame->frame, frame->frame))
244bc108 709 return frame->frame;
16461d7d 710 else
244bc108
KB
711 {
712 FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
713 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
714 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
244bc108
KB
715 else
716 return frame->frame + frame->extra_info->mem_stack_frame_size;
717 }
16461d7d
KB
718}
719
720CORE_ADDR
721ia64_frame_saved_pc (struct frame_info *frame)
722{
5a203e44 723 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 724 return read_sigcontext_register (frame, pc_regnum);
50abf9e5
AC
725 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), frame->frame, frame->frame))
726 return deprecated_read_register_dummy (get_frame_pc (frame), frame->frame, pc_regnum);
244bc108
KB
727 else
728 {
729 FRAME_INIT_SAVED_REGS (frame);
16461d7d 730
b2fb4676
AC
731 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
732 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
5a203e44 733 else if (frame->next && (get_frame_type (frame->next) == SIGTRAMP_FRAME))
244bc108
KB
734 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
735 else /* either frameless, or not far enough along in the prologue... */
736 return ia64_saved_pc_after_call (frame);
737 }
16461d7d
KB
738}
739
58ab00f9
KB
740/* Limit the number of skipped non-prologue instructions since examining
741 of the prologue is expensive. */
742static int max_skip_non_prologue_insns = 10;
743
744/* Given PC representing the starting address of a function, and
745 LIM_PC which is the (sloppy) limit to which to scan when looking
746 for a prologue, attempt to further refine this limit by using
747 the line data in the symbol table. If successful, a better guess
748 on where the prologue ends is returned, otherwise the previous
749 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
750 which will be set to indicate whether the returned limit may be
751 used with no further scanning in the event that the function is
752 frameless. */
753
754static CORE_ADDR
755refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
756{
757 struct symtab_and_line prologue_sal;
758 CORE_ADDR start_pc = pc;
759
760 /* Start off not trusting the limit. */
761 *trust_limit = 0;
762
763 prologue_sal = find_pc_line (pc, 0);
764 if (prologue_sal.line != 0)
765 {
766 int i;
767 CORE_ADDR addr = prologue_sal.end;
768
769 /* Handle the case in which compiler's optimizer/scheduler
770 has moved instructions into the prologue. We scan ahead
771 in the function looking for address ranges whose corresponding
772 line number is less than or equal to the first one that we
773 found for the function. (It can be less than when the
774 scheduler puts a body instruction before the first prologue
775 instruction.) */
776 for (i = 2 * max_skip_non_prologue_insns;
777 i > 0 && (lim_pc == 0 || addr < lim_pc);
778 i--)
779 {
780 struct symtab_and_line sal;
781
782 sal = find_pc_line (addr, 0);
783 if (sal.line == 0)
784 break;
785 if (sal.line <= prologue_sal.line
786 && sal.symtab == prologue_sal.symtab)
787 {
788 prologue_sal = sal;
789 }
790 addr = sal.end;
791 }
792
793 if (lim_pc == 0 || prologue_sal.end < lim_pc)
794 {
795 lim_pc = prologue_sal.end;
796 if (start_pc == get_pc_function_start (lim_pc))
797 *trust_limit = 1;
798 }
799 }
800 return lim_pc;
801}
802
16461d7d
KB
803#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
804 || (8 <= (_regnum_) && (_regnum_) <= 11) \
805 || (14 <= (_regnum_) && (_regnum_) <= 31))
806#define imm9(_instr_) \
807 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
808 | (((_instr_) & 0x00008000000LL) >> 20) \
809 | (((_instr_) & 0x00000001fc0LL) >> 6))
810
811static CORE_ADDR
812examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
813{
814 CORE_ADDR next_pc;
815 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB
816 instruction_type it;
817 long long instr;
818 int do_fsr_stuff = 0;
819
820 int cfm_reg = 0;
821 int ret_reg = 0;
822 int fp_reg = 0;
823 int unat_save_reg = 0;
824 int pr_save_reg = 0;
825 int mem_stack_frame_size = 0;
826 int spill_reg = 0;
827 CORE_ADDR spill_addr = 0;
0927a22b
KB
828 char instores[8];
829 char infpstores[8];
58ab00f9 830 int trust_limit;
0927a22b
KB
831
832 memset (instores, 0, sizeof instores);
833 memset (infpstores, 0, sizeof infpstores);
16461d7d 834
b2fb4676 835 if (frame && !get_frame_saved_regs (frame))
16461d7d
KB
836 {
837 frame_saved_regs_zalloc (frame);
838 do_fsr_stuff = 1;
839 }
840
841 if (frame
842 && !do_fsr_stuff
843 && frame->extra_info->after_prologue != 0
844 && frame->extra_info->after_prologue <= lim_pc)
845 return frame->extra_info->after_prologue;
846
58ab00f9
KB
847 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
848
16461d7d
KB
849 /* Must start with an alloc instruction */
850 next_pc = fetch_instruction (pc, &it, &instr);
851 if (pc < lim_pc && next_pc
852 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
853 {
854 /* alloc */
855 int sor = (int) ((instr & 0x00078000000LL) >> 27);
856 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
857 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
858 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
859 we could compare against the size given to us via the cfm as
860 either a sanity check or possibly to see if the frame has been
861 changed by a later alloc instruction... */
862 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
863 cfm_reg = rN;
864 last_prologue_pc = next_pc;
865 pc = next_pc;
866 }
867 else
58ab00f9
KB
868 {
869 pc = lim_pc; /* Frameless: We're done early. */
870 if (trust_limit)
871 last_prologue_pc = lim_pc;
872 }
16461d7d
KB
873
874 /* Loop, looking for prologue instructions, keeping track of
875 where preserved registers were spilled. */
876 while (pc < lim_pc)
877 {
878 next_pc = fetch_instruction (pc, &it, &instr);
879 if (next_pc == 0)
880 break;
881
902d7086
KB
882 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
883 || ((instr & 0x3fLL) != 0LL))
0927a22b 884 {
902d7086
KB
885 /* Exit loop upon hitting a non-nop branch instruction
886 or a predicated instruction. */
0927a22b
KB
887 break;
888 }
889 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB
890 {
891 /* Move from BR */
892 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
893 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
894 int qp = (int) (instr & 0x0000000003f);
895
896 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
897 {
898 ret_reg = rN;
899 last_prologue_pc = next_pc;
900 }
901 }
902 else if ((it == I || it == M)
903 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
904 {
905 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
906 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
907 | ((instr & 0x001f8000000LL) >> 20)
908 | ((instr & 0x000000fe000LL) >> 13));
909 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
910 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
911 int qp = (int) (instr & 0x0000000003fLL);
912
913 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
914 {
915 /* mov rN, r12 */
916 fp_reg = rN;
917 last_prologue_pc = next_pc;
918 }
919 else if (qp == 0 && rN == 12 && rM == 12)
920 {
921 /* adds r12, -mem_stack_frame_size, r12 */
922 mem_stack_frame_size -= imm;
923 last_prologue_pc = next_pc;
924 }
925 else if (qp == 0 && rN == 2
926 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
927 {
928 /* adds r2, spilloffset, rFramePointer
929 or
930 adds r2, spilloffset, r12
931
932 Get ready for stf.spill or st8.spill instructions.
933 The address to start spilling at is loaded into r2.
934 FIXME: Why r2? That's what gcc currently uses; it
935 could well be different for other compilers. */
936
937 /* Hmm... whether or not this will work will depend on
938 where the pc is. If it's still early in the prologue
939 this'll be wrong. FIXME */
940 spill_addr = (frame ? frame->frame : 0)
941 + (rM == 12 ? 0 : mem_stack_frame_size)
942 + imm;
943 spill_reg = rN;
944 last_prologue_pc = next_pc;
945 }
946 }
947 else if (it == M
948 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
949 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
950 {
951 /* stf.spill [rN] = fM, imm9
952 or
953 stf.spill [rN] = fM */
954
955 int imm = imm9(instr);
956 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
957 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
958 int qp = (int) (instr & 0x0000000003fLL);
959 if (qp == 0 && rN == spill_reg && spill_addr != 0
960 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
961 {
962 if (do_fsr_stuff)
b2fb4676 963 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d
KB
964
965 if ((instr & 0x1efc0000000) == 0x0eec0000000)
966 spill_addr += imm;
967 else
968 spill_addr = 0; /* last one; must be done */
969 last_prologue_pc = next_pc;
970 }
971 }
972 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
973 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
974 {
975 /* mov.m rN = arM
976 or
977 mov.i rN = arM */
978
979 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
980 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
981 int qp = (int) (instr & 0x0000000003fLL);
982 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
983 {
984 /* We have something like "mov.m r3 = ar.unat". Remember the
985 r3 (or whatever) and watch for a store of this register... */
986 unat_save_reg = rN;
987 last_prologue_pc = next_pc;
988 }
989 }
990 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
991 {
992 /* mov rN = pr */
993 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
994 int qp = (int) (instr & 0x0000000003fLL);
995 if (qp == 0 && isScratch (rN))
996 {
997 pr_save_reg = rN;
998 last_prologue_pc = next_pc;
999 }
1000 }
1001 else if (it == M
1002 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1003 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1004 {
1005 /* st8 [rN] = rM
1006 or
1007 st8 [rN] = rM, imm9 */
1008 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1009 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1010 int qp = (int) (instr & 0x0000000003fLL);
1011 if (qp == 0 && rN == spill_reg && spill_addr != 0
1012 && (rM == unat_save_reg || rM == pr_save_reg))
1013 {
1014 /* We've found a spill of either the UNAT register or the PR
1015 register. (Well, not exactly; what we've actually found is
1016 a spill of the register that UNAT or PR was moved to).
1017 Record that fact and move on... */
1018 if (rM == unat_save_reg)
1019 {
1020 /* Track UNAT register */
1021 if (do_fsr_stuff)
b2fb4676 1022 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB
1023 unat_save_reg = 0;
1024 }
1025 else
1026 {
1027 /* Track PR register */
1028 if (do_fsr_stuff)
b2fb4676 1029 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB
1030 pr_save_reg = 0;
1031 }
1032 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1033 /* st8 [rN] = rM, imm9 */
1034 spill_addr += imm9(instr);
1035 else
1036 spill_addr = 0; /* must be done spilling */
1037 last_prologue_pc = next_pc;
1038 }
0927a22b
KB
1039 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1040 {
1041 /* Allow up to one store of each input register. */
1042 instores[rM-32] = 1;
1043 last_prologue_pc = next_pc;
1044 }
1045 }
1046 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1047 {
1048 /* One of
1049 st1 [rN] = rM
1050 st2 [rN] = rM
1051 st4 [rN] = rM
1052 st8 [rN] = rM
1053 Note that the st8 case is handled in the clause above.
1054
1055 Advance over stores of input registers. One store per input
1056 register is permitted. */
1057 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1058 int qp = (int) (instr & 0x0000000003fLL);
1059 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1060 {
1061 instores[rM-32] = 1;
1062 last_prologue_pc = next_pc;
1063 }
1064 }
1065 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1066 {
1067 /* Either
1068 stfs [rN] = fM
1069 or
1070 stfd [rN] = fM
1071
1072 Advance over stores of floating point input registers. Again
1073 one store per register is permitted */
1074 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1075 int qp = (int) (instr & 0x0000000003fLL);
1076 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1077 {
1078 infpstores[fM-8] = 1;
1079 last_prologue_pc = next_pc;
1080 }
16461d7d
KB
1081 }
1082 else if (it == M
1083 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1084 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1085 {
1086 /* st8.spill [rN] = rM
1087 or
1088 st8.spill [rN] = rM, imm9 */
1089 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1090 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1091 int qp = (int) (instr & 0x0000000003fLL);
1092 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1093 {
1094 /* We've found a spill of one of the preserved general purpose
1095 regs. Record the spill address and advance the spill
1096 register if appropriate. */
1097 if (do_fsr_stuff)
b2fb4676 1098 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB
1099 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1100 /* st8.spill [rN] = rM, imm9 */
1101 spill_addr += imm9(instr);
1102 else
1103 spill_addr = 0; /* Done spilling */
1104 last_prologue_pc = next_pc;
1105 }
1106 }
16461d7d
KB
1107
1108 pc = next_pc;
1109 }
1110
1111 if (do_fsr_stuff) {
1112 int i;
1113 CORE_ADDR addr;
3a854e23
KB
1114 int sor, rrb_gr;
1115
1116 /* Extract the size of the rotating portion of the stack
1117 frame and the register rename base from the current
1118 frame marker. */
1119 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1120 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
16461d7d
KB
1121
1122 for (i = 0, addr = frame->extra_info->bsp;
1123 i < frame->extra_info->sof;
1124 i++, addr += 8)
1125 {
1126 if (IS_NaT_COLLECTION_ADDR (addr))
1127 {
1128 addr += 8;
1129 }
3a854e23 1130 if (i < sor)
b2fb4676 1131 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
3a854e23
KB
1132 = addr;
1133 else
b2fb4676 1134 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB
1135
1136 if (i+32 == cfm_reg)
b2fb4676 1137 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
16461d7d 1138 if (i+32 == ret_reg)
b2fb4676 1139 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
16461d7d 1140 if (i+32 == fp_reg)
b2fb4676 1141 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
16461d7d
KB
1142 }
1143 }
1144
1145 if (frame && frame->extra_info) {
1146 frame->extra_info->after_prologue = last_prologue_pc;
1147 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1148 frame->extra_info->fp_reg = fp_reg;
1149 }
1150
1151 return last_prologue_pc;
1152}
1153
1154CORE_ADDR
1155ia64_skip_prologue (CORE_ADDR pc)
1156{
1157 return examine_prologue (pc, pc+1024, 0);
1158}
1159
1160void
1161ia64_frame_init_saved_regs (struct frame_info *frame)
1162{
b2fb4676 1163 if (get_frame_saved_regs (frame))
16461d7d
KB
1164 return;
1165
5a203e44 1166 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
244bc108
KB
1167 {
1168 int regno;
16461d7d 1169
244bc108 1170 frame_saved_regs_zalloc (frame);
16461d7d 1171
b2fb4676 1172 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
244bc108 1173 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
b2fb4676 1174 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
244bc108 1175 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
b2fb4676 1176 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
244bc108
KB
1177 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1178#if 0
b2fb4676 1179 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
244bc108
KB
1180 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1181#endif
b2fb4676 1182 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
244bc108 1183 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
b2fb4676 1184 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
244bc108 1185 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
b2fb4676 1186 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
244bc108 1187 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
b2fb4676 1188 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
244bc108 1189 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
b2fb4676 1190 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
244bc108 1191 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
b2fb4676 1192 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
244bc108
KB
1193 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1194 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1195 if (regno != sp_regnum)
b2fb4676 1196 get_frame_saved_regs (frame)[regno] =
244bc108
KB
1197 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1198 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1199 get_frame_saved_regs (frame)[regno] =
244bc108
KB
1200 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1201 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1202 get_frame_saved_regs (frame)[regno] =
244bc108 1203 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB
1204 }
1205 else
1206 {
244bc108 1207 CORE_ADDR func_start;
16461d7d 1208
50abf9e5
AC
1209 func_start = get_pc_function_start (get_frame_pc (frame));
1210 examine_prologue (func_start, get_frame_pc (frame), frame);
244bc108 1211 }
16461d7d
KB
1212}
1213
1214void
1215ia64_get_saved_register (char *raw_buffer,
1216 int *optimized,
1217 CORE_ADDR *addrp,
1218 struct frame_info *frame,
1219 int regnum,
1220 enum lval_type *lval)
1221{
244bc108 1222 int is_dummy_frame;
16461d7d
KB
1223
1224 if (!target_has_registers)
1225 error ("No registers.");
1226
1227 if (optimized != NULL)
1228 *optimized = 0;
244bc108
KB
1229
1230 if (addrp != NULL)
1231 *addrp = 0;
1232
1233 if (lval != NULL)
1234 *lval = not_lval;
1235
50abf9e5 1236 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), frame->frame, frame->frame);
244bc108
KB
1237
1238 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB
1239 {
1240 /* Handle SP values for all frames but the topmost. */
16461d7d
KB
1241 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1242 }
1243 else if (regnum == IA64_BSP_REGNUM)
1244 {
16461d7d
KB
1245 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1246 frame->extra_info->bsp);
1247 }
1248 else if (regnum == IA64_VFP_REGNUM)
1249 {
1250 /* If the function in question uses an automatic register (r32-r127)
1251 for the frame pointer, it'll be found by ia64_find_saved_register()
1252 above. If the function lacks one of these frame pointers, we can
1253 still provide a value since we know the size of the frame */
1254 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB
1255 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1256 }
1257 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1258 {
2fc3ac7e 1259 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1260 int pr_optim;
1261 enum lval_type pr_lval;
1262 CORE_ADDR pr_addr;
1263 int prN_val;
1264 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1265 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB
1266 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1267 {
1268 /* Fetch predicate register rename base from current frame
1269 marker for this frame. */
1270 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1271
1272 /* Adjust the register number to account for register rotation. */
1273 regnum = IA64_PR16_REGNUM
1274 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1275 }
16461d7d
KB
1276 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1277 regnum - IA64_PR0_REGNUM, 1);
1278 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB
1279 }
1280 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1281 {
2fc3ac7e 1282 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
16461d7d
KB
1283 int unat_optim;
1284 enum lval_type unat_lval;
1285 CORE_ADDR unat_addr;
1286 int unatN_val;
1287 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1288 frame, IA64_UNAT_REGNUM, &unat_lval);
1289 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1290 regnum - IA64_NAT0_REGNUM, 1);
1291 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1292 unatN_val);
16461d7d
KB
1293 }
1294 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1295 {
1296 int natval = 0;
1297 /* Find address of general register corresponding to nat bit we're
1298 interested in. */
244bc108
KB
1299 CORE_ADDR gr_addr = 0;
1300
1301 if (!is_dummy_frame)
1302 {
1303 FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
1304 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1305 + IA64_GR0_REGNUM];
244bc108 1306 }
16461d7d
KB
1307 if (gr_addr)
1308 {
1309 /* Compute address of nat collection bits */
1310 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1311 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1312 CORE_ADDR nat_collection;
1313 int nat_bit;
1314 /* If our nat collection address is bigger than bsp, we have to get
1315 the nat collection from rnat. Otherwise, we fetch the nat
1316 collection from the computed address. */
1317 if (nat_addr >= bsp)
1318 nat_collection = read_register (IA64_RNAT_REGNUM);
1319 else
1320 nat_collection = read_memory_integer (nat_addr, 8);
1321 nat_bit = (gr_addr >> 3) & 0x3f;
1322 natval = (nat_collection >> nat_bit) & 1;
1323 }
1324 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB
1325 }
1326 else if (regnum == IA64_IP_REGNUM)
1327 {
1328 CORE_ADDR pc;
1329 if (frame->next)
1330 {
1331 /* FIXME: Set *addrp, *lval when possible. */
1332 pc = ia64_frame_saved_pc (frame->next);
1333 }
1334 else
1335 {
1336 pc = read_pc ();
1337 }
1338 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1339 }
1340 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1341 {
1342 CORE_ADDR addr = 0;
1343 if (!is_dummy_frame)
1344 {
1345 FRAME_INIT_SAVED_REGS (frame);
b2fb4676 1346 addr = get_frame_saved_regs (frame)[regnum];
244bc108
KB
1347 }
1348
1349 if (addr != 0)
1350 {
1351 if (lval != NULL)
1352 *lval = lval_memory;
1353 if (addrp != NULL)
1354 *addrp = addr;
1355 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1356 }
1357 else
1358 {
1359 /* r32 - r127 must be fetchable via memory. If they aren't,
1360 then the register is unavailable */
1361 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1362 }
16461d7d
KB
1363 }
1364 else
1365 {
3a854e23
KB
1366 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1367 {
1368 /* Fetch floating point register rename base from current
1369 frame marker for this frame. */
1370 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1371
1372 /* Adjust the floating point register number to account for
1373 register rotation. */
1374 regnum = IA64_FR32_REGNUM
1375 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1376 }
1377
bdcdd535
AC
1378 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1379 frame, regnum, lval);
16461d7d 1380 }
16461d7d
KB
1381}
1382
1383/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1384 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1385 and TYPE is the type (which is known to be struct, union or array). */
1386int
1387ia64_use_struct_convention (int gcc_p, struct type *type)
1388{
64a5b29c
KB
1389 struct type *float_elt_type;
1390
1391 /* HFAs are structures (or arrays) consisting entirely of floating
1392 point values of the same length. Up to 8 of these are returned
1393 in registers. Don't use the struct convention when this is the
1394 case. */
1395 float_elt_type = is_float_or_hfa_type (type);
1396 if (float_elt_type != NULL
1397 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1398 return 0;
1399
1400 /* Other structs of length 32 or less are returned in r8-r11.
1401 Don't use the struct convention for those either. */
16461d7d
KB
1402 return TYPE_LENGTH (type) > 32;
1403}
1404
1405void
1406ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1407{
64a5b29c
KB
1408 struct type *float_elt_type;
1409
1410 float_elt_type = is_float_or_hfa_type (type);
1411 if (float_elt_type != NULL)
1412 {
1413 int offset = 0;
1414 int regnum = IA64_FR8_REGNUM;
1415 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1416
1417 while (n-- > 0)
1418 {
1419 ia64_register_convert_to_virtual (regnum, float_elt_type,
1420 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1421 offset += TYPE_LENGTH (float_elt_type);
1422 regnum++;
1423 }
1424 }
16461d7d 1425 else
64a5b29c
KB
1426 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1427 TYPE_LENGTH (type));
16461d7d
KB
1428}
1429
1430/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1431 like this is necessary though since the IA-64 calling conventions specify
1432 that r8 is not preserved. */
1433static CORE_ADDR struct_return_address;
1434
1435CORE_ADDR
1436ia64_extract_struct_value_address (char *regbuf)
1437{
1438 /* FIXME: See above. */
1439 return struct_return_address;
1440}
1441
1442void
1443ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1444{
1445 /* FIXME: See above. */
1446 /* Note that most of the work was done in ia64_push_arguments() */
1447 struct_return_address = addr;
1448}
1449
1450int
1451ia64_frameless_function_invocation (struct frame_info *frame)
1452{
fbad0893
KB
1453 FRAME_INIT_SAVED_REGS (frame);
1454 return (frame->extra_info->mem_stack_frame_size == 0);
16461d7d
KB
1455}
1456
1457CORE_ADDR
1458ia64_saved_pc_after_call (struct frame_info *frame)
1459{
1460 return read_register (IA64_BR0_REGNUM);
1461}
1462
1463CORE_ADDR
1464ia64_frame_args_address (struct frame_info *frame)
1465{
1466 /* frame->frame points at the SP for this frame; But we want the start
1467 of the frame, not the end. Calling frame chain will get his for us. */
1468 return ia64_frame_chain (frame);
1469}
1470
1471CORE_ADDR
1472ia64_frame_locals_address (struct frame_info *frame)
1473{
1474 /* frame->frame points at the SP for this frame; But we want the start
1475 of the frame, not the end. Calling frame chain will get his for us. */
1476 return ia64_frame_chain (frame);
1477}
1478
1479void
1480ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1481{
1482 CORE_ADDR bsp, cfm;
244bc108 1483 int next_frame_is_call_dummy = ((frame->next != NULL)
50abf9e5 1484 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame->next), frame->next->frame,
244bc108 1485 frame->next->frame));
16461d7d
KB
1486
1487 frame->extra_info = (struct frame_extra_info *)
1488 frame_obstack_alloc (sizeof (struct frame_extra_info));
1489
1490 if (frame->next == 0)
1491 {
1492 bsp = read_register (IA64_BSP_REGNUM);
1493 cfm = read_register (IA64_CFM_REGNUM);
1494
1495 }
5a203e44 1496 else if ((get_frame_type (frame->next) == SIGTRAMP_FRAME))
244bc108
KB
1497 {
1498 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1499 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1500 }
1501 else if (next_frame_is_call_dummy)
1502 {
50abf9e5 1503 bsp = deprecated_read_register_dummy (get_frame_pc (frame->next),
135c175f
AC
1504 frame->next->frame,
1505 IA64_BSP_REGNUM);
50abf9e5 1506 cfm = deprecated_read_register_dummy (get_frame_pc (frame->next),
135c175f
AC
1507 frame->next->frame,
1508 IA64_CFM_REGNUM);
244bc108 1509 }
16461d7d
KB
1510 else
1511 {
1512 struct frame_info *frn = frame->next;
16461d7d
KB
1513
1514 FRAME_INIT_SAVED_REGS (frn);
1515
b2fb4676
AC
1516 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1517 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
5a203e44 1518 else if (frn->next && (get_frame_type (frn->next) == SIGTRAMP_FRAME))
244bc108
KB
1519 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1520 else if (frn->next
50abf9e5 1521 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frn->next), frn->next->frame,
244bc108 1522 frn->next->frame))
50abf9e5 1523 cfm = deprecated_read_register_dummy (get_frame_pc (frn->next), frn->next->frame,
135c175f 1524 IA64_PFS_REGNUM);
16461d7d 1525 else
76d689a6 1526 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB
1527
1528 bsp = frn->extra_info->bsp;
1529 }
1530 frame->extra_info->cfm = cfm;
1531 frame->extra_info->sof = cfm & 0x7f;
1532 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108 1533 if (frame->next == 0
5a203e44 1534 || (get_frame_type (frame->next) == SIGTRAMP_FRAME)
244bc108 1535 || next_frame_is_call_dummy)
16461d7d
KB
1536 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1537 else
1538 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1539
1540 frame->extra_info->after_prologue = 0;
1541 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1542 frame->extra_info->fp_reg = 0;
1543}
1544
64a5b29c
KB
1545static int
1546is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1547{
1548 switch (TYPE_CODE (t))
1549 {
1550 case TYPE_CODE_FLT:
1551 if (*etp)
1552 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1553 else
1554 {
1555 *etp = t;
1556 return 1;
1557 }
1558 break;
1559 case TYPE_CODE_ARRAY:
98f96ba1
KB
1560 return
1561 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1562 etp);
64a5b29c
KB
1563 break;
1564 case TYPE_CODE_STRUCT:
1565 {
1566 int i;
1567
1568 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB
1569 if (!is_float_or_hfa_type_recurse
1570 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB
1571 return 0;
1572 return 1;
1573 }
1574 break;
1575 default:
1576 return 0;
1577 break;
1578 }
1579}
1580
1581/* Determine if the given type is one of the floating point types or
1582 and HFA (which is a struct, array, or combination thereof whose
1583 bottom-most elements are all of the same floating point type.) */
1584
1585static struct type *
1586is_float_or_hfa_type (struct type *t)
1587{
1588 struct type *et = 0;
1589
1590 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1591}
1592
1593
98f96ba1
KB
1594/* Return 1 if the alignment of T is such that the next even slot
1595 should be used. Return 0, if the next available slot should
1596 be used. (See section 8.5.1 of the IA-64 Software Conventions
1597 and Runtime manual.) */
1598
1599static int
1600slot_alignment_is_next_even (struct type *t)
1601{
1602 switch (TYPE_CODE (t))
1603 {
1604 case TYPE_CODE_INT:
1605 case TYPE_CODE_FLT:
1606 if (TYPE_LENGTH (t) > 8)
1607 return 1;
1608 else
1609 return 0;
1610 case TYPE_CODE_ARRAY:
1611 return
1612 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1613 case TYPE_CODE_STRUCT:
1614 {
1615 int i;
1616
1617 for (i = 0; i < TYPE_NFIELDS (t); i++)
1618 if (slot_alignment_is_next_even
1619 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1620 return 1;
1621 return 0;
1622 }
1623 default:
1624 return 0;
1625 }
1626}
1627
64a5b29c
KB
1628/* Attempt to find (and return) the global pointer for the given
1629 function.
1630
1631 This is a rather nasty bit of code searchs for the .dynamic section
1632 in the objfile corresponding to the pc of the function we're trying
1633 to call. Once it finds the addresses at which the .dynamic section
1634 lives in the child process, it scans the Elf64_Dyn entries for a
1635 DT_PLTGOT tag. If it finds one of these, the corresponding
1636 d_un.d_ptr value is the global pointer. */
1637
1638static CORE_ADDR
698cb3f0 1639generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1640{
76d689a6 1641 struct obj_section *faddr_sect;
64a5b29c 1642
76d689a6
KB
1643 faddr_sect = find_pc_section (faddr);
1644 if (faddr_sect != NULL)
64a5b29c
KB
1645 {
1646 struct obj_section *osect;
1647
76d689a6 1648 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1649 {
1650 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1651 break;
1652 }
1653
76d689a6 1654 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1655 {
1656 CORE_ADDR addr;
1657
1658 addr = osect->addr;
1659 while (addr < osect->endaddr)
1660 {
1661 int status;
1662 LONGEST tag;
1663 char buf[8];
1664
1665 status = target_read_memory (addr, buf, sizeof (buf));
1666 if (status != 0)
1667 break;
1668 tag = extract_signed_integer (buf, sizeof (buf));
1669
1670 if (tag == DT_PLTGOT)
1671 {
1672 CORE_ADDR global_pointer;
1673
1674 status = target_read_memory (addr + 8, buf, sizeof (buf));
1675 if (status != 0)
1676 break;
1677 global_pointer = extract_address (buf, sizeof (buf));
1678
1679 /* The payoff... */
1680 return global_pointer;
1681 }
1682
1683 if (tag == DT_NULL)
1684 break;
1685
1686 addr += 16;
1687 }
1688 }
1689 }
1690 return 0;
1691}
1692
1693/* Given a function's address, attempt to find (and return) the
1694 corresponding (canonical) function descriptor. Return 0 if
1695 not found. */
1696static CORE_ADDR
1697find_extant_func_descr (CORE_ADDR faddr)
1698{
76d689a6 1699 struct obj_section *faddr_sect;
64a5b29c
KB
1700
1701 /* Return early if faddr is already a function descriptor */
76d689a6
KB
1702 faddr_sect = find_pc_section (faddr);
1703 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB
1704 return faddr;
1705
76d689a6 1706 if (faddr_sect != NULL)
64a5b29c 1707 {
76d689a6
KB
1708 struct obj_section *osect;
1709 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1710 {
1711 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1712 break;
1713 }
1714
76d689a6 1715 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1716 {
1717 CORE_ADDR addr;
1718
1719 addr = osect->addr;
1720 while (addr < osect->endaddr)
1721 {
1722 int status;
1723 LONGEST faddr2;
1724 char buf[8];
1725
1726 status = target_read_memory (addr, buf, sizeof (buf));
1727 if (status != 0)
1728 break;
1729 faddr2 = extract_signed_integer (buf, sizeof (buf));
1730
1731 if (faddr == faddr2)
1732 return addr;
1733
1734 addr += 16;
1735 }
1736 }
1737 }
1738 return 0;
1739}
1740
1741/* Attempt to find a function descriptor corresponding to the
1742 given address. If none is found, construct one on the
1743 stack using the address at fdaptr */
1744
1745static CORE_ADDR
1746find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1747{
1748 CORE_ADDR fdesc;
1749
1750 fdesc = find_extant_func_descr (faddr);
1751
1752 if (fdesc == 0)
1753 {
1754 CORE_ADDR global_pointer;
1755 char buf[16];
1756
1757 fdesc = *fdaptr;
1758 *fdaptr += 16;
1759
698cb3f0 1760 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB
1761
1762 if (global_pointer == 0)
1763 global_pointer = read_register (IA64_GR1_REGNUM);
1764
1765 store_address (buf, 8, faddr);
1766 store_address (buf + 8, 8, global_pointer);
1767
1768 write_memory (fdesc, buf, 16);
1769 }
1770
1771 return fdesc;
1772}
16461d7d
KB
1773
1774CORE_ADDR
ea7c478f 1775ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB
1776 int struct_return, CORE_ADDR struct_addr)
1777{
1778 int argno;
ea7c478f 1779 struct value *arg;
16461d7d
KB
1780 struct type *type;
1781 int len, argoffset;
64a5b29c 1782 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1783 int floatreg;
64a5b29c 1784 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB
1785
1786 nslots = 0;
64a5b29c 1787 nfuncargs = 0;
16461d7d
KB
1788 /* Count the number of slots needed for the arguments */
1789 for (argno = 0; argno < nargs; argno++)
1790 {
1791 arg = args[argno];
1792 type = check_typedef (VALUE_TYPE (arg));
1793 len = TYPE_LENGTH (type);
1794
98f96ba1 1795 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB
1796 nslots++;
1797
64a5b29c
KB
1798 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1799 nfuncargs++;
1800
16461d7d
KB
1801 nslots += (len + 7) / 8;
1802 }
1803
64a5b29c 1804 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB
1805 rseslots = (nslots > 8) ? 8 : nslots;
1806 memslots = nslots - rseslots;
1807
64a5b29c 1808 /* Allocate a new RSE frame */
16461d7d
KB
1809 cfm = read_register (IA64_CFM_REGNUM);
1810
1811 bsp = read_register (IA64_BSP_REGNUM);
1812 bsp = rse_address_add (bsp, cfm & 0x7f);
1813 new_bsp = rse_address_add (bsp, rseslots);
1814 write_register (IA64_BSP_REGNUM, new_bsp);
1815
1816 pfs = read_register (IA64_PFS_REGNUM);
1817 pfs &= 0xc000000000000000LL;
1818 pfs |= (cfm & 0xffffffffffffLL);
1819 write_register (IA64_PFS_REGNUM, pfs);
1820
1821 cfm &= 0xc000000000000000LL;
1822 cfm |= rseslots;
1823 write_register (IA64_CFM_REGNUM, cfm);
1824
64a5b29c
KB
1825 /* We will attempt to find function descriptors in the .opd segment,
1826 but if we can't we'll construct them ourselves. That being the
1827 case, we'll need to reserve space on the stack for them. */
1828 funcdescaddr = sp - nfuncargs * 16;
1829 funcdescaddr &= ~0xfLL;
1830
1831 /* Adjust the stack pointer to it's new value. The calling conventions
1832 require us to have 16 bytes of scratch, plus whatever space is
1833 necessary for the memory slots and our function descriptors */
1834 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB
1835 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1836
64a5b29c
KB
1837 /* Place the arguments where they belong. The arguments will be
1838 either placed in the RSE backing store or on the memory stack.
1839 In addition, floating point arguments or HFAs are placed in
1840 floating point registers. */
16461d7d
KB
1841 slotnum = 0;
1842 floatreg = IA64_FR8_REGNUM;
1843 for (argno = 0; argno < nargs; argno++)
1844 {
64a5b29c
KB
1845 struct type *float_elt_type;
1846
16461d7d
KB
1847 arg = args[argno];
1848 type = check_typedef (VALUE_TYPE (arg));
1849 len = TYPE_LENGTH (type);
64a5b29c
KB
1850
1851 /* Special handling for function parameters */
1852 if (len == 8
1853 && TYPE_CODE (type) == TYPE_CODE_PTR
1854 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1855 {
1856 char val_buf[8];
1857
1858 store_address (val_buf, 8,
1859 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1860 &funcdescaddr));
1861 if (slotnum < rseslots)
1862 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1863 else
1864 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1865 slotnum++;
1866 continue;
1867 }
1868
1869 /* Normal slots */
98f96ba1
KB
1870
1871 /* Skip odd slot if necessary... */
1872 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1873 slotnum++;
98f96ba1 1874
16461d7d
KB
1875 argoffset = 0;
1876 while (len > 0)
1877 {
1878 char val_buf[8];
1879
1880 memset (val_buf, 0, 8);
1881 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1882
1883 if (slotnum < rseslots)
1884 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1885 else
1886 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1887
1888 argoffset += 8;
1889 len -= 8;
1890 slotnum++;
1891 }
64a5b29c
KB
1892
1893 /* Handle floating point types (including HFAs) */
1894 float_elt_type = is_float_or_hfa_type (type);
1895 if (float_elt_type != NULL)
1896 {
1897 argoffset = 0;
1898 len = TYPE_LENGTH (type);
1899 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1900 {
1901 ia64_register_convert_to_raw (
1902 float_elt_type,
1903 floatreg,
1904 VALUE_CONTENTS (arg) + argoffset,
524d7c18 1905 &deprecated_registers[REGISTER_BYTE (floatreg)]);
64a5b29c
KB
1906 floatreg++;
1907 argoffset += TYPE_LENGTH (float_elt_type);
1908 len -= TYPE_LENGTH (float_elt_type);
1909 }
16461d7d
KB
1910 }
1911 }
1912
64a5b29c 1913 /* Store the struct return value in r8 if necessary. */
16461d7d
KB
1914 if (struct_return)
1915 {
524d7c18 1916 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
16461d7d
KB
1917 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1918 struct_addr);
1919 }
1920
64a5b29c 1921 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB
1922 target_store_registers (-1);
1923
1924 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1925 to be defined to call generic_save_dummy_frame_tos(). But at the
1926 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1927 I chose to put this call here instead of using the old mechanisms.
1928 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1929 line
1930
1931 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1932
1933 to ia64_gdbarch_init() and remove the line below. */
1934 generic_save_dummy_frame_tos (sp);
1935
1936 return sp;
1937}
1938
1939CORE_ADDR
1940ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1941{
698cb3f0 1942 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 1943
64a5b29c
KB
1944 if (global_pointer != 0)
1945 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB
1946
1947 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1948 return sp;
1949}
1950
1951void
1952ia64_store_return_value (struct type *type, char *valbuf)
1953{
1954 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1955 {
1956 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
524d7c18 1957 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
16461d7d
KB
1958 target_store_registers (IA64_FR8_REGNUM);
1959 }
1960 else
73937e03
AC
1961 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1962 valbuf, TYPE_LENGTH (type));
16461d7d
KB
1963}
1964
1965void
1966ia64_pop_frame (void)
1967{
1968 generic_pop_current_frame (ia64_pop_frame_regular);
1969}
1970
1971static void
1972ia64_pop_frame_regular (struct frame_info *frame)
1973{
1974 int regno;
1975 CORE_ADDR bsp, cfm, pfs;
1976
1977 FRAME_INIT_SAVED_REGS (frame);
1978
1979 for (regno = 0; regno < ia64_num_regs; regno++)
1980 {
b2fb4676 1981 if (get_frame_saved_regs (frame)[regno]
16461d7d
KB
1982 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1983 && regno != pc_regnum
1984 && regno != sp_regnum
1985 && regno != IA64_PFS_REGNUM
1986 && regno != IA64_CFM_REGNUM
1987 && regno != IA64_BSP_REGNUM
1988 && regno != IA64_BSPSTORE_REGNUM)
1989 {
1990 write_register (regno,
b2fb4676 1991 read_memory_integer (get_frame_saved_regs (frame)[regno],
16461d7d
KB
1992 REGISTER_RAW_SIZE (regno)));
1993 }
1994 }
1995
1996 write_register (sp_regnum, FRAME_CHAIN (frame));
1997 write_pc (FRAME_SAVED_PC (frame));
1998
1999 cfm = read_register (IA64_CFM_REGNUM);
2000
b2fb4676 2001 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
16461d7d 2002 {
b2fb4676 2003 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
16461d7d
KB
2004 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2005 }
2006 else
2007 pfs = read_register (IA64_PFS_REGNUM);
2008
2009 /* Compute the new bsp by *adding* the difference between the
2010 size of the frame and the size of the locals (both wrt the
2011 frame that we're going back to). This seems kind of strange,
2012 especially since it seems like we ought to be subtracting the
ca557f44 2013 size of the locals... and we should; but the Linux kernel
16461d7d
KB
2014 wants bsp to be set at the end of all used registers. It's
2015 likely that this code will need to be revised to accomodate
2016 other operating systems. */
2017 bsp = rse_address_add (frame->extra_info->bsp,
2018 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2019 write_register (IA64_BSP_REGNUM, bsp);
2020
2021 /* FIXME: What becomes of the epilog count in the PFS? */
2022 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2023 write_register (IA64_CFM_REGNUM, cfm);
2024
2025 flush_cached_frames ();
2026}
2027
2028static void
2029ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2030 CORE_ADDR *targ_addr, int *targ_len)
2031{
2032 *targ_addr = memaddr;
2033 *targ_len = nr_bytes;
2034}
2035
244bc108
KB
2036static void
2037process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2038{
2039 int *os_ident_ptr = obj;
2040 const char *name;
2041 unsigned int sectsize;
2042
2043 name = bfd_get_section_name (abfd, sect);
2044 sectsize = bfd_section_size (abfd, sect);
2045 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2046 {
2047 unsigned int name_length, data_length, note_type;
2048 char *note = alloca (sectsize);
2049
2050 bfd_get_section_contents (abfd, sect, note,
2051 (file_ptr) 0, (bfd_size_type) sectsize);
2052
2053 name_length = bfd_h_get_32 (abfd, note);
2054 data_length = bfd_h_get_32 (abfd, note + 4);
2055 note_type = bfd_h_get_32 (abfd, note + 8);
2056
2057 if (name_length == 4 && data_length == 16 && note_type == 1
2058 && strcmp (note + 12, "GNU") == 0)
2059 {
2060 int os_number = bfd_h_get_32 (abfd, note + 16);
2061
2062 /* The case numbers are from abi-tags in glibc */
2063 switch (os_number)
2064 {
2065 case 0 :
2066 *os_ident_ptr = ELFOSABI_LINUX;
2067 break;
244bc108
KB
2068 case 1 :
2069 *os_ident_ptr = ELFOSABI_HURD;
2070 break;
2071 case 2 :
2072 *os_ident_ptr = ELFOSABI_SOLARIS;
2073 break;
244bc108 2074 default :
8e65ff28
AC
2075 internal_error (__FILE__, __LINE__,
2076 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB
2077 break;
2078 }
2079 }
2080 }
2081}
2082
16461d7d
KB
2083static struct gdbarch *
2084ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2085{
2086 struct gdbarch *gdbarch;
244bc108
KB
2087 struct gdbarch_tdep *tdep;
2088 int os_ident;
2089
2090 if (info.abfd != NULL
2091 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2092 {
2093 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2094
ca557f44
AC
2095 /* If os_ident is 0, it is not necessarily the case that we're
2096 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2097 GNU/Linux uses a note section to record OS/ABI info, but
2098 leaves e_ident[EI_OSABI] zero. So we have to check for note
2099 sections too. */
244bc108
KB
2100 if (os_ident == 0)
2101 {
2102 bfd_map_over_sections (info.abfd,
2103 process_note_abi_tag_sections,
2104 &os_ident);
2105 }
2106 }
2107 else
2108 os_ident = -1;
16461d7d 2109
244bc108
KB
2110 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2111 arches != NULL;
2112 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2113 {
57bc8964
KB
2114 tdep = gdbarch_tdep (arches->gdbarch);
2115 if (tdep &&tdep->os_ident == os_ident)
2116 return arches->gdbarch;
244bc108 2117 }
16461d7d 2118
244bc108
KB
2119 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2120 gdbarch = gdbarch_alloc (&info, tdep);
2121 tdep->os_ident = os_ident;
2122
a5afb99f
AC
2123 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2124 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2125 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
d7fa2ae2
KB
2126
2127 /* Set the method of obtaining the sigcontext addresses at which
2128 registers are saved. The method of checking to see if
2129 native_find_global_pointer is nonzero to indicate that we're
2130 on AIX is kind of hokey, but I can't think of a better way
2131 to do it. */
244bc108
KB
2132 if (os_ident == ELFOSABI_LINUX)
2133 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB
2134 else if (native_find_global_pointer != 0)
2135 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB
2136 else
2137 tdep->sigcontext_register_address = 0;
16461d7d 2138
ca557f44
AC
2139 /* We know that GNU/Linux won't have to resort to the
2140 native_find_global_pointer hackery. But that's the only one we
2141 know about so far, so if native_find_global_pointer is set to
2142 something non-zero, then use it. Otherwise fall back to using
2143 generic_elf_find_global_pointer. This arrangement should (in
2144 theory) allow us to cross debug GNU/Linux binaries from an AIX
2145 machine. */
698cb3f0
KB
2146 if (os_ident == ELFOSABI_LINUX)
2147 tdep->find_global_pointer = generic_elf_find_global_pointer;
2148 else if (native_find_global_pointer != 0)
2149 tdep->find_global_pointer = native_find_global_pointer;
2150 else
2151 tdep->find_global_pointer = generic_elf_find_global_pointer;
2152
16461d7d
KB
2153 set_gdbarch_short_bit (gdbarch, 16);
2154 set_gdbarch_int_bit (gdbarch, 32);
2155 set_gdbarch_long_bit (gdbarch, 64);
2156 set_gdbarch_long_long_bit (gdbarch, 64);
2157 set_gdbarch_float_bit (gdbarch, 32);
2158 set_gdbarch_double_bit (gdbarch, 64);
2159 set_gdbarch_long_double_bit (gdbarch, 64);
2160 set_gdbarch_ptr_bit (gdbarch, 64);
2161
2162 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2163 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2164 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2165 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2166 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB
2167
2168 set_gdbarch_register_name (gdbarch, ia64_register_name);
2169 set_gdbarch_register_size (gdbarch, 8);
2170 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2171 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2172 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2173 set_gdbarch_max_register_raw_size (gdbarch, 16);
2174 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2175 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2176 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2177
2178 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2179
2180 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2181 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2182
2183 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2184
2185 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 2186 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB
2187 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2188
2189 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2190 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2191
2192 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2193 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2194 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2195
2196 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
26e9b323 2197 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
16461d7d
KB
2198
2199 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
ebba8386 2200 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
26e9b323 2201 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
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2202
2203 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2204 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2205 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2206 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2207 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2208
2209 /* Settings for calling functions in the inferior. */
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2210 set_gdbarch_call_dummy_length (gdbarch, 0);
2211 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2212 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2213 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2214
2215 set_gdbarch_call_dummy_p (gdbarch, 1);
2216 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2217 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2218 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2219 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2220 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2221 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2222
2223 /* We won't necessarily have a frame pointer and even if we do,
2224 it winds up being extraordinarly messy when attempting to find
2225 the frame chain. So for the purposes of creating frames (which
2226 is all read_fp() is used for), simply use the stack pointer value
2227 instead. */
2228 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
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2229
2230 /* Settings that should be unnecessary. */
2231 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2232
2233 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2234 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2235
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2236 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2237 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2238 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
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2239 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2240 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2241 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2242
2243 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2244 set_gdbarch_function_start_offset (gdbarch, 0);
4156bb53 2245 set_gdbarch_frame_args_skip (gdbarch, 0);
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2246
2247 set_gdbarch_remote_translate_xfer_address (
2248 gdbarch, ia64_remote_translate_xfer_address);
2249
2250 return gdbarch;
2251}
2252
2253void
2254_initialize_ia64_tdep (void)
2255{
2256 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2257
2258 tm_print_insn = print_insn_ia64;
2259 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2260}
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