2003-06-13 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
ca557f44 2
51603483 3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
16461d7d
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d 27#include "floatformat.h"
4e052eda 28#include "regcache.h"
d16aafd8 29#include "doublest.h"
fd0407d6 30#include "value.h"
bd1ce8ba 31#include "gdb_assert.h"
16461d7d
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32#include "objfiles.h"
33#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 34#include "elf-bfd.h"
16461d7d 35
698cb3f0
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36/* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47/* An enumeration of the different IA-64 instruction types. */
48
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49typedef enum instruction_type
50{
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59} instruction_type;
60
61/* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76#define SLOT_MULTIPLIER 1
77
78/* Length in bytes of an instruction bundle */
79
80#define BUNDLE_LEN 16
81
d7fa2ae2 82/* FIXME: These extern declarations should go in ia64-tdep.h. */
244bc108 83extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
d7fa2ae2 84extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
244bc108 85
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86static gdbarch_init_ftype ia64_gdbarch_init;
87
88static gdbarch_register_name_ftype ia64_register_name;
89static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92static gdbarch_register_byte_ftype ia64_register_byte;
93static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
16461d7d 94static gdbarch_skip_prologue_ftype ia64_skip_prologue;
26e9b323
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95static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
96static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
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97static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
98static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
6913c89a 99static gdbarch_deprecated_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 100static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 101static struct type *is_float_or_hfa_type (struct type *t);
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102
103static int ia64_num_regs = 590;
104
105static int pc_regnum = IA64_IP_REGNUM;
106static int sp_regnum = IA64_GR12_REGNUM;
107static int fp_regnum = IA64_VFP_REGNUM;
108static int lr_regnum = IA64_VRAP_REGNUM;
109
110static LONGEST ia64_call_dummy_words[] = {0};
111
112/* Array of register names; There should be ia64_num_regs strings in
113 the initializer. */
114
115static char *ia64_register_names[] =
116{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
117 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
118 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
119 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
120 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
121 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
122 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
123 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
124 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
125 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
126 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
127 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
128 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
129 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
130 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
131 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
132
133 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
134 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
135 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
136 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
137 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
138 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
139 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
140 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
141 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
142 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
143 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
144 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
145 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
146 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
147 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
148 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
149
150 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
151 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
152 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
153 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
154 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
155 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
156 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
157 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
158
159 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
160
161 "vfp", "vrap",
162
163 "pr", "ip", "psr", "cfm",
164
165 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
166 "", "", "", "", "", "", "", "",
167 "rsc", "bsp", "bspstore", "rnat",
168 "", "fcr", "", "",
169 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
170 "ccv", "", "", "", "unat", "", "", "",
171 "fpsr", "", "", "", "itc",
172 "", "", "", "", "", "", "", "", "", "",
173 "", "", "", "", "", "", "", "", "",
174 "pfs", "lc", "ec",
175 "", "", "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "", "",
181 "",
182 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
183 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
184 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
185 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
186 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
187 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
188 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
189 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
190 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
191 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
192 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
193 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
194 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
195 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
196 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
197 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
198};
199
200struct frame_extra_info
244bc108
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201 {
202 CORE_ADDR bsp; /* points at r32 for the current frame */
203 CORE_ADDR cfm; /* cfm value for current frame */
204 int sof; /* Size of frame (decoded from cfm value) */
205 int sol; /* Size of locals (decoded from cfm value) */
206 CORE_ADDR after_prologue;
207 /* Address of first instruction after the last
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208 prologue instruction; Note that there may
209 be instructions from the function's body
210 intermingled with the prologue. */
244bc108
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211 int mem_stack_frame_size;
212 /* Size of the memory stack frame (may be zero),
16461d7d 213 or -1 if it has not been determined yet. */
244bc108
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214 int fp_reg; /* Register number (if any) used a frame pointer
215 for this frame. 0 if no register is being used
16461d7d 216 as the frame pointer. */
244bc108
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217 };
218
219struct gdbarch_tdep
220 {
221 int os_ident; /* From the ELF header, one of the ELFOSABI_
ef58a6ac 222 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
244bc108
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223 etc. */
224 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
225 /* OS specific function which, given a frame address
226 and register number, returns the offset to the
227 given register from the start of the frame. */
698cb3f0 228 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
244bc108
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229 };
230
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231#define SIGCONTEXT_REGISTER_ADDRESS \
232 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
233#define FIND_GLOBAL_POINTER \
234 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
16461d7d 235
fa88f677 236static const char *
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237ia64_register_name (int reg)
238{
239 return ia64_register_names[reg];
240}
241
242int
243ia64_register_raw_size (int reg)
244{
245 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
246}
247
248int
249ia64_register_virtual_size (int reg)
250{
251 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
252}
253
254/* Return true iff register N's virtual format is different from
255 its raw format. */
a78f21af 256static int
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257ia64_register_convertible (int nr)
258{
259 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
260}
261
262const struct floatformat floatformat_ia64_ext =
263{
264 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
265 floatformat_intbit_yes
266};
267
a78f21af 268static void
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269ia64_register_convert_to_virtual (int regnum, struct type *type,
270 char *from, char *to)
271{
272 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
273 {
274 DOUBLEST val;
275 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
f1908289 276 deprecated_store_floating (to, TYPE_LENGTH(type), val);
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277 }
278 else
279 error("ia64_register_convert_to_virtual called with non floating point register number");
280}
281
a78f21af 282static void
16461d7d 283ia64_register_convert_to_raw (struct type *type, int regnum,
781a750d 284 const char *from, char *to)
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285{
286 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
287 {
f1908289 288 DOUBLEST val = deprecated_extract_floating (from, TYPE_LENGTH(type));
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289 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
290 }
291 else
292 error("ia64_register_convert_to_raw called with non floating point register number");
293}
294
295struct type *
296ia64_register_virtual_type (int reg)
297{
298 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
299 return builtin_type_long_double;
300 else
301 return builtin_type_long;
302}
303
304int
305ia64_register_byte (int reg)
306{
307 return (8 * reg) +
308 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
309}
310
244bc108
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311/* Read the given register from a sigcontext structure in the
312 specified frame. */
313
314static CORE_ADDR
315read_sigcontext_register (struct frame_info *frame, int regnum)
316{
317 CORE_ADDR regaddr;
318
319 if (frame == NULL)
8e65ff28
AC
320 internal_error (__FILE__, __LINE__,
321 "read_sigcontext_register: NULL frame");
5a203e44 322 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
8e65ff28 323 internal_error (__FILE__, __LINE__,
5a203e44 324 "read_sigcontext_register: frame not a signal trampoline");
244bc108 325 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
8e65ff28
AC
326 internal_error (__FILE__, __LINE__,
327 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
244bc108 328
1e2330ba 329 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
244bc108
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330 if (regaddr)
331 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
332 else
8e65ff28
AC
333 internal_error (__FILE__, __LINE__,
334 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
244bc108
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335}
336
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337/* Extract ``len'' bits from an instruction bundle starting at
338 bit ``from''. */
339
244bc108 340static long long
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341extract_bit_field (char *bundle, int from, int len)
342{
343 long long result = 0LL;
344 int to = from + len;
345 int from_byte = from / 8;
346 int to_byte = to / 8;
347 unsigned char *b = (unsigned char *) bundle;
348 unsigned char c;
349 int lshift;
350 int i;
351
352 c = b[from_byte];
353 if (from_byte == to_byte)
354 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
355 result = c >> (from % 8);
356 lshift = 8 - (from % 8);
357
358 for (i = from_byte+1; i < to_byte; i++)
359 {
360 result |= ((long long) b[i]) << lshift;
361 lshift += 8;
362 }
363
364 if (from_byte < to_byte && (to % 8 != 0))
365 {
366 c = b[to_byte];
367 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
368 result |= ((long long) c) << lshift;
369 }
370
371 return result;
372}
373
374/* Replace the specified bits in an instruction bundle */
375
244bc108 376static void
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377replace_bit_field (char *bundle, long long val, int from, int len)
378{
379 int to = from + len;
380 int from_byte = from / 8;
381 int to_byte = to / 8;
382 unsigned char *b = (unsigned char *) bundle;
383 unsigned char c;
384
385 if (from_byte == to_byte)
386 {
387 unsigned char left, right;
388 c = b[from_byte];
389 left = (c >> (to % 8)) << (to % 8);
390 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
391 c = (unsigned char) (val & 0xff);
392 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
393 c |= right | left;
394 b[from_byte] = c;
395 }
396 else
397 {
398 int i;
399 c = b[from_byte];
400 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
401 c = c | (val << (from % 8));
402 b[from_byte] = c;
403 val >>= 8 - from % 8;
404
405 for (i = from_byte+1; i < to_byte; i++)
406 {
407 c = val & 0xff;
408 val >>= 8;
409 b[i] = c;
410 }
411
412 if (to % 8 != 0)
413 {
414 unsigned char cv = (unsigned char) val;
415 c = b[to_byte];
416 c = c >> (to % 8) << (to % 8);
417 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
418 b[to_byte] = c;
419 }
420 }
421}
422
423/* Return the contents of slot N (for N = 0, 1, or 2) in
424 and instruction bundle */
425
244bc108 426static long long
2fc3ac7e 427slotN_contents (char *bundle, int slotnum)
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428{
429 return extract_bit_field (bundle, 5+41*slotnum, 41);
430}
431
432/* Store an instruction in an instruction bundle */
433
244bc108 434static void
2fc3ac7e 435replace_slotN_contents (char *bundle, long long instr, int slotnum)
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436{
437 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
438}
439
64a5b29c 440static enum instruction_type template_encoding_table[32][3] =
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441{
442 { M, I, I }, /* 00 */
443 { M, I, I }, /* 01 */
444 { M, I, I }, /* 02 */
445 { M, I, I }, /* 03 */
446 { M, L, X }, /* 04 */
447 { M, L, X }, /* 05 */
448 { undefined, undefined, undefined }, /* 06 */
449 { undefined, undefined, undefined }, /* 07 */
450 { M, M, I }, /* 08 */
451 { M, M, I }, /* 09 */
452 { M, M, I }, /* 0A */
453 { M, M, I }, /* 0B */
454 { M, F, I }, /* 0C */
455 { M, F, I }, /* 0D */
456 { M, M, F }, /* 0E */
457 { M, M, F }, /* 0F */
458 { M, I, B }, /* 10 */
459 { M, I, B }, /* 11 */
460 { M, B, B }, /* 12 */
461 { M, B, B }, /* 13 */
462 { undefined, undefined, undefined }, /* 14 */
463 { undefined, undefined, undefined }, /* 15 */
464 { B, B, B }, /* 16 */
465 { B, B, B }, /* 17 */
466 { M, M, B }, /* 18 */
467 { M, M, B }, /* 19 */
468 { undefined, undefined, undefined }, /* 1A */
469 { undefined, undefined, undefined }, /* 1B */
470 { M, F, B }, /* 1C */
471 { M, F, B }, /* 1D */
472 { undefined, undefined, undefined }, /* 1E */
473 { undefined, undefined, undefined }, /* 1F */
474};
475
476/* Fetch and (partially) decode an instruction at ADDR and return the
477 address of the next instruction to fetch. */
478
479static CORE_ADDR
480fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
481{
482 char bundle[BUNDLE_LEN];
483 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
484 long long template;
485 int val;
486
c26e1c2b
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487 /* Warn about slot numbers greater than 2. We used to generate
488 an error here on the assumption that the user entered an invalid
489 address. But, sometimes GDB itself requests an invalid address.
490 This can (easily) happen when execution stops in a function for
491 which there are no symbols. The prologue scanner will attempt to
492 find the beginning of the function - if the nearest symbol
493 happens to not be aligned on a bundle boundary (16 bytes), the
494 resulting starting address will cause GDB to think that the slot
495 number is too large.
496
497 So we warn about it and set the slot number to zero. It is
498 not necessarily a fatal condition, particularly if debugging
499 at the assembly language level. */
16461d7d 500 if (slotnum > 2)
c26e1c2b
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501 {
502 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
503 "Using slot 0 instead");
504 slotnum = 0;
505 }
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506
507 addr &= ~0x0f;
508
509 val = target_read_memory (addr, bundle, BUNDLE_LEN);
510
511 if (val != 0)
512 return 0;
513
514 *instr = slotN_contents (bundle, slotnum);
515 template = extract_bit_field (bundle, 0, 5);
516 *it = template_encoding_table[(int)template][slotnum];
517
64a5b29c 518 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB
519 addr += 16;
520 else
521 addr += (slotnum + 1) * SLOT_MULTIPLIER;
522
523 return addr;
524}
525
526/* There are 5 different break instructions (break.i, break.b,
527 break.m, break.f, and break.x), but they all have the same
528 encoding. (The five bit template in the low five bits of the
529 instruction bundle distinguishes one from another.)
530
531 The runtime architecture manual specifies that break instructions
532 used for debugging purposes must have the upper two bits of the 21
533 bit immediate set to a 0 and a 1 respectively. A breakpoint
534 instruction encodes the most significant bit of its 21 bit
535 immediate at bit 36 of the 41 bit instruction. The penultimate msb
536 is at bit 25 which leads to the pattern below.
537
538 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
539 it turns out that 0x80000 was used as the syscall break in the early
540 simulators. So I changed the pattern slightly to do "break.i 0x080001"
541 instead. But that didn't work either (I later found out that this
542 pattern was used by the simulator that I was using.) So I ended up
543 using the pattern seen below. */
544
545#if 0
aaab4dba 546#define IA64_BREAKPOINT 0x00002000040LL
16461d7d 547#endif
aaab4dba 548#define IA64_BREAKPOINT 0x00003333300LL
16461d7d
KB
549
550static int
551ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
552{
553 char bundle[BUNDLE_LEN];
554 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
555 long long instr;
556 int val;
126fa72d 557 int template;
16461d7d
KB
558
559 if (slotnum > 2)
560 error("Can't insert breakpoint for slot numbers greater than 2.");
561
562 addr &= ~0x0f;
563
564 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
565
566 /* Check for L type instruction in 2nd slot, if present then
567 bump up the slot number to the 3rd slot */
568 template = extract_bit_field (bundle, 0, 5);
569 if (slotnum == 1 && template_encoding_table[template][1] == L)
570 {
571 slotnum = 2;
572 }
573
16461d7d
KB
574 instr = slotN_contents (bundle, slotnum);
575 memcpy(contents_cache, &instr, sizeof(instr));
aaab4dba 576 replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
16461d7d
KB
577 if (val == 0)
578 target_write_memory (addr, bundle, BUNDLE_LEN);
579
580 return val;
581}
582
583static int
584ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
585{
586 char bundle[BUNDLE_LEN];
587 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
588 long long instr;
589 int val;
126fa72d 590 int template;
16461d7d
KB
591
592 addr &= ~0x0f;
593
594 val = target_read_memory (addr, bundle, BUNDLE_LEN);
126fa72d
PS
595
596 /* Check for L type instruction in 2nd slot, if present then
597 bump up the slot number to the 3rd slot */
598 template = extract_bit_field (bundle, 0, 5);
599 if (slotnum == 1 && template_encoding_table[template][1] == L)
600 {
601 slotnum = 2;
602 }
603
16461d7d
KB
604 memcpy (&instr, contents_cache, sizeof instr);
605 replace_slotN_contents (bundle, instr, slotnum);
606 if (val == 0)
607 target_write_memory (addr, bundle, BUNDLE_LEN);
608
609 return val;
610}
611
612/* We don't really want to use this, but remote.c needs to call it in order
613 to figure out if Z-packets are supported or not. Oh, well. */
f4f9705a 614const unsigned char *
fba45db2 615ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
16461d7d
KB
616{
617 static unsigned char breakpoint[] =
618 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
619 *lenptr = sizeof (breakpoint);
620#if 0
621 *pcptr &= ~0x0f;
622#endif
623 return breakpoint;
624}
625
bd1ce8ba
AC
626static CORE_ADDR
627ia64_read_fp (void)
628{
629 /* We won't necessarily have a frame pointer and even if we do, it
630 winds up being extraordinarly messy when attempting to find the
631 frame chain. So for the purposes of creating frames (which is
632 all deprecated_read_fp() is used for), simply use the stack
633 pointer value instead. */
634 gdb_assert (SP_REGNUM >= 0);
635 return read_register (SP_REGNUM);
636}
637
a78f21af 638static CORE_ADDR
39f77062 639ia64_read_pc (ptid_t ptid)
16461d7d 640{
39f77062
KB
641 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
642 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
16461d7d
KB
643 int slot_num = (psr_value >> 41) & 3;
644
645 return pc_value | (slot_num * SLOT_MULTIPLIER);
646}
647
a78f21af 648static void
39f77062 649ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
16461d7d
KB
650{
651 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
39f77062 652 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
16461d7d
KB
653 psr_value &= ~(3LL << 41);
654 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
655
656 new_pc &= ~0xfLL;
657
39f77062
KB
658 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
659 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
16461d7d
KB
660}
661
662#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
663
664/* Returns the address of the slot that's NSLOTS slots away from
665 the address ADDR. NSLOTS may be positive or negative. */
666static CORE_ADDR
667rse_address_add(CORE_ADDR addr, int nslots)
668{
669 CORE_ADDR new_addr;
670 int mandatory_nat_slots = nslots / 63;
671 int direction = nslots < 0 ? -1 : 1;
672
673 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
674
675 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
676 new_addr += 8 * direction;
677
678 if (IS_NaT_COLLECTION_ADDR(new_addr))
679 new_addr += 8 * direction;
680
681 return new_addr;
682}
683
684/* The IA-64 frame chain is a bit odd. We won't always have a frame
685 pointer, so we use the SP value as the FP for the purpose of
686 creating a frame. There is sometimes a register (not fixed) which
687 is used as a frame pointer. When this register exists, it is not
688 especially hard to determine which one is being used. It isn't
689 even really hard to compute the frame chain, but it can be
690 computationally expensive. So, instead of making life difficult
691 (and slow), we pick a more convenient representation of the frame
8227c0ff 692 chain, knowing that we'll have to make some small adjustments in
0ba6dca9
AC
693 other places. (E.g, note that deprecated_read_fp() is actually
694 read_sp() in ia64_gdbarch_init() below.)
16461d7d
KB
695
696 Okay, so what is the frame chain exactly? It'll be the SP value
697 at the time that the function in question was entered.
698
699 Note that this *should* actually the frame pointer for the current
700 function! But as I note above, if we were to attempt to find the
701 address of the beginning of the previous frame, we'd waste a lot
702 of cycles for no good reason. So instead, we simply choose to
703 represent the frame chain as the end of the previous frame instead
704 of the beginning. */
705
a78f21af 706static CORE_ADDR
16461d7d
KB
707ia64_frame_chain (struct frame_info *frame)
708{
5a203e44 709 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 710 return read_sigcontext_register (frame, sp_regnum);
1e2330ba
AC
711 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
712 get_frame_base (frame),
713 get_frame_base (frame)))
714 return get_frame_base (frame);
16461d7d 715 else
244bc108 716 {
f30ee0bc 717 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
718 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
719 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
244bc108 720 else
1e2330ba 721 return (get_frame_base (frame)
da50a4b7 722 + get_frame_extra_info (frame)->mem_stack_frame_size);
244bc108 723 }
16461d7d
KB
724}
725
a78f21af 726static CORE_ADDR
16461d7d
KB
727ia64_frame_saved_pc (struct frame_info *frame)
728{
5a203e44 729 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
244bc108 730 return read_sigcontext_register (frame, pc_regnum);
1e2330ba
AC
731 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
732 get_frame_base (frame),
733 get_frame_base (frame)))
734 return deprecated_read_register_dummy (get_frame_pc (frame),
735 get_frame_base (frame), pc_regnum);
244bc108
KB
736 else
737 {
f30ee0bc 738 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d 739
b2fb4676
AC
740 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
741 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
11c02a10
AC
742 else if (get_next_frame (frame)
743 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
744 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
244bc108
KB
745 else /* either frameless, or not far enough along in the prologue... */
746 return ia64_saved_pc_after_call (frame);
747 }
16461d7d
KB
748}
749
58ab00f9
KB
750/* Limit the number of skipped non-prologue instructions since examining
751 of the prologue is expensive. */
5ea2bd7f 752static int max_skip_non_prologue_insns = 40;
58ab00f9
KB
753
754/* Given PC representing the starting address of a function, and
755 LIM_PC which is the (sloppy) limit to which to scan when looking
756 for a prologue, attempt to further refine this limit by using
757 the line data in the symbol table. If successful, a better guess
758 on where the prologue ends is returned, otherwise the previous
759 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
760 which will be set to indicate whether the returned limit may be
761 used with no further scanning in the event that the function is
762 frameless. */
763
764static CORE_ADDR
765refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
766{
767 struct symtab_and_line prologue_sal;
768 CORE_ADDR start_pc = pc;
769
770 /* Start off not trusting the limit. */
771 *trust_limit = 0;
772
773 prologue_sal = find_pc_line (pc, 0);
774 if (prologue_sal.line != 0)
775 {
776 int i;
777 CORE_ADDR addr = prologue_sal.end;
778
779 /* Handle the case in which compiler's optimizer/scheduler
780 has moved instructions into the prologue. We scan ahead
781 in the function looking for address ranges whose corresponding
782 line number is less than or equal to the first one that we
783 found for the function. (It can be less than when the
784 scheduler puts a body instruction before the first prologue
785 instruction.) */
786 for (i = 2 * max_skip_non_prologue_insns;
787 i > 0 && (lim_pc == 0 || addr < lim_pc);
788 i--)
789 {
790 struct symtab_and_line sal;
791
792 sal = find_pc_line (addr, 0);
793 if (sal.line == 0)
794 break;
795 if (sal.line <= prologue_sal.line
796 && sal.symtab == prologue_sal.symtab)
797 {
798 prologue_sal = sal;
799 }
800 addr = sal.end;
801 }
802
803 if (lim_pc == 0 || prologue_sal.end < lim_pc)
804 {
805 lim_pc = prologue_sal.end;
806 if (start_pc == get_pc_function_start (lim_pc))
807 *trust_limit = 1;
808 }
809 }
810 return lim_pc;
811}
812
16461d7d
KB
813#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
814 || (8 <= (_regnum_) && (_regnum_) <= 11) \
815 || (14 <= (_regnum_) && (_regnum_) <= 31))
816#define imm9(_instr_) \
817 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
818 | (((_instr_) & 0x00008000000LL) >> 20) \
819 | (((_instr_) & 0x00000001fc0LL) >> 6))
820
821static CORE_ADDR
822examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
823{
824 CORE_ADDR next_pc;
825 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB
826 instruction_type it;
827 long long instr;
828 int do_fsr_stuff = 0;
829
830 int cfm_reg = 0;
831 int ret_reg = 0;
832 int fp_reg = 0;
833 int unat_save_reg = 0;
834 int pr_save_reg = 0;
835 int mem_stack_frame_size = 0;
836 int spill_reg = 0;
837 CORE_ADDR spill_addr = 0;
0927a22b
KB
838 char instores[8];
839 char infpstores[8];
5ea2bd7f 840 char reg_contents[256];
58ab00f9 841 int trust_limit;
5ea2bd7f 842 int frameless = 0;
0927a22b
KB
843
844 memset (instores, 0, sizeof instores);
845 memset (infpstores, 0, sizeof infpstores);
5ea2bd7f 846 memset (reg_contents, 0, sizeof reg_contents);
16461d7d 847
b2fb4676 848 if (frame && !get_frame_saved_regs (frame))
16461d7d
KB
849 {
850 frame_saved_regs_zalloc (frame);
851 do_fsr_stuff = 1;
852 }
853
854 if (frame
855 && !do_fsr_stuff
da50a4b7
AC
856 && get_frame_extra_info (frame)->after_prologue != 0
857 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
858 return get_frame_extra_info (frame)->after_prologue;
16461d7d 859
58ab00f9 860 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
16461d7d 861 next_pc = fetch_instruction (pc, &it, &instr);
5ea2bd7f
JJ
862
863 /* We want to check if we have a recognizable function start before we
864 look ahead for a prologue. */
16461d7d
KB
865 if (pc < lim_pc && next_pc
866 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
867 {
5ea2bd7f 868 /* alloc - start of a regular function. */
16461d7d
KB
869 int sor = (int) ((instr & 0x00078000000LL) >> 27);
870 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
871 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
872 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
873 we could compare against the size given to us via the cfm as
874 either a sanity check or possibly to see if the frame has been
875 changed by a later alloc instruction... */
876 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
877 cfm_reg = rN;
878 last_prologue_pc = next_pc;
879 pc = next_pc;
880 }
881 else
58ab00f9 882 {
5ea2bd7f
JJ
883 /* Look for a leaf routine. */
884 if (pc < lim_pc && next_pc
885 && (it == I || it == M)
886 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
887 {
888 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
889 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
890 | ((instr & 0x001f8000000LL) >> 20)
891 | ((instr & 0x000000fe000LL) >> 13));
892 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
893 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
894 int qp = (int) (instr & 0x0000000003fLL);
895 if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
896 {
897 /* mov r2, r12 - beginning of leaf routine */
898 fp_reg = rN;
899 frameless = 1;
900 last_prologue_pc = next_pc;
901 }
902 }
903
904 /* If we don't recognize a regular function or leaf routine, we are
905 done. */
906 if (!fp_reg)
907 {
908 pc = lim_pc;
909 if (trust_limit)
910 last_prologue_pc = lim_pc;
911 }
58ab00f9 912 }
16461d7d
KB
913
914 /* Loop, looking for prologue instructions, keeping track of
915 where preserved registers were spilled. */
916 while (pc < lim_pc)
917 {
918 next_pc = fetch_instruction (pc, &it, &instr);
919 if (next_pc == 0)
920 break;
921
902d7086
KB
922 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
923 || ((instr & 0x3fLL) != 0LL))
0927a22b 924 {
902d7086
KB
925 /* Exit loop upon hitting a non-nop branch instruction
926 or a predicated instruction. */
5ea2bd7f
JJ
927 if (trust_limit)
928 lim_pc = pc;
0927a22b
KB
929 break;
930 }
931 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB
932 {
933 /* Move from BR */
934 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
935 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
936 int qp = (int) (instr & 0x0000000003f);
937
938 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
939 {
940 ret_reg = rN;
941 last_prologue_pc = next_pc;
942 }
943 }
944 else if ((it == I || it == M)
945 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
946 {
947 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
948 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
949 | ((instr & 0x001f8000000LL) >> 20)
950 | ((instr & 0x000000fe000LL) >> 13));
951 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
952 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
953 int qp = (int) (instr & 0x0000000003fLL);
954
955 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
956 {
957 /* mov rN, r12 */
958 fp_reg = rN;
959 last_prologue_pc = next_pc;
960 }
961 else if (qp == 0 && rN == 12 && rM == 12)
962 {
963 /* adds r12, -mem_stack_frame_size, r12 */
964 mem_stack_frame_size -= imm;
965 last_prologue_pc = next_pc;
966 }
967 else if (qp == 0 && rN == 2
968 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
969 {
970 /* adds r2, spilloffset, rFramePointer
971 or
972 adds r2, spilloffset, r12
973
974 Get ready for stf.spill or st8.spill instructions.
975 The address to start spilling at is loaded into r2.
976 FIXME: Why r2? That's what gcc currently uses; it
977 could well be different for other compilers. */
978
979 /* Hmm... whether or not this will work will depend on
980 where the pc is. If it's still early in the prologue
981 this'll be wrong. FIXME */
1e2330ba 982 spill_addr = (frame ? get_frame_base (frame) : 0)
16461d7d
KB
983 + (rM == 12 ? 0 : mem_stack_frame_size)
984 + imm;
985 spill_reg = rN;
986 last_prologue_pc = next_pc;
987 }
5ea2bd7f
JJ
988 else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM] &&
989 rN < 256 && imm == 0)
990 {
991 /* mov rN, rM where rM is an input register */
992 reg_contents[rN] = rM;
993 last_prologue_pc = next_pc;
994 }
995 else if (frameless && qp == 0 && rN == fp_reg && imm == 0 &&
996 rM == 2)
997 {
998 /* mov r12, r2 */
999 last_prologue_pc = next_pc;
1000 break;
1001 }
16461d7d
KB
1002 }
1003 else if (it == M
1004 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1005 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
1006 {
1007 /* stf.spill [rN] = fM, imm9
1008 or
1009 stf.spill [rN] = fM */
1010
1011 int imm = imm9(instr);
1012 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1013 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1014 int qp = (int) (instr & 0x0000000003fLL);
1015 if (qp == 0 && rN == spill_reg && spill_addr != 0
1016 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
1017 {
1018 if (do_fsr_stuff)
b2fb4676 1019 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
16461d7d
KB
1020
1021 if ((instr & 0x1efc0000000) == 0x0eec0000000)
1022 spill_addr += imm;
1023 else
1024 spill_addr = 0; /* last one; must be done */
1025 last_prologue_pc = next_pc;
1026 }
1027 }
1028 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
1029 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
1030 {
1031 /* mov.m rN = arM
1032 or
1033 mov.i rN = arM */
1034
1035 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
1036 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1037 int qp = (int) (instr & 0x0000000003fLL);
1038 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
1039 {
1040 /* We have something like "mov.m r3 = ar.unat". Remember the
1041 r3 (or whatever) and watch for a store of this register... */
1042 unat_save_reg = rN;
1043 last_prologue_pc = next_pc;
1044 }
1045 }
1046 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
1047 {
1048 /* mov rN = pr */
1049 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1050 int qp = (int) (instr & 0x0000000003fLL);
1051 if (qp == 0 && isScratch (rN))
1052 {
1053 pr_save_reg = rN;
1054 last_prologue_pc = next_pc;
1055 }
1056 }
1057 else if (it == M
1058 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1059 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1060 {
1061 /* st8 [rN] = rM
1062 or
1063 st8 [rN] = rM, imm9 */
1064 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1065 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1066 int qp = (int) (instr & 0x0000000003fLL);
5ea2bd7f 1067 int indirect = rM < 256 ? reg_contents[rM] : 0;
16461d7d
KB
1068 if (qp == 0 && rN == spill_reg && spill_addr != 0
1069 && (rM == unat_save_reg || rM == pr_save_reg))
1070 {
1071 /* We've found a spill of either the UNAT register or the PR
1072 register. (Well, not exactly; what we've actually found is
1073 a spill of the register that UNAT or PR was moved to).
1074 Record that fact and move on... */
1075 if (rM == unat_save_reg)
1076 {
1077 /* Track UNAT register */
1078 if (do_fsr_stuff)
b2fb4676 1079 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
16461d7d
KB
1080 unat_save_reg = 0;
1081 }
1082 else
1083 {
1084 /* Track PR register */
1085 if (do_fsr_stuff)
b2fb4676 1086 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
16461d7d
KB
1087 pr_save_reg = 0;
1088 }
1089 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1090 /* st8 [rN] = rM, imm9 */
1091 spill_addr += imm9(instr);
1092 else
1093 spill_addr = 0; /* must be done spilling */
1094 last_prologue_pc = next_pc;
1095 }
0927a22b
KB
1096 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1097 {
1098 /* Allow up to one store of each input register. */
1099 instores[rM-32] = 1;
1100 last_prologue_pc = next_pc;
1101 }
5ea2bd7f
JJ
1102 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1103 !instores[indirect-32])
1104 {
1105 /* Allow an indirect store of an input register. */
1106 instores[indirect-32] = 1;
1107 last_prologue_pc = next_pc;
1108 }
0927a22b
KB
1109 }
1110 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1111 {
1112 /* One of
1113 st1 [rN] = rM
1114 st2 [rN] = rM
1115 st4 [rN] = rM
1116 st8 [rN] = rM
1117 Note that the st8 case is handled in the clause above.
1118
1119 Advance over stores of input registers. One store per input
1120 register is permitted. */
1121 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1122 int qp = (int) (instr & 0x0000000003fLL);
5ea2bd7f 1123 int indirect = rM < 256 ? reg_contents[rM] : 0;
0927a22b
KB
1124 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1125 {
1126 instores[rM-32] = 1;
1127 last_prologue_pc = next_pc;
1128 }
5ea2bd7f
JJ
1129 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1130 !instores[indirect-32])
1131 {
1132 /* Allow an indirect store of an input register. */
1133 instores[indirect-32] = 1;
1134 last_prologue_pc = next_pc;
1135 }
0927a22b
KB
1136 }
1137 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1138 {
1139 /* Either
1140 stfs [rN] = fM
1141 or
1142 stfd [rN] = fM
1143
1144 Advance over stores of floating point input registers. Again
1145 one store per register is permitted */
1146 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1147 int qp = (int) (instr & 0x0000000003fLL);
1148 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1149 {
1150 infpstores[fM-8] = 1;
1151 last_prologue_pc = next_pc;
1152 }
16461d7d
KB
1153 }
1154 else if (it == M
1155 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1156 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1157 {
1158 /* st8.spill [rN] = rM
1159 or
1160 st8.spill [rN] = rM, imm9 */
1161 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1162 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1163 int qp = (int) (instr & 0x0000000003fLL);
1164 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1165 {
1166 /* We've found a spill of one of the preserved general purpose
1167 regs. Record the spill address and advance the spill
1168 register if appropriate. */
1169 if (do_fsr_stuff)
b2fb4676 1170 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
16461d7d
KB
1171 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1172 /* st8.spill [rN] = rM, imm9 */
1173 spill_addr += imm9(instr);
1174 else
1175 spill_addr = 0; /* Done spilling */
1176 last_prologue_pc = next_pc;
1177 }
1178 }
16461d7d
KB
1179
1180 pc = next_pc;
1181 }
1182
1183 if (do_fsr_stuff) {
1184 int i;
1185 CORE_ADDR addr;
3a854e23
KB
1186 int sor, rrb_gr;
1187
1188 /* Extract the size of the rotating portion of the stack
1189 frame and the register rename base from the current
1190 frame marker. */
da50a4b7
AC
1191 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1192 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
16461d7d 1193
da50a4b7
AC
1194 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1195 i < get_frame_extra_info (frame)->sof;
16461d7d
KB
1196 i++, addr += 8)
1197 {
1198 if (IS_NaT_COLLECTION_ADDR (addr))
1199 {
1200 addr += 8;
1201 }
3a854e23 1202 if (i < sor)
b2fb4676 1203 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
3a854e23
KB
1204 = addr;
1205 else
b2fb4676 1206 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
16461d7d
KB
1207
1208 if (i+32 == cfm_reg)
b2fb4676 1209 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
16461d7d 1210 if (i+32 == ret_reg)
b2fb4676 1211 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
16461d7d 1212 if (i+32 == fp_reg)
b2fb4676 1213 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
16461d7d
KB
1214 }
1215 }
1216
da50a4b7
AC
1217 if (frame && get_frame_extra_info (frame))
1218 {
1219 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1220 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1221 get_frame_extra_info (frame)->fp_reg = fp_reg;
1222 }
16461d7d 1223
5ea2bd7f
JJ
1224 /* Try and trust the lim_pc value whenever possible. */
1225 if (trust_limit && lim_pc >= last_prologue_pc)
1226 return lim_pc;
1227
16461d7d
KB
1228 return last_prologue_pc;
1229}
1230
1231CORE_ADDR
1232ia64_skip_prologue (CORE_ADDR pc)
1233{
1234 return examine_prologue (pc, pc+1024, 0);
1235}
1236
a78f21af 1237static void
16461d7d
KB
1238ia64_frame_init_saved_regs (struct frame_info *frame)
1239{
b2fb4676 1240 if (get_frame_saved_regs (frame))
16461d7d
KB
1241 return;
1242
5a203e44 1243 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
244bc108
KB
1244 {
1245 int regno;
16461d7d 1246
244bc108 1247 frame_saved_regs_zalloc (frame);
16461d7d 1248
b2fb4676 1249 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1e2330ba 1250 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
b2fb4676 1251 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1e2330ba 1252 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
b2fb4676 1253 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1e2330ba 1254 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
244bc108 1255#if 0
b2fb4676 1256 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
244bc108
KB
1257 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1258#endif
b2fb4676 1259 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1e2330ba 1260 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
b2fb4676 1261 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1e2330ba 1262 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
b2fb4676 1263 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1e2330ba 1264 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
b2fb4676 1265 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1e2330ba 1266 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
b2fb4676 1267 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1e2330ba 1268 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
b2fb4676 1269 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1e2330ba 1270 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
244bc108
KB
1271 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1272 if (regno != sp_regnum)
b2fb4676 1273 get_frame_saved_regs (frame)[regno] =
1e2330ba 1274 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1275 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1276 get_frame_saved_regs (frame)[regno] =
1e2330ba 1277 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
244bc108 1278 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
b2fb4676 1279 get_frame_saved_regs (frame)[regno] =
1e2330ba 1280 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
16461d7d
KB
1281 }
1282 else
1283 {
244bc108 1284 CORE_ADDR func_start;
16461d7d 1285
be41e9f4 1286 func_start = get_frame_func (frame);
50abf9e5 1287 examine_prologue (func_start, get_frame_pc (frame), frame);
244bc108 1288 }
16461d7d
KB
1289}
1290
a78f21af 1291static void
16461d7d
KB
1292ia64_get_saved_register (char *raw_buffer,
1293 int *optimized,
1294 CORE_ADDR *addrp,
1295 struct frame_info *frame,
1296 int regnum,
1297 enum lval_type *lval)
1298{
244bc108 1299 int is_dummy_frame;
16461d7d
KB
1300
1301 if (!target_has_registers)
1302 error ("No registers.");
1303
1304 if (optimized != NULL)
1305 *optimized = 0;
244bc108
KB
1306
1307 if (addrp != NULL)
1308 *addrp = 0;
1309
1310 if (lval != NULL)
1311 *lval = not_lval;
1312
1e2330ba
AC
1313 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1314 get_frame_base (frame),
1315 get_frame_base (frame));
244bc108 1316
11c02a10 1317 if (regnum == SP_REGNUM && get_next_frame (frame))
16461d7d
KB
1318 {
1319 /* Handle SP values for all frames but the topmost. */
fbd9dcd3
AC
1320 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1321 get_frame_base (frame));
16461d7d
KB
1322 }
1323 else if (regnum == IA64_BSP_REGNUM)
1324 {
fbd9dcd3
AC
1325 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1326 get_frame_extra_info (frame)->bsp);
16461d7d
KB
1327 }
1328 else if (regnum == IA64_VFP_REGNUM)
1329 {
1330 /* If the function in question uses an automatic register (r32-r127)
1331 for the frame pointer, it'll be found by ia64_find_saved_register()
1332 above. If the function lacks one of these frame pointers, we can
1333 still provide a value since we know the size of the frame */
1e2330ba 1334 CORE_ADDR vfp = (get_frame_base (frame)
da50a4b7 1335 + get_frame_extra_info (frame)->mem_stack_frame_size);
fbd9dcd3 1336 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
16461d7d
KB
1337 }
1338 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1339 {
d9d9c31f 1340 char pr_raw_buffer[MAX_REGISTER_SIZE];
16461d7d
KB
1341 int pr_optim;
1342 enum lval_type pr_lval;
1343 CORE_ADDR pr_addr;
1344 int prN_val;
1345 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1346 frame, IA64_PR_REGNUM, &pr_lval);
3a854e23
KB
1347 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1348 {
1349 /* Fetch predicate register rename base from current frame
1350 marker for this frame. */
da50a4b7 1351 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
3a854e23
KB
1352
1353 /* Adjust the register number to account for register rotation. */
1354 regnum = IA64_PR16_REGNUM
1355 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1356 }
16461d7d
KB
1357 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1358 regnum - IA64_PR0_REGNUM, 1);
1359 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB
1360 }
1361 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1362 {
d9d9c31f 1363 char unat_raw_buffer[MAX_REGISTER_SIZE];
16461d7d
KB
1364 int unat_optim;
1365 enum lval_type unat_lval;
1366 CORE_ADDR unat_addr;
1367 int unatN_val;
1368 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1369 frame, IA64_UNAT_REGNUM, &unat_lval);
1370 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1371 regnum - IA64_NAT0_REGNUM, 1);
1372 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1373 unatN_val);
16461d7d
KB
1374 }
1375 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1376 {
1377 int natval = 0;
1378 /* Find address of general register corresponding to nat bit we're
1379 interested in. */
244bc108
KB
1380 CORE_ADDR gr_addr = 0;
1381
1382 if (!is_dummy_frame)
1383 {
f30ee0bc 1384 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676
AC
1385 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1386 + IA64_GR0_REGNUM];
244bc108 1387 }
16461d7d
KB
1388 if (gr_addr)
1389 {
1390 /* Compute address of nat collection bits */
1391 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1392 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1393 CORE_ADDR nat_collection;
1394 int nat_bit;
1395 /* If our nat collection address is bigger than bsp, we have to get
1396 the nat collection from rnat. Otherwise, we fetch the nat
1397 collection from the computed address. */
1398 if (nat_addr >= bsp)
1399 nat_collection = read_register (IA64_RNAT_REGNUM);
1400 else
1401 nat_collection = read_memory_integer (nat_addr, 8);
1402 nat_bit = (gr_addr >> 3) & 0x3f;
1403 natval = (nat_collection >> nat_bit) & 1;
1404 }
1405 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB
1406 }
1407 else if (regnum == IA64_IP_REGNUM)
1408 {
1409 CORE_ADDR pc;
11c02a10 1410 if (get_next_frame (frame))
244bc108
KB
1411 {
1412 /* FIXME: Set *addrp, *lval when possible. */
11c02a10 1413 pc = ia64_frame_saved_pc (get_next_frame (frame));
244bc108
KB
1414 }
1415 else
1416 {
1417 pc = read_pc ();
1418 }
fbd9dcd3 1419 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
244bc108
KB
1420 }
1421 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1422 {
1423 CORE_ADDR addr = 0;
1424 if (!is_dummy_frame)
1425 {
f30ee0bc 1426 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
b2fb4676 1427 addr = get_frame_saved_regs (frame)[regnum];
244bc108
KB
1428 }
1429
1430 if (addr != 0)
1431 {
1432 if (lval != NULL)
1433 *lval = lval_memory;
1434 if (addrp != NULL)
1435 *addrp = addr;
1436 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1437 }
1438 else
1439 {
1440 /* r32 - r127 must be fetchable via memory. If they aren't,
1441 then the register is unavailable */
1442 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1443 }
16461d7d
KB
1444 }
1445 else
1446 {
3a854e23
KB
1447 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1448 {
1449 /* Fetch floating point register rename base from current
1450 frame marker for this frame. */
da50a4b7 1451 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
3a854e23
KB
1452
1453 /* Adjust the floating point register number to account for
1454 register rotation. */
1455 regnum = IA64_FR32_REGNUM
1456 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1457 }
1458
bdcdd535
AC
1459 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1460 frame, regnum, lval);
16461d7d 1461 }
16461d7d
KB
1462}
1463
1464/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1465 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1466 and TYPE is the type (which is known to be struct, union or array). */
1467int
1468ia64_use_struct_convention (int gcc_p, struct type *type)
1469{
64a5b29c
KB
1470 struct type *float_elt_type;
1471
1472 /* HFAs are structures (or arrays) consisting entirely of floating
1473 point values of the same length. Up to 8 of these are returned
1474 in registers. Don't use the struct convention when this is the
1475 case. */
1476 float_elt_type = is_float_or_hfa_type (type);
1477 if (float_elt_type != NULL
1478 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1479 return 0;
1480
1481 /* Other structs of length 32 or less are returned in r8-r11.
1482 Don't use the struct convention for those either. */
16461d7d
KB
1483 return TYPE_LENGTH (type) > 32;
1484}
1485
1486void
1487ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1488{
64a5b29c
KB
1489 struct type *float_elt_type;
1490
1491 float_elt_type = is_float_or_hfa_type (type);
1492 if (float_elt_type != NULL)
1493 {
1494 int offset = 0;
1495 int regnum = IA64_FR8_REGNUM;
1496 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1497
1498 while (n-- > 0)
1499 {
1500 ia64_register_convert_to_virtual (regnum, float_elt_type,
1501 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1502 offset += TYPE_LENGTH (float_elt_type);
1503 regnum++;
1504 }
1505 }
16461d7d 1506 else
64a5b29c
KB
1507 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1508 TYPE_LENGTH (type));
16461d7d
KB
1509}
1510
1511/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1512 like this is necessary though since the IA-64 calling conventions specify
1513 that r8 is not preserved. */
1514static CORE_ADDR struct_return_address;
1515
1516CORE_ADDR
1517ia64_extract_struct_value_address (char *regbuf)
1518{
1519 /* FIXME: See above. */
1520 return struct_return_address;
1521}
1522
a78f21af 1523static void
16461d7d
KB
1524ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1525{
1526 /* FIXME: See above. */
1527 /* Note that most of the work was done in ia64_push_arguments() */
1528 struct_return_address = addr;
1529}
1530
1531int
1532ia64_frameless_function_invocation (struct frame_info *frame)
1533{
f30ee0bc 1534 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
da50a4b7 1535 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
16461d7d
KB
1536}
1537
1538CORE_ADDR
1539ia64_saved_pc_after_call (struct frame_info *frame)
1540{
1541 return read_register (IA64_BR0_REGNUM);
1542}
1543
a78f21af 1544static CORE_ADDR
16461d7d
KB
1545ia64_frame_args_address (struct frame_info *frame)
1546{
1547 /* frame->frame points at the SP for this frame; But we want the start
1548 of the frame, not the end. Calling frame chain will get his for us. */
1549 return ia64_frame_chain (frame);
1550}
1551
a78f21af 1552static CORE_ADDR
16461d7d
KB
1553ia64_frame_locals_address (struct frame_info *frame)
1554{
1555 /* frame->frame points at the SP for this frame; But we want the start
1556 of the frame, not the end. Calling frame chain will get his for us. */
1557 return ia64_frame_chain (frame);
1558}
1559
a78f21af 1560static void
16461d7d
KB
1561ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1562{
1563 CORE_ADDR bsp, cfm;
11c02a10
AC
1564 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1565 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1566 get_frame_base (get_next_frame (frame)),
1567 get_frame_base (get_next_frame (frame))));
16461d7d 1568
a00a19e9 1569 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
16461d7d 1570
11c02a10 1571 if (get_next_frame (frame) == 0)
16461d7d
KB
1572 {
1573 bsp = read_register (IA64_BSP_REGNUM);
1574 cfm = read_register (IA64_CFM_REGNUM);
1575
1576 }
11c02a10 1577 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
244bc108 1578 {
11c02a10
AC
1579 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1580 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
244bc108
KB
1581 }
1582 else if (next_frame_is_call_dummy)
1583 {
11c02a10
AC
1584 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1585 get_frame_base (get_next_frame (frame)),
135c175f 1586 IA64_BSP_REGNUM);
11c02a10
AC
1587 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1588 get_frame_base (get_next_frame (frame)),
135c175f 1589 IA64_CFM_REGNUM);
244bc108 1590 }
16461d7d
KB
1591 else
1592 {
11c02a10 1593 struct frame_info *frn = get_next_frame (frame);
16461d7d 1594
f30ee0bc 1595 DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
16461d7d 1596
b2fb4676
AC
1597 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1598 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
11c02a10
AC
1599 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1600 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1601 else if (get_next_frame (frn)
1602 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1603 get_frame_base (get_next_frame (frn)),
1604 get_frame_base (get_next_frame (frn))))
1605 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1606 get_frame_base (get_next_frame (frn)),
135c175f 1607 IA64_PFS_REGNUM);
16461d7d 1608 else
76d689a6 1609 cfm = read_register (IA64_PFS_REGNUM);
16461d7d 1610
da50a4b7 1611 bsp = get_frame_extra_info (frn)->bsp;
16461d7d 1612 }
da50a4b7
AC
1613 get_frame_extra_info (frame)->cfm = cfm;
1614 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1615 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
11c02a10
AC
1616 if (get_next_frame (frame) == 0
1617 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
244bc108 1618 || next_frame_is_call_dummy)
da50a4b7
AC
1619 get_frame_extra_info (frame)->bsp =
1620 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
16461d7d 1621 else
da50a4b7
AC
1622 get_frame_extra_info (frame)->bsp =
1623 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
16461d7d 1624
da50a4b7
AC
1625 get_frame_extra_info (frame)->after_prologue = 0;
1626 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1627 get_frame_extra_info (frame)->fp_reg = 0;
16461d7d
KB
1628}
1629
64a5b29c
KB
1630static int
1631is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1632{
1633 switch (TYPE_CODE (t))
1634 {
1635 case TYPE_CODE_FLT:
1636 if (*etp)
1637 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1638 else
1639 {
1640 *etp = t;
1641 return 1;
1642 }
1643 break;
1644 case TYPE_CODE_ARRAY:
98f96ba1
KB
1645 return
1646 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1647 etp);
64a5b29c
KB
1648 break;
1649 case TYPE_CODE_STRUCT:
1650 {
1651 int i;
1652
1653 for (i = 0; i < TYPE_NFIELDS (t); i++)
98f96ba1
KB
1654 if (!is_float_or_hfa_type_recurse
1655 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
64a5b29c
KB
1656 return 0;
1657 return 1;
1658 }
1659 break;
1660 default:
1661 return 0;
1662 break;
1663 }
1664}
1665
1666/* Determine if the given type is one of the floating point types or
1667 and HFA (which is a struct, array, or combination thereof whose
1668 bottom-most elements are all of the same floating point type.) */
1669
1670static struct type *
1671is_float_or_hfa_type (struct type *t)
1672{
1673 struct type *et = 0;
1674
1675 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1676}
1677
1678
98f96ba1
KB
1679/* Return 1 if the alignment of T is such that the next even slot
1680 should be used. Return 0, if the next available slot should
1681 be used. (See section 8.5.1 of the IA-64 Software Conventions
1682 and Runtime manual.) */
1683
1684static int
1685slot_alignment_is_next_even (struct type *t)
1686{
1687 switch (TYPE_CODE (t))
1688 {
1689 case TYPE_CODE_INT:
1690 case TYPE_CODE_FLT:
1691 if (TYPE_LENGTH (t) > 8)
1692 return 1;
1693 else
1694 return 0;
1695 case TYPE_CODE_ARRAY:
1696 return
1697 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1698 case TYPE_CODE_STRUCT:
1699 {
1700 int i;
1701
1702 for (i = 0; i < TYPE_NFIELDS (t); i++)
1703 if (slot_alignment_is_next_even
1704 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1705 return 1;
1706 return 0;
1707 }
1708 default:
1709 return 0;
1710 }
1711}
1712
64a5b29c
KB
1713/* Attempt to find (and return) the global pointer for the given
1714 function.
1715
1716 This is a rather nasty bit of code searchs for the .dynamic section
1717 in the objfile corresponding to the pc of the function we're trying
1718 to call. Once it finds the addresses at which the .dynamic section
1719 lives in the child process, it scans the Elf64_Dyn entries for a
1720 DT_PLTGOT tag. If it finds one of these, the corresponding
1721 d_un.d_ptr value is the global pointer. */
1722
1723static CORE_ADDR
698cb3f0 1724generic_elf_find_global_pointer (CORE_ADDR faddr)
64a5b29c 1725{
76d689a6 1726 struct obj_section *faddr_sect;
64a5b29c 1727
76d689a6
KB
1728 faddr_sect = find_pc_section (faddr);
1729 if (faddr_sect != NULL)
64a5b29c
KB
1730 {
1731 struct obj_section *osect;
1732
76d689a6 1733 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1734 {
1735 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1736 break;
1737 }
1738
76d689a6 1739 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1740 {
1741 CORE_ADDR addr;
1742
1743 addr = osect->addr;
1744 while (addr < osect->endaddr)
1745 {
1746 int status;
1747 LONGEST tag;
1748 char buf[8];
1749
1750 status = target_read_memory (addr, buf, sizeof (buf));
1751 if (status != 0)
1752 break;
1753 tag = extract_signed_integer (buf, sizeof (buf));
1754
1755 if (tag == DT_PLTGOT)
1756 {
1757 CORE_ADDR global_pointer;
1758
1759 status = target_read_memory (addr + 8, buf, sizeof (buf));
1760 if (status != 0)
1761 break;
7c0b4a20 1762 global_pointer = extract_unsigned_integer (buf, sizeof (buf));
64a5b29c
KB
1763
1764 /* The payoff... */
1765 return global_pointer;
1766 }
1767
1768 if (tag == DT_NULL)
1769 break;
1770
1771 addr += 16;
1772 }
1773 }
1774 }
1775 return 0;
1776}
1777
1778/* Given a function's address, attempt to find (and return) the
1779 corresponding (canonical) function descriptor. Return 0 if
1780 not found. */
1781static CORE_ADDR
1782find_extant_func_descr (CORE_ADDR faddr)
1783{
76d689a6 1784 struct obj_section *faddr_sect;
64a5b29c
KB
1785
1786 /* Return early if faddr is already a function descriptor */
76d689a6
KB
1787 faddr_sect = find_pc_section (faddr);
1788 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB
1789 return faddr;
1790
76d689a6 1791 if (faddr_sect != NULL)
64a5b29c 1792 {
76d689a6
KB
1793 struct obj_section *osect;
1794 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB
1795 {
1796 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1797 break;
1798 }
1799
76d689a6 1800 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB
1801 {
1802 CORE_ADDR addr;
1803
1804 addr = osect->addr;
1805 while (addr < osect->endaddr)
1806 {
1807 int status;
1808 LONGEST faddr2;
1809 char buf[8];
1810
1811 status = target_read_memory (addr, buf, sizeof (buf));
1812 if (status != 0)
1813 break;
1814 faddr2 = extract_signed_integer (buf, sizeof (buf));
1815
1816 if (faddr == faddr2)
1817 return addr;
1818
1819 addr += 16;
1820 }
1821 }
1822 }
1823 return 0;
1824}
1825
1826/* Attempt to find a function descriptor corresponding to the
1827 given address. If none is found, construct one on the
1828 stack using the address at fdaptr */
1829
1830static CORE_ADDR
1831find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1832{
1833 CORE_ADDR fdesc;
1834
1835 fdesc = find_extant_func_descr (faddr);
1836
1837 if (fdesc == 0)
1838 {
1839 CORE_ADDR global_pointer;
1840 char buf[16];
1841
1842 fdesc = *fdaptr;
1843 *fdaptr += 16;
1844
698cb3f0 1845 global_pointer = FIND_GLOBAL_POINTER (faddr);
64a5b29c
KB
1846
1847 if (global_pointer == 0)
1848 global_pointer = read_register (IA64_GR1_REGNUM);
1849
fbd9dcd3
AC
1850 store_unsigned_integer (buf, 8, faddr);
1851 store_unsigned_integer (buf + 8, 8, global_pointer);
64a5b29c
KB
1852
1853 write_memory (fdesc, buf, 16);
1854 }
1855
1856 return fdesc;
1857}
16461d7d 1858
a78f21af 1859static CORE_ADDR
ea7c478f 1860ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
16461d7d
KB
1861 int struct_return, CORE_ADDR struct_addr)
1862{
1863 int argno;
ea7c478f 1864 struct value *arg;
16461d7d
KB
1865 struct type *type;
1866 int len, argoffset;
64a5b29c 1867 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1868 int floatreg;
64a5b29c 1869 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB
1870
1871 nslots = 0;
64a5b29c 1872 nfuncargs = 0;
16461d7d
KB
1873 /* Count the number of slots needed for the arguments */
1874 for (argno = 0; argno < nargs; argno++)
1875 {
1876 arg = args[argno];
1877 type = check_typedef (VALUE_TYPE (arg));
1878 len = TYPE_LENGTH (type);
1879
98f96ba1 1880 if ((nslots & 1) && slot_alignment_is_next_even (type))
16461d7d
KB
1881 nslots++;
1882
64a5b29c
KB
1883 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1884 nfuncargs++;
1885
16461d7d
KB
1886 nslots += (len + 7) / 8;
1887 }
1888
64a5b29c 1889 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB
1890 rseslots = (nslots > 8) ? 8 : nslots;
1891 memslots = nslots - rseslots;
1892
64a5b29c 1893 /* Allocate a new RSE frame */
16461d7d
KB
1894 cfm = read_register (IA64_CFM_REGNUM);
1895
1896 bsp = read_register (IA64_BSP_REGNUM);
1897 bsp = rse_address_add (bsp, cfm & 0x7f);
1898 new_bsp = rse_address_add (bsp, rseslots);
1899 write_register (IA64_BSP_REGNUM, new_bsp);
1900
1901 pfs = read_register (IA64_PFS_REGNUM);
1902 pfs &= 0xc000000000000000LL;
1903 pfs |= (cfm & 0xffffffffffffLL);
1904 write_register (IA64_PFS_REGNUM, pfs);
1905
1906 cfm &= 0xc000000000000000LL;
1907 cfm |= rseslots;
1908 write_register (IA64_CFM_REGNUM, cfm);
1909
64a5b29c
KB
1910 /* We will attempt to find function descriptors in the .opd segment,
1911 but if we can't we'll construct them ourselves. That being the
1912 case, we'll need to reserve space on the stack for them. */
1913 funcdescaddr = sp - nfuncargs * 16;
1914 funcdescaddr &= ~0xfLL;
1915
1916 /* Adjust the stack pointer to it's new value. The calling conventions
1917 require us to have 16 bytes of scratch, plus whatever space is
1918 necessary for the memory slots and our function descriptors */
1919 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB
1920 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1921
64a5b29c
KB
1922 /* Place the arguments where they belong. The arguments will be
1923 either placed in the RSE backing store or on the memory stack.
1924 In addition, floating point arguments or HFAs are placed in
1925 floating point registers. */
16461d7d
KB
1926 slotnum = 0;
1927 floatreg = IA64_FR8_REGNUM;
1928 for (argno = 0; argno < nargs; argno++)
1929 {
64a5b29c
KB
1930 struct type *float_elt_type;
1931
16461d7d
KB
1932 arg = args[argno];
1933 type = check_typedef (VALUE_TYPE (arg));
1934 len = TYPE_LENGTH (type);
64a5b29c
KB
1935
1936 /* Special handling for function parameters */
1937 if (len == 8
1938 && TYPE_CODE (type) == TYPE_CODE_PTR
1939 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1940 {
1941 char val_buf[8];
1942
fbd9dcd3 1943 store_unsigned_integer (val_buf, 8,
7c0b4a20 1944 find_func_descr (extract_unsigned_integer (VALUE_CONTENTS (arg), 8),
fbd9dcd3 1945 &funcdescaddr));
64a5b29c
KB
1946 if (slotnum < rseslots)
1947 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1948 else
1949 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1950 slotnum++;
1951 continue;
1952 }
1953
1954 /* Normal slots */
98f96ba1
KB
1955
1956 /* Skip odd slot if necessary... */
1957 if ((slotnum & 1) && slot_alignment_is_next_even (type))
16461d7d 1958 slotnum++;
98f96ba1 1959
16461d7d
KB
1960 argoffset = 0;
1961 while (len > 0)
1962 {
1963 char val_buf[8];
1964
1965 memset (val_buf, 0, 8);
1966 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1967
1968 if (slotnum < rseslots)
1969 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1970 else
1971 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1972
1973 argoffset += 8;
1974 len -= 8;
1975 slotnum++;
1976 }
64a5b29c
KB
1977
1978 /* Handle floating point types (including HFAs) */
1979 float_elt_type = is_float_or_hfa_type (type);
1980 if (float_elt_type != NULL)
1981 {
1982 argoffset = 0;
1983 len = TYPE_LENGTH (type);
1984 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1985 {
1986 ia64_register_convert_to_raw (
1987 float_elt_type,
1988 floatreg,
1989 VALUE_CONTENTS (arg) + argoffset,
524d7c18 1990 &deprecated_registers[REGISTER_BYTE (floatreg)]);
64a5b29c
KB
1991 floatreg++;
1992 argoffset += TYPE_LENGTH (float_elt_type);
1993 len -= TYPE_LENGTH (float_elt_type);
1994 }
16461d7d
KB
1995 }
1996 }
1997
64a5b29c 1998 /* Store the struct return value in r8 if necessary. */
16461d7d
KB
1999 if (struct_return)
2000 {
fbd9dcd3
AC
2001 store_unsigned_integer (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
2002 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
2003 struct_addr);
16461d7d
KB
2004 }
2005
64a5b29c 2006 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB
2007 target_store_registers (-1);
2008
2009 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
2010 to be defined to call generic_save_dummy_frame_tos(). But at the
2011 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
2012 I chose to put this call here instead of using the old mechanisms.
2013 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
2014 line
2015
2016 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
2017
2018 to ia64_gdbarch_init() and remove the line below. */
2019 generic_save_dummy_frame_tos (sp);
2020
2021 return sp;
2022}
2023
a78f21af 2024static CORE_ADDR
16461d7d
KB
2025ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
2026{
698cb3f0 2027 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
16461d7d 2028
64a5b29c
KB
2029 if (global_pointer != 0)
2030 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB
2031
2032 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
2033 return sp;
2034}
2035
a78f21af 2036static void
16461d7d
KB
2037ia64_store_return_value (struct type *type, char *valbuf)
2038{
2039 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2040 {
2041 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
524d7c18 2042 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
16461d7d
KB
2043 target_store_registers (IA64_FR8_REGNUM);
2044 }
2045 else
73937e03
AC
2046 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
2047 valbuf, TYPE_LENGTH (type));
16461d7d
KB
2048}
2049
a78f21af 2050static void
16461d7d
KB
2051ia64_pop_frame (void)
2052{
2053 generic_pop_current_frame (ia64_pop_frame_regular);
2054}
2055
2056static void
2057ia64_pop_frame_regular (struct frame_info *frame)
2058{
2059 int regno;
2060 CORE_ADDR bsp, cfm, pfs;
2061
f30ee0bc 2062 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
16461d7d
KB
2063
2064 for (regno = 0; regno < ia64_num_regs; regno++)
2065 {
b2fb4676 2066 if (get_frame_saved_regs (frame)[regno]
16461d7d
KB
2067 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
2068 && regno != pc_regnum
2069 && regno != sp_regnum
2070 && regno != IA64_PFS_REGNUM
2071 && regno != IA64_CFM_REGNUM
2072 && regno != IA64_BSP_REGNUM
2073 && regno != IA64_BSPSTORE_REGNUM)
2074 {
2075 write_register (regno,
b2fb4676 2076 read_memory_integer (get_frame_saved_regs (frame)[regno],
16461d7d
KB
2077 REGISTER_RAW_SIZE (regno)));
2078 }
2079 }
2080
618ce49f 2081 write_register (sp_regnum, DEPRECATED_FRAME_CHAIN (frame));
8bedc050 2082 write_pc (DEPRECATED_FRAME_SAVED_PC (frame));
16461d7d
KB
2083
2084 cfm = read_register (IA64_CFM_REGNUM);
2085
b2fb4676 2086 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
16461d7d 2087 {
b2fb4676 2088 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
16461d7d
KB
2089 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2090 }
2091 else
2092 pfs = read_register (IA64_PFS_REGNUM);
2093
2094 /* Compute the new bsp by *adding* the difference between the
2095 size of the frame and the size of the locals (both wrt the
2096 frame that we're going back to). This seems kind of strange,
2097 especially since it seems like we ought to be subtracting the
ca557f44 2098 size of the locals... and we should; but the Linux kernel
16461d7d
KB
2099 wants bsp to be set at the end of all used registers. It's
2100 likely that this code will need to be revised to accomodate
2101 other operating systems. */
da50a4b7 2102 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
16461d7d
KB
2103 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2104 write_register (IA64_BSP_REGNUM, bsp);
2105
2106 /* FIXME: What becomes of the epilog count in the PFS? */
2107 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2108 write_register (IA64_CFM_REGNUM, cfm);
2109
2110 flush_cached_frames ();
2111}
2112
2113static void
1750fa04
AC
2114ia64_remote_translate_xfer_address (struct gdbarch *gdbarch,
2115 struct regcache *regcache,
2116 CORE_ADDR memaddr, int nr_bytes,
16461d7d
KB
2117 CORE_ADDR *targ_addr, int *targ_len)
2118{
2119 *targ_addr = memaddr;
2120 *targ_len = nr_bytes;
2121}
2122
244bc108
KB
2123static void
2124process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2125{
2126 int *os_ident_ptr = obj;
2127 const char *name;
2128 unsigned int sectsize;
2129
2130 name = bfd_get_section_name (abfd, sect);
2131 sectsize = bfd_section_size (abfd, sect);
2132 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2133 {
2134 unsigned int name_length, data_length, note_type;
2135 char *note = alloca (sectsize);
2136
2137 bfd_get_section_contents (abfd, sect, note,
2138 (file_ptr) 0, (bfd_size_type) sectsize);
2139
2140 name_length = bfd_h_get_32 (abfd, note);
2141 data_length = bfd_h_get_32 (abfd, note + 4);
2142 note_type = bfd_h_get_32 (abfd, note + 8);
2143
2144 if (name_length == 4 && data_length == 16 && note_type == 1
2145 && strcmp (note + 12, "GNU") == 0)
2146 {
2147 int os_number = bfd_h_get_32 (abfd, note + 16);
2148
2149 /* The case numbers are from abi-tags in glibc */
2150 switch (os_number)
2151 {
2152 case 0 :
2153 *os_ident_ptr = ELFOSABI_LINUX;
2154 break;
244bc108
KB
2155 case 1 :
2156 *os_ident_ptr = ELFOSABI_HURD;
2157 break;
2158 case 2 :
2159 *os_ident_ptr = ELFOSABI_SOLARIS;
2160 break;
244bc108 2161 default :
8e65ff28
AC
2162 internal_error (__FILE__, __LINE__,
2163 "process_note_abi_sections: unknown OS number %d", os_number);
244bc108
KB
2164 break;
2165 }
2166 }
2167 }
2168}
2169
16461d7d
KB
2170static struct gdbarch *
2171ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2172{
2173 struct gdbarch *gdbarch;
244bc108
KB
2174 struct gdbarch_tdep *tdep;
2175 int os_ident;
2176
2177 if (info.abfd != NULL
2178 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2179 {
2180 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2181
ca557f44
AC
2182 /* If os_ident is 0, it is not necessarily the case that we're
2183 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2184 GNU/Linux uses a note section to record OS/ABI info, but
2185 leaves e_ident[EI_OSABI] zero. So we have to check for note
2186 sections too. */
244bc108
KB
2187 if (os_ident == 0)
2188 {
2189 bfd_map_over_sections (info.abfd,
2190 process_note_abi_tag_sections,
2191 &os_ident);
2192 }
2193 }
2194 else
2195 os_ident = -1;
16461d7d 2196
244bc108
KB
2197 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2198 arches != NULL;
2199 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2200 {
57bc8964
KB
2201 tdep = gdbarch_tdep (arches->gdbarch);
2202 if (tdep &&tdep->os_ident == os_ident)
2203 return arches->gdbarch;
244bc108 2204 }
16461d7d 2205
244bc108
KB
2206 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2207 gdbarch = gdbarch_alloc (&info, tdep);
2208 tdep->os_ident = os_ident;
2209
a5afb99f
AC
2210 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2211 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2212 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
d7fa2ae2
KB
2213
2214 /* Set the method of obtaining the sigcontext addresses at which
2215 registers are saved. The method of checking to see if
2216 native_find_global_pointer is nonzero to indicate that we're
2217 on AIX is kind of hokey, but I can't think of a better way
2218 to do it. */
244bc108
KB
2219 if (os_ident == ELFOSABI_LINUX)
2220 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
d7fa2ae2
KB
2221 else if (native_find_global_pointer != 0)
2222 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
244bc108
KB
2223 else
2224 tdep->sigcontext_register_address = 0;
16461d7d 2225
ca557f44
AC
2226 /* We know that GNU/Linux won't have to resort to the
2227 native_find_global_pointer hackery. But that's the only one we
2228 know about so far, so if native_find_global_pointer is set to
2229 something non-zero, then use it. Otherwise fall back to using
2230 generic_elf_find_global_pointer. This arrangement should (in
2231 theory) allow us to cross debug GNU/Linux binaries from an AIX
2232 machine. */
698cb3f0
KB
2233 if (os_ident == ELFOSABI_LINUX)
2234 tdep->find_global_pointer = generic_elf_find_global_pointer;
2235 else if (native_find_global_pointer != 0)
2236 tdep->find_global_pointer = native_find_global_pointer;
2237 else
2238 tdep->find_global_pointer = generic_elf_find_global_pointer;
2239
16461d7d
KB
2240 set_gdbarch_short_bit (gdbarch, 16);
2241 set_gdbarch_int_bit (gdbarch, 32);
2242 set_gdbarch_long_bit (gdbarch, 64);
2243 set_gdbarch_long_long_bit (gdbarch, 64);
2244 set_gdbarch_float_bit (gdbarch, 32);
2245 set_gdbarch_double_bit (gdbarch, 64);
33c08150 2246 set_gdbarch_long_double_bit (gdbarch, 128);
16461d7d
KB
2247 set_gdbarch_ptr_bit (gdbarch, 64);
2248
2249 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2250 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
0ba6dca9 2251 set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
16461d7d 2252 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
698cb3f0 2253 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
16461d7d
KB
2254
2255 set_gdbarch_register_name (gdbarch, ia64_register_name);
b1e29e33 2256 set_gdbarch_deprecated_register_size (gdbarch, 8);
b8b527c5 2257 set_gdbarch_deprecated_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
16461d7d
KB
2258 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2259 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
a0ed5532 2260 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 16);
16461d7d 2261 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
a0ed5532 2262 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 16);
16461d7d
KB
2263 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2264
2265 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2266
16461d7d
KB
2267 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2268
6913c89a 2269 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
16461d7d 2270
618ce49f 2271 set_gdbarch_deprecated_frame_chain (gdbarch, ia64_frame_chain);
8bedc050 2272 set_gdbarch_deprecated_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
16461d7d 2273
f30ee0bc 2274 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
129c1cd6 2275 set_gdbarch_deprecated_get_saved_register (gdbarch, ia64_get_saved_register);
16461d7d 2276
781a750d
AC
2277 set_gdbarch_deprecated_register_convertible (gdbarch, ia64_register_convertible);
2278 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2279 set_gdbarch_deprecated_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
16461d7d
KB
2280
2281 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
26e9b323 2282 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
16461d7d 2283
4183d812 2284 set_gdbarch_deprecated_store_struct_return (gdbarch, ia64_store_struct_return);
ebba8386 2285 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
26e9b323 2286 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
16461d7d
KB
2287
2288 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2289 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2290 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2291 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2292 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2293
2294 /* Settings for calling functions in the inferior. */
b81774d8 2295 set_gdbarch_deprecated_push_arguments (gdbarch, ia64_push_arguments);
28f617b3 2296 set_gdbarch_deprecated_push_return_address (gdbarch, ia64_push_return_address);
749b82f6 2297 set_gdbarch_deprecated_pop_frame (gdbarch, ia64_pop_frame);
16461d7d 2298
b1e29e33
AC
2299 set_gdbarch_deprecated_call_dummy_words (gdbarch, ia64_call_dummy_words);
2300 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
e9582e71 2301 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
16461d7d
KB
2302 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2303 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2304
0ba6dca9
AC
2305 /* We won't necessarily have a frame pointer and even if we do, it
2306 winds up being extraordinarly messy when attempting to find the
2307 frame chain. So for the purposes of creating frames (which is
2308 all deprecated_read_fp() is used for), simply use the stack
2309 pointer value instead. */
bd1ce8ba 2310 set_gdbarch_deprecated_target_read_fp (gdbarch, ia64_read_fp);
16461d7d
KB
2311
2312 /* Settings that should be unnecessary. */
2313 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2314
b46e02f6 2315 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
16461d7d 2316
16461d7d
KB
2317 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2318 set_gdbarch_function_start_offset (gdbarch, 0);
4156bb53 2319 set_gdbarch_frame_args_skip (gdbarch, 0);
16461d7d
KB
2320
2321 set_gdbarch_remote_translate_xfer_address (
2322 gdbarch, ia64_remote_translate_xfer_address);
2323
2324 return gdbarch;
2325}
2326
a78f21af
AC
2327extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */
2328
16461d7d
KB
2329void
2330_initialize_ia64_tdep (void)
2331{
2332 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2333
d7a27068 2334 deprecated_tm_print_insn = print_insn_ia64;
810ecf9f 2335 deprecated_tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
16461d7d 2336}
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