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20be272b CV |
1 | /* Target-dependent code for the IQ2000 architecture, for GDB, the GNU |
2 | Debugger. | |
3 | ||
618f726f | 4 | Copyright (C) 2000-2016 Free Software Foundation, Inc. |
20be272b CV |
5 | |
6 | Contributed by Red Hat. | |
7 | ||
8 | This file is part of GDB. | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 12 | the Free Software Foundation; either version 3 of the License, or |
20be272b CV |
13 | (at your option) any later version. |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
20be272b CV |
22 | |
23 | #include "defs.h" | |
24 | #include "frame.h" | |
25 | #include "frame-base.h" | |
26 | #include "frame-unwind.h" | |
27 | #include "dwarf2-frame.h" | |
28 | #include "gdbtypes.h" | |
29 | #include "value.h" | |
30 | #include "dis-asm.h" | |
20be272b CV |
31 | #include "arch-utils.h" |
32 | #include "regcache.h" | |
33 | #include "osabi.h" | |
34 | #include "gdbcore.h" | |
35 | ||
36 | enum gdb_regnum | |
37 | { | |
38 | E_R0_REGNUM, E_R1_REGNUM, E_R2_REGNUM, E_R3_REGNUM, | |
39 | E_R4_REGNUM, E_R5_REGNUM, E_R6_REGNUM, E_R7_REGNUM, | |
40 | E_R8_REGNUM, E_R9_REGNUM, E_R10_REGNUM, E_R11_REGNUM, | |
41 | E_R12_REGNUM, E_R13_REGNUM, E_R14_REGNUM, E_R15_REGNUM, | |
42 | E_R16_REGNUM, E_R17_REGNUM, E_R18_REGNUM, E_R19_REGNUM, | |
43 | E_R20_REGNUM, E_R21_REGNUM, E_R22_REGNUM, E_R23_REGNUM, | |
44 | E_R24_REGNUM, E_R25_REGNUM, E_R26_REGNUM, E_R27_REGNUM, | |
45 | E_R28_REGNUM, E_R29_REGNUM, E_R30_REGNUM, E_R31_REGNUM, | |
46 | E_PC_REGNUM, | |
47 | E_LR_REGNUM = E_R31_REGNUM, /* Link register. */ | |
48 | E_SP_REGNUM = E_R29_REGNUM, /* Stack pointer. */ | |
49 | E_FP_REGNUM = E_R27_REGNUM, /* Frame pointer. */ | |
50 | E_FN_RETURN_REGNUM = E_R2_REGNUM, /* Function return value register. */ | |
51 | E_1ST_ARGREG = E_R4_REGNUM, /* 1st function arg register. */ | |
52 | E_LAST_ARGREG = E_R11_REGNUM, /* Last function arg register. */ | |
53 | E_NUM_REGS = E_PC_REGNUM + 1 | |
54 | }; | |
55 | ||
56 | /* Use an invalid address value as 'not available' marker. */ | |
57 | enum { REG_UNAVAIL = (CORE_ADDR) -1 }; | |
58 | ||
59 | struct iq2000_frame_cache | |
60 | { | |
61 | /* Base address. */ | |
62 | CORE_ADDR base; | |
63 | CORE_ADDR pc; | |
64 | LONGEST framesize; | |
65 | int using_fp; | |
66 | CORE_ADDR saved_sp; | |
67 | CORE_ADDR saved_regs [E_NUM_REGS]; | |
68 | }; | |
69 | ||
70 | /* Harvard methods: */ | |
71 | ||
72 | static CORE_ADDR | |
73 | insn_ptr_from_addr (CORE_ADDR addr) /* CORE_ADDR to target pointer. */ | |
74 | { | |
75 | return addr & 0x7fffffffL; | |
76 | } | |
77 | ||
78 | static CORE_ADDR | |
79 | insn_addr_from_ptr (CORE_ADDR ptr) /* target_pointer to CORE_ADDR. */ | |
80 | { | |
81 | return (ptr & 0x7fffffffL) | 0x80000000L; | |
82 | } | |
83 | ||
84 | /* Function: pointer_to_address | |
1777feb0 | 85 | Convert a target pointer to an address in host (CORE_ADDR) format. */ |
20be272b CV |
86 | |
87 | static CORE_ADDR | |
9898f801 UW |
88 | iq2000_pointer_to_address (struct gdbarch *gdbarch, |
89 | struct type * type, const gdb_byte * buf) | |
20be272b | 90 | { |
e17a4113 | 91 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b | 92 | enum type_code target = TYPE_CODE (TYPE_TARGET_TYPE (type)); |
e17a4113 UW |
93 | CORE_ADDR addr |
94 | = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order); | |
20be272b CV |
95 | |
96 | if (target == TYPE_CODE_FUNC | |
97 | || target == TYPE_CODE_METHOD | |
876cecd0 | 98 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
20be272b CV |
99 | addr = insn_addr_from_ptr (addr); |
100 | ||
101 | return addr; | |
102 | } | |
103 | ||
104 | /* Function: address_to_pointer | |
105 | Convert a host-format address (CORE_ADDR) into a target pointer. */ | |
106 | ||
107 | static void | |
9898f801 UW |
108 | iq2000_address_to_pointer (struct gdbarch *gdbarch, |
109 | struct type *type, gdb_byte *buf, CORE_ADDR addr) | |
20be272b | 110 | { |
e17a4113 | 111 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b CV |
112 | enum type_code target = TYPE_CODE (TYPE_TARGET_TYPE (type)); |
113 | ||
114 | if (target == TYPE_CODE_FUNC || target == TYPE_CODE_METHOD) | |
115 | addr = insn_ptr_from_addr (addr); | |
e17a4113 | 116 | store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr); |
20be272b CV |
117 | } |
118 | ||
119 | /* Real register methods: */ | |
120 | ||
121 | /* Function: register_name | |
122 | Returns the name of the iq2000 register number N. */ | |
123 | ||
124 | static const char * | |
d93859e2 | 125 | iq2000_register_name (struct gdbarch *gdbarch, int regnum) |
20be272b CV |
126 | { |
127 | static const char * names[E_NUM_REGS] = | |
128 | { | |
129 | "r0", "r1", "r2", "r3", "r4", | |
130 | "r5", "r6", "r7", "r8", "r9", | |
131 | "r10", "r11", "r12", "r13", "r14", | |
132 | "r15", "r16", "r17", "r18", "r19", | |
133 | "r20", "r21", "r22", "r23", "r24", | |
134 | "r25", "r26", "r27", "r28", "r29", | |
135 | "r30", "r31", | |
136 | "pc" | |
137 | }; | |
138 | if (regnum < 0 || regnum >= E_NUM_REGS) | |
139 | return NULL; | |
140 | return names[regnum]; | |
141 | } | |
142 | ||
143 | /* Prologue analysis methods: */ | |
144 | ||
145 | /* ADDIU insn (001001 rs(5) rt(5) imm(16)). */ | |
146 | #define INSN_IS_ADDIU(X) (((X) & 0xfc000000) == 0x24000000) | |
147 | #define ADDIU_REG_SRC(X) (((X) & 0x03e00000) >> 21) | |
148 | #define ADDIU_REG_TGT(X) (((X) & 0x001f0000) >> 16) | |
149 | #define ADDIU_IMMEDIATE(X) ((signed short) ((X) & 0x0000ffff)) | |
150 | ||
151 | /* "MOVE" (OR) insn (000000 rs(5) rt(5) rd(5) 00000 100101). */ | |
152 | #define INSN_IS_MOVE(X) (((X) & 0xffe007ff) == 0x00000025) | |
153 | #define MOVE_REG_SRC(X) (((X) & 0x001f0000) >> 16) | |
154 | #define MOVE_REG_TGT(X) (((X) & 0x0000f800) >> 11) | |
155 | ||
156 | /* STORE WORD insn (101011 rs(5) rt(5) offset(16)). */ | |
157 | #define INSN_IS_STORE_WORD(X) (((X) & 0xfc000000) == 0xac000000) | |
158 | #define SW_REG_INDEX(X) (((X) & 0x03e00000) >> 21) | |
159 | #define SW_REG_SRC(X) (((X) & 0x001f0000) >> 16) | |
160 | #define SW_OFFSET(X) ((signed short) ((X) & 0x0000ffff)) | |
161 | ||
162 | /* Function: find_last_line_symbol | |
163 | ||
164 | Given an address range, first find a line symbol corresponding to | |
165 | the starting address. Then find the last line symbol within the | |
166 | range that has a line number less than or equal to the first line. | |
167 | ||
168 | For optimized code with code motion, this finds the last address | |
169 | for the lowest-numbered line within the address range. */ | |
170 | ||
171 | static struct symtab_and_line | |
172 | find_last_line_symbol (CORE_ADDR start, CORE_ADDR end, int notcurrent) | |
173 | { | |
174 | struct symtab_and_line sal = find_pc_line (start, notcurrent); | |
175 | struct symtab_and_line best_sal = sal; | |
176 | ||
177 | if (sal.pc == 0 || sal.line == 0 || sal.end == 0) | |
178 | return sal; | |
179 | ||
180 | do | |
181 | { | |
182 | if (sal.line && sal.line <= best_sal.line) | |
183 | best_sal = sal; | |
184 | sal = find_pc_line (sal.end, notcurrent); | |
185 | } | |
186 | while (sal.pc && sal.pc < end); | |
187 | ||
188 | return best_sal; | |
189 | } | |
190 | ||
191 | /* Function: scan_prologue | |
192 | Decode the instructions within the given address range. | |
193 | Decide when we must have reached the end of the function prologue. | |
194 | If a frame_info pointer is provided, fill in its prologue information. | |
195 | ||
196 | Returns the address of the first instruction after the prologue. */ | |
197 | ||
198 | static CORE_ADDR | |
e17a4113 UW |
199 | iq2000_scan_prologue (struct gdbarch *gdbarch, |
200 | CORE_ADDR scan_start, | |
20be272b CV |
201 | CORE_ADDR scan_end, |
202 | struct frame_info *fi, | |
203 | struct iq2000_frame_cache *cache) | |
204 | { | |
e17a4113 | 205 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b CV |
206 | struct symtab_and_line sal; |
207 | CORE_ADDR pc; | |
208 | CORE_ADDR loop_end; | |
20be272b CV |
209 | int srcreg; |
210 | int tgtreg; | |
211 | signed short offset; | |
212 | ||
213 | if (scan_end == (CORE_ADDR) 0) | |
214 | { | |
215 | loop_end = scan_start + 100; | |
216 | sal.end = sal.pc = 0; | |
217 | } | |
218 | else | |
219 | { | |
220 | loop_end = scan_end; | |
221 | if (fi) | |
222 | sal = find_last_line_symbol (scan_start, scan_end, 0); | |
706774f2 JK |
223 | else |
224 | sal.end = 0; /* Avoid GCC false warning. */ | |
20be272b CV |
225 | } |
226 | ||
227 | /* Saved registers: | |
228 | We first have to save the saved register's offset, and | |
229 | only later do we compute its actual address. Since the | |
230 | offset can be zero, we must first initialize all the | |
231 | saved regs to minus one (so we can later distinguish | |
1777feb0 | 232 | between one that's not saved, and one that's saved at zero). */ |
20be272b CV |
233 | for (srcreg = 0; srcreg < E_NUM_REGS; srcreg ++) |
234 | cache->saved_regs[srcreg] = -1; | |
235 | cache->using_fp = 0; | |
236 | cache->framesize = 0; | |
237 | ||
238 | for (pc = scan_start; pc < loop_end; pc += 4) | |
239 | { | |
e17a4113 | 240 | LONGEST insn = read_memory_unsigned_integer (pc, 4, byte_order); |
20be272b | 241 | /* Skip any instructions writing to (sp) or decrementing the |
1777feb0 | 242 | SP. */ |
20be272b CV |
243 | if ((insn & 0xffe00000) == 0xac200000) |
244 | { | |
245 | /* sw using SP/%1 as base. */ | |
246 | /* LEGACY -- from assembly-only port. */ | |
247 | tgtreg = ((insn >> 16) & 0x1f); | |
248 | if (tgtreg >= 0 && tgtreg < E_NUM_REGS) | |
249 | cache->saved_regs[tgtreg] = -((signed short) (insn & 0xffff)); | |
250 | ||
251 | if (tgtreg == E_LR_REGNUM) | |
20be272b CV |
252 | continue; |
253 | } | |
254 | ||
255 | if ((insn & 0xffff8000) == 0x20218000) | |
256 | { | |
257 | /* addi %1, %1, -N == addi %sp, %sp, -N */ | |
1777feb0 | 258 | /* LEGACY -- from assembly-only port. */ |
20be272b CV |
259 | cache->framesize = -((signed short) (insn & 0xffff)); |
260 | continue; | |
261 | } | |
262 | ||
263 | if (INSN_IS_ADDIU (insn)) | |
264 | { | |
265 | srcreg = ADDIU_REG_SRC (insn); | |
266 | tgtreg = ADDIU_REG_TGT (insn); | |
267 | offset = ADDIU_IMMEDIATE (insn); | |
268 | if (srcreg == E_SP_REGNUM && tgtreg == E_SP_REGNUM) | |
269 | cache->framesize = -offset; | |
270 | continue; | |
271 | } | |
272 | ||
273 | if (INSN_IS_STORE_WORD (insn)) | |
274 | { | |
275 | srcreg = SW_REG_SRC (insn); | |
276 | tgtreg = SW_REG_INDEX (insn); | |
277 | offset = SW_OFFSET (insn); | |
278 | ||
279 | if (tgtreg == E_SP_REGNUM || tgtreg == E_FP_REGNUM) | |
280 | { | |
1777feb0 | 281 | /* "push" to stack (via SP or FP reg). */ |
20be272b CV |
282 | if (cache->saved_regs[srcreg] == -1) /* Don't save twice. */ |
283 | cache->saved_regs[srcreg] = offset; | |
284 | continue; | |
285 | } | |
286 | } | |
287 | ||
288 | if (INSN_IS_MOVE (insn)) | |
289 | { | |
290 | srcreg = MOVE_REG_SRC (insn); | |
291 | tgtreg = MOVE_REG_TGT (insn); | |
292 | ||
293 | if (srcreg == E_SP_REGNUM && tgtreg == E_FP_REGNUM) | |
294 | { | |
295 | /* Copy sp to fp. */ | |
296 | cache->using_fp = 1; | |
297 | continue; | |
298 | } | |
299 | } | |
300 | ||
301 | /* Unknown instruction encountered in frame. Bail out? | |
302 | 1) If we have a subsequent line symbol, we can keep going. | |
303 | 2) If not, we need to bail out and quit scanning instructions. */ | |
304 | ||
305 | if (fi && sal.end && (pc < sal.end)) /* Keep scanning. */ | |
306 | continue; | |
307 | else /* bail */ | |
308 | break; | |
309 | } | |
310 | ||
311 | return pc; | |
312 | } | |
313 | ||
314 | static void | |
315 | iq2000_init_frame_cache (struct iq2000_frame_cache *cache) | |
316 | { | |
317 | int i; | |
318 | ||
319 | cache->base = 0; | |
320 | cache->framesize = 0; | |
321 | cache->using_fp = 0; | |
322 | cache->saved_sp = 0; | |
323 | for (i = 0; i < E_NUM_REGS; i++) | |
324 | cache->saved_regs[i] = -1; | |
325 | } | |
326 | ||
327 | /* Function: iq2000_skip_prologue | |
328 | If the input address is in a function prologue, | |
329 | returns the address of the end of the prologue; | |
330 | else returns the input address. | |
331 | ||
332 | Note: the input address is likely to be the function start, | |
333 | since this function is mainly used for advancing a breakpoint | |
334 | to the first line, or stepping to the first line when we have | |
335 | stepped into a function call. */ | |
336 | ||
337 | static CORE_ADDR | |
6093d2eb | 338 | iq2000_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
20be272b CV |
339 | { |
340 | CORE_ADDR func_addr = 0 , func_end = 0; | |
341 | ||
342 | if (find_pc_partial_function (pc, NULL, & func_addr, & func_end)) | |
343 | { | |
344 | struct symtab_and_line sal; | |
345 | struct iq2000_frame_cache cache; | |
346 | ||
347 | /* Found a function. */ | |
348 | sal = find_pc_line (func_addr, 0); | |
349 | if (sal.end && sal.end < func_end) | |
350 | /* Found a line number, use it as end of prologue. */ | |
351 | return sal.end; | |
352 | ||
353 | /* No useable line symbol. Use prologue parsing method. */ | |
354 | iq2000_init_frame_cache (&cache); | |
e17a4113 | 355 | return iq2000_scan_prologue (gdbarch, func_addr, func_end, NULL, &cache); |
20be272b CV |
356 | } |
357 | ||
358 | /* No function symbol -- just return the PC. */ | |
359 | return (CORE_ADDR) pc; | |
360 | } | |
361 | ||
362 | static struct iq2000_frame_cache * | |
94afd7a6 | 363 | iq2000_frame_cache (struct frame_info *this_frame, void **this_cache) |
20be272b | 364 | { |
e17a4113 | 365 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
20be272b CV |
366 | struct iq2000_frame_cache *cache; |
367 | CORE_ADDR current_pc; | |
368 | int i; | |
369 | ||
370 | if (*this_cache) | |
9a3c8263 | 371 | return (struct iq2000_frame_cache *) *this_cache; |
20be272b CV |
372 | |
373 | cache = FRAME_OBSTACK_ZALLOC (struct iq2000_frame_cache); | |
374 | iq2000_init_frame_cache (cache); | |
375 | *this_cache = cache; | |
376 | ||
94afd7a6 | 377 | cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); |
20be272b | 378 | |
94afd7a6 | 379 | current_pc = get_frame_pc (this_frame); |
20be272b CV |
380 | find_pc_partial_function (current_pc, NULL, &cache->pc, NULL); |
381 | if (cache->pc != 0) | |
e17a4113 | 382 | iq2000_scan_prologue (gdbarch, cache->pc, current_pc, this_frame, cache); |
20be272b | 383 | if (!cache->using_fp) |
94afd7a6 | 384 | cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
20be272b CV |
385 | |
386 | cache->saved_sp = cache->base + cache->framesize; | |
387 | ||
388 | for (i = 0; i < E_NUM_REGS; i++) | |
389 | if (cache->saved_regs[i] != -1) | |
390 | cache->saved_regs[i] += cache->base; | |
391 | ||
392 | return cache; | |
393 | } | |
394 | ||
94afd7a6 UW |
395 | static struct value * |
396 | iq2000_frame_prev_register (struct frame_info *this_frame, void **this_cache, | |
397 | int regnum) | |
20be272b | 398 | { |
1777feb0 MS |
399 | struct iq2000_frame_cache *cache = iq2000_frame_cache (this_frame, |
400 | this_cache); | |
94afd7a6 | 401 | |
20be272b | 402 | if (regnum == E_SP_REGNUM && cache->saved_sp) |
94afd7a6 | 403 | return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); |
20be272b CV |
404 | |
405 | if (regnum == E_PC_REGNUM) | |
406 | regnum = E_LR_REGNUM; | |
407 | ||
408 | if (regnum < E_NUM_REGS && cache->saved_regs[regnum] != -1) | |
94afd7a6 UW |
409 | return frame_unwind_got_memory (this_frame, regnum, |
410 | cache->saved_regs[regnum]); | |
20be272b | 411 | |
94afd7a6 | 412 | return frame_unwind_got_register (this_frame, regnum, regnum); |
20be272b CV |
413 | } |
414 | ||
415 | static void | |
94afd7a6 | 416 | iq2000_frame_this_id (struct frame_info *this_frame, void **this_cache, |
20be272b CV |
417 | struct frame_id *this_id) |
418 | { | |
1777feb0 MS |
419 | struct iq2000_frame_cache *cache = iq2000_frame_cache (this_frame, |
420 | this_cache); | |
20be272b CV |
421 | |
422 | /* This marks the outermost frame. */ | |
423 | if (cache->base == 0) | |
424 | return; | |
425 | ||
426 | *this_id = frame_id_build (cache->saved_sp, cache->pc); | |
427 | } | |
428 | ||
429 | static const struct frame_unwind iq2000_frame_unwind = { | |
430 | NORMAL_FRAME, | |
8fbca658 | 431 | default_frame_unwind_stop_reason, |
20be272b | 432 | iq2000_frame_this_id, |
94afd7a6 UW |
433 | iq2000_frame_prev_register, |
434 | NULL, | |
435 | default_frame_sniffer | |
20be272b CV |
436 | }; |
437 | ||
20be272b CV |
438 | static CORE_ADDR |
439 | iq2000_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
440 | { | |
441 | return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); | |
442 | } | |
443 | ||
444 | static CORE_ADDR | |
445 | iq2000_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
446 | { | |
447 | return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); | |
448 | } | |
449 | ||
450 | static struct frame_id | |
94afd7a6 | 451 | iq2000_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
20be272b | 452 | { |
94afd7a6 UW |
453 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
454 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
20be272b CV |
455 | } |
456 | ||
457 | static CORE_ADDR | |
94afd7a6 | 458 | iq2000_frame_base_address (struct frame_info *this_frame, void **this_cache) |
20be272b | 459 | { |
1777feb0 MS |
460 | struct iq2000_frame_cache *cache = iq2000_frame_cache (this_frame, |
461 | this_cache); | |
20be272b CV |
462 | |
463 | return cache->base; | |
464 | } | |
465 | ||
466 | static const struct frame_base iq2000_frame_base = { | |
467 | &iq2000_frame_unwind, | |
468 | iq2000_frame_base_address, | |
469 | iq2000_frame_base_address, | |
470 | iq2000_frame_base_address | |
471 | }; | |
472 | ||
473 | static const unsigned char * | |
67d57894 MD |
474 | iq2000_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, |
475 | int *lenptr) | |
20be272b CV |
476 | { |
477 | static const unsigned char big_breakpoint[] = { 0x00, 0x00, 0x00, 0x0d }; | |
478 | static const unsigned char little_breakpoint[] = { 0x0d, 0x00, 0x00, 0x00 }; | |
479 | ||
480 | if ((*pcptr & 3) != 0) | |
a73c6dcd | 481 | error (_("breakpoint_from_pc: invalid breakpoint address 0x%lx"), |
20be272b CV |
482 | (long) *pcptr); |
483 | ||
484 | *lenptr = 4; | |
67d57894 MD |
485 | return (gdbarch_byte_order (gdbarch) |
486 | == BFD_ENDIAN_BIG) ? big_breakpoint : little_breakpoint; | |
20be272b CV |
487 | } |
488 | ||
489 | /* Target function return value methods: */ | |
490 | ||
491 | /* Function: store_return_value | |
492 | Copy the function return value from VALBUF into the | |
493 | proper location for a function return. */ | |
494 | ||
495 | static void | |
496 | iq2000_store_return_value (struct type *type, struct regcache *regcache, | |
497 | const void *valbuf) | |
498 | { | |
499 | int len = TYPE_LENGTH (type); | |
500 | int regno = E_FN_RETURN_REGNUM; | |
501 | ||
502 | while (len > 0) | |
503 | { | |
e362b510 | 504 | gdb_byte buf[4]; |
20be272b CV |
505 | int size = len % 4 ?: 4; |
506 | ||
507 | memset (buf, 0, 4); | |
508 | memcpy (buf + 4 - size, valbuf, size); | |
509 | regcache_raw_write (regcache, regno++, buf); | |
510 | len -= size; | |
511 | valbuf = ((char *) valbuf) + size; | |
512 | } | |
513 | } | |
514 | ||
515 | /* Function: use_struct_convention | |
516 | Returns non-zero if the given struct type will be returned using | |
517 | a special convention, rather than the normal function return method. */ | |
518 | ||
519 | static int | |
520 | iq2000_use_struct_convention (struct type *type) | |
521 | { | |
522 | return ((TYPE_CODE (type) == TYPE_CODE_STRUCT) | |
523 | || (TYPE_CODE (type) == TYPE_CODE_UNION)) | |
524 | && TYPE_LENGTH (type) > 8; | |
525 | } | |
526 | ||
527 | /* Function: extract_return_value | |
528 | Copy the function's return value into VALBUF. | |
529 | This function is called only in the context of "target function calls", | |
530 | ie. when the debugger forces a function to be called in the child, and | |
531 | when the debugger forces a function to return prematurely via the | |
532 | "return" command. */ | |
533 | ||
534 | static void | |
535 | iq2000_extract_return_value (struct type *type, struct regcache *regcache, | |
7c543f7b | 536 | gdb_byte *valbuf) |
20be272b | 537 | { |
e17a4113 UW |
538 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
539 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
540 | ||
20be272b CV |
541 | /* If the function's return value is 8 bytes or less, it is |
542 | returned in a register, and if larger than 8 bytes, it is | |
543 | returned in a stack location which is pointed to by the same | |
544 | register. */ | |
20be272b CV |
545 | int len = TYPE_LENGTH (type); |
546 | ||
547 | if (len <= (2 * 4)) | |
548 | { | |
549 | int regno = E_FN_RETURN_REGNUM; | |
550 | ||
551 | /* Return values of <= 8 bytes are returned in | |
552 | FN_RETURN_REGNUM. */ | |
553 | while (len > 0) | |
554 | { | |
555 | ULONGEST tmp; | |
556 | int size = len % 4 ?: 4; | |
557 | ||
558 | /* By using store_unsigned_integer we avoid having to | |
559 | do anything special for small big-endian values. */ | |
560 | regcache_cooked_read_unsigned (regcache, regno++, &tmp); | |
e17a4113 | 561 | store_unsigned_integer (valbuf, size, byte_order, tmp); |
20be272b | 562 | len -= size; |
7c543f7b | 563 | valbuf += size; |
20be272b CV |
564 | } |
565 | } | |
566 | else | |
567 | { | |
568 | /* Return values > 8 bytes are returned in memory, | |
569 | pointed to by FN_RETURN_REGNUM. */ | |
ec20a626 UW |
570 | ULONGEST return_buffer; |
571 | regcache_cooked_read_unsigned (regcache, E_FN_RETURN_REGNUM, | |
572 | &return_buffer); | |
20be272b CV |
573 | read_memory (return_buffer, valbuf, TYPE_LENGTH (type)); |
574 | } | |
575 | } | |
576 | ||
577 | static enum return_value_convention | |
6a3a010b | 578 | iq2000_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 | 579 | struct type *type, struct regcache *regcache, |
ec20a626 | 580 | gdb_byte *readbuf, const gdb_byte *writebuf) |
20be272b CV |
581 | { |
582 | if (iq2000_use_struct_convention (type)) | |
583 | return RETURN_VALUE_STRUCT_CONVENTION; | |
584 | if (writebuf) | |
585 | iq2000_store_return_value (type, regcache, writebuf); | |
586 | else if (readbuf) | |
587 | iq2000_extract_return_value (type, regcache, readbuf); | |
588 | return RETURN_VALUE_REGISTER_CONVENTION; | |
589 | } | |
590 | ||
591 | /* Function: register_virtual_type | |
592 | Returns the default type for register N. */ | |
593 | ||
594 | static struct type * | |
595 | iq2000_register_type (struct gdbarch *gdbarch, int regnum) | |
596 | { | |
df4df182 | 597 | return builtin_type (gdbarch)->builtin_int32; |
20be272b CV |
598 | } |
599 | ||
600 | static CORE_ADDR | |
601 | iq2000_frame_align (struct gdbarch *ignore, CORE_ADDR sp) | |
602 | { | |
603 | /* This is the same frame alignment used by gcc. */ | |
604 | return ((sp + 7) & ~7); | |
605 | } | |
606 | ||
607 | /* Convenience function to check 8-byte types for being a scalar type | |
1777feb0 | 608 | or a struct with only one long long or double member. */ |
20be272b CV |
609 | static int |
610 | iq2000_pass_8bytetype_by_address (struct type *type) | |
611 | { | |
612 | struct type *ftype; | |
613 | ||
614 | /* Skip typedefs. */ | |
615 | while (TYPE_CODE (type) == TYPE_CODE_TYPEDEF) | |
616 | type = TYPE_TARGET_TYPE (type); | |
617 | /* Non-struct and non-union types are always passed by value. */ | |
618 | if (TYPE_CODE (type) != TYPE_CODE_STRUCT | |
619 | && TYPE_CODE (type) != TYPE_CODE_UNION) | |
620 | return 0; | |
621 | /* Structs with more than 1 field are always passed by address. */ | |
622 | if (TYPE_NFIELDS (type) != 1) | |
623 | return 1; | |
624 | /* Get field type. */ | |
625 | ftype = (TYPE_FIELDS (type))[0].type; | |
626 | /* The field type must have size 8, otherwise pass by address. */ | |
627 | if (TYPE_LENGTH (ftype) != 8) | |
628 | return 1; | |
629 | /* Skip typedefs of field type. */ | |
630 | while (TYPE_CODE (ftype) == TYPE_CODE_TYPEDEF) | |
631 | ftype = TYPE_TARGET_TYPE (ftype); | |
632 | /* If field is int or float, pass by value. */ | |
633 | if (TYPE_CODE (ftype) == TYPE_CODE_FLT | |
634 | || TYPE_CODE (ftype) == TYPE_CODE_INT) | |
635 | return 0; | |
1777feb0 | 636 | /* Everything else, pass by address. */ |
20be272b CV |
637 | return 1; |
638 | } | |
639 | ||
640 | static CORE_ADDR | |
641 | iq2000_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
642 | struct regcache *regcache, CORE_ADDR bp_addr, | |
643 | int nargs, struct value **args, CORE_ADDR sp, | |
644 | int struct_return, CORE_ADDR struct_addr) | |
645 | { | |
e17a4113 | 646 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
20be272b CV |
647 | const bfd_byte *val; |
648 | bfd_byte buf[4]; | |
649 | struct type *type; | |
650 | int i, argreg, typelen, slacklen; | |
651 | int stackspace = 0; | |
1777feb0 | 652 | /* Used to copy struct arguments into the stack. */ |
20be272b CV |
653 | CORE_ADDR struct_ptr; |
654 | ||
1777feb0 | 655 | /* First determine how much stack space we will need. */ |
20be272b CV |
656 | for (i = 0, argreg = E_1ST_ARGREG + (struct_return != 0); i < nargs; i++) |
657 | { | |
658 | type = value_type (args[i]); | |
659 | typelen = TYPE_LENGTH (type); | |
660 | if (typelen <= 4) | |
661 | { | |
662 | /* Scalars of up to 4 bytes, | |
663 | structs of up to 4 bytes, and | |
664 | pointers. */ | |
665 | if (argreg <= E_LAST_ARGREG) | |
666 | argreg++; | |
667 | else | |
668 | stackspace += 4; | |
669 | } | |
670 | else if (typelen == 8 && !iq2000_pass_8bytetype_by_address (type)) | |
671 | { | |
672 | /* long long, | |
673 | double, and possibly | |
1777feb0 | 674 | structs with a single field of long long or double. */ |
20be272b CV |
675 | if (argreg <= E_LAST_ARGREG - 1) |
676 | { | |
677 | /* 8-byte arg goes into a register pair | |
1777feb0 | 678 | (must start with an even-numbered reg). */ |
20be272b CV |
679 | if (((argreg - E_1ST_ARGREG) % 2) != 0) |
680 | argreg ++; | |
681 | argreg += 2; | |
682 | } | |
683 | else | |
684 | { | |
1777feb0 MS |
685 | argreg = E_LAST_ARGREG + 1; /* no more argregs. */ |
686 | /* 8-byte arg goes on stack, must be 8-byte aligned. */ | |
20be272b CV |
687 | stackspace = ((stackspace + 7) & ~7); |
688 | stackspace += 8; | |
689 | } | |
690 | } | |
691 | else | |
692 | { | |
693 | /* Structs are passed as pointer to a copy of the struct. | |
694 | So we need room on the stack for a copy of the struct | |
1777feb0 | 695 | plus for the argument pointer. */ |
20be272b CV |
696 | if (argreg <= E_LAST_ARGREG) |
697 | argreg++; | |
698 | else | |
699 | stackspace += 4; | |
700 | /* Care for 8-byte alignment of structs saved on stack. */ | |
701 | stackspace += ((typelen + 7) & ~7); | |
702 | } | |
703 | } | |
704 | ||
705 | /* Now copy params, in ascending order, into their assigned location | |
1777feb0 | 706 | (either in a register or on the stack). */ |
20be272b CV |
707 | |
708 | sp -= (sp % 8); /* align */ | |
709 | struct_ptr = sp; | |
710 | sp -= stackspace; | |
711 | sp -= (sp % 8); /* align again */ | |
712 | stackspace = 0; | |
713 | ||
714 | argreg = E_1ST_ARGREG; | |
715 | if (struct_return) | |
716 | { | |
1777feb0 | 717 | /* A function that returns a struct will consume one argreg to do so. |
20be272b CV |
718 | */ |
719 | regcache_cooked_write_unsigned (regcache, argreg++, struct_addr); | |
720 | } | |
721 | ||
722 | for (i = 0; i < nargs; i++) | |
723 | { | |
724 | type = value_type (args[i]); | |
725 | typelen = TYPE_LENGTH (type); | |
726 | val = value_contents (args[i]); | |
727 | if (typelen <= 4) | |
728 | { | |
1777feb0 | 729 | /* Char, short, int, float, pointer, and structs <= four bytes. */ |
20be272b CV |
730 | slacklen = (4 - (typelen % 4)) % 4; |
731 | memset (buf, 0, sizeof (buf)); | |
732 | memcpy (buf + slacklen, val, typelen); | |
733 | if (argreg <= E_LAST_ARGREG) | |
734 | { | |
1777feb0 | 735 | /* Passed in a register. */ |
20be272b CV |
736 | regcache_raw_write (regcache, argreg++, buf); |
737 | } | |
738 | else | |
739 | { | |
1777feb0 | 740 | /* Passed on the stack. */ |
20be272b CV |
741 | write_memory (sp + stackspace, buf, 4); |
742 | stackspace += 4; | |
743 | } | |
744 | } | |
745 | else if (typelen == 8 && !iq2000_pass_8bytetype_by_address (type)) | |
746 | { | |
747 | /* (long long), (double), or struct consisting of | |
1777feb0 | 748 | a single (long long) or (double). */ |
20be272b CV |
749 | if (argreg <= E_LAST_ARGREG - 1) |
750 | { | |
751 | /* 8-byte arg goes into a register pair | |
1777feb0 | 752 | (must start with an even-numbered reg). */ |
20be272b CV |
753 | if (((argreg - E_1ST_ARGREG) % 2) != 0) |
754 | argreg++; | |
755 | regcache_raw_write (regcache, argreg++, val); | |
756 | regcache_raw_write (regcache, argreg++, val + 4); | |
757 | } | |
758 | else | |
759 | { | |
1777feb0 MS |
760 | /* 8-byte arg goes on stack, must be 8-byte aligned. */ |
761 | argreg = E_LAST_ARGREG + 1; /* no more argregs. */ | |
20be272b CV |
762 | stackspace = ((stackspace + 7) & ~7); |
763 | write_memory (sp + stackspace, val, typelen); | |
764 | stackspace += 8; | |
765 | } | |
766 | } | |
767 | else | |
768 | { | |
769 | /* Store struct beginning at the upper end of the previously | |
770 | computed stack space. Then store the address of the struct | |
771 | using the usual rules for a 4 byte value. */ | |
772 | struct_ptr -= ((typelen + 7) & ~7); | |
773 | write_memory (struct_ptr, val, typelen); | |
774 | if (argreg <= E_LAST_ARGREG) | |
775 | regcache_cooked_write_unsigned (regcache, argreg++, struct_ptr); | |
776 | else | |
777 | { | |
e17a4113 | 778 | store_unsigned_integer (buf, 4, byte_order, struct_ptr); |
20be272b CV |
779 | write_memory (sp + stackspace, buf, 4); |
780 | stackspace += 4; | |
781 | } | |
782 | } | |
783 | } | |
784 | ||
1777feb0 | 785 | /* Store return address. */ |
20be272b CV |
786 | regcache_cooked_write_unsigned (regcache, E_LR_REGNUM, bp_addr); |
787 | ||
788 | /* Update stack pointer. */ | |
789 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
790 | ||
1777feb0 | 791 | /* And that should do it. Return the new stack pointer. */ |
20be272b CV |
792 | return sp; |
793 | } | |
794 | ||
795 | /* Function: gdbarch_init | |
796 | Initializer function for the iq2000 gdbarch vector. | |
797 | Called by gdbarch. Sets up the gdbarch vector(s) for this target. */ | |
798 | ||
799 | static struct gdbarch * | |
800 | iq2000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
801 | { | |
802 | struct gdbarch *gdbarch; | |
803 | ||
804 | /* Look up list for candidates - only one. */ | |
805 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
806 | if (arches != NULL) | |
807 | return arches->gdbarch; | |
808 | ||
809 | gdbarch = gdbarch_alloc (&info, NULL); | |
810 | ||
811 | set_gdbarch_num_regs (gdbarch, E_NUM_REGS); | |
812 | set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
813 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
814 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
815 | set_gdbarch_register_name (gdbarch, iq2000_register_name); | |
816 | set_gdbarch_address_to_pointer (gdbarch, iq2000_address_to_pointer); | |
817 | set_gdbarch_pointer_to_address (gdbarch, iq2000_pointer_to_address); | |
818 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
819 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
820 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
821 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
822 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
823 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
824 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
825 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
8da61cc4 DJ |
826 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); |
827 | set_gdbarch_double_format (gdbarch, floatformats_ieee_double); | |
828 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); | |
20be272b CV |
829 | set_gdbarch_return_value (gdbarch, iq2000_return_value); |
830 | set_gdbarch_breakpoint_from_pc (gdbarch, iq2000_breakpoint_from_pc); | |
831 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
832 | set_gdbarch_skip_prologue (gdbarch, iq2000_skip_prologue); | |
833 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
834 | set_gdbarch_print_insn (gdbarch, print_insn_iq2000); | |
835 | set_gdbarch_register_type (gdbarch, iq2000_register_type); | |
836 | set_gdbarch_frame_align (gdbarch, iq2000_frame_align); | |
837 | set_gdbarch_unwind_sp (gdbarch, iq2000_unwind_sp); | |
838 | set_gdbarch_unwind_pc (gdbarch, iq2000_unwind_pc); | |
94afd7a6 | 839 | set_gdbarch_dummy_id (gdbarch, iq2000_dummy_id); |
20be272b CV |
840 | frame_base_set_default (gdbarch, &iq2000_frame_base); |
841 | set_gdbarch_push_dummy_call (gdbarch, iq2000_push_dummy_call); | |
842 | ||
843 | gdbarch_init_osabi (info, gdbarch); | |
844 | ||
94afd7a6 UW |
845 | dwarf2_append_unwinders (gdbarch); |
846 | frame_unwind_append_unwinder (gdbarch, &iq2000_frame_unwind); | |
20be272b CV |
847 | |
848 | return gdbarch; | |
849 | } | |
850 | ||
851 | /* Function: _initialize_iq2000_tdep | |
852 | Initializer function for the iq2000 module. | |
1777feb0 | 853 | Called by gdb at start-up. */ |
20be272b | 854 | |
63807e1d PA |
855 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
856 | extern initialize_file_ftype _initialize_iq2000_tdep; | |
857 | ||
20be272b CV |
858 | void |
859 | _initialize_iq2000_tdep (void) | |
860 | { | |
861 | register_gdbarch_init (bfd_arch_iq2000, iq2000_gdbarch_init); | |
862 | } |