* gas/i386/intel16.d: Ignore trailing text with #pass.
[deliverable/binutils-gdb.git] / gdb / irix5-nat.c
CommitLineData
c906108c 1/* Native support for the SGI Iris running IRIX version 5, for GDB.
1b13c4f6
AC
2
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1998, 1999, 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
5
c906108c
SS
6 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
7 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
8 Implemented for Irix 4.x by Garrett A. Wollman.
9 Modified for Irix 5.x by Ian Lance Taylor.
10
c5aa993b 11 This file is part of GDB.
c906108c 12
c5aa993b
JM
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
c906108c 17
c5aa993b
JM
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
c906108c 22
c5aa993b
JM
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 59 Temple Place - Suite 330,
26 Boston, MA 02111-1307, USA. */
c906108c
SS
27
28#include "defs.h"
29#include "inferior.h"
30#include "gdbcore.h"
31#include "target.h"
4e052eda 32#include "regcache.h"
c906108c
SS
33
34#include "gdb_string.h"
35#include <sys/time.h>
36#include <sys/procfs.h>
37#include <setjmp.h> /* For JB_XXX. */
38
c60c0f5f
MS
39/* Prototypes for supply_gregset etc. */
40#include "gregset.h"
b639a770 41#include "mips-tdep.h"
c60c0f5f 42
a14ed312 43static void fetch_core_registers (char *, unsigned int, int, CORE_ADDR);
c906108c
SS
44
45/* Size of elements in jmpbuf */
46
47#define JB_ELEMENT_SIZE 4
48
49/*
50 * See the comment in m68k-tdep.c regarding the utility of these functions.
51 *
52 * These definitions are from the MIPS SVR4 ABI, so they may work for
53 * any MIPS SVR4 target.
54 */
55
c5aa993b 56void
fba45db2 57supply_gregset (gregset_t *gregsetp)
c906108c 58{
52f0bd74
AC
59 int regi;
60 greg_t *regp = &(*gregsetp)[0];
1b13c4f6 61 int gregoff = sizeof (greg_t) - mips_isa_regsize (current_gdbarch);
466d7106 62 static char zerobuf[32] = {0};
c906108c 63
c5aa993b 64 for (regi = 0; regi <= CTX_RA; regi++)
23a6d369
AC
65 regcache_raw_supply (current_regcache, regi,
66 (char *) (regp + regi) + gregoff);
67
68 regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->pc,
69 (char *) (regp + CTX_EPC) + gregoff);
70 regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->hi,
71 (char *) (regp + CTX_MDHI) + gregoff);
72 regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->lo,
73 (char *) (regp + CTX_MDLO) + gregoff);
74 regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->cause,
75 (char *) (regp + CTX_CAUSE) + gregoff);
c906108c
SS
76
77 /* Fill inaccessible registers with zero. */
23a6d369 78 regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->badvaddr, zerobuf);
c906108c
SS
79}
80
81void
fba45db2 82fill_gregset (gregset_t *gregsetp, int regno)
c906108c
SS
83{
84 int regi;
52f0bd74 85 greg_t *regp = &(*gregsetp)[0];
44ed547b 86 LONGEST regval;
c906108c
SS
87
88 /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32
89 executable, we have to sign extend the registers to 64 bits before
90 filling in the gregset structure. */
91
92 for (regi = 0; regi <= CTX_RA; regi++)
93 if ((regno == -1) || (regno == regi))
44ed547b
JB
94 {
95 regcache_raw_read_signed (current_regcache, regi, &regval);
96 *(regp + regi) = regval;
97 }
c906108c
SS
98
99 if ((regno == -1) || (regno == PC_REGNUM))
44ed547b
JB
100 {
101 regcache_raw_read_signed
102 (current_regcache, mips_regnum (current_gdbarch)->pc, &regval);
103 *(regp + CTX_EPC) = regval;
104 }
c906108c 105
56cea623 106 if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause))
44ed547b
JB
107 {
108 regcache_raw_read_signed
109 (current_regcache, mips_regnum (current_gdbarch)->cause, &regval);
110 *(regp + CTX_CAUSE) = regval;
111 }
c906108c 112
56cea623
AC
113 if ((regno == -1)
114 || (regno == mips_regnum (current_gdbarch)->hi))
44ed547b
JB
115 {
116 regcache_raw_read_signed
117 (current_regcache, mips_regnum (current_gdbarch)->hi, &regval);
118 *(regp + CTX_MDHI) = regval;
119 }
c906108c 120
56cea623 121 if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo))
44ed547b
JB
122 {
123 regcache_raw_read_signed
124 (current_regcache, mips_regnum (current_gdbarch)->lo, &regval);
125 *(regp + CTX_MDLO) = regval;
126 }
c906108c
SS
127}
128
129/*
130 * Now we do the same thing for floating-point registers.
131 * We don't bother to condition on FP0_REGNUM since any
132 * reasonable MIPS configuration has an R3010 in it.
133 *
134 * Again, see the comments in m68k-tdep.c.
135 */
136
137void
fba45db2 138supply_fpregset (fpregset_t *fpregsetp)
c906108c 139{
52f0bd74 140 int regi;
466d7106 141 static char zerobuf[32] = {0};
c906108c
SS
142
143 /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
144
145 for (regi = 0; regi < 32; regi++)
23a6d369
AC
146 regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
147 (char *) &fpregsetp->fp_r.fp_regs[regi]);
c906108c 148
23a6d369
AC
149 regcache_raw_supply (current_regcache,
150 mips_regnum (current_gdbarch)->fp_control_status,
151 (char *) &fpregsetp->fp_csr);
c906108c 152
56cea623 153 /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */
23a6d369
AC
154 regcache_raw_supply (current_regcache,
155 mips_regnum (current_gdbarch)->fp_implementation_revision,
156 zerobuf);
c906108c
SS
157}
158
159void
fba45db2 160fill_fpregset (fpregset_t *fpregsetp, int regno)
c906108c
SS
161{
162 int regi;
163 char *from, *to;
164
165 /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
166
167 for (regi = FP0_REGNUM; regi < FP0_REGNUM + 32; regi++)
168 {
169 if ((regno == -1) || (regno == regi))
170 {
c906108c 171 to = (char *) &(fpregsetp->fp_r.fp_regs[regi - FP0_REGNUM]);
44ed547b 172 regcache_raw_read (current_regcache, regi, to);
c906108c
SS
173 }
174 }
175
56cea623
AC
176 if ((regno == -1)
177 || (regno == mips_regnum (current_gdbarch)->fp_control_status))
44ed547b
JB
178 regcache_raw_read (current_regcache,
179 mips_regnum (current_gdbarch)->fp_control_status,
180 &fpregsetp->fp_csr);
c906108c
SS
181}
182
183
184/* Figure out where the longjmp will land.
185 We expect the first arg to be a pointer to the jmp_buf structure from which
186 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
187 This routine returns true on success. */
188
189int
fba45db2 190get_longjmp_target (CORE_ADDR *pc)
c906108c 191{
35fc8285 192 char *buf;
c906108c
SS
193 CORE_ADDR jb_addr;
194
35fc8285 195 buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
613e114f 196 jb_addr = read_register (MIPS_A0_REGNUM);
c906108c
SS
197
198 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
199 TARGET_PTR_BIT / TARGET_CHAR_BIT))
200 return 0;
201
7c0b4a20 202 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
c906108c
SS
203
204 return 1;
205}
206
16bce26c
KB
207/* Provide registers to GDB from a core file.
208
209 CORE_REG_SECT points to an array of bytes, which were obtained from
210 a core file which BFD thinks might contain register contents.
211 CORE_REG_SIZE is its size.
212
213 Normally, WHICH says which register set corelow suspects this is:
214 0 --- the general-purpose register set
215 2 --- the floating-point register set
216 However, for Irix 5, WHICH isn't used.
217
218 REG_ADDR is also unused. */
219
c906108c 220static void
16bce26c
KB
221fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
222 int which, CORE_ADDR reg_addr)
c906108c 223{
f6e1bffc
JB
224 char *srcp = core_reg_sect;
225 int regno;
226
f42accbe 227 if (core_reg_size == deprecated_register_bytes ())
c906108c 228 {
f6e1bffc
JB
229 for (regno = 0; regno < NUM_REGS; regno++)
230 {
231 regcache_raw_write (current_regcache, regno, srcp);
232 srcp += register_size (current_gdbarch, regno);
233 }
c906108c 234 }
1b13c4f6
AC
235 else if (mips_isa_regsize (current_gdbarch) == 4 &&
236 core_reg_size == (2 * mips_isa_regsize (current_gdbarch)) * NUM_REGS)
c906108c
SS
237 {
238 /* This is a core file from a N32 executable, 64 bits are saved
c5aa993b 239 for all registers. */
c906108c
SS
240 for (regno = 0; regno < NUM_REGS; regno++)
241 {
242 if (regno >= FP0_REGNUM && regno < (FP0_REGNUM + 32))
243 {
f6e1bffc 244 regcache_raw_write (current_regcache, regno, srcp);
c906108c
SS
245 }
246 else
247 {
f6e1bffc 248 regcache_raw_write (current_regcache, regno, srcp + 4);
c906108c 249 }
f6e1bffc 250 srcp += 8;
c906108c
SS
251 }
252 }
253 else
254 {
255 warning ("wrong size gregset struct in core file");
256 return;
257 }
c906108c 258}
c5aa993b 259
c906108c
SS
260/* Register that we are able to handle irix5 core file formats.
261 This really is bfd_target_unknown_flavour */
262
263static struct core_fns irix5_core_fns =
264{
2acceee2
JM
265 bfd_target_unknown_flavour, /* core_flavour */
266 default_check_format, /* check_format */
267 default_core_sniffer, /* core_sniffer */
268 fetch_core_registers, /* core_read_registers */
269 NULL /* next */
c906108c
SS
270};
271
272void
fba45db2 273_initialize_core_irix5 (void)
c906108c 274{
00e32a35 275 deprecated_add_core_fns (&irix5_core_fns);
c906108c 276}
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