Commit | Line | Data |
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c906108c | 1 | /* Native support for the SGI Iris running IRIX version 5, for GDB. |
1b13c4f6 | 2 | |
ecd75fc8 | 3 | Copyright (C) 1988-2014 Free Software Foundation, Inc. |
1b13c4f6 | 4 | |
c906108c SS |
5 | Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU |
6 | and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. | |
7 | Implemented for Irix 4.x by Garrett A. Wollman. | |
8 | Modified for Irix 5.x by Ian Lance Taylor. | |
9 | ||
c5aa993b | 10 | This file is part of GDB. |
c906108c | 11 | |
c5aa993b JM |
12 | This program is free software; you can redistribute it and/or modify |
13 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 14 | the Free Software Foundation; either version 3 of the License, or |
c5aa993b | 15 | (at your option) any later version. |
c906108c | 16 | |
c5aa993b JM |
17 | This program is distributed in the hope that it will be useful, |
18 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | GNU General Public License for more details. | |
c906108c | 21 | |
c5aa993b | 22 | You should have received a copy of the GNU General Public License |
a9762ec7 | 23 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c906108c SS |
24 | |
25 | #include "defs.h" | |
26 | #include "inferior.h" | |
27 | #include "gdbcore.h" | |
28 | #include "target.h" | |
4e052eda | 29 | #include "regcache.h" |
d1a7880c | 30 | #include "procfs.h" |
c906108c SS |
31 | #include <sys/time.h> |
32 | #include <sys/procfs.h> | |
33 | #include <setjmp.h> /* For JB_XXX. */ | |
34 | ||
1777feb0 | 35 | /* Prototypes for supply_gregset etc. */ |
c60c0f5f | 36 | #include "gregset.h" |
b639a770 | 37 | #include "mips-tdep.h" |
c60c0f5f | 38 | |
9eefc95f UW |
39 | static void fetch_core_registers (struct regcache *, char *, |
40 | unsigned int, int, CORE_ADDR); | |
c906108c | 41 | |
c906108c SS |
42 | |
43 | /* | |
44 | * See the comment in m68k-tdep.c regarding the utility of these functions. | |
45 | * | |
46 | * These definitions are from the MIPS SVR4 ABI, so they may work for | |
47 | * any MIPS SVR4 target. | |
48 | */ | |
49 | ||
c5aa993b | 50 | void |
7f7fe91e | 51 | supply_gregset (struct regcache *regcache, const gregset_t *gregsetp) |
c906108c | 52 | { |
52f0bd74 | 53 | int regi; |
7f7fe91e | 54 | const greg_t *regp = &(*gregsetp)[0]; |
d611717a UW |
55 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
56 | int gregoff = sizeof (greg_t) - mips_isa_regsize (gdbarch); | |
466d7106 | 57 | static char zerobuf[32] = {0}; |
c906108c | 58 | |
c5aa993b | 59 | for (regi = 0; regi <= CTX_RA; regi++) |
7f7fe91e UW |
60 | regcache_raw_supply (regcache, regi, |
61 | (const char *) (regp + regi) + gregoff); | |
62 | ||
d611717a | 63 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->pc, |
7f7fe91e | 64 | (const char *) (regp + CTX_EPC) + gregoff); |
d611717a | 65 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->hi, |
7f7fe91e | 66 | (const char *) (regp + CTX_MDHI) + gregoff); |
d611717a | 67 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->lo, |
7f7fe91e | 68 | (const char *) (regp + CTX_MDLO) + gregoff); |
d611717a | 69 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->cause, |
7f7fe91e | 70 | (const char *) (regp + CTX_CAUSE) + gregoff); |
c906108c SS |
71 | |
72 | /* Fill inaccessible registers with zero. */ | |
d611717a | 73 | regcache_raw_supply (regcache, mips_regnum (gdbarch)->badvaddr, zerobuf); |
c906108c SS |
74 | } |
75 | ||
76 | void | |
7f7fe91e | 77 | fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno) |
c906108c | 78 | { |
6a1872e4 | 79 | int regi, size; |
52f0bd74 | 80 | greg_t *regp = &(*gregsetp)[0]; |
6a1872e4 | 81 | gdb_byte buf[MAX_REGISTER_SIZE]; |
d611717a | 82 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
e17a4113 | 83 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
c906108c SS |
84 | |
85 | /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32 | |
86 | executable, we have to sign extend the registers to 64 bits before | |
87 | filling in the gregset structure. */ | |
88 | ||
89 | for (regi = 0; regi <= CTX_RA; regi++) | |
90 | if ((regno == -1) || (regno == regi)) | |
44ed547b | 91 | { |
d611717a | 92 | size = register_size (gdbarch, regi); |
7f7fe91e | 93 | regcache_raw_collect (regcache, regi, buf); |
e17a4113 | 94 | *(regp + regi) = extract_signed_integer (buf, size, byte_order); |
44ed547b | 95 | } |
c906108c | 96 | |
e4b97d48 | 97 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->pc)) |
44ed547b | 98 | { |
d611717a UW |
99 | regi = mips_regnum (gdbarch)->pc; |
100 | size = register_size (gdbarch, regi); | |
7f7fe91e | 101 | regcache_raw_collect (regcache, regi, buf); |
e17a4113 | 102 | *(regp + CTX_EPC) = extract_signed_integer (buf, size, byte_order); |
44ed547b | 103 | } |
c906108c | 104 | |
d611717a | 105 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->cause)) |
44ed547b | 106 | { |
d611717a UW |
107 | regi = mips_regnum (gdbarch)->cause; |
108 | size = register_size (gdbarch, regi); | |
7f7fe91e | 109 | regcache_raw_collect (regcache, regi, buf); |
e17a4113 | 110 | *(regp + CTX_CAUSE) = extract_signed_integer (buf, size, byte_order); |
44ed547b | 111 | } |
c906108c | 112 | |
d611717a | 113 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->hi)) |
44ed547b | 114 | { |
d611717a UW |
115 | regi = mips_regnum (gdbarch)->hi; |
116 | size = register_size (gdbarch, regi); | |
7f7fe91e | 117 | regcache_raw_collect (regcache, regi, buf); |
e17a4113 | 118 | *(regp + CTX_MDHI) = extract_signed_integer (buf, size, byte_order); |
44ed547b | 119 | } |
c906108c | 120 | |
d611717a | 121 | if ((regno == -1) || (regno == mips_regnum (gdbarch)->lo)) |
44ed547b | 122 | { |
d611717a UW |
123 | regi = mips_regnum (gdbarch)->lo; |
124 | size = register_size (gdbarch, regi); | |
7f7fe91e | 125 | regcache_raw_collect (regcache, regi, buf); |
e17a4113 | 126 | *(regp + CTX_MDLO) = extract_signed_integer (buf, size, byte_order); |
44ed547b | 127 | } |
c906108c SS |
128 | } |
129 | ||
130 | /* | |
131 | * Now we do the same thing for floating-point registers. | |
3e8c568d | 132 | * We don't bother to condition on gdbarch_fp0_regnum since any |
c906108c SS |
133 | * reasonable MIPS configuration has an R3010 in it. |
134 | * | |
135 | * Again, see the comments in m68k-tdep.c. | |
136 | */ | |
137 | ||
138 | void | |
7f7fe91e | 139 | supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp) |
c906108c | 140 | { |
52f0bd74 | 141 | int regi; |
466d7106 | 142 | static char zerobuf[32] = {0}; |
6d1eba4c | 143 | char fsrbuf[8]; |
d611717a | 144 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c | 145 | |
1777feb0 | 146 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ |
c906108c SS |
147 | |
148 | for (regi = 0; regi < 32; regi++) | |
d611717a | 149 | regcache_raw_supply (regcache, gdbarch_fp0_regnum (gdbarch) + regi, |
043b6510 | 150 | (const char *) &fpregsetp->__fp_r.__fp_regs[regi]); |
c906108c | 151 | |
6d1eba4c JB |
152 | /* We can't supply the FSR register directly to the regcache, |
153 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
154 | is 32bits long, while the regcache expects a 64bits long value. | |
155 | So we use a buffer of the correct size and copy into it the register | |
156 | value at the proper location. */ | |
157 | memset (fsrbuf, 0, 4); | |
043b6510 | 158 | memcpy (fsrbuf + 4, &fpregsetp->__fp_csr, 4); |
6d1eba4c | 159 | |
7f7fe91e | 160 | regcache_raw_supply (regcache, |
d611717a | 161 | mips_regnum (gdbarch)->fp_control_status, fsrbuf); |
c906108c | 162 | |
1777feb0 | 163 | /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */ |
7f7fe91e | 164 | regcache_raw_supply (regcache, |
d611717a | 165 | mips_regnum (gdbarch)->fp_implementation_revision, |
23a6d369 | 166 | zerobuf); |
c906108c SS |
167 | } |
168 | ||
169 | void | |
1777feb0 MS |
170 | fill_fpregset (const struct regcache *regcache, |
171 | fpregset_t *fpregsetp, int regno) | |
c906108c SS |
172 | { |
173 | int regi; | |
174 | char *from, *to; | |
d611717a | 175 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
c906108c | 176 | |
1777feb0 | 177 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ |
c906108c | 178 | |
d611717a UW |
179 | for (regi = gdbarch_fp0_regnum (gdbarch); |
180 | regi < gdbarch_fp0_regnum (gdbarch) + 32; regi++) | |
c906108c SS |
181 | { |
182 | if ((regno == -1) || (regno == regi)) | |
183 | { | |
043b6510 JB |
184 | const int fp0_regnum = gdbarch_fp0_regnum (gdbarch); |
185 | ||
186 | to = (char *) &(fpregsetp->__fp_r.__fp_regs[regi - fp0_regnum]); | |
7f7fe91e | 187 | regcache_raw_collect (regcache, regi, to); |
c906108c SS |
188 | } |
189 | } | |
190 | ||
6d1eba4c | 191 | if (regno == -1 |
d611717a | 192 | || regno == mips_regnum (gdbarch)->fp_control_status) |
6d1eba4c JB |
193 | { |
194 | char fsrbuf[8]; | |
195 | ||
196 | /* We can't fill the FSR register directly from the regcache, | |
197 | because there is a size issue: On one hand, fpregsetp->fp_csr | |
198 | is 32bits long, while the regcache expects a 64bits long buffer. | |
199 | So we use a buffer of the correct size and copy the register | |
200 | value from that buffer. */ | |
7f7fe91e | 201 | regcache_raw_collect (regcache, |
d611717a | 202 | mips_regnum (gdbarch)->fp_control_status, fsrbuf); |
6d1eba4c | 203 | |
043b6510 | 204 | memcpy (&fpregsetp->__fp_csr, fsrbuf + 4, 4); |
6d1eba4c | 205 | } |
c906108c SS |
206 | } |
207 | ||
208 | ||
16bce26c KB |
209 | /* Provide registers to GDB from a core file. |
210 | ||
211 | CORE_REG_SECT points to an array of bytes, which were obtained from | |
212 | a core file which BFD thinks might contain register contents. | |
213 | CORE_REG_SIZE is its size. | |
214 | ||
215 | Normally, WHICH says which register set corelow suspects this is: | |
216 | 0 --- the general-purpose register set | |
217 | 2 --- the floating-point register set | |
218 | However, for Irix 5, WHICH isn't used. | |
219 | ||
220 | REG_ADDR is also unused. */ | |
221 | ||
c906108c | 222 | static void |
9eefc95f UW |
223 | fetch_core_registers (struct regcache *regcache, |
224 | char *core_reg_sect, unsigned core_reg_size, | |
16bce26c | 225 | int which, CORE_ADDR reg_addr) |
c906108c | 226 | { |
f6e1bffc | 227 | char *srcp = core_reg_sect; |
d611717a UW |
228 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
229 | int regsize = mips_isa_regsize (gdbarch); | |
f6e1bffc JB |
230 | int regno; |
231 | ||
f58b68aa DJ |
232 | /* If regsize is 8, this is a N32 or N64 core file. |
233 | If regsize is 4, this is an O32 core file. */ | |
d611717a | 234 | if (core_reg_size != regsize * gdbarch_num_regs (gdbarch)) |
c906108c | 235 | { |
8a3fe4f8 | 236 | warning (_("wrong size gregset struct in core file")); |
c906108c SS |
237 | return; |
238 | } | |
f58b68aa | 239 | |
d611717a | 240 | for (regno = 0; regno < gdbarch_num_regs (gdbarch); regno++) |
f58b68aa | 241 | { |
9eefc95f | 242 | regcache_raw_supply (regcache, regno, srcp); |
f58b68aa DJ |
243 | srcp += regsize; |
244 | } | |
c906108c | 245 | } |
c5aa993b | 246 | |
c906108c | 247 | /* Register that we are able to handle irix5 core file formats. |
1777feb0 | 248 | This really is bfd_target_unknown_flavour. */ |
c906108c SS |
249 | |
250 | static struct core_fns irix5_core_fns = | |
251 | { | |
2acceee2 JM |
252 | bfd_target_unknown_flavour, /* core_flavour */ |
253 | default_check_format, /* check_format */ | |
254 | default_core_sniffer, /* core_sniffer */ | |
255 | fetch_core_registers, /* core_read_registers */ | |
256 | NULL /* next */ | |
c906108c SS |
257 | }; |
258 | ||
d1a7880c PA |
259 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
260 | extern initialize_file_ftype _initialize_irix5_nat; | |
261 | ||
c906108c | 262 | void |
d1a7880c | 263 | _initialize_irix5_nat (void) |
c906108c | 264 | { |
d1a7880c PA |
265 | struct target_ops *t; |
266 | ||
267 | t = procfs_target (); | |
268 | procfs_use_watchpoints (t); | |
269 | add_target (t); | |
270 | ||
00e32a35 | 271 | deprecated_add_core_fns (&irix5_core_fns); |
c906108c | 272 | } |