* gregset.h (struct regcache): Add forward declaration.
[deliverable/binutils-gdb.git] / gdb / irix5-nat.c
CommitLineData
c906108c 1/* Native support for the SGI Iris running IRIX version 5, for GDB.
1b13c4f6 2
6aba47ca
DJ
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
4 1999, 2000, 2001, 2002, 2004, 2006, 2007 Free Software Foundation, Inc.
1b13c4f6 5
c906108c
SS
6 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
7 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
8 Implemented for Irix 4.x by Garrett A. Wollman.
9 Modified for Irix 5.x by Ian Lance Taylor.
10
c5aa993b 11 This file is part of GDB.
c906108c 12
c5aa993b
JM
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
c906108c 17
c5aa993b
JM
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
c906108c 22
c5aa993b
JM
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
197e01b6
EZ
25 Foundation, Inc., 51 Franklin Street, Fifth Floor,
26 Boston, MA 02110-1301, USA. */
c906108c
SS
27
28#include "defs.h"
29#include "inferior.h"
30#include "gdbcore.h"
31#include "target.h"
4e052eda 32#include "regcache.h"
c906108c
SS
33
34#include "gdb_string.h"
35#include <sys/time.h>
36#include <sys/procfs.h>
37#include <setjmp.h> /* For JB_XXX. */
38
c60c0f5f
MS
39/* Prototypes for supply_gregset etc. */
40#include "gregset.h"
b639a770 41#include "mips-tdep.h"
c60c0f5f 42
a14ed312 43static void fetch_core_registers (char *, unsigned int, int, CORE_ADDR);
c906108c
SS
44
45/* Size of elements in jmpbuf */
46
47#define JB_ELEMENT_SIZE 4
48
49/*
50 * See the comment in m68k-tdep.c regarding the utility of these functions.
51 *
52 * These definitions are from the MIPS SVR4 ABI, so they may work for
53 * any MIPS SVR4 target.
54 */
55
c5aa993b 56void
7f7fe91e 57supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
c906108c 58{
52f0bd74 59 int regi;
7f7fe91e 60 const greg_t *regp = &(*gregsetp)[0];
1b13c4f6 61 int gregoff = sizeof (greg_t) - mips_isa_regsize (current_gdbarch);
466d7106 62 static char zerobuf[32] = {0};
c906108c 63
c5aa993b 64 for (regi = 0; regi <= CTX_RA; regi++)
7f7fe91e
UW
65 regcache_raw_supply (regcache, regi,
66 (const char *) (regp + regi) + gregoff);
67
68 regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->pc,
69 (const char *) (regp + CTX_EPC) + gregoff);
70 regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->hi,
71 (const char *) (regp + CTX_MDHI) + gregoff);
72 regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->lo,
73 (const char *) (regp + CTX_MDLO) + gregoff);
74 regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->cause,
75 (const char *) (regp + CTX_CAUSE) + gregoff);
c906108c
SS
76
77 /* Fill inaccessible registers with zero. */
7f7fe91e 78 regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->badvaddr, zerobuf);
c906108c
SS
79}
80
81void
7f7fe91e 82fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
c906108c 83{
6a1872e4 84 int regi, size;
52f0bd74 85 greg_t *regp = &(*gregsetp)[0];
6a1872e4 86 gdb_byte buf[MAX_REGISTER_SIZE];
c906108c
SS
87
88 /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32
89 executable, we have to sign extend the registers to 64 bits before
90 filling in the gregset structure. */
91
92 for (regi = 0; regi <= CTX_RA; regi++)
93 if ((regno == -1) || (regno == regi))
44ed547b 94 {
6a1872e4 95 size = register_size (current_gdbarch, regi);
7f7fe91e 96 regcache_raw_collect (regcache, regi, buf);
6a1872e4 97 *(regp + regi) = extract_signed_integer (buf, size);
44ed547b 98 }
c906108c
SS
99
100 if ((regno == -1) || (regno == PC_REGNUM))
44ed547b 101 {
6a1872e4
UW
102 regi = mips_regnum (current_gdbarch)->pc;
103 size = register_size (current_gdbarch, regi);
7f7fe91e 104 regcache_raw_collect (regcache, regi, buf);
6a1872e4 105 *(regp + CTX_EPC) = extract_signed_integer (buf, size);
44ed547b 106 }
c906108c 107
56cea623 108 if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause))
44ed547b 109 {
6a1872e4
UW
110 regi = mips_regnum (current_gdbarch)->cause;
111 size = register_size (current_gdbarch, regi);
7f7fe91e 112 regcache_raw_collect (regcache, regi, buf);
6a1872e4 113 *(regp + CTX_CAUSE) = extract_signed_integer (buf, size);
44ed547b 114 }
c906108c 115
6a1872e4 116 if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->hi))
44ed547b 117 {
6a1872e4
UW
118 regi = mips_regnum (current_gdbarch)->hi;
119 size = register_size (current_gdbarch, regi);
7f7fe91e 120 regcache_raw_collect (regcache, regi, buf);
6a1872e4 121 *(regp + CTX_MDHI) = extract_signed_integer (buf, size);
44ed547b 122 }
c906108c 123
56cea623 124 if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo))
44ed547b 125 {
6a1872e4
UW
126 regi = mips_regnum (current_gdbarch)->lo;
127 size = register_size (current_gdbarch, regi);
7f7fe91e 128 regcache_raw_collect (regcache, regi, buf);
6a1872e4 129 *(regp + CTX_MDLO) = extract_signed_integer (buf, size);
44ed547b 130 }
c906108c
SS
131}
132
133/*
134 * Now we do the same thing for floating-point registers.
135 * We don't bother to condition on FP0_REGNUM since any
136 * reasonable MIPS configuration has an R3010 in it.
137 *
138 * Again, see the comments in m68k-tdep.c.
139 */
140
141void
7f7fe91e 142supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
c906108c 143{
52f0bd74 144 int regi;
466d7106 145 static char zerobuf[32] = {0};
6d1eba4c 146 char fsrbuf[8];
c906108c
SS
147
148 /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
149
150 for (regi = 0; regi < 32; regi++)
7f7fe91e
UW
151 regcache_raw_supply (regcache, FP0_REGNUM + regi,
152 (const char *) &fpregsetp->fp_r.fp_regs[regi]);
c906108c 153
6d1eba4c
JB
154 /* We can't supply the FSR register directly to the regcache,
155 because there is a size issue: On one hand, fpregsetp->fp_csr
156 is 32bits long, while the regcache expects a 64bits long value.
157 So we use a buffer of the correct size and copy into it the register
158 value at the proper location. */
159 memset (fsrbuf, 0, 4);
160 memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4);
161
7f7fe91e 162 regcache_raw_supply (regcache,
23a6d369 163 mips_regnum (current_gdbarch)->fp_control_status,
6d1eba4c 164 fsrbuf);
c906108c 165
56cea623 166 /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */
7f7fe91e 167 regcache_raw_supply (regcache,
23a6d369
AC
168 mips_regnum (current_gdbarch)->fp_implementation_revision,
169 zerobuf);
c906108c
SS
170}
171
172void
7f7fe91e 173fill_fpregset (const struct regcache *regcache, fpregset_t *fpregsetp, int regno)
c906108c
SS
174{
175 int regi;
176 char *from, *to;
177
178 /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
179
180 for (regi = FP0_REGNUM; regi < FP0_REGNUM + 32; regi++)
181 {
182 if ((regno == -1) || (regno == regi))
183 {
c906108c 184 to = (char *) &(fpregsetp->fp_r.fp_regs[regi - FP0_REGNUM]);
7f7fe91e 185 regcache_raw_collect (regcache, regi, to);
c906108c
SS
186 }
187 }
188
6d1eba4c
JB
189 if (regno == -1
190 || regno == mips_regnum (current_gdbarch)->fp_control_status)
191 {
192 char fsrbuf[8];
193
194 /* We can't fill the FSR register directly from the regcache,
195 because there is a size issue: On one hand, fpregsetp->fp_csr
196 is 32bits long, while the regcache expects a 64bits long buffer.
197 So we use a buffer of the correct size and copy the register
198 value from that buffer. */
7f7fe91e 199 regcache_raw_collect (regcache,
6a1872e4
UW
200 mips_regnum (current_gdbarch)->fp_control_status,
201 fsrbuf);
6d1eba4c
JB
202
203 memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4);
204 }
c906108c
SS
205}
206
207
208/* Figure out where the longjmp will land.
209 We expect the first arg to be a pointer to the jmp_buf structure from which
210 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
211 This routine returns true on success. */
212
213int
fba45db2 214get_longjmp_target (CORE_ADDR *pc)
c906108c 215{
35fc8285 216 char *buf;
c906108c
SS
217 CORE_ADDR jb_addr;
218
35fc8285 219 buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
613e114f 220 jb_addr = read_register (MIPS_A0_REGNUM);
c906108c
SS
221
222 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
223 TARGET_PTR_BIT / TARGET_CHAR_BIT))
224 return 0;
225
7c0b4a20 226 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
c906108c
SS
227
228 return 1;
229}
230
16bce26c
KB
231/* Provide registers to GDB from a core file.
232
233 CORE_REG_SECT points to an array of bytes, which were obtained from
234 a core file which BFD thinks might contain register contents.
235 CORE_REG_SIZE is its size.
236
237 Normally, WHICH says which register set corelow suspects this is:
238 0 --- the general-purpose register set
239 2 --- the floating-point register set
240 However, for Irix 5, WHICH isn't used.
241
242 REG_ADDR is also unused. */
243
c906108c 244static void
16bce26c
KB
245fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
246 int which, CORE_ADDR reg_addr)
c906108c 247{
f6e1bffc 248 char *srcp = core_reg_sect;
f58b68aa 249 int regsize = mips_isa_regsize (current_gdbarch);
f6e1bffc
JB
250 int regno;
251
f58b68aa
DJ
252 /* If regsize is 8, this is a N32 or N64 core file.
253 If regsize is 4, this is an O32 core file. */
254 if (core_reg_size != regsize * NUM_REGS)
c906108c 255 {
8a3fe4f8 256 warning (_("wrong size gregset struct in core file"));
c906108c
SS
257 return;
258 }
f58b68aa
DJ
259
260 for (regno = 0; regno < NUM_REGS; regno++)
261 {
8bb42077 262 regcache_raw_supply (current_regcache, regno, srcp);
f58b68aa
DJ
263 srcp += regsize;
264 }
c906108c 265}
c5aa993b 266
c906108c
SS
267/* Register that we are able to handle irix5 core file formats.
268 This really is bfd_target_unknown_flavour */
269
270static struct core_fns irix5_core_fns =
271{
2acceee2
JM
272 bfd_target_unknown_flavour, /* core_flavour */
273 default_check_format, /* check_format */
274 default_core_sniffer, /* core_sniffer */
275 fetch_core_registers, /* core_read_registers */
276 NULL /* next */
c906108c
SS
277};
278
279void
fba45db2 280_initialize_core_irix5 (void)
c906108c 281{
00e32a35 282 deprecated_add_core_fns (&irix5_core_fns);
c906108c 283}
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