* config/tc-mn10300.c (md_assemble): Copy size to real_size before
[deliverable/binutils-gdb.git] / gdb / lynx-nat.c
CommitLineData
c906108c
SS
1/* Native-dependent code for LynxOS.
2 Copyright 1993, 1994 Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "target.h"
25#include "gdbcore.h"
26
27#include <sys/ptrace.h>
28#include <sys/wait.h>
29#include <sys/fpp.h>
30
31static unsigned long registers_addr PARAMS ((int pid));
9846de1b 32static void fetch_core_registers PARAMS ((char *, unsigned, int, CORE_ADDR));
c906108c
SS
33
34#define X(ENTRY)(offsetof(struct econtext, ENTRY))
35
36#ifdef I386
37/* Mappings from tm-i386v.h */
38
39static int regmap[] =
40{
c5aa993b
JM
41 X (eax),
42 X (ecx),
43 X (edx),
44 X (ebx),
45 X (esp), /* sp */
46 X (ebp), /* fp */
47 X (esi),
48 X (edi),
49 X (eip), /* pc */
50 X (flags), /* ps */
51 X (cs),
52 X (ss),
53 X (ds),
54 X (es),
55 X (ecode), /* Lynx doesn't give us either fs or gs, so */
56 X (fault), /* we just substitute these two in the hopes
c906108c
SS
57 that they are useful. */
58};
59#endif /* I386 */
60
61#ifdef M68K
62/* Mappings from tm-m68k.h */
63
64static int regmap[] =
65{
c5aa993b
JM
66 X (regs[0]), /* d0 */
67 X (regs[1]), /* d1 */
68 X (regs[2]), /* d2 */
69 X (regs[3]), /* d3 */
70 X (regs[4]), /* d4 */
71 X (regs[5]), /* d5 */
72 X (regs[6]), /* d6 */
73 X (regs[7]), /* d7 */
74 X (regs[8]), /* a0 */
75 X (regs[9]), /* a1 */
76 X (regs[10]), /* a2 */
77 X (regs[11]), /* a3 */
78 X (regs[12]), /* a4 */
79 X (regs[13]), /* a5 */
80 X (regs[14]), /* fp */
81 offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
82 X (status), /* ps */
83 X (pc),
84
85 X (fregs[0 * 3]), /* fp0 */
86 X (fregs[1 * 3]), /* fp1 */
87 X (fregs[2 * 3]), /* fp2 */
88 X (fregs[3 * 3]), /* fp3 */
89 X (fregs[4 * 3]), /* fp4 */
90 X (fregs[5 * 3]), /* fp5 */
91 X (fregs[6 * 3]), /* fp6 */
92 X (fregs[7 * 3]), /* fp7 */
93
94 X (fcregs[0]), /* fpcontrol */
95 X (fcregs[1]), /* fpstatus */
96 X (fcregs[2]), /* fpiaddr */
97 X (ssw), /* fpcode */
98 X (fault), /* fpflags */
c906108c
SS
99};
100#endif /* M68K */
101
102#ifdef SPARC
103/* Mappings from tm-sparc.h */
104
105#define FX(ENTRY)(offsetof(struct fcontext, ENTRY))
106
107static int regmap[] =
108{
109 -1, /* g0 */
c5aa993b
JM
110 X (g1),
111 X (g2),
112 X (g3),
113 X (g4),
c906108c
SS
114 -1, /* g5->g7 aren't saved by Lynx */
115 -1,
116 -1,
117
c5aa993b
JM
118 X (o[0]),
119 X (o[1]),
120 X (o[2]),
121 X (o[3]),
122 X (o[4]),
123 X (o[5]),
124 X (o[6]), /* sp */
125 X (o[7]), /* ra */
126
127 -1, -1, -1, -1, -1, -1, -1, -1, /* l0 -> l7 */
128
129 -1, -1, -1, -1, -1, -1, -1, -1, /* i0 -> i7 */
130
131 FX (f.fregs[0]), /* f0 */
132 FX (f.fregs[1]),
133 FX (f.fregs[2]),
134 FX (f.fregs[3]),
135 FX (f.fregs[4]),
136 FX (f.fregs[5]),
137 FX (f.fregs[6]),
138 FX (f.fregs[7]),
139 FX (f.fregs[8]),
140 FX (f.fregs[9]),
141 FX (f.fregs[10]),
142 FX (f.fregs[11]),
143 FX (f.fregs[12]),
144 FX (f.fregs[13]),
145 FX (f.fregs[14]),
146 FX (f.fregs[15]),
147 FX (f.fregs[16]),
148 FX (f.fregs[17]),
149 FX (f.fregs[18]),
150 FX (f.fregs[19]),
151 FX (f.fregs[20]),
152 FX (f.fregs[21]),
153 FX (f.fregs[22]),
154 FX (f.fregs[23]),
155 FX (f.fregs[24]),
156 FX (f.fregs[25]),
157 FX (f.fregs[26]),
158 FX (f.fregs[27]),
159 FX (f.fregs[28]),
160 FX (f.fregs[29]),
161 FX (f.fregs[30]),
162 FX (f.fregs[31]),
163
164 X (y),
165 X (psr),
166 X (wim),
167 X (tbr),
168 X (pc),
169 X (npc),
170 FX (fsr), /* fpsr */
c906108c
SS
171 -1, /* cpsr */
172};
173#endif /* SPARC */
174
175#ifdef rs6000
176
177static int regmap[] =
178{
c5aa993b
JM
179 X (iregs[0]), /* r0 */
180 X (iregs[1]),
181 X (iregs[2]),
182 X (iregs[3]),
183 X (iregs[4]),
184 X (iregs[5]),
185 X (iregs[6]),
186 X (iregs[7]),
187 X (iregs[8]),
188 X (iregs[9]),
189 X (iregs[10]),
190 X (iregs[11]),
191 X (iregs[12]),
192 X (iregs[13]),
193 X (iregs[14]),
194 X (iregs[15]),
195 X (iregs[16]),
196 X (iregs[17]),
197 X (iregs[18]),
198 X (iregs[19]),
199 X (iregs[20]),
200 X (iregs[21]),
201 X (iregs[22]),
202 X (iregs[23]),
203 X (iregs[24]),
204 X (iregs[25]),
205 X (iregs[26]),
206 X (iregs[27]),
207 X (iregs[28]),
208 X (iregs[29]),
209 X (iregs[30]),
210 X (iregs[31]),
211
212 X (fregs[0]), /* f0 */
213 X (fregs[1]),
214 X (fregs[2]),
215 X (fregs[3]),
216 X (fregs[4]),
217 X (fregs[5]),
218 X (fregs[6]),
219 X (fregs[7]),
220 X (fregs[8]),
221 X (fregs[9]),
222 X (fregs[10]),
223 X (fregs[11]),
224 X (fregs[12]),
225 X (fregs[13]),
226 X (fregs[14]),
227 X (fregs[15]),
228 X (fregs[16]),
229 X (fregs[17]),
230 X (fregs[18]),
231 X (fregs[19]),
232 X (fregs[20]),
233 X (fregs[21]),
234 X (fregs[22]),
235 X (fregs[23]),
236 X (fregs[24]),
237 X (fregs[25]),
238 X (fregs[26]),
239 X (fregs[27]),
240 X (fregs[28]),
241 X (fregs[29]),
242 X (fregs[30]),
243 X (fregs[31]),
244
245 X (srr0), /* IAR (PC) */
246 X (srr1), /* MSR (PS) */
247 X (cr), /* CR */
248 X (lr), /* LR */
249 X (ctr), /* CTR */
250 X (xer), /* XER */
251 X (mq) /* MQ */
c906108c
SS
252};
253
254#endif /* rs6000 */
255
256#ifdef SPARC
257
258/* This routine handles some oddball cases for Sparc registers and LynxOS.
259 In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
260 It also handles knows where to find the I & L regs on the stack. */
261
262void
263fetch_inferior_registers (regno)
264 int regno;
265{
266 int whatregs = 0;
267
268#define WHATREGS_FLOAT 1
269#define WHATREGS_GEN 2
270#define WHATREGS_STACK 4
271
272 if (regno == -1)
273 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
274 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
275 whatregs = WHATREGS_STACK;
276 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
277 whatregs = WHATREGS_FLOAT;
278 else
279 whatregs = WHATREGS_GEN;
280
281 if (whatregs & WHATREGS_GEN)
282 {
c5aa993b 283 struct econtext ec; /* general regs */
c906108c
SS
284 char buf[MAX_REGISTER_RAW_SIZE];
285 int retval;
286 int i;
287
288 errno = 0;
c5aa993b 289 retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) & ec,
c906108c
SS
290 0);
291 if (errno)
292 perror_with_name ("ptrace(PTRACE_GETREGS)");
c5aa993b 293
c906108c
SS
294 memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
295 supply_register (G0_REGNUM, buf);
c5aa993b 296 supply_register (TBR_REGNUM, (char *) &ec.tbr);
c906108c
SS
297
298 memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
299 4 * REGISTER_RAW_SIZE (G1_REGNUM));
300 for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
301 register_valid[i] = 1;
302
c5aa993b
JM
303 supply_register (PS_REGNUM, (char *) &ec.psr);
304 supply_register (Y_REGNUM, (char *) &ec.y);
305 supply_register (PC_REGNUM, (char *) &ec.pc);
306 supply_register (NPC_REGNUM, (char *) &ec.npc);
307 supply_register (WIM_REGNUM, (char *) &ec.wim);
c906108c
SS
308
309 memcpy (&registers[REGISTER_BYTE (O0_REGNUM)], ec.o,
310 8 * REGISTER_RAW_SIZE (O0_REGNUM));
311 for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
312 register_valid[i] = 1;
313 }
314
315 if (whatregs & WHATREGS_STACK)
316 {
317 CORE_ADDR sp;
318 int i;
319
320 sp = read_register (SP_REGNUM);
321
f7384f0f 322 target_read_memory (sp + FRAME_SAVED_I0,
c5aa993b 323 &registers[REGISTER_BYTE (I0_REGNUM)],
f7384f0f 324 8 * REGISTER_RAW_SIZE (I0_REGNUM));
c906108c
SS
325 for (i = I0_REGNUM; i <= I7_REGNUM; i++)
326 register_valid[i] = 1;
327
f7384f0f 328 target_read_memory (sp + FRAME_SAVED_L0,
c5aa993b 329 &registers[REGISTER_BYTE (L0_REGNUM)],
f7384f0f 330 8 * REGISTER_RAW_SIZE (L0_REGNUM));
c906108c
SS
331 for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
332 register_valid[i] = 1;
333 }
334
335 if (whatregs & WHATREGS_FLOAT)
336 {
c5aa993b 337 struct fcontext fc; /* fp regs */
c906108c
SS
338 int retval;
339 int i;
340
341 errno = 0;
c5aa993b 342 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) & fc,
c906108c
SS
343 0);
344 if (errno)
345 perror_with_name ("ptrace(PTRACE_GETFPREGS)");
c5aa993b 346
c906108c
SS
347 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
348 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
349 for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
350 register_valid[i] = 1;
351
c5aa993b 352 supply_register (FPS_REGNUM, (char *) &fc.fsr);
c906108c
SS
353 }
354}
355
356/* This routine handles storing of the I & L regs for the Sparc. The trick
357 here is that they actually live on the stack. The really tricky part is
358 that when changing the stack pointer, the I & L regs must be written to
359 where the new SP points, otherwise the regs will be incorrect when the
360 process is started up again. We assume that the I & L regs are valid at
361 this point. */
362
363void
364store_inferior_registers (regno)
365 int regno;
366{
367 int whatregs = 0;
368
369 if (regno == -1)
370 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
371 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
372 whatregs = WHATREGS_STACK;
373 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
374 whatregs = WHATREGS_FLOAT;
375 else if (regno == SP_REGNUM)
376 whatregs = WHATREGS_STACK | WHATREGS_GEN;
377 else
378 whatregs = WHATREGS_GEN;
379
380 if (whatregs & WHATREGS_GEN)
381 {
c5aa993b 382 struct econtext ec; /* general regs */
c906108c
SS
383 int retval;
384
385 ec.tbr = read_register (TBR_REGNUM);
386 memcpy (&ec.g1, &registers[REGISTER_BYTE (G1_REGNUM)],
387 4 * REGISTER_RAW_SIZE (G1_REGNUM));
388
389 ec.psr = read_register (PS_REGNUM);
390 ec.y = read_register (Y_REGNUM);
391 ec.pc = read_register (PC_REGNUM);
392 ec.npc = read_register (NPC_REGNUM);
393 ec.wim = read_register (WIM_REGNUM);
394
395 memcpy (ec.o, &registers[REGISTER_BYTE (O0_REGNUM)],
396 8 * REGISTER_RAW_SIZE (O0_REGNUM));
397
398 errno = 0;
c5aa993b 399 retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) & ec,
c906108c
SS
400 0);
401 if (errno)
402 perror_with_name ("ptrace(PTRACE_SETREGS)");
403 }
404
405 if (whatregs & WHATREGS_STACK)
406 {
407 int regoffset;
408 CORE_ADDR sp;
409
410 sp = read_register (SP_REGNUM);
411
412 if (regno == -1 || regno == SP_REGNUM)
413 {
c5aa993b
JM
414 if (!register_valid[L0_REGNUM + 5])
415 abort ();
f7384f0f 416 target_write_memory (sp + FRAME_SAVED_I0,
c906108c 417 &registers[REGISTER_BYTE (I0_REGNUM)],
f7384f0f 418 8 * REGISTER_RAW_SIZE (I0_REGNUM));
c906108c 419
f7384f0f 420 target_write_memory (sp + FRAME_SAVED_L0,
c906108c 421 &registers[REGISTER_BYTE (L0_REGNUM)],
f7384f0f 422 8 * REGISTER_RAW_SIZE (L0_REGNUM));
c906108c
SS
423 }
424 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
425 {
426 if (!register_valid[regno])
c5aa993b 427 abort ();
c906108c
SS
428 if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
429 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
430 + FRAME_SAVED_L0;
431 else
432 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM)
433 + FRAME_SAVED_I0;
f7384f0f
AC
434 target_write_memory (sp + regoffset,
435 &registers[REGISTER_BYTE (regno)],
436 REGISTER_RAW_SIZE (regno));
c906108c
SS
437 }
438 }
439
440 if (whatregs & WHATREGS_FLOAT)
441 {
c5aa993b 442 struct fcontext fc; /* fp regs */
c906108c
SS
443 int retval;
444
445/* We read fcontext first so that we can get good values for fq_t... */
446 errno = 0;
c5aa993b 447 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) & fc,
c906108c
SS
448 0);
449 if (errno)
450 perror_with_name ("ptrace(PTRACE_GETFPREGS)");
c5aa993b 451
c906108c
SS
452 memcpy (fc.f.fregs, &registers[REGISTER_BYTE (FP0_REGNUM)],
453 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
454
455 fc.fsr = read_register (FPS_REGNUM);
456
457 errno = 0;
c5aa993b 458 retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) & fc,
c906108c
SS
459 0);
460 if (errno)
461 perror_with_name ("ptrace(PTRACE_SETFPREGS)");
c5aa993b 462 }
c906108c
SS
463}
464#endif /* SPARC */
465
466#if defined (I386) || defined (M68K) || defined (rs6000)
467
468/* Return the offset relative to the start of the per-thread data to the
469 saved context block. */
470
471static unsigned long
c5aa993b 472registers_addr (pid)
c906108c
SS
473 int pid;
474{
475 CORE_ADDR stblock;
c5aa993b 476 int ecpoff = offsetof (st_t, ecp);
c906108c
SS
477 CORE_ADDR ecp;
478
479 errno = 0;
c5aa993b 480 stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE) 0,
c906108c
SS
481 0);
482 if (errno)
483 perror_with_name ("ptrace(PTRACE_THREADUSER)");
484
c5aa993b 485 ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE) ecpoff,
c906108c
SS
486 0);
487 if (errno)
488 perror_with_name ("ptrace(PTRACE_PEEKTHREAD)");
489
490 return ecp - stblock;
491}
492
493/* Fetch one or more registers from the inferior. REGNO == -1 to get
494 them all. We actually fetch more than requested, when convenient,
495 marking them as valid so we won't fetch them again. */
496
497void
498fetch_inferior_registers (regno)
499 int regno;
500{
501 int reglo, reghi;
502 int i;
503 unsigned long ecp;
504
505 if (regno == -1)
506 {
507 reglo = 0;
508 reghi = NUM_REGS - 1;
509 }
510 else
511 reglo = reghi = regno;
512
513 ecp = registers_addr (inferior_pid);
514
515 for (regno = reglo; regno <= reghi; regno++)
516 {
517 char buf[MAX_REGISTER_RAW_SIZE];
518 int ptrace_fun = PTRACE_PEEKTHREAD;
519
520#ifdef M68K
521 ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
522#endif
523
524 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
525 {
526 unsigned int reg;
527
528 errno = 0;
529 reg = ptrace (ptrace_fun, inferior_pid,
530 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
531 if (errno)
532 perror_with_name ("ptrace(PTRACE_PEEKUSP)");
c5aa993b
JM
533
534 *(int *) &buf[i] = reg;
c906108c
SS
535 }
536 supply_register (regno, buf);
537 }
538}
539
540/* Store our register values back into the inferior.
541 If REGNO is -1, do this for all registers.
542 Otherwise, REGNO specifies which register (so we can save time). */
543
544/* Registers we shouldn't try to store. */
545#if !defined (CANNOT_STORE_REGISTER)
546#define CANNOT_STORE_REGISTER(regno) 0
547#endif
548
549void
550store_inferior_registers (regno)
551 int regno;
552{
553 int reglo, reghi;
554 int i;
555 unsigned long ecp;
556
557 if (regno == -1)
558 {
559 reglo = 0;
560 reghi = NUM_REGS - 1;
561 }
562 else
563 reglo = reghi = regno;
564
565 ecp = registers_addr (inferior_pid);
566
567 for (regno = reglo; regno <= reghi; regno++)
568 {
569 int ptrace_fun = PTRACE_POKEUSER;
570
571 if (CANNOT_STORE_REGISTER (regno))
572 continue;
573
574#ifdef M68K
575 ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
576#endif
577
578 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
579 {
580 unsigned int reg;
581
c5aa993b 582 reg = *(unsigned int *) &registers[REGISTER_BYTE (regno) + i];
c906108c
SS
583
584 errno = 0;
585 ptrace (ptrace_fun, inferior_pid,
586 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
587 if (errno)
588 perror_with_name ("ptrace(PTRACE_POKEUSP)");
589 }
590 }
591}
592#endif /* defined (I386) || defined (M68K) || defined (rs6000) */
593
594/* Wait for child to do something. Return pid of child, or -1 in case
595 of error; store status through argument pointer OURSTATUS. */
596
597int
598child_wait (pid, ourstatus)
599 int pid;
600 struct target_waitstatus *ourstatus;
601{
602 int save_errno;
603 int thread;
604 union wait status;
605
606 while (1)
607 {
608 int sig;
609
c5aa993b 610 set_sigint_trap (); /* Causes SIGINT to be passed on to the
c906108c
SS
611 attached process. */
612 pid = wait (&status);
613
614 save_errno = errno;
615
c5aa993b 616 clear_sigint_trap ();
c906108c
SS
617
618 if (pid == -1)
619 {
620 if (save_errno == EINTR)
621 continue;
622 fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
c5aa993b 623 safe_strerror (save_errno));
c906108c
SS
624 /* Claim it exited with unknown signal. */
625 ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
626 ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
627 return -1;
628 }
629
c5aa993b 630 if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
c906108c
SS
631 continue;
632
633 thread = status.w_tid; /* Get thread id from status */
634
635 /* Initial thread value can only be acquired via wait, so we have to
c5aa993b 636 resort to this hack. */
c906108c
SS
637
638 if (TIDGET (inferior_pid) == 0 && thread != 0)
639 {
640 inferior_pid = BUILDPID (inferior_pid, thread);
641 add_thread (inferior_pid);
642 }
643
644 pid = BUILDPID (pid, thread);
645
646 /* We've become a single threaded process again. */
647 if (thread == 0)
648 inferior_pid = pid;
649
650 /* Check for thread creation. */
c5aa993b
JM
651 if (WIFSTOPPED (status)
652 && WSTOPSIG (status) == SIGTRAP
c906108c
SS
653 && !in_thread_list (pid))
654 {
655 int realsig;
656
c5aa993b 657 realsig = ptrace (PTRACE_GETTRACESIG, pid, (PTRACE_ARG3_TYPE) 0, 0);
c906108c
SS
658
659 if (realsig == SIGNEWTHREAD)
660 {
661 /* It's a new thread notification. We don't want to much with
c5aa993b 662 realsig -- the code in wait_for_inferior expects SIGTRAP. */
c906108c
SS
663 ourstatus->kind = TARGET_WAITKIND_SPURIOUS;
664 ourstatus->value.sig = TARGET_SIGNAL_0;
665 return pid;
666 }
667 else
668 error ("Signal for unknown thread was not SIGNEWTHREAD");
669 }
670
671 /* Check for thread termination. */
c5aa993b
JM
672 else if (WIFSTOPPED (status)
673 && WSTOPSIG (status) == SIGTRAP
c906108c
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674 && in_thread_list (pid))
675 {
676 int realsig;
677
c5aa993b 678 realsig = ptrace (PTRACE_GETTRACESIG, pid, (PTRACE_ARG3_TYPE) 0, 0);
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679
680 if (realsig == SIGTHREADEXIT)
681 {
c5aa993b 682 ptrace (PTRACE_CONT, PIDGET (pid), (PTRACE_ARG3_TYPE) 0, 0);
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683 continue;
684 }
685 }
686
687#ifdef SPARC
688 /* SPARC Lynx uses an byte reversed wait status; we must use the
c5aa993b
JM
689 host macros to access it. These lines just a copy of
690 store_waitstatus. We can't use CHILD_SPECIAL_WAITSTATUS
691 because target.c can't include the Lynx <sys/wait.h>. */
c906108c
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692 if (WIFEXITED (status))
693 {
694 ourstatus->kind = TARGET_WAITKIND_EXITED;
695 ourstatus->value.integer = WEXITSTATUS (status);
696 }
697 else if (!WIFSTOPPED (status))
698 {
699 ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
700 ourstatus->value.sig =
701 target_signal_from_host (WTERMSIG (status));
702 }
703 else
704 {
705 ourstatus->kind = TARGET_WAITKIND_STOPPED;
706 ourstatus->value.sig =
707 target_signal_from_host (WSTOPSIG (status));
708 }
709#else
710 store_waitstatus (ourstatus, status.w_status);
711#endif
712
713 return pid;
714 }
715}
716
717/* Return nonzero if the given thread is still alive. */
718int
719child_thread_alive (pid)
720 int pid;
721{
722 /* Arggh. Apparently pthread_kill only works for threads within
723 the process that calls pthread_kill.
724
725 We want to avoid the lynx signal extensions as they simply don't
726 map well to the generic gdb interface we want to keep.
727
728 All we want to do is determine if a particular thread is alive;
729 it appears as if we can just make a harmless thread specific
730 ptrace call to do that. */
731 return (ptrace (PTRACE_THREADUSER, pid, 0, 0) != -1);
732}
733
734/* Resume execution of the inferior process.
735 If STEP is nonzero, single-step it.
736 If SIGNAL is nonzero, give it that signal. */
737
738void
739child_resume (pid, step, signal)
740 int pid;
741 int step;
742 enum target_signal signal;
743{
744 int func;
745
746 errno = 0;
747
748 /* If pid == -1, then we want to step/continue all threads, else
749 we only want to step/continue a single thread. */
750 if (pid == -1)
751 {
752 pid = inferior_pid;
753 func = step ? PTRACE_SINGLESTEP : PTRACE_CONT;
754 }
755 else
756 func = step ? PTRACE_SINGLESTEP_ONE : PTRACE_CONT_ONE;
757
758
759 /* An address of (PTRACE_ARG3_TYPE)1 tells ptrace to continue from where
760 it was. (If GDB wanted it to start some other way, we have already
761 written a new PC value to the child.)
762
763 If this system does not support PT_STEP, a higher level function will
764 have called single_step() to transmute the step request into a
765 continue request (by setting breakpoints on all possible successor
766 instructions), so we don't have to worry about that here. */
767
768 ptrace (func, pid, (PTRACE_ARG3_TYPE) 1, target_signal_to_host (signal));
769
770 if (errno)
771 perror_with_name ("ptrace");
772}
773
774/* Convert a Lynx process ID to a string. Returns the string in a static
775 buffer. */
776
777char *
ed9a39eb 778child_pid_to_str (pid)
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779 int pid;
780{
781 static char buf[40];
782
783 sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));
784
785 return buf;
786}
787
788/* Extract the register values out of the core file and store
789 them where `read_register' will find them.
790
791 CORE_REG_SECT points to the register values themselves, read into memory.
792 CORE_REG_SIZE is the size of that area.
793 WHICH says which set of registers we are handling (0 = int, 2 = float
c5aa993b 794 on machines where they are discontiguous).
c906108c 795 REG_ADDR is the offset from u.u_ar0 to the register values relative to
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796 core_reg_sect. This is used with old-fashioned core files to
797 locate the registers in a large upage-plus-stack ".reg" section.
798 Original upage address X is at location core_reg_sect+x+reg_addr.
c906108c
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799 */
800
801static void
802fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
803 char *core_reg_sect;
804 unsigned core_reg_size;
805 int which;
806 CORE_ADDR reg_addr;
807{
808 struct st_entry s;
809 unsigned int regno;
810
811 for (regno = 0; regno < NUM_REGS; regno++)
812 if (regmap[regno] != -1)
813 supply_register (regno, core_reg_sect + offsetof (st_t, ec)
814 + regmap[regno]);
815
816#ifdef SPARC
817/* Fetching this register causes all of the I & L regs to be read from the
818 stack and validated. */
819
820 fetch_inferior_registers (I0_REGNUM);
821#endif
822}
c906108c 823\f
c5aa993b 824
c906108c
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825/* Register that we are able to handle lynx core file formats.
826 FIXME: is this really bfd_target_unknown_flavour? */
827
828static struct core_fns lynx_core_fns =
829{
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JM
830 bfd_target_unknown_flavour, /* core_flavour */
831 default_check_format, /* check_format */
832 default_core_sniffer, /* core_sniffer */
833 fetch_core_registers, /* core_read_registers */
834 NULL /* next */
c906108c
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835};
836
837void
838_initialize_core_lynx ()
839{
840 add_core_fns (&lynx_core_fns);
841}
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